VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 60309

Last change on this file since 60309 was 60309, checked in by vboxsync, 9 years ago

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDevIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is always called when VMR3PowerOff is called.
164 * There will be no callback when hot plugging devices.
165 *
166 * @param pDevIns The device instance data.
167 * @thread EMT(0)
168 *
169 * @remarks Caller enters the device critical section.
170 */
171typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
172/** Pointer to a FNPDMDEVPOWEROFF() function. */
173typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
174
175/**
176 * Attach command.
177 *
178 * This is called to let the device attach to a driver for a specified LUN
179 * at runtime. This is not called during VM construction, the device
180 * constructor has to attach to all the available drivers.
181 *
182 * This is like plugging in the keyboard or mouse after turning on the PC.
183 *
184 * @returns VBox status code.
185 * @param pDevIns The device instance.
186 * @param iLUN The logical unit which is being attached.
187 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
188 *
189 * @remarks Caller enters the device critical section.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust its state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 *
208 * @remarks Caller enters the device critical section.
209 */
210typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
211/** Pointer to a FNPDMDEVDETACH() function. */
212typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
213
214/**
215 * Query the base interface of a logical unit.
216 *
217 * @returns VBOX status code.
218 * @param pDevIns The device instance.
219 * @param iLUN The logicial unit to query.
220 * @param ppBase Where to store the pointer to the base interface of the LUN.
221 *
222 * @remarks The device critical section is not entered.
223 */
224typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
225/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
226typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
227
228/**
229 * Init complete notification.
230 * This can be done to do communication with other devices and other
231 * initialization which requires everything to be in place.
232 *
233 * @returns VBOX status code.
234 * @param pDevIns The device instance.
235 *
236 * @remarks Caller enters the device critical section.
237 */
238typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
239/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
240typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
241
242
243/**
244 * The context of a pfnMemSetup call.
245 */
246typedef enum PDMDEVMEMSETUPCTX
247{
248 /** Invalid zero value. */
249 PDMDEVMEMSETUPCTX_INVALID = 0,
250 /** After construction. */
251 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
252 /** After reset. */
253 PDMDEVMEMSETUPCTX_AFTER_RESET,
254 /** Type size hack. */
255 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
256} PDMDEVMEMSETUPCTX;
257
258
259/**
260 * PDM Device Registration Structure.
261 *
262 * This structure is used when registering a device from VBoxInitDevices() in HC
263 * Ring-3. PDM will continue use till the VM is terminated.
264 */
265typedef struct PDMDEVREG
266{
267 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
268 uint32_t u32Version;
269 /** Device name. */
270 char szName[32];
271 /** Name of the raw-mode context module (no path).
272 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
273 char szRCMod[32];
274 /** Name of the ring-0 module (no path).
275 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
276 char szR0Mod[32];
277 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
278 * remain unchanged from registration till VM destruction. */
279 const char *pszDescription;
280
281 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
282 uint32_t fFlags;
283 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
284 uint32_t fClass;
285 /** Maximum number of instances (per VM). */
286 uint32_t cMaxInstances;
287 /** Size of the instance data. */
288 uint32_t cbInstance;
289
290 /** Construct instance - required. */
291 PFNPDMDEVCONSTRUCT pfnConstruct;
292 /** Destruct instance - optional.
293 * Critical section NOT entered (will be destroyed). */
294 PFNPDMDEVDESTRUCT pfnDestruct;
295 /** Relocation command - optional.
296 * Critical section NOT entered. */
297 PFNPDMDEVRELOCATE pfnRelocate;
298
299 /**
300 * Memory setup callback.
301 *
302 * @param pDevIns The device instance data.
303 * @param enmCtx Indicates the context of the call.
304 * @remarks The critical section is entered prior to calling this method.
305 */
306 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
307
308 /** Power on notification - optional.
309 * Critical section is entered. */
310 PFNPDMDEVPOWERON pfnPowerOn;
311 /** Reset notification - optional.
312 * Critical section is entered. */
313 PFNPDMDEVRESET pfnReset;
314 /** Suspend notification - optional.
315 * Critical section is entered. */
316 PFNPDMDEVSUSPEND pfnSuspend;
317 /** Resume notification - optional.
318 * Critical section is entered. */
319 PFNPDMDEVRESUME pfnResume;
320 /** Attach command - optional.
321 * Critical section is entered. */
322 PFNPDMDEVATTACH pfnAttach;
323 /** Detach notification - optional.
324 * Critical section is entered. */
325 PFNPDMDEVDETACH pfnDetach;
326 /** Query a LUN base interface - optional.
327 * Critical section is NOT entered. */
328 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
329 /** Init complete notification - optional.
330 * Critical section is entered. */
331 PFNPDMDEVINITCOMPLETE pfnInitComplete;
332 /** Power off notification - optional.
333 * Critical section is entered. */
334 PFNPDMDEVPOWEROFF pfnPowerOff;
335 /** @todo */
336 PFNRT pfnSoftReset;
337 /** Initialization safty marker. */
338 uint32_t u32VersionEnd;
339} PDMDEVREG;
340/** Pointer to a PDM Device Structure. */
341typedef PDMDEVREG *PPDMDEVREG;
342/** Const pointer to a PDM Device Structure. */
343typedef PDMDEVREG const *PCPDMDEVREG;
344
345/** Current DEVREG version number. */
346#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
347
348/** PDM Device Flags.
349 * @{ */
350/** This flag is used to indicate that the device has a RC component. */
351#define PDM_DEVREG_FLAGS_RC 0x00000001
352/** This flag is used to indicate that the device has a R0 component. */
353#define PDM_DEVREG_FLAGS_R0 0x00000002
354
355/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
356 * The bit count for the current host. */
357#if HC_ARCH_BITS == 32
358# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
359#elif HC_ARCH_BITS == 64
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
361#else
362# error Unsupported HC_ARCH_BITS value.
363#endif
364/** The host bit count mask. */
365#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
366
367/** The device support only 32-bit guests. */
368#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
369/** The device support only 64-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
371/** The device support both 32-bit & 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
373/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
374 * The guest bit count for the current compilation. */
375#if GC_ARCH_BITS == 32
376# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
377#elif GC_ARCH_BITS == 64
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
379#else
380# error Unsupported GC_ARCH_BITS value.
381#endif
382/** The guest bit count mask. */
383#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
384
385/** A convenience. */
386#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
387
388/** Indicates that the devices support PAE36 on a 32-bit guest. */
389#define PDM_DEVREG_FLAGS_PAE36 0x00001000
390
391/** Indicates that the device needs to be notified before the drivers when suspending. */
392#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
393
394/** Indicates that the device needs to be notified before the drivers when powering off. */
395#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
396
397/** Indicates that the device needs to be notified before the drivers when resetting. */
398#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
399/** @} */
400
401
402/** PDM Device Classes.
403 * The order is important, lower bit earlier instantiation.
404 * @{ */
405/** Architecture device. */
406#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
407/** Architecture BIOS device. */
408#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
409/** PCI bus brigde. */
410#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
411/** ISA bus brigde. */
412#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
413/** Input device (mouse, keyboard, joystick, HID, ...). */
414#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
415/** Interrupt controller (PIC). */
416#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
417/** Interval controoler (PIT). */
418#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
419/** RTC/CMOS. */
420#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
421/** DMA controller. */
422#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
423/** VMM Device. */
424#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
425/** Graphics device, like VGA. */
426#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
427/** Storage controller device. */
428#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
429/** Network interface controller. */
430#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
431/** Audio. */
432#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
433/** USB HIC. */
434#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
435/** ACPI. */
436#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
437/** Serial controller device. */
438#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
439/** Parallel controller device */
440#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
441/** Host PCI pass-through device */
442#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
443/** Misc devices (always last). */
444#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
445/** @} */
446
447
448/** @name IRQ Level for use with the *SetIrq APIs.
449 * @{
450 */
451/** Assert the IRQ (can assume value 1). */
452#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
453/** Deassert the IRQ (can assume value 0). */
454#define PDM_IRQ_LEVEL_LOW 0
455/** flip-flop - deassert and then assert the IRQ again immediately. */
456#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
457/** @} */
458
459/**
460 * Registration record for MSI.
461 */
462typedef struct PDMMSIREG
463{
464 /** Number of MSI interrupt vectors, 0 if MSI not supported */
465 uint16_t cMsiVectors;
466 /** Offset of MSI capability */
467 uint8_t iMsiCapOffset;
468 /** Offset of next capability to MSI */
469 uint8_t iMsiNextOffset;
470 /** If we support 64-bit MSI addressing */
471 bool fMsi64bit;
472
473 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
474 uint16_t cMsixVectors;
475 /** Offset of MSI-X capability */
476 uint8_t iMsixCapOffset;
477 /** Offset of next capability to MSI-X */
478 uint8_t iMsixNextOffset;
479 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
480 uint8_t iMsixBar;
481} PDMMSIREG;
482typedef PDMMSIREG *PPDMMSIREG;
483
484/**
485 * PCI Bus registration structure.
486 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
487 */
488typedef struct PDMPCIBUSREG
489{
490 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
491 uint32_t u32Version;
492
493 /**
494 * Registers the device with the default PCI bus.
495 *
496 * @returns VBox status code.
497 * @param pDevIns Device instance of the PCI Bus.
498 * @param pPciDev The PCI device structure.
499 * Any PCI enabled device must keep this in it's instance data!
500 * Fill in the PCI data config before registration, please.
501 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
502 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
503 * If negative, the pci bus device will assign one.
504 * @remarks Caller enters the PDM critical section.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
507
508 /**
509 * Initialize MSI support in a PCI device.
510 *
511 * @returns VBox status code.
512 * @param pDevIns Device instance of the PCI Bus.
513 * @param pPciDev The PCI device structure.
514 * @param pMsiReg MSI registration structure
515 * @remarks Caller enters the PDM critical section.
516 */
517 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
518
519 /**
520 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
521 *
522 * @returns VBox status code.
523 * @param pDevIns Device instance of the PCI Bus.
524 * @param pPciDev The PCI device structure.
525 * @param iRegion The region number.
526 * @param cbRegion Size of the region.
527 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
528 * @param pfnCallback Callback for doing the mapping.
529 * @remarks Caller enters the PDM critical section.
530 */
531 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
532
533 /**
534 * Register PCI configuration space read/write callbacks.
535 *
536 * @param pDevIns Device instance of the PCI Bus.
537 * @param pPciDev The PCI device structure.
538 * @param pfnRead Pointer to the user defined PCI config read function.
539 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
540 * PCI config read function. This way, user can decide when (and if)
541 * to call default PCI config read function. Can be NULL.
542 * @param pfnWrite Pointer to the user defined PCI config write function.
543 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
544 * PCI config write function. This way, user can decide when (and if)
545 * to call default PCI config write function. Can be NULL.
546 * @remarks Caller enters the PDM critical section.
547 * @thread EMT
548 */
549 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
550 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
551
552 /**
553 * Set the IRQ for a PCI device.
554 *
555 * @param pDevIns Device instance of the PCI Bus.
556 * @param pPciDev The PCI device structure.
557 * @param iIrq IRQ number to set.
558 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
559 * @param uTagSrc The IRQ tag and source (for tracing).
560 * @remarks Caller enters the PDM critical section.
561 */
562 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
563
564 /**
565 * Called to perform the job of the bios.
566 * This is only called for the first PCI Bus - it is expected to
567 * service all the PCI buses.
568 *
569 * @returns VBox status.
570 * @param pDevIns Device instance of the first bus.
571 * @remarks Caller enters the PDM critical section.
572 */
573 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
574
575 /** The name of the SetIrq RC entry point. */
576 const char *pszSetIrqRC;
577
578 /** The name of the SetIrq R0 entry point. */
579 const char *pszSetIrqR0;
580
581} PDMPCIBUSREG;
582/** Pointer to a PCI bus registration structure. */
583typedef PDMPCIBUSREG *PPDMPCIBUSREG;
584
585/** Current PDMPCIBUSREG version number. */
586#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
587
588/**
589 * PCI Bus RC helpers.
590 */
591typedef struct PDMPCIHLPRC
592{
593 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
594 uint32_t u32Version;
595
596 /**
597 * Set an ISA IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @param uTagSrc The IRQ tag and source (for tracing).
603 * @thread EMT only.
604 */
605 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
606
607 /**
608 * Set an I/O-APIC IRQ.
609 *
610 * @param pDevIns PCI device instance.
611 * @param iIrq IRQ number to set.
612 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
613 * @param uTagSrc The IRQ tag and source (for tracing).
614 * @thread EMT only.
615 */
616 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
617
618 /**
619 * Send an MSI.
620 *
621 * @param pDevIns PCI device instance.
622 * @param GCPhys Physical address MSI request was written.
623 * @param uValue Value written.
624 * @param uTagSrc The IRQ tag and source (for tracing).
625 * @thread EMT only.
626 */
627 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
628
629
630 /**
631 * Acquires the PDM lock.
632 *
633 * @returns VINF_SUCCESS on success.
634 * @returns rc if we failed to acquire the lock.
635 * @param pDevIns The PCI device instance.
636 * @param rc What to return if we fail to acquire the lock.
637 */
638 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
639
640 /**
641 * Releases the PDM lock.
642 *
643 * @param pDevIns The PCI device instance.
644 */
645 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
646
647 /** Just a safety precaution. */
648 uint32_t u32TheEnd;
649} PDMPCIHLPRC;
650/** Pointer to PCI helpers. */
651typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
652/** Pointer to const PCI helpers. */
653typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
654
655/** Current PDMPCIHLPRC version number. */
656#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
657
658
659/**
660 * PCI Bus R0 helpers.
661 */
662typedef struct PDMPCIHLPR0
663{
664 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
665 uint32_t u32Version;
666
667 /**
668 * Set an ISA IRQ.
669 *
670 * @param pDevIns PCI device instance.
671 * @param iIrq IRQ number to set.
672 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
673 * @param uTagSrc The IRQ tag and source (for tracing).
674 * @thread EMT only.
675 */
676 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
677
678 /**
679 * Set an I/O-APIC IRQ.
680 *
681 * @param pDevIns PCI device instance.
682 * @param iIrq IRQ number to set.
683 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
684 * @param uTagSrc The IRQ tag and source (for tracing).
685 * @thread EMT only.
686 */
687 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
688
689 /**
690 * Send an MSI.
691 *
692 * @param pDevIns PCI device instance.
693 * @param GCPhys Physical address MSI request was written.
694 * @param uValue Value written.
695 * @param uTagSrc The IRQ tag and source (for tracing).
696 * @thread EMT only.
697 */
698 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
699
700
701 /**
702 * Acquires the PDM lock.
703 *
704 * @returns VINF_SUCCESS on success.
705 * @returns rc if we failed to acquire the lock.
706 * @param pDevIns The PCI device instance.
707 * @param rc What to return if we fail to acquire the lock.
708 */
709 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
710
711 /**
712 * Releases the PDM lock.
713 *
714 * @param pDevIns The PCI device instance.
715 */
716 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
717
718 /** Just a safety precaution. */
719 uint32_t u32TheEnd;
720} PDMPCIHLPR0;
721/** Pointer to PCI helpers. */
722typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
723/** Pointer to const PCI helpers. */
724typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
725
726/** Current PDMPCIHLPR0 version number. */
727#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
728
729/**
730 * PCI device helpers.
731 */
732typedef struct PDMPCIHLPR3
733{
734 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set an ISA IRQ.
739 *
740 * @param pDevIns The PCI device instance.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 * @param uTagSrc The IRQ tag and source (for tracing).
744 */
745 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
746
747 /**
748 * Set an I/O-APIC IRQ.
749 *
750 * @param pDevIns The PCI device instance.
751 * @param iIrq IRQ number to set.
752 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
753 * @param uTagSrc The IRQ tag and source (for tracing).
754 */
755 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
756
757 /**
758 * Send an MSI.
759 *
760 * @param pDevIns PCI device instance.
761 * @param GCPhys Physical address MSI request was written.
762 * @param uValue Value written.
763 * @param uTagSrc The IRQ tag and source (for tracing).
764 */
765 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
766
767 /**
768 * Checks if the given address is an MMIO2 base address or not.
769 *
770 * @returns true/false accordingly.
771 * @param pDevIns The PCI device instance.
772 * @param pOwner The owner of the memory, optional.
773 * @param GCPhys The address to check.
774 */
775 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
776
777 /**
778 * Gets the address of the RC PCI Bus helpers.
779 *
780 * This should be called at both construction and relocation time
781 * to obtain the correct address of the RC helpers.
782 *
783 * @returns RC pointer to the PCI Bus helpers.
784 * @param pDevIns Device instance of the PCI Bus.
785 * @thread EMT only.
786 */
787 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
788
789 /**
790 * Gets the address of the R0 PCI Bus helpers.
791 *
792 * This should be called at both construction and relocation time
793 * to obtain the correct address of the R0 helpers.
794 *
795 * @returns R0 pointer to the PCI Bus helpers.
796 * @param pDevIns Device instance of the PCI Bus.
797 * @thread EMT only.
798 */
799 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
800
801 /**
802 * Acquires the PDM lock.
803 *
804 * @returns VINF_SUCCESS on success.
805 * @returns Fatal error on failure.
806 * @param pDevIns The PCI device instance.
807 * @param rc Dummy for making the interface identical to the RC and R0 versions.
808 */
809 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
810
811 /**
812 * Releases the PDM lock.
813 *
814 * @param pDevIns The PCI device instance.
815 */
816 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
817
818 /** Just a safety precaution. */
819 uint32_t u32TheEnd;
820} PDMPCIHLPR3;
821/** Pointer to PCI helpers. */
822typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
823/** Pointer to const PCI helpers. */
824typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
825
826/** Current PDMPCIHLPR3 version number. */
827#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
828
829
830/**
831 * Programmable Interrupt Controller registration structure.
832 */
833typedef struct PDMPICREG
834{
835 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
836 uint32_t u32Version;
837
838 /**
839 * Set the an IRQ.
840 *
841 * @param pDevIns Device instance of the PIC.
842 * @param iIrq IRQ number to set.
843 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
844 * @param uTagSrc The IRQ tag and source (for tracing).
845 * @remarks Caller enters the PDM critical section.
846 */
847 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
848
849 /**
850 * Get a pending interrupt.
851 *
852 * @returns Pending interrupt number.
853 * @param pDevIns Device instance of the PIC.
854 * @param puTagSrc Where to return the IRQ tag and source.
855 * @remarks Caller enters the PDM critical section.
856 */
857 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
858
859 /** The name of the RC SetIrq entry point. */
860 const char *pszSetIrqRC;
861 /** The name of the RC GetInterrupt entry point. */
862 const char *pszGetInterruptRC;
863
864 /** The name of the R0 SetIrq entry point. */
865 const char *pszSetIrqR0;
866 /** The name of the R0 GetInterrupt entry point. */
867 const char *pszGetInterruptR0;
868} PDMPICREG;
869/** Pointer to a PIC registration structure. */
870typedef PDMPICREG *PPDMPICREG;
871
872/** Current PDMPICREG version number. */
873#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
874
875/**
876 * PIC RC helpers.
877 */
878typedef struct PDMPICHLPRC
879{
880 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
881 uint32_t u32Version;
882
883 /**
884 * Set the interrupt force action flag.
885 *
886 * @param pDevIns Device instance of the PIC.
887 */
888 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
889
890 /**
891 * Clear the interrupt force action flag.
892 *
893 * @param pDevIns Device instance of the PIC.
894 */
895 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
896
897 /**
898 * Acquires the PDM lock.
899 *
900 * @returns VINF_SUCCESS on success.
901 * @returns rc if we failed to acquire the lock.
902 * @param pDevIns The PIC device instance.
903 * @param rc What to return if we fail to acquire the lock.
904 */
905 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
906
907 /**
908 * Releases the PDM lock.
909 *
910 * @param pDevIns The PIC device instance.
911 */
912 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
913
914 /** Just a safety precaution. */
915 uint32_t u32TheEnd;
916} PDMPICHLPRC;
917
918/** Pointer to PIC RC helpers. */
919typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
920/** Pointer to const PIC RC helpers. */
921typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
922
923/** Current PDMPICHLPRC version number. */
924#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
925
926
927/**
928 * PIC R0 helpers.
929 */
930typedef struct PDMPICHLPR0
931{
932 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
933 uint32_t u32Version;
934
935 /**
936 * Set the interrupt force action flag.
937 *
938 * @param pDevIns Device instance of the PIC.
939 */
940 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
941
942 /**
943 * Clear the interrupt force action flag.
944 *
945 * @param pDevIns Device instance of the PIC.
946 */
947 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
948
949 /**
950 * Acquires the PDM lock.
951 *
952 * @returns VINF_SUCCESS on success.
953 * @returns rc if we failed to acquire the lock.
954 * @param pDevIns The PIC device instance.
955 * @param rc What to return if we fail to acquire the lock.
956 */
957 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
958
959 /**
960 * Releases the PDM lock.
961 *
962 * @param pDevIns The PCI device instance.
963 */
964 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
965
966 /** Just a safety precaution. */
967 uint32_t u32TheEnd;
968} PDMPICHLPR0;
969
970/** Pointer to PIC R0 helpers. */
971typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
972/** Pointer to const PIC R0 helpers. */
973typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
974
975/** Current PDMPICHLPR0 version number. */
976#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
977
978/**
979 * PIC R3 helpers.
980 */
981typedef struct PDMPICHLPR3
982{
983 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
984 uint32_t u32Version;
985
986 /**
987 * Set the interrupt force action flag.
988 *
989 * @param pDevIns Device instance of the PIC.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
992
993 /**
994 * Clear the interrupt force action flag.
995 *
996 * @param pDevIns Device instance of the PIC.
997 */
998 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
999
1000 /**
1001 * Acquires the PDM lock.
1002 *
1003 * @returns VINF_SUCCESS on success.
1004 * @returns Fatal error on failure.
1005 * @param pDevIns The PIC device instance.
1006 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1007 */
1008 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1009
1010 /**
1011 * Releases the PDM lock.
1012 *
1013 * @param pDevIns The PIC device instance.
1014 */
1015 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1016
1017 /**
1018 * Gets the address of the RC PIC helpers.
1019 *
1020 * This should be called at both construction and relocation time
1021 * to obtain the correct address of the RC helpers.
1022 *
1023 * @returns RC pointer to the PIC helpers.
1024 * @param pDevIns Device instance of the PIC.
1025 */
1026 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1027
1028 /**
1029 * Gets the address of the R0 PIC helpers.
1030 *
1031 * This should be called at both construction and relocation time
1032 * to obtain the correct address of the R0 helpers.
1033 *
1034 * @returns R0 pointer to the PIC helpers.
1035 * @param pDevIns Device instance of the PIC.
1036 */
1037 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1038
1039 /** Just a safety precaution. */
1040 uint32_t u32TheEnd;
1041} PDMPICHLPR3;
1042
1043/** Pointer to PIC R3 helpers. */
1044typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1045/** Pointer to const PIC R3 helpers. */
1046typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1047
1048/** Current PDMPICHLPR3 version number. */
1049#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1050
1051
1052
1053/**
1054 * Advanced Programmable Interrupt Controller registration structure.
1055 */
1056typedef struct PDMAPICREG
1057{
1058 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1059 uint32_t u32Version;
1060
1061 /**
1062 * Get a pending interrupt.
1063 *
1064 * @returns Pending interrupt number, -1 if no interrupt is
1065 * pending.
1066 * @param pDevIns Device instance of the APIC.
1067 * @param pVCpu The cross context virtual CPU structure.
1068 * @param puTagSrc Where to return the tag source (tracing purposes).
1069 * @remarks Caller enters the PDM critical section
1070 */
1071 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t *puTagSrc));
1072
1073 /**
1074 * Check if the APIC has a pending interrupt/if a TPR change would activate one.
1075 *
1076 * @returns true if an interrupt is pending, false otherwise.
1077 * @param pDevIns Device instance of the APIC.
1078 * @param pVCpu The cross context virtual CPU structure.
1079 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1080 * (optional, can be NULL).
1081 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1082 * prior to calling this method.
1083 */
1084 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8PendingIrq));
1085
1086 /**
1087 * Set the APIC base.
1088 *
1089 * @param pDevIns Device instance of the APIC.
1090 * @param pVCpu The cross context virtual CPU structure.
1091 * @param u64BaseMsr The base MSR value.
1092 * @remarks Caller enters the PDM critical section (might not be the case with
1093 * the new APIC code)
1094 */
1095 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64BaseMsr));
1096
1097 /**
1098 * Get the APIC base.
1099 *
1100 * @returns Current base.
1101 * @param pDevIns Device instance of the APIC.
1102 * @param pVCpu The cross context virtual CPU structure.
1103 * @remarks Caller enters the PDM critical section.
1104 */
1105 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
1106
1107 /**
1108 * Set the TPR (task priority register).
1109 *
1110 * @param pDevIns Device instance of the APIC.
1111 * @param pVCpu The cross context virtual CPU structure.
1112 * @param u8Tpr The new TPR.
1113 * @remarks Caller enters the PDM critical section.
1114 */
1115 DECLR3CALLBACKMEMBER(void, pfnSetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
1116
1117 /**
1118 * Get the TPR (task priority register).
1119 *
1120 * @returns The current TPR.
1121 * @param pDevIns Device instance of the APIC.
1122 * @param pVCpu The cross context virtual CPU structure.
1123 * @remarks Caller enters the PDM critical section.
1124 */
1125 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
1126
1127 /**
1128 * Write to a MSR in APIC range.
1129 *
1130 * @returns Strict VBox status code.
1131 * @param pDevIns Device instance of the APIC.
1132 * @param pVCpu The cross context virtual CPU structure.
1133 * @param u32Reg The MSR begin written to.
1134 * @param u64Value The value to write.
1135 *
1136 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1137 * calling this method.
1138 */
1139 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
1140
1141 /**
1142 * Read from a MSR in APIC range.
1143 *
1144 * @returns Strict VBox status code.
1145 * @param pDevIns Device instance of the APIC.
1146 * @param pVCpu The cross context virtual CPU structure.
1147 * @param u32Reg MSR to read.
1148 * @param pu64Value Where to return the read value.
1149 *
1150 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1151 * calling this method.
1152 */
1153 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
1154
1155 /**
1156 * Private interface between the IOAPIC and APIC.
1157 *
1158 * This is a low-level, APIC/IOAPIC implementation specific interface which
1159 * is registered with PDM only because it makes life so much simpler right
1160 * now (GC bits). This is a bad bad hack! The correct way of doing this
1161 * would involve some way of querying GC interfaces and relocating them.
1162 * Perhaps doing some kind of device init in GC...
1163 *
1164 * @returns VBox status code.
1165 * @param pDevIns Device instance of the APIC.
1166 * @param uDest The destination mask.
1167 * @param uDestMode The destination mode, see XAPICDESTMODE.
1168 * @param uDeliveryMode The delivery mode, see XAPICDELIVERYMODE.
1169 * @param uVector The interrupt vector.
1170 * @param uPolarity The input pin polarity.
1171 * @param uTriggerMode The trigger mode, see XAPICTRIGGERMODE.
1172 * @param uTagSrc The IRQ tag and source (for tracing).
1173 * @remarks Caller enters the PDM critical section.
1174 */
1175 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode,
1176 uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
1177
1178 /**
1179 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1180 *
1181 * Used for virtual wire mode when interrupts from the PIC are passed through
1182 * LAPIC.
1183 *
1184 * @returns Strict VBox status code.
1185 * @param pDevIns Device instance of the APIC.
1186 * @param pVCpu The cross context virtual CPU structure.
1187 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1188 * @param u8Level The level.
1189 * @param rcRZ The return code if the operation cannot be
1190 * performed in the current context.
1191 * @remarks Caller enters the PDM critical section
1192 */
1193 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
1194 int rcRZ));
1195
1196 /**
1197 * Get the APIC timer frequency (in Hz).
1198 *
1199 * @returns The frequency of the APIC timer.
1200 * @param pDevIns Device instance of the APIC.
1201 */
1202 DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3,(PPDMDEVINS pDevIns));
1203
1204 /** The name of the RC GetInterrupt entry point. */
1205 const char *pszGetInterruptRC;
1206 /** The name of the RC HasPendingIrq entry point. */
1207 const char *pszHasPendingIrqRC;
1208 /** The name of the RC SetBaseMsr entry point. */
1209 const char *pszSetBaseMsrRC;
1210 /** The name of the RC GetBaseMsr entry point. */
1211 const char *pszGetBaseMsrRC;
1212 /** The name of the RC SetTpr entry point. */
1213 const char *pszSetTprRC;
1214 /** The name of the RC GetTpr entry point. */
1215 const char *pszGetTprRC;
1216 /** The name of the RC WriteMsr entry point. */
1217 const char *pszWriteMsrRC;
1218 /** The name of the RC ReadMsr entry point. */
1219 const char *pszReadMsrRC;
1220 /** The name of the RC BusDeliver entry point. */
1221 const char *pszBusDeliverRC;
1222 /** The name of the RC LocalInterrupt entry point. */
1223 const char *pszLocalInterruptRC;
1224 /** The name of the RC GetTimerFreq entry point. */
1225 const char *pszGetTimerFreqRC;
1226
1227 /** The name of the R0 GetInterrupt entry point. */
1228 const char *pszGetInterruptR0;
1229 /** The name of the R0 HasPendingIrq entry point. */
1230 const char *pszHasPendingIrqR0;
1231 /** The name of the R0 SetBaseMsr entry point. */
1232 const char *pszSetBaseMsrR0;
1233 /** The name of the R0 GetBaseMsr entry point. */
1234 const char *pszGetBaseMsrR0;
1235 /** The name of the R0 SetTpr entry point. */
1236 const char *pszSetTprR0;
1237 /** The name of the R0 GetTpr entry point. */
1238 const char *pszGetTprR0;
1239 /** The name of the R0 WriteMsr entry point. */
1240 const char *pszWriteMsrR0;
1241 /** The name of the R0 ReadMsr entry point. */
1242 const char *pszReadMsrR0;
1243 /** The name of the R0 BusDeliver entry point. */
1244 const char *pszBusDeliverR0;
1245 /** The name of the R0 LocalInterrupt entry point. */
1246 const char *pszLocalInterruptR0;
1247 /** The name of the R0 GetTimerFreq entry point. */
1248 const char *pszGetTimerFreqR0;
1249} PDMAPICREG;
1250/** Pointer to an APIC registration structure. */
1251typedef PDMAPICREG *PPDMAPICREG;
1252
1253/** Current PDMAPICREG version number. */
1254#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 3, 0)
1255
1256
1257/**
1258 * APIC mode argument for pfnChangeFeature.
1259 *
1260 * Also used in saved-states, don't change existing values.
1261 */
1262typedef enum PDMAPICMODE
1263{
1264 /** Invalid 0 entry. */
1265 PDMAPICMODE_INVALID = 0,
1266 /** No APIC. */
1267 PDMAPICMODE_NONE,
1268 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1269 PDMAPICMODE_APIC,
1270 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1271 PDMAPICMODE_X2APIC,
1272 /** The usual 32-bit paranoia. */
1273 PDMAPICMODE_32BIT_HACK = 0x7fffffff
1274} PDMAPICMODE;
1275
1276/**
1277 * APIC irq argument for pfnSetInterruptFF and pfnClearInterruptFF.
1278 */
1279typedef enum PDMAPICIRQ
1280{
1281 /** Invalid 0 entry. */
1282 PDMAPICIRQ_INVALID = 0,
1283 /** Normal hardware interrupt. */
1284 PDMAPICIRQ_HARDWARE,
1285 /** NMI. */
1286 PDMAPICIRQ_NMI,
1287 /** SMI. */
1288 PDMAPICIRQ_SMI,
1289 /** ExtINT (HW interrupt via PIC). */
1290 PDMAPICIRQ_EXTINT,
1291 /** The usual 32-bit paranoia. */
1292 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1293} PDMAPICIRQ;
1294
1295
1296/**
1297 * APIC RC helpers.
1298 */
1299typedef struct PDMAPICHLPRC
1300{
1301 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1302 uint32_t u32Version;
1303
1304 /**
1305 * Set the interrupt force action flag.
1306 *
1307 * @param pDevIns Device instance of the APIC.
1308 * @param enmType IRQ type.
1309 * @param idCpu Virtual CPU to set flag upon.
1310 */
1311 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1312
1313 /**
1314 * Clear the interrupt force action flag.
1315 *
1316 * @param pDevIns Device instance of the APIC.
1317 * @param enmType IRQ type.
1318 * @param idCpu Virtual CPU to clear flag upon.
1319 */
1320 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1321
1322 /**
1323 * Calculates an IRQ tag for a timer, IPI or similar event.
1324 *
1325 * @returns The IRQ tag.
1326 * @param pDevIns Device instance of the APIC.
1327 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1328 */
1329 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1330
1331 /**
1332 * Modifies APIC-related bits in the CPUID feature mask.
1333 *
1334 * @param pDevIns Device instance of the APIC.
1335 * @param enmMode Supported APIC mode.
1336 */
1337 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1338
1339 /**
1340 * Acquires the PDM lock.
1341 *
1342 * @returns VINF_SUCCESS on success.
1343 * @returns rc if we failed to acquire the lock.
1344 * @param pDevIns The APIC device instance.
1345 * @param rc What to return if we fail to acquire the lock.
1346 */
1347 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1348
1349 /**
1350 * Releases the PDM lock.
1351 *
1352 * @param pDevIns The APIC device instance.
1353 */
1354 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1355
1356 /**
1357 * Get the virtual CPU id corresponding to the current EMT.
1358 *
1359 * @param pDevIns The APIC device instance.
1360 */
1361 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1362
1363 /** Just a safety precaution. */
1364 uint32_t u32TheEnd;
1365} PDMAPICHLPRC;
1366/** Pointer to APIC GC helpers. */
1367typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1368/** Pointer to const APIC helpers. */
1369typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1370
1371/** Current PDMAPICHLPRC version number. */
1372#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1373
1374
1375/**
1376 * APIC R0 helpers.
1377 */
1378typedef struct PDMAPICHLPR0
1379{
1380 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1381 uint32_t u32Version;
1382
1383 /**
1384 * Set the interrupt force action flag.
1385 *
1386 * @param pDevIns Device instance of the APIC.
1387 * @param enmType IRQ type.
1388 * @param idCpu Virtual CPU to set flag upon.
1389 */
1390 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1391
1392 /**
1393 * Clear the interrupt force action flag.
1394 *
1395 * @param pDevIns Device instance of the APIC.
1396 * @param enmType IRQ type.
1397 * @param idCpu Virtual CPU to clear flag upon.
1398 */
1399 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1400
1401 /**
1402 * Calculates an IRQ tag for a timer, IPI or similar event.
1403 *
1404 * @returns The IRQ tag.
1405 * @param pDevIns Device instance of the APIC.
1406 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1407 */
1408 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1409
1410 /**
1411 * Modifies APIC-related bits in the CPUID feature mask.
1412 *
1413 * @param pDevIns Device instance of the APIC.
1414 * @param enmMode Supported APIC mode.
1415 */
1416 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1417
1418 /**
1419 * Acquires the PDM lock.
1420 *
1421 * @returns VINF_SUCCESS on success.
1422 * @returns rc if we failed to acquire the lock.
1423 * @param pDevIns The APIC device instance.
1424 * @param rc What to return if we fail to acquire the lock.
1425 */
1426 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1427
1428 /**
1429 * Releases the PDM lock.
1430 *
1431 * @param pDevIns The APIC device instance.
1432 */
1433 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1434
1435 /**
1436 * Get the virtual CPU id corresponding to the current EMT.
1437 *
1438 * @param pDevIns The APIC device instance.
1439 */
1440 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1441
1442 /** Just a safety precaution. */
1443 uint32_t u32TheEnd;
1444} PDMAPICHLPR0;
1445/** Pointer to APIC GC helpers. */
1446typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1447/** Pointer to const APIC helpers. */
1448typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1449
1450/** Current PDMAPICHLPR0 version number. */
1451#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1452
1453/**
1454 * APIC R3 helpers.
1455 */
1456typedef struct PDMAPICHLPR3
1457{
1458 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1459 uint32_t u32Version;
1460
1461 /**
1462 * Set the interrupt force action flag.
1463 *
1464 * @param pDevIns Device instance of the APIC.
1465 * @param enmType IRQ type.
1466 * @param idCpu Virtual CPU to set flag upon.
1467 */
1468 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1469
1470 /**
1471 * Clear the interrupt force action flag.
1472 *
1473 * @param pDevIns Device instance of the APIC.
1474 * @param enmType IRQ type.
1475 * @param idCpu Virtual CPU to clear flag upon.
1476 */
1477 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1478
1479 /**
1480 * Calculates an IRQ tag for a timer, IPI or similar event.
1481 *
1482 * @returns The IRQ tag.
1483 * @param pDevIns Device instance of the APIC.
1484 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1485 */
1486 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1487
1488 /**
1489 * Modifies APIC-related bits in the CPUID feature mask.
1490 *
1491 * @param pDevIns Device instance of the APIC.
1492 * @param enmMode Supported APIC mode.
1493 */
1494 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1495
1496 /**
1497 * Get the virtual CPU id corresponding to the current EMT.
1498 *
1499 * @param pDevIns The APIC device instance.
1500 */
1501 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1502
1503 /**
1504 * Sends Startup IPI to given virtual CPU.
1505 *
1506 * @param pDevIns The APIC device instance.
1507 * @param idCpu Virtual CPU to perform Startup IPI on.
1508 * @param uVector Startup IPI vector.
1509 */
1510 DECLR3CALLBACKMEMBER(void, pfnSendStartupIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1511
1512 /**
1513 * Sends INIT IPI to given virtual CPU, should result in reset and
1514 * halting till Startup IPI.
1515 *
1516 * @param pDevIns The APIC device instance.
1517 * @param idCpu Virtual CPU to perform INIT IPI on.
1518 */
1519 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1520
1521 /**
1522 * Gets the address of the RC APIC helpers.
1523 *
1524 * This should be called at both construction and relocation time
1525 * to obtain the correct address of the RC helpers.
1526 *
1527 * @returns GC pointer to the APIC helpers.
1528 * @param pDevIns Device instance of the APIC.
1529 */
1530 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1531
1532 /**
1533 * Gets the address of the R0 APIC helpers.
1534 *
1535 * This should be called at both construction and relocation time
1536 * to obtain the correct address of the R0 helpers.
1537 *
1538 * @returns R0 pointer to the APIC helpers.
1539 * @param pDevIns Device instance of the APIC.
1540 */
1541 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1542
1543 /**
1544 * Get the critical section used to synchronize the PICs, PCI and stuff.
1545 *
1546 * @returns Ring-3 pointer to the critical section.
1547 * @param pDevIns The APIC device instance.
1548 */
1549 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1550
1551 /**
1552 * Get the critical section used to synchronize the PICs, PCI and stuff.
1553 *
1554 * @returns Raw-mode context pointer to the critical section.
1555 * @param pDevIns The APIC device instance.
1556 */
1557 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1558
1559 /**
1560 * Get the critical section used to synchronize the PICs, PCI and stuff.
1561 *
1562 * @returns Ring-0 pointer to the critical section.
1563 * @param pDevIns The APIC device instance.
1564 */
1565 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1566
1567 /** Just a safety precaution. */
1568 uint32_t u32TheEnd;
1569} PDMAPICHLPR3;
1570/** Pointer to APIC helpers. */
1571typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1572/** Pointer to const APIC helpers. */
1573typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1574
1575/** Current PDMAPICHLP version number. */
1576#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1577
1578
1579/**
1580 * I/O APIC registration structure.
1581 */
1582typedef struct PDMIOAPICREG
1583{
1584 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1585 uint32_t u32Version;
1586
1587 /**
1588 * Set the an IRQ.
1589 *
1590 * @param pDevIns Device instance of the I/O APIC.
1591 * @param iIrq IRQ number to set.
1592 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1593 * @param uTagSrc The IRQ tag and source (for tracing).
1594 * @remarks Caller enters the PDM critical section
1595 */
1596 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1597
1598 /** The name of the RC SetIrq entry point. */
1599 const char *pszSetIrqRC;
1600
1601 /** The name of the R0 SetIrq entry point. */
1602 const char *pszSetIrqR0;
1603
1604 /**
1605 * Send a MSI.
1606 *
1607 * @param pDevIns Device instance of the I/O APIC.
1608 * @param GCPhys Request address.
1609 * @param uValue Request value.
1610 * @param uTagSrc The IRQ tag and source (for tracing).
1611 * @remarks Caller enters the PDM critical section
1612 */
1613 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1614
1615 /** The name of the RC SendMsi entry point. */
1616 const char *pszSendMsiRC;
1617
1618 /** The name of the R0 SendMsi entry point. */
1619 const char *pszSendMsiR0;
1620} PDMIOAPICREG;
1621/** Pointer to an APIC registration structure. */
1622typedef PDMIOAPICREG *PPDMIOAPICREG;
1623
1624/** Current PDMAPICREG version number. */
1625#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1626
1627
1628/**
1629 * IOAPIC RC helpers.
1630 */
1631typedef struct PDMIOAPICHLPRC
1632{
1633 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1634 uint32_t u32Version;
1635
1636 /**
1637 * Private interface between the IOAPIC and APIC.
1638 *
1639 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1640 *
1641 * @returns status code.
1642 * @param pDevIns Device instance of the IOAPIC.
1643 * @param u8Dest See APIC implementation.
1644 * @param u8DestMode See APIC implementation.
1645 * @param u8DeliveryMode See APIC implementation.
1646 * @param iVector See APIC implementation.
1647 * @param u8Polarity See APIC implementation.
1648 * @param u8TriggerMode See APIC implementation.
1649 * @param uTagSrc The IRQ tag and source (for tracing).
1650 */
1651 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1652 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1653
1654 /**
1655 * Acquires the PDM lock.
1656 *
1657 * @returns VINF_SUCCESS on success.
1658 * @returns rc if we failed to acquire the lock.
1659 * @param pDevIns The IOAPIC device instance.
1660 * @param rc What to return if we fail to acquire the lock.
1661 */
1662 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1663
1664 /**
1665 * Releases the PDM lock.
1666 *
1667 * @param pDevIns The IOAPIC device instance.
1668 */
1669 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1670
1671 /** Just a safety precaution. */
1672 uint32_t u32TheEnd;
1673} PDMIOAPICHLPRC;
1674/** Pointer to IOAPIC RC helpers. */
1675typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1676/** Pointer to const IOAPIC helpers. */
1677typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1678
1679/** Current PDMIOAPICHLPRC version number. */
1680#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1681
1682
1683/**
1684 * IOAPIC R0 helpers.
1685 */
1686typedef struct PDMIOAPICHLPR0
1687{
1688 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1689 uint32_t u32Version;
1690
1691 /**
1692 * Private interface between the IOAPIC and APIC.
1693 *
1694 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1695 *
1696 * @returns status code.
1697 * @param pDevIns Device instance of the IOAPIC.
1698 * @param u8Dest See APIC implementation.
1699 * @param u8DestMode See APIC implementation.
1700 * @param u8DeliveryMode See APIC implementation.
1701 * @param iVector See APIC implementation.
1702 * @param u8Polarity See APIC implementation.
1703 * @param u8TriggerMode See APIC implementation.
1704 * @param uTagSrc The IRQ tag and source (for tracing).
1705 */
1706 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1707 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1708
1709 /**
1710 * Acquires the PDM lock.
1711 *
1712 * @returns VINF_SUCCESS on success.
1713 * @returns rc if we failed to acquire the lock.
1714 * @param pDevIns The IOAPIC device instance.
1715 * @param rc What to return if we fail to acquire the lock.
1716 */
1717 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1718
1719 /**
1720 * Releases the PDM lock.
1721 *
1722 * @param pDevIns The IOAPIC device instance.
1723 */
1724 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1725
1726 /** Just a safety precaution. */
1727 uint32_t u32TheEnd;
1728} PDMIOAPICHLPR0;
1729/** Pointer to IOAPIC R0 helpers. */
1730typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1731/** Pointer to const IOAPIC helpers. */
1732typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1733
1734/** Current PDMIOAPICHLPR0 version number. */
1735#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1736
1737/**
1738 * IOAPIC R3 helpers.
1739 */
1740typedef struct PDMIOAPICHLPR3
1741{
1742 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1743 uint32_t u32Version;
1744
1745 /**
1746 * Private interface between the IOAPIC and APIC.
1747 *
1748 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1749 *
1750 * @returns status code
1751 * @param pDevIns Device instance of the IOAPIC.
1752 * @param u8Dest See APIC implementation.
1753 * @param u8DestMode See APIC implementation.
1754 * @param u8DeliveryMode See APIC implementation.
1755 * @param iVector See APIC implementation.
1756 * @param u8Polarity See APIC implementation.
1757 * @param u8TriggerMode See APIC implementation.
1758 * @param uTagSrc The IRQ tag and source (for tracing).
1759 */
1760 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1761 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1762
1763 /**
1764 * Acquires the PDM lock.
1765 *
1766 * @returns VINF_SUCCESS on success.
1767 * @returns Fatal error on failure.
1768 * @param pDevIns The IOAPIC device instance.
1769 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1770 */
1771 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1772
1773 /**
1774 * Releases the PDM lock.
1775 *
1776 * @param pDevIns The IOAPIC device instance.
1777 */
1778 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1779
1780 /**
1781 * Gets the address of the RC IOAPIC helpers.
1782 *
1783 * This should be called at both construction and relocation time
1784 * to obtain the correct address of the RC helpers.
1785 *
1786 * @returns RC pointer to the IOAPIC helpers.
1787 * @param pDevIns Device instance of the IOAPIC.
1788 */
1789 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1790
1791 /**
1792 * Gets the address of the R0 IOAPIC helpers.
1793 *
1794 * This should be called at both construction and relocation time
1795 * to obtain the correct address of the R0 helpers.
1796 *
1797 * @returns R0 pointer to the IOAPIC helpers.
1798 * @param pDevIns Device instance of the IOAPIC.
1799 */
1800 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1801
1802 /** Just a safety precaution. */
1803 uint32_t u32TheEnd;
1804} PDMIOAPICHLPR3;
1805/** Pointer to IOAPIC R3 helpers. */
1806typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1807/** Pointer to const IOAPIC helpers. */
1808typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1809
1810/** Current PDMIOAPICHLPR3 version number. */
1811#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1812
1813
1814/**
1815 * HPET registration structure.
1816 */
1817typedef struct PDMHPETREG
1818{
1819 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1820 uint32_t u32Version;
1821
1822} PDMHPETREG;
1823/** Pointer to an HPET registration structure. */
1824typedef PDMHPETREG *PPDMHPETREG;
1825
1826/** Current PDMHPETREG version number. */
1827#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1828
1829/**
1830 * HPET RC helpers.
1831 *
1832 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1833 * at some later point.
1834 */
1835typedef struct PDMHPETHLPRC
1836{
1837 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1838 uint32_t u32Version;
1839
1840 /** Just a safety precaution. */
1841 uint32_t u32TheEnd;
1842} PDMHPETHLPRC;
1843
1844/** Pointer to HPET RC helpers. */
1845typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1846/** Pointer to const HPET RC helpers. */
1847typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1848
1849/** Current PDMHPETHLPRC version number. */
1850#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1851
1852
1853/**
1854 * HPET R0 helpers.
1855 *
1856 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1857 * at some later point.
1858 */
1859typedef struct PDMHPETHLPR0
1860{
1861 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1862 uint32_t u32Version;
1863
1864 /** Just a safety precaution. */
1865 uint32_t u32TheEnd;
1866} PDMHPETHLPR0;
1867
1868/** Pointer to HPET R0 helpers. */
1869typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1870/** Pointer to const HPET R0 helpers. */
1871typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1872
1873/** Current PDMHPETHLPR0 version number. */
1874#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1875
1876/**
1877 * HPET R3 helpers.
1878 */
1879typedef struct PDMHPETHLPR3
1880{
1881 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1882 uint32_t u32Version;
1883
1884 /**
1885 * Gets the address of the RC HPET helpers.
1886 *
1887 * This should be called at both construction and relocation time
1888 * to obtain the correct address of the RC helpers.
1889 *
1890 * @returns RC pointer to the HPET helpers.
1891 * @param pDevIns Device instance of the HPET.
1892 */
1893 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1894
1895 /**
1896 * Gets the address of the R0 HPET helpers.
1897 *
1898 * This should be called at both construction and relocation time
1899 * to obtain the correct address of the R0 helpers.
1900 *
1901 * @returns R0 pointer to the HPET helpers.
1902 * @param pDevIns Device instance of the HPET.
1903 */
1904 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1905
1906 /**
1907 * Set legacy mode on PIT and RTC.
1908 *
1909 * @returns VINF_SUCCESS on success.
1910 * @returns rc if we failed to set legacy mode.
1911 * @param pDevIns Device instance of the HPET.
1912 * @param fActivated Whether legacy mode is activated or deactivated.
1913 */
1914 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1915
1916
1917 /**
1918 * Set IRQ, bypassing ISA bus override rules.
1919 *
1920 * @returns VINF_SUCCESS on success.
1921 * @returns rc if we failed to set legacy mode.
1922 * @param pDevIns Device instance of the HPET.
1923 * @param iIrq IRQ number to set.
1924 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1925 */
1926 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1927
1928 /** Just a safety precaution. */
1929 uint32_t u32TheEnd;
1930} PDMHPETHLPR3;
1931
1932/** Pointer to HPET R3 helpers. */
1933typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1934/** Pointer to const HPET R3 helpers. */
1935typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1936
1937/** Current PDMHPETHLPR3 version number. */
1938#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1939
1940
1941/**
1942 * Raw PCI device registration structure.
1943 */
1944typedef struct PDMPCIRAWREG
1945{
1946 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1947 uint32_t u32Version;
1948 /** Just a safety precaution. */
1949 uint32_t u32TheEnd;
1950} PDMPCIRAWREG;
1951/** Pointer to a raw PCI registration structure. */
1952typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1953
1954/** Current PDMPCIRAWREG version number. */
1955#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1956
1957/**
1958 * Raw PCI device raw-mode context helpers.
1959 */
1960typedef struct PDMPCIRAWHLPRC
1961{
1962 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1963 uint32_t u32Version;
1964 /** Just a safety precaution. */
1965 uint32_t u32TheEnd;
1966} PDMPCIRAWHLPRC;
1967/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1968typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1969/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1970typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1971
1972/** Current PDMPCIRAWHLPRC version number. */
1973#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1974
1975/**
1976 * Raw PCI device ring-0 context helpers.
1977 */
1978typedef struct PDMPCIRAWHLPR0
1979{
1980 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1981 uint32_t u32Version;
1982 /** Just a safety precaution. */
1983 uint32_t u32TheEnd;
1984} PDMPCIRAWHLPR0;
1985/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1986typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1987/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1988typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1989
1990/** Current PDMPCIRAWHLPR0 version number. */
1991#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1992
1993
1994/**
1995 * Raw PCI device ring-3 context helpers.
1996 */
1997typedef struct PDMPCIRAWHLPR3
1998{
1999 /** Undefined structure version and magic number. */
2000 uint32_t u32Version;
2001
2002 /**
2003 * Gets the address of the RC raw PCI device helpers.
2004 *
2005 * This should be called at both construction and relocation time to obtain
2006 * the correct address of the RC helpers.
2007 *
2008 * @returns RC pointer to the raw PCI device helpers.
2009 * @param pDevIns Device instance of the raw PCI device.
2010 */
2011 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2012
2013 /**
2014 * Gets the address of the R0 raw PCI device helpers.
2015 *
2016 * This should be called at both construction and relocation time to obtain
2017 * the correct address of the R0 helpers.
2018 *
2019 * @returns R0 pointer to the raw PCI device helpers.
2020 * @param pDevIns Device instance of the raw PCI device.
2021 */
2022 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2023
2024 /** Just a safety precaution. */
2025 uint32_t u32TheEnd;
2026} PDMPCIRAWHLPR3;
2027/** Pointer to raw PCI R3 helpers. */
2028typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2029/** Pointer to const raw PCI R3 helpers. */
2030typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2031
2032/** Current PDMPCIRAWHLPR3 version number. */
2033#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2034
2035
2036#ifdef IN_RING3
2037
2038/**
2039 * DMA Transfer Handler.
2040 *
2041 * @returns Number of bytes transferred.
2042 * @param pDevIns Device instance of the DMA.
2043 * @param pvUser User pointer.
2044 * @param uChannel Channel number.
2045 * @param off DMA position.
2046 * @param cb Block size.
2047 * @remarks The device lock is not taken, however, the DMA device lock is held.
2048 */
2049typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2050/** Pointer to a FNDMATRANSFERHANDLER(). */
2051typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2052
2053/**
2054 * DMA Controller registration structure.
2055 */
2056typedef struct PDMDMAREG
2057{
2058 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2059 uint32_t u32Version;
2060
2061 /**
2062 * Execute pending transfers.
2063 *
2064 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2065 * @param pDevIns Device instance of the DMAC.
2066 * @remarks No locks held, called on EMT(0) as a form of serialization.
2067 */
2068 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2069
2070 /**
2071 * Register transfer function for DMA channel.
2072 *
2073 * @param pDevIns Device instance of the DMAC.
2074 * @param uChannel Channel number.
2075 * @param pfnTransferHandler Device specific transfer function.
2076 * @param pvUSer User pointer to be passed to the callback.
2077 * @remarks No locks held, called on an EMT.
2078 */
2079 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2080
2081 /**
2082 * Read memory
2083 *
2084 * @returns Number of bytes read.
2085 * @param pDevIns Device instance of the DMAC.
2086 * @param pvBuffer Pointer to target buffer.
2087 * @param off DMA position.
2088 * @param cbBlock Block size.
2089 * @remarks No locks held, called on an EMT.
2090 */
2091 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2092
2093 /**
2094 * Write memory
2095 *
2096 * @returns Number of bytes written.
2097 * @param pDevIns Device instance of the DMAC.
2098 * @param pvBuffer Memory to write.
2099 * @param off DMA position.
2100 * @param cbBlock Block size.
2101 * @remarks No locks held, called on an EMT.
2102 */
2103 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2104
2105 /**
2106 * Set the DREQ line.
2107 *
2108 * @param pDevIns Device instance of the DMAC.
2109 * @param uChannel Channel number.
2110 * @param uLevel Level of the line.
2111 * @remarks No locks held, called on an EMT.
2112 */
2113 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2114
2115 /**
2116 * Get channel mode
2117 *
2118 * @returns Channel mode.
2119 * @param pDevIns Device instance of the DMAC.
2120 * @param uChannel Channel number.
2121 * @remarks No locks held, called on an EMT.
2122 */
2123 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2124
2125} PDMDMACREG;
2126/** Pointer to a DMAC registration structure. */
2127typedef PDMDMACREG *PPDMDMACREG;
2128
2129/** Current PDMDMACREG version number. */
2130#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2131
2132
2133/**
2134 * DMA Controller device helpers.
2135 */
2136typedef struct PDMDMACHLP
2137{
2138 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2139 uint32_t u32Version;
2140
2141 /* to-be-defined */
2142
2143} PDMDMACHLP;
2144/** Pointer to DMAC helpers. */
2145typedef PDMDMACHLP *PPDMDMACHLP;
2146/** Pointer to const DMAC helpers. */
2147typedef const PDMDMACHLP *PCPDMDMACHLP;
2148
2149/** Current PDMDMACHLP version number. */
2150#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2151
2152#endif /* IN_RING3 */
2153
2154
2155
2156/**
2157 * RTC registration structure.
2158 */
2159typedef struct PDMRTCREG
2160{
2161 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2162 uint32_t u32Version;
2163 uint32_t u32Alignment; /**< structure size alignment. */
2164
2165 /**
2166 * Write to a CMOS register and update the checksum if necessary.
2167 *
2168 * @returns VBox status code.
2169 * @param pDevIns Device instance of the RTC.
2170 * @param iReg The CMOS register index.
2171 * @param u8Value The CMOS register value.
2172 * @remarks Caller enters the device critical section.
2173 */
2174 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2175
2176 /**
2177 * Read a CMOS register.
2178 *
2179 * @returns VBox status code.
2180 * @param pDevIns Device instance of the RTC.
2181 * @param iReg The CMOS register index.
2182 * @param pu8Value Where to store the CMOS register value.
2183 * @remarks Caller enters the device critical section.
2184 */
2185 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2186
2187} PDMRTCREG;
2188/** Pointer to a RTC registration structure. */
2189typedef PDMRTCREG *PPDMRTCREG;
2190/** Pointer to a const RTC registration structure. */
2191typedef const PDMRTCREG *PCPDMRTCREG;
2192
2193/** Current PDMRTCREG version number. */
2194#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2195
2196
2197/**
2198 * RTC device helpers.
2199 */
2200typedef struct PDMRTCHLP
2201{
2202 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2203 uint32_t u32Version;
2204
2205 /* to-be-defined */
2206
2207} PDMRTCHLP;
2208/** Pointer to RTC helpers. */
2209typedef PDMRTCHLP *PPDMRTCHLP;
2210/** Pointer to const RTC helpers. */
2211typedef const PDMRTCHLP *PCPDMRTCHLP;
2212
2213/** Current PDMRTCHLP version number. */
2214#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2215
2216
2217
2218#ifdef IN_RING3
2219
2220/**
2221 * PDM Device API.
2222 */
2223typedef struct PDMDEVHLPR3
2224{
2225 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2226 uint32_t u32Version;
2227
2228 /**
2229 * Register a number of I/O ports with a device.
2230 *
2231 * These callbacks are of course for the host context (HC).
2232 * Register HC handlers before guest context (GC) handlers! There must be a
2233 * HC handler for every GC handler!
2234 *
2235 * @returns VBox status.
2236 * @param pDevIns The device instance to register the ports with.
2237 * @param Port First port number in the range.
2238 * @param cPorts Number of ports to register.
2239 * @param pvUser User argument.
2240 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2241 * @param pfnIn Pointer to function which is gonna handle IN operations.
2242 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2243 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2244 * @param pszDesc Pointer to description string. This must not be freed.
2245 * @remarks Caller enters the device critical section prior to invoking the
2246 * registered callback methods.
2247 */
2248 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2249 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2250 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2251
2252 /**
2253 * Register a number of I/O ports with a device for RC.
2254 *
2255 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2256 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2257 * for every RC handler!
2258 *
2259 * @returns VBox status.
2260 * @param pDevIns The device instance to register the ports with
2261 * and which RC module to resolve the names
2262 * against.
2263 * @param Port First port number in the range.
2264 * @param cPorts Number of ports to register.
2265 * @param pvUser User argument.
2266 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2267 * @param pszIn Name of the RC function which is gonna handle IN operations.
2268 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2269 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2270 * @param pszDesc Pointer to description string. This must not be freed.
2271 * @remarks Caller enters the device critical section prior to invoking the
2272 * registered callback methods.
2273 */
2274 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2275 const char *pszOut, const char *pszIn,
2276 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2277
2278 /**
2279 * Register a number of I/O ports with a device.
2280 *
2281 * These callbacks are of course for the ring-0 host context (R0).
2282 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2283 *
2284 * @returns VBox status.
2285 * @param pDevIns The device instance to register the ports with.
2286 * @param Port First port number in the range.
2287 * @param cPorts Number of ports to register.
2288 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2289 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2290 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2291 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2292 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2293 * @param pszDesc Pointer to description string. This must not be freed.
2294 * @remarks Caller enters the device critical section prior to invoking the
2295 * registered callback methods.
2296 */
2297 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2298 const char *pszOut, const char *pszIn,
2299 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2300
2301 /**
2302 * Deregister I/O ports.
2303 *
2304 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2305 *
2306 * @returns VBox status.
2307 * @param pDevIns The device instance owning the ports.
2308 * @param Port First port number in the range.
2309 * @param cPorts Number of ports to deregister.
2310 */
2311 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2312
2313 /**
2314 * Register a Memory Mapped I/O (MMIO) region.
2315 *
2316 * These callbacks are of course for the ring-3 context (R3). Register HC
2317 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2318 * must be a R3 handler for every RC and R0 handler!
2319 *
2320 * @returns VBox status.
2321 * @param pDevIns The device instance to register the MMIO with.
2322 * @param GCPhysStart First physical address in the range.
2323 * @param cbRange The size of the range (in bytes).
2324 * @param pvUser User argument.
2325 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2326 * @param pfnRead Pointer to function which is gonna handle Read operations.
2327 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2328 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2329 * @param pszDesc Pointer to description string. This must not be freed.
2330 * @remarks Caller enters the device critical section prior to invoking the
2331 * registered callback methods.
2332 */
2333 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2334 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2335 uint32_t fFlags, const char *pszDesc));
2336
2337 /**
2338 * Register a Memory Mapped I/O (MMIO) region for RC.
2339 *
2340 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2341 * (R3) handlers before guest context handlers! There must be a R3 handler for
2342 * every RC handler!
2343 *
2344 * @returns VBox status.
2345 * @param pDevIns The device instance to register the MMIO with.
2346 * @param GCPhysStart First physical address in the range.
2347 * @param cbRange The size of the range (in bytes).
2348 * @param pvUser User argument.
2349 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2350 * @param pszRead Name of the RC function which is gonna handle Read operations.
2351 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2352 * @remarks Caller enters the device critical section prior to invoking the
2353 * registered callback methods.
2354 */
2355 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2356 const char *pszWrite, const char *pszRead, const char *pszFill));
2357
2358 /**
2359 * Register a Memory Mapped I/O (MMIO) region for R0.
2360 *
2361 * These callbacks are for the ring-0 host context (R0). Register ring-3
2362 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2363 * every R0 handler!
2364 *
2365 * @returns VBox status.
2366 * @param pDevIns The device instance to register the MMIO with.
2367 * @param GCPhysStart First physical address in the range.
2368 * @param cbRange The size of the range (in bytes).
2369 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2370 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2371 * @param pszRead Name of the RC function which is gonna handle Read operations.
2372 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2373 * @remarks Caller enters the device critical section prior to invoking the
2374 * registered callback methods.
2375 */
2376 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2377 const char *pszWrite, const char *pszRead, const char *pszFill));
2378
2379 /**
2380 * Deregister a Memory Mapped I/O (MMIO) region.
2381 *
2382 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2383 *
2384 * @returns VBox status.
2385 * @param pDevIns The device instance owning the MMIO region(s).
2386 * @param GCPhysStart First physical address in the range.
2387 * @param cbRange The size of the range (in bytes).
2388 */
2389 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2390
2391 /**
2392 * Allocate and register a MMIO2 region.
2393 *
2394 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2395 * RAM associated with a device. It is also non-shared memory with a
2396 * permanent ring-3 mapping and page backing (presently).
2397 *
2398 * @returns VBox status.
2399 * @param pDevIns The device instance.
2400 * @param iRegion The region number. Use the PCI region number as
2401 * this must be known to the PCI bus device too. If
2402 * it's not associated with the PCI device, then
2403 * any number up to UINT8_MAX is fine.
2404 * @param cb The size (in bytes) of the region.
2405 * @param fFlags Reserved for future use, must be zero.
2406 * @param ppv Where to store the address of the ring-3 mapping
2407 * of the memory.
2408 * @param pszDesc Pointer to description string. This must not be
2409 * freed.
2410 * @thread EMT.
2411 */
2412 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2413
2414 /**
2415 * Deregisters and frees a MMIO2 region.
2416 *
2417 * Any physical (and virtual) access handlers registered for the region must
2418 * be deregistered before calling this function.
2419 *
2420 * @returns VBox status code.
2421 * @param pDevIns The device instance.
2422 * @param iRegion The region number used during registration.
2423 * @thread EMT.
2424 */
2425 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2426
2427 /**
2428 * Maps a MMIO2 region into the physical memory space.
2429 *
2430 * A MMIO2 range may overlap with base memory if a lot of RAM
2431 * is configured for the VM, in which case we'll drop the base
2432 * memory pages. Presently we will make no attempt to preserve
2433 * anything that happens to be present in the base memory that
2434 * is replaced, this is of course incorrect but it's too much
2435 * effort.
2436 *
2437 * @returns VBox status code.
2438 * @param pDevIns The device instance.
2439 * @param iRegion The region number used during registration.
2440 * @param GCPhys The physical address to map it at.
2441 * @thread EMT.
2442 */
2443 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2444
2445 /**
2446 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2447 *
2448 * @returns VBox status code.
2449 * @param pDevIns The device instance.
2450 * @param iRegion The region number used during registration.
2451 * @param GCPhys The physical address it's currently mapped at.
2452 * @thread EMT.
2453 */
2454 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2455
2456 /**
2457 * Maps a portion of an MMIO2 region into the hypervisor region.
2458 *
2459 * Callers of this API must never deregister the MMIO2 region before the
2460 * VM is powered off.
2461 *
2462 * @return VBox status code.
2463 * @param pDevIns The device owning the MMIO2 memory.
2464 * @param iRegion The region.
2465 * @param off The offset into the region. Will be rounded down
2466 * to closest page boundary.
2467 * @param cb The number of bytes to map. Will be rounded up
2468 * to the closest page boundary.
2469 * @param pszDesc Mapping description.
2470 * @param pRCPtr Where to store the RC address.
2471 */
2472 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2473 const char *pszDesc, PRTRCPTR pRCPtr));
2474
2475 /**
2476 * Maps a portion of an MMIO2 region into kernel space (host).
2477 *
2478 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2479 * or the VM is terminated.
2480 *
2481 * @return VBox status code.
2482 * @param pDevIns The device owning the MMIO2 memory.
2483 * @param iRegion The region.
2484 * @param off The offset into the region. Must be page
2485 * aligned.
2486 * @param cb The number of bytes to map. Must be page
2487 * aligned.
2488 * @param pszDesc Mapping description.
2489 * @param pR0Ptr Where to store the R0 address.
2490 */
2491 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2492 const char *pszDesc, PRTR0PTR pR0Ptr));
2493
2494 /**
2495 * Register a ROM (BIOS) region.
2496 *
2497 * It goes without saying that this is read-only memory. The memory region must be
2498 * in unassigned memory. I.e. from the top of the address space or on the PC in
2499 * the 0xa0000-0xfffff range.
2500 *
2501 * @returns VBox status.
2502 * @param pDevIns The device instance owning the ROM region.
2503 * @param GCPhysStart First physical address in the range.
2504 * Must be page aligned!
2505 * @param cbRange The size of the range (in bytes).
2506 * Must be page aligned!
2507 * @param pvBinary Pointer to the binary data backing the ROM image.
2508 * @param cbBinary The size of the binary pointer. This must
2509 * be equal or smaller than @a cbRange.
2510 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2511 * @param pszDesc Pointer to description string. This must not be freed.
2512 *
2513 * @remark There is no way to remove the rom, automatically on device cleanup or
2514 * manually from the device yet. At present I doubt we need such features...
2515 */
2516 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2517 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2518
2519 /**
2520 * Changes the protection of shadowed ROM mapping.
2521 *
2522 * This is intented for use by the system BIOS, chipset or device in question to
2523 * change the protection of shadowed ROM code after init and on reset.
2524 *
2525 * @param pDevIns The device instance.
2526 * @param GCPhysStart Where the mapping starts.
2527 * @param cbRange The size of the mapping.
2528 * @param enmProt The new protection type.
2529 */
2530 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2531
2532 /**
2533 * Register a save state data unit.
2534 *
2535 * @returns VBox status.
2536 * @param pDevIns The device instance.
2537 * @param uVersion Data layout version number.
2538 * @param cbGuess The approximate amount of data in the unit.
2539 * Only for progress indicators.
2540 * @param pszBefore Name of data unit which we should be put in
2541 * front of. Optional (NULL).
2542 *
2543 * @param pfnLivePrep Prepare live save callback, optional.
2544 * @param pfnLiveExec Execute live save callback, optional.
2545 * @param pfnLiveVote Vote live save callback, optional.
2546 *
2547 * @param pfnSavePrep Prepare save callback, optional.
2548 * @param pfnSaveExec Execute save callback, optional.
2549 * @param pfnSaveDone Done save callback, optional.
2550 *
2551 * @param pfnLoadPrep Prepare load callback, optional.
2552 * @param pfnLoadExec Execute load callback, optional.
2553 * @param pfnLoadDone Done load callback, optional.
2554 * @remarks Caller enters the device critical section prior to invoking the
2555 * registered callback methods.
2556 */
2557 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2558 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2559 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2560 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2561
2562 /**
2563 * Creates a timer.
2564 *
2565 * @returns VBox status.
2566 * @param pDevIns The device instance.
2567 * @param enmClock The clock to use on this timer.
2568 * @param pfnCallback Callback function.
2569 * @param pvUser User argument for the callback.
2570 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2571 * @param pszDesc Pointer to description string which must stay around
2572 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2573 * @param ppTimer Where to store the timer on success.
2574 * @remarks Caller enters the device critical section prior to invoking the
2575 * callback.
2576 */
2577 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback,
2578 void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2579
2580 /**
2581 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2582 *
2583 * @returns pTime.
2584 * @param pDevIns The device instance.
2585 * @param pTime Where to store the time.
2586 */
2587 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2588
2589 /**
2590 * Read physical memory.
2591 *
2592 * @returns VINF_SUCCESS (for now).
2593 * @param pDevIns The device instance.
2594 * @param GCPhys Physical address start reading from.
2595 * @param pvBuf Where to put the read bits.
2596 * @param cbRead How many bytes to read.
2597 * @thread Any thread, but the call may involve the emulation thread.
2598 */
2599 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2600
2601 /**
2602 * Write to physical memory.
2603 *
2604 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2605 * @param pDevIns The device instance.
2606 * @param GCPhys Physical address to write to.
2607 * @param pvBuf What to write.
2608 * @param cbWrite How many bytes to write.
2609 * @thread Any thread, but the call may involve the emulation thread.
2610 */
2611 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2612
2613 /**
2614 * Requests the mapping of a guest page into ring-3.
2615 *
2616 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2617 * release it.
2618 *
2619 * This API will assume your intention is to write to the page, and will
2620 * therefore replace shared and zero pages. If you do not intend to modify the
2621 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2622 *
2623 * @returns VBox status code.
2624 * @retval VINF_SUCCESS on success.
2625 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2626 * backing or if the page has any active access handlers. The caller
2627 * must fall back on using PGMR3PhysWriteExternal.
2628 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2629 *
2630 * @param pDevIns The device instance.
2631 * @param GCPhys The guest physical address of the page that
2632 * should be mapped.
2633 * @param fFlags Flags reserved for future use, MBZ.
2634 * @param ppv Where to store the address corresponding to
2635 * GCPhys.
2636 * @param pLock Where to store the lock information that
2637 * pfnPhysReleasePageMappingLock needs.
2638 *
2639 * @remark Avoid calling this API from within critical sections (other than the
2640 * PGM one) because of the deadlock risk when we have to delegating the
2641 * task to an EMT.
2642 * @thread Any.
2643 */
2644 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv,
2645 PPGMPAGEMAPLOCK pLock));
2646
2647 /**
2648 * Requests the mapping of a guest page into ring-3, external threads.
2649 *
2650 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2651 * release it.
2652 *
2653 * @returns VBox status code.
2654 * @retval VINF_SUCCESS on success.
2655 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2656 * backing or if the page as an active ALL access handler. The caller
2657 * must fall back on using PGMPhysRead.
2658 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2659 *
2660 * @param pDevIns The device instance.
2661 * @param GCPhys The guest physical address of the page that
2662 * should be mapped.
2663 * @param fFlags Flags reserved for future use, MBZ.
2664 * @param ppv Where to store the address corresponding to
2665 * GCPhys.
2666 * @param pLock Where to store the lock information that
2667 * pfnPhysReleasePageMappingLock needs.
2668 *
2669 * @remark Avoid calling this API from within critical sections.
2670 * @thread Any.
2671 */
2672 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags,
2673 void const **ppv, PPGMPAGEMAPLOCK pLock));
2674
2675 /**
2676 * Release the mapping of a guest page.
2677 *
2678 * This is the counter part of pfnPhysGCPhys2CCPtr and
2679 * pfnPhysGCPhys2CCPtrReadOnly.
2680 *
2681 * @param pDevIns The device instance.
2682 * @param pLock The lock structure initialized by the mapping
2683 * function.
2684 */
2685 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2686
2687 /**
2688 * Read guest physical memory by virtual address.
2689 *
2690 * @param pDevIns The device instance.
2691 * @param pvDst Where to put the read bits.
2692 * @param GCVirtSrc Guest virtual address to start reading from.
2693 * @param cb How many bytes to read.
2694 * @thread The emulation thread.
2695 */
2696 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2697
2698 /**
2699 * Write to guest physical memory by virtual address.
2700 *
2701 * @param pDevIns The device instance.
2702 * @param GCVirtDst Guest virtual address to write to.
2703 * @param pvSrc What to write.
2704 * @param cb How many bytes to write.
2705 * @thread The emulation thread.
2706 */
2707 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2708
2709 /**
2710 * Convert a guest virtual address to a guest physical address.
2711 *
2712 * @returns VBox status code.
2713 * @param pDevIns The device instance.
2714 * @param GCPtr Guest virtual address.
2715 * @param pGCPhys Where to store the GC physical address
2716 * corresponding to GCPtr.
2717 * @thread The emulation thread.
2718 * @remark Careful with page boundaries.
2719 */
2720 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2721
2722 /**
2723 * Allocate memory which is associated with current VM instance
2724 * and automatically freed on it's destruction.
2725 *
2726 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2727 * @param pDevIns The device instance.
2728 * @param cb Number of bytes to allocate.
2729 */
2730 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2731
2732 /**
2733 * Allocate memory which is associated with current VM instance
2734 * and automatically freed on it's destruction. The memory is ZEROed.
2735 *
2736 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2737 * @param pDevIns The device instance.
2738 * @param cb Number of bytes to allocate.
2739 */
2740 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2741
2742 /**
2743 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2744 *
2745 * @param pDevIns The device instance.
2746 * @param pv Pointer to the memory to free.
2747 */
2748 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2749
2750 /**
2751 * Gets the VM state.
2752 *
2753 * @returns VM state.
2754 * @param pDevIns The device instance.
2755 * @thread Any thread (just keep in mind that it's volatile info).
2756 */
2757 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2758
2759 /**
2760 * Checks if the VM was teleported and hasn't been fully resumed yet.
2761 *
2762 * @returns true / false.
2763 * @param pDevIns The device instance.
2764 * @thread Any thread.
2765 */
2766 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2767
2768 /**
2769 * Set the VM error message
2770 *
2771 * @returns rc.
2772 * @param pDevIns The device instance.
2773 * @param rc VBox status code.
2774 * @param SRC_POS Use RT_SRC_POS.
2775 * @param pszFormat Error message format string.
2776 * @param ... Error message arguments.
2777 */
2778 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2779 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
2780
2781 /**
2782 * Set the VM error message
2783 *
2784 * @returns rc.
2785 * @param pDevIns The device instance.
2786 * @param rc VBox status code.
2787 * @param SRC_POS Use RT_SRC_POS.
2788 * @param pszFormat Error message format string.
2789 * @param va Error message arguments.
2790 */
2791 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2792 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2793
2794 /**
2795 * Set the VM runtime error message
2796 *
2797 * @returns VBox status code.
2798 * @param pDevIns The device instance.
2799 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2800 * @param pszErrorId Error ID string.
2801 * @param pszFormat Error message format string.
2802 * @param ... Error message arguments.
2803 */
2804 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2805 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
2806
2807 /**
2808 * Set the VM runtime error message
2809 *
2810 * @returns VBox status code.
2811 * @param pDevIns The device instance.
2812 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2813 * @param pszErrorId Error ID string.
2814 * @param pszFormat Error message format string.
2815 * @param va Error message arguments.
2816 */
2817 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2818 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
2819
2820 /**
2821 * Stops the VM and enters the debugger to look at the guest state.
2822 *
2823 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2824 * invoking this function directly.
2825 *
2826 * @returns VBox status code which must be passed up to the VMM.
2827 * @param pDevIns The device instance.
2828 * @param pszFile Filename of the assertion location.
2829 * @param iLine The linenumber of the assertion location.
2830 * @param pszFunction Function of the assertion location.
2831 * @param pszFormat Message. (optional)
2832 * @param args Message parameters.
2833 */
2834 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction,
2835 const char *pszFormat, va_list args) RT_IPRT_FORMAT_ATTR(5, 0));
2836
2837 /**
2838 * Register a info handler with DBGF,
2839 *
2840 * @returns VBox status code.
2841 * @param pDevIns The device instance.
2842 * @param pszName The identifier of the info.
2843 * @param pszDesc The description of the info and any arguments
2844 * the handler may take.
2845 * @param pfnHandler The handler function to be called to display the
2846 * info.
2847 */
2848 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2849
2850 /**
2851 * Registers a set of registers for a device.
2852 *
2853 * The @a pvUser argument of the getter and setter callbacks will be
2854 * @a pDevIns. The register names will be prefixed by the device name followed
2855 * immediately by the instance number.
2856 *
2857 * @returns VBox status code.
2858 * @param pDevIns The device instance.
2859 * @param paRegisters The register descriptors.
2860 *
2861 * @remarks The device critical section is NOT entered prior to working the
2862 * callbacks registered via this helper!
2863 */
2864 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2865
2866 /**
2867 * Gets the trace buffer handle.
2868 *
2869 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2870 * really inteded for direct usage, thus no inline wrapper function.
2871 *
2872 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2873 * @param pDevIns The device instance.
2874 */
2875 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2876
2877 /**
2878 * Registers a statistics sample if statistics are enabled.
2879 *
2880 * @param pDevIns Device instance of the DMA.
2881 * @param pvSample Pointer to the sample.
2882 * @param enmType Sample type. This indicates what pvSample is
2883 * pointing at.
2884 * @param pszName Sample name. The name is on this form
2885 * "/<component>/<sample>". Further nesting is
2886 * possible.
2887 * @param enmUnit Sample unit.
2888 * @param pszDesc Sample description.
2889 */
2890 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2891
2892 /**
2893 * Same as pfnSTAMRegister except that the name is specified in a
2894 * RTStrPrintf like fashion.
2895 *
2896 * @returns VBox status.
2897 * @param pDevIns Device instance of the DMA.
2898 * @param pvSample Pointer to the sample.
2899 * @param enmType Sample type. This indicates what pvSample is
2900 * pointing at.
2901 * @param enmVisibility Visibility type specifying whether unused
2902 * statistics should be visible or not.
2903 * @param enmUnit Sample unit.
2904 * @param pszDesc Sample description.
2905 * @param pszName The sample name format string.
2906 * @param ... Arguments to the format string.
2907 */
2908 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2909 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2910 const char *pszName, ...) RT_IPRT_FORMAT_ATTR(7, 8));
2911
2912 /**
2913 * Same as pfnSTAMRegister except that the name is specified in a
2914 * RTStrPrintfV like fashion.
2915 *
2916 * @returns VBox status.
2917 * @param pDevIns Device instance of the DMA.
2918 * @param pvSample Pointer to the sample.
2919 * @param enmType Sample type. This indicates what pvSample is
2920 * pointing at.
2921 * @param enmVisibility Visibility type specifying whether unused
2922 * statistics should be visible or not.
2923 * @param enmUnit Sample unit.
2924 * @param pszDesc Sample description.
2925 * @param pszName The sample name format string.
2926 * @param args Arguments to the format string.
2927 */
2928 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2929 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2930 const char *pszName, va_list args) RT_IPRT_FORMAT_ATTR(7, 0));
2931
2932 /**
2933 * Registers the device with the default PCI bus.
2934 *
2935 * @returns VBox status code.
2936 * @param pDevIns The device instance.
2937 * @param pPciDev The PCI device structure.
2938 * Any PCI enabled device must keep this in it's instance data!
2939 * Fill in the PCI data config before registration, please.
2940 * @remark This is the simple interface, a Ex interface will be created if
2941 * more features are needed later.
2942 */
2943 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2944
2945 /**
2946 * Initialize MSI support in a PCI device.
2947 *
2948 * @returns VBox status code.
2949 * @param pDevIns The device instance.
2950 * @param pMsiReg MSI registartion structure.
2951 */
2952 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2953
2954 /**
2955 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2956 *
2957 * @returns VBox status code.
2958 * @param pDevIns The device instance.
2959 * @param iRegion The region number.
2960 * @param cbRegion Size of the region.
2961 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2962 * @param pfnCallback Callback for doing the mapping.
2963 * @remarks The callback will be invoked holding the PDM lock. The device lock
2964 * is NOT take because that is very likely be a lock order violation.
2965 */
2966 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2967 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2968
2969 /**
2970 * Register PCI configuration space read/write callbacks.
2971 *
2972 * @param pDevIns The device instance.
2973 * @param pPciDev The PCI device structure.
2974 * If NULL the default PCI device for this device instance is used.
2975 * @param pfnRead Pointer to the user defined PCI config read function.
2976 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2977 * PCI config read function. This way, user can decide when (and if)
2978 * to call default PCI config read function. Can be NULL.
2979 * @param pfnWrite Pointer to the user defined PCI config write function.
2980 * @param ppfnWriteOld Pointer to function pointer which will receive
2981 * the old (default) PCI config write function.
2982 * This way, user can decide when (and if) to call
2983 * default PCI config write function. Can be NULL.
2984 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2985 * is NOT take because that is very likely be a lock order violation.
2986 * @thread EMT
2987 */
2988 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2989 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2990
2991 /**
2992 * Bus master physical memory read.
2993 *
2994 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2995 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2996 * @param pDevIns The device instance.
2997 * @param GCPhys Physical address start reading from.
2998 * @param pvBuf Where to put the read bits.
2999 * @param cbRead How many bytes to read.
3000 * @thread Any thread, but the call may involve the emulation thread.
3001 */
3002 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3003
3004 /**
3005 * Bus master physical memory write.
3006 *
3007 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3008 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3009 * @param pDevIns The device instance.
3010 * @param GCPhys Physical address to write to.
3011 * @param pvBuf What to write.
3012 * @param cbWrite How many bytes to write.
3013 * @thread Any thread, but the call may involve the emulation thread.
3014 */
3015 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3016
3017 /**
3018 * Set the IRQ for a PCI device.
3019 *
3020 * @param pDevIns The device instance.
3021 * @param iIrq IRQ number to set.
3022 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3023 * @thread Any thread, but will involve the emulation thread.
3024 */
3025 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3026
3027 /**
3028 * Set the IRQ for a PCI device, but don't wait for EMT to process
3029 * the request when not called from EMT.
3030 *
3031 * @param pDevIns The device instance.
3032 * @param iIrq IRQ number to set.
3033 * @param iLevel IRQ level.
3034 * @thread Any thread, but will involve the emulation thread.
3035 */
3036 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3037
3038 /**
3039 * Set ISA IRQ for a device.
3040 *
3041 * @param pDevIns The device instance.
3042 * @param iIrq IRQ number to set.
3043 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3044 * @thread Any thread, but will involve the emulation thread.
3045 */
3046 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3047
3048 /**
3049 * Set the ISA IRQ for a device, but don't wait for EMT to process
3050 * the request when not called from EMT.
3051 *
3052 * @param pDevIns The device instance.
3053 * @param iIrq IRQ number to set.
3054 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3055 * @thread Any thread, but will involve the emulation thread.
3056 */
3057 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3058
3059 /**
3060 * Attaches a driver (chain) to the device.
3061 *
3062 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3063 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3064 *
3065 * @returns VBox status code.
3066 * @param pDevIns The device instance.
3067 * @param iLun The logical unit to attach.
3068 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3069 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3070 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3071 * for the live of the device instance.
3072 */
3073 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3074 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3075
3076 /**
3077 * Detaches an attached driver (chain) from the device again.
3078 *
3079 * @returns VBox status code.
3080 * @param pDevIns The device instance.
3081 * @param pDrvIns The driver instance to detach.
3082 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3083 */
3084 DECLR3CALLBACKMEMBER(int, pfnDriverDetach,(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags));
3085
3086 /**
3087 * Create a queue.
3088 *
3089 * @returns VBox status code.
3090 * @param pDevIns The device instance.
3091 * @param cbItem The size of a queue item.
3092 * @param cItems The number of items in the queue.
3093 * @param cMilliesInterval The number of milliseconds between polling the queue.
3094 * If 0 then the emulation thread will be notified whenever an item arrives.
3095 * @param pfnCallback The consumer function.
3096 * @param fRZEnabled Set if the queue should work in RC and R0.
3097 * @param pszName The queue base name. The instance number will be
3098 * appended automatically.
3099 * @param ppQueue Where to store the queue handle on success.
3100 * @thread The emulation thread.
3101 * @remarks The device critical section will NOT be entered before calling the
3102 * callback. No locks will be held, but for now it's safe to assume
3103 * that only one EMT will do queue callbacks at any one time.
3104 */
3105 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3106 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3107
3108 /**
3109 * Initializes a PDM critical section.
3110 *
3111 * The PDM critical sections are derived from the IPRT critical sections, but
3112 * works in RC and R0 as well.
3113 *
3114 * @returns VBox status code.
3115 * @param pDevIns The device instance.
3116 * @param pCritSect Pointer to the critical section.
3117 * @param SRC_POS Use RT_SRC_POS.
3118 * @param pszNameFmt Format string for naming the critical section.
3119 * For statistics and lock validation.
3120 * @param va Arguments for the format string.
3121 */
3122 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3123 const char *pszNameFmt, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3124
3125 /**
3126 * Gets the NOP critical section.
3127 *
3128 * @returns The ring-3 address of the NOP critical section.
3129 * @param pDevIns The device instance.
3130 */
3131 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3132
3133 /**
3134 * Gets the NOP critical section.
3135 *
3136 * @returns The ring-0 address of the NOP critical section.
3137 * @param pDevIns The device instance.
3138 */
3139 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3140
3141 /**
3142 * Gets the NOP critical section.
3143 *
3144 * @returns The raw-mode context address of the NOP critical section.
3145 * @param pDevIns The device instance.
3146 */
3147 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3148
3149 /**
3150 * Changes the device level critical section from the automatically created
3151 * default to one desired by the device constructor.
3152 *
3153 * @returns VBox status code.
3154 * @param pDevIns The device instance.
3155 * @param pCritSect The critical section to use. NULL is not
3156 * valid, instead use the NOP critical
3157 * section.
3158 */
3159 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3160
3161 /**
3162 * Creates a PDM thread.
3163 *
3164 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3165 * resuming, and destroying the thread as the VM state changes.
3166 *
3167 * @returns VBox status code.
3168 * @param pDevIns The device instance.
3169 * @param ppThread Where to store the thread 'handle'.
3170 * @param pvUser The user argument to the thread function.
3171 * @param pfnThread The thread function.
3172 * @param pfnWakeup The wakup callback. This is called on the EMT
3173 * thread when a state change is pending.
3174 * @param cbStack See RTThreadCreate.
3175 * @param enmType See RTThreadCreate.
3176 * @param pszName See RTThreadCreate.
3177 * @remarks The device critical section will NOT be entered prior to invoking
3178 * the function pointers.
3179 */
3180 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3181 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3182
3183 /**
3184 * Set up asynchronous handling of a suspend, reset or power off notification.
3185 *
3186 * This shall only be called when getting the notification. It must be called
3187 * for each one.
3188 *
3189 * @returns VBox status code.
3190 * @param pDevIns The device instance.
3191 * @param pfnAsyncNotify The callback.
3192 * @thread EMT(0)
3193 * @remarks The caller will enter the device critical section prior to invoking
3194 * the callback.
3195 */
3196 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3197
3198 /**
3199 * Notify EMT(0) that the device has completed the asynchronous notification
3200 * handling.
3201 *
3202 * This can be called at any time, spurious calls will simply be ignored.
3203 *
3204 * @param pDevIns The device instance.
3205 * @thread Any
3206 */
3207 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3208
3209 /**
3210 * Register the RTC device.
3211 *
3212 * @returns VBox status code.
3213 * @param pDevIns The device instance.
3214 * @param pRtcReg Pointer to a RTC registration structure.
3215 * @param ppRtcHlp Where to store the pointer to the helper
3216 * functions.
3217 */
3218 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3219
3220 /**
3221 * Register the PCI Bus.
3222 *
3223 * @returns VBox status code.
3224 * @param pDevIns The device instance.
3225 * @param pPciBusReg Pointer to PCI bus registration structure.
3226 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3227 * helpers.
3228 */
3229 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3230
3231 /**
3232 * Register the PIC device.
3233 *
3234 * @returns VBox status code.
3235 * @param pDevIns The device instance.
3236 * @param pPicReg Pointer to a PIC registration structure.
3237 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3238 * helpers.
3239 */
3240 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3241
3242 /**
3243 * Register the APIC device.
3244 *
3245 * @returns VBox status code.
3246 * @param pDevIns The device instance.
3247 * @param pApicReg Pointer to a APIC registration structure.
3248 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3249 */
3250 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3251
3252 /**
3253 * Register the I/O APIC device.
3254 *
3255 * @returns VBox status code.
3256 * @param pDevIns The device instance.
3257 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3258 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3259 * helpers.
3260 */
3261 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3262
3263 /**
3264 * Register the HPET device.
3265 *
3266 * @returns VBox status code.
3267 * @param pDevIns The device instance.
3268 * @param pHpetReg Pointer to a HPET registration structure.
3269 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3270 * helpers.
3271 */
3272 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3273
3274 /**
3275 * Register a raw PCI device.
3276 *
3277 * @returns VBox status code.
3278 * @param pDevIns The device instance.
3279 * @param pPciRawReg Pointer to a raw PCI registration structure.
3280 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3281 * device helpers.
3282 */
3283 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3284
3285 /**
3286 * Register the DMA device.
3287 *
3288 * @returns VBox status code.
3289 * @param pDevIns The device instance.
3290 * @param pDmacReg Pointer to a DMAC registration structure.
3291 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3292 */
3293 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3294
3295 /**
3296 * Register transfer function for DMA channel.
3297 *
3298 * @returns VBox status code.
3299 * @param pDevIns The device instance.
3300 * @param uChannel Channel number.
3301 * @param pfnTransferHandler Device specific transfer callback function.
3302 * @param pvUser User pointer to pass to the callback.
3303 * @thread EMT
3304 */
3305 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3306
3307 /**
3308 * Read memory.
3309 *
3310 * @returns VBox status code.
3311 * @param pDevIns The device instance.
3312 * @param uChannel Channel number.
3313 * @param pvBuffer Pointer to target buffer.
3314 * @param off DMA position.
3315 * @param cbBlock Block size.
3316 * @param pcbRead Where to store the number of bytes which was
3317 * read. optional.
3318 * @thread EMT
3319 */
3320 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3321
3322 /**
3323 * Write memory.
3324 *
3325 * @returns VBox status code.
3326 * @param pDevIns The device instance.
3327 * @param uChannel Channel number.
3328 * @param pvBuffer Memory to write.
3329 * @param off DMA position.
3330 * @param cbBlock Block size.
3331 * @param pcbWritten Where to store the number of bytes which was
3332 * written. optional.
3333 * @thread EMT
3334 */
3335 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3336
3337 /**
3338 * Set the DREQ line.
3339 *
3340 * @returns VBox status code.
3341 * @param pDevIns Device instance.
3342 * @param uChannel Channel number.
3343 * @param uLevel Level of the line.
3344 * @thread EMT
3345 */
3346 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3347
3348 /**
3349 * Get channel mode.
3350 *
3351 * @returns Channel mode. See specs.
3352 * @param pDevIns The device instance.
3353 * @param uChannel Channel number.
3354 * @thread EMT
3355 */
3356 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3357
3358 /**
3359 * Schedule DMA execution.
3360 *
3361 * @param pDevIns The device instance.
3362 * @thread Any thread.
3363 */
3364 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3365
3366 /**
3367 * Write CMOS value and update the checksum(s).
3368 *
3369 * @returns VBox status code.
3370 * @param pDevIns The device instance.
3371 * @param iReg The CMOS register index.
3372 * @param u8Value The CMOS register value.
3373 * @thread EMT
3374 */
3375 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3376
3377 /**
3378 * Read CMOS value.
3379 *
3380 * @returns VBox status code.
3381 * @param pDevIns The device instance.
3382 * @param iReg The CMOS register index.
3383 * @param pu8Value Where to store the CMOS register value.
3384 * @thread EMT
3385 */
3386 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3387
3388 /**
3389 * Assert that the current thread is the emulation thread.
3390 *
3391 * @returns True if correct.
3392 * @returns False if wrong.
3393 * @param pDevIns The device instance.
3394 * @param pszFile Filename of the assertion location.
3395 * @param iLine The linenumber of the assertion location.
3396 * @param pszFunction Function of the assertion location.
3397 */
3398 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3399
3400 /**
3401 * Assert that the current thread is NOT the emulation thread.
3402 *
3403 * @returns True if correct.
3404 * @returns False if wrong.
3405 * @param pDevIns The device instance.
3406 * @param pszFile Filename of the assertion location.
3407 * @param iLine The linenumber of the assertion location.
3408 * @param pszFunction Function of the assertion location.
3409 */
3410 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3411
3412 /**
3413 * Resolves the symbol for a raw-mode context interface.
3414 *
3415 * @returns VBox status code.
3416 * @param pDevIns The device instance.
3417 * @param pvInterface The interface structure.
3418 * @param cbInterface The size of the interface structure.
3419 * @param pszSymPrefix What to prefix the symbols in the list with
3420 * before resolving them. This must start with
3421 * 'dev' and contain the driver name.
3422 * @param pszSymList List of symbols corresponding to the interface.
3423 * There is generally a there is generally a define
3424 * holding this list associated with the interface
3425 * definition (INTERFACE_SYM_LIST). For more
3426 * details see PDMR3LdrGetInterfaceSymbols.
3427 * @thread EMT
3428 */
3429 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3430 const char *pszSymPrefix, const char *pszSymList));
3431
3432 /**
3433 * Resolves the symbol for a ring-0 context interface.
3434 *
3435 * @returns VBox status code.
3436 * @param pDevIns The device instance.
3437 * @param pvInterface The interface structure.
3438 * @param cbInterface The size of the interface structure.
3439 * @param pszSymPrefix What to prefix the symbols in the list with
3440 * before resolving them. This must start with
3441 * 'dev' and contain the driver name.
3442 * @param pszSymList List of symbols corresponding to the interface.
3443 * There is generally a there is generally a define
3444 * holding this list associated with the interface
3445 * definition (INTERFACE_SYM_LIST). For more
3446 * details see PDMR3LdrGetInterfaceSymbols.
3447 * @thread EMT
3448 */
3449 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3450 const char *pszSymPrefix, const char *pszSymList));
3451
3452 /**
3453 * Call the ring-0 request handler routine of the device.
3454 *
3455 * For this to work, the device must be ring-0 enabled and export a request
3456 * handler function. The name of the function must be the device name in
3457 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3458 * 'ReqHandler'. The device name will be captialized. It shall take the
3459 * exact same arguments as this function and be declared using
3460 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3461 *
3462 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3463 * or two as the handler address will be resolved on each invocation. This
3464 * is the reason for the EMT only restriction as well.
3465 *
3466 * @returns VBox status code.
3467 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3468 * handler function.
3469 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3470 *
3471 * @param pDevIns The device instance.
3472 * @param uOperation The operation to perform.
3473 * @param u64Arg 64-bit integer argument.
3474 * @thread EMT
3475 */
3476 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3477
3478 /**
3479 * Gets the reason for the most recent VM suspend.
3480 *
3481 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3482 * suspend has been made or if the pDevIns is invalid.
3483 * @param pDevIns The device instance.
3484 */
3485 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3486
3487 /**
3488 * Gets the reason for the most recent VM resume.
3489 *
3490 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3491 * resume has been made or if the pDevIns is invalid.
3492 * @param pDevIns The device instance.
3493 */
3494 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3495
3496
3497 /** Space reserved for future members.
3498 * @{ */
3499 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3500 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3501 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3502 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3503 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3504 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3505 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3506 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3507 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3508 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3509 /** @} */
3510
3511
3512 /** API available to trusted devices only.
3513 *
3514 * These APIs are providing unrestricted access to the guest and the VM,
3515 * or they are interacting intimately with PDM.
3516 *
3517 * @{
3518 */
3519
3520 /**
3521 * Gets the user mode VM handle. Restricted API.
3522 *
3523 * @returns User mode VM Handle.
3524 * @param pDevIns The device instance.
3525 */
3526 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3527
3528 /**
3529 * Gets the global VM handle. Restricted API.
3530 *
3531 * @returns VM Handle.
3532 * @param pDevIns The device instance.
3533 */
3534 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3535
3536 /**
3537 * Gets the VMCPU handle. Restricted API.
3538 *
3539 * @returns VMCPU Handle.
3540 * @param pDevIns The device instance.
3541 */
3542 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3543
3544 /**
3545 * The the VM CPU ID of the current thread (restricted API).
3546 *
3547 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3548 * @param pDevIns The device instance.
3549 */
3550 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3551
3552 /**
3553 * Registers the VMM device heap
3554 *
3555 * @returns VBox status code.
3556 * @param pDevIns The device instance.
3557 * @param GCPhys The physical address.
3558 * @param pvHeap Ring 3 heap pointer.
3559 * @param cbSize Size of the heap.
3560 * @thread EMT.
3561 */
3562 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3563
3564 /**
3565 * Unregisters the VMM device heap
3566 *
3567 * @returns VBox status code.
3568 * @param pDevIns The device instance.
3569 * @param GCPhys The physical address.
3570 * @thread EMT.
3571 */
3572 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3573
3574 /**
3575 * Resets the VM.
3576 *
3577 * @returns The appropriate VBox status code to pass around on reset.
3578 * @param pDevIns The device instance.
3579 * @thread The emulation thread.
3580 */
3581 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3582
3583 /**
3584 * Suspends the VM.
3585 *
3586 * @returns The appropriate VBox status code to pass around on suspend.
3587 * @param pDevIns The device instance.
3588 * @thread The emulation thread.
3589 */
3590 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3591
3592 /**
3593 * Suspends, saves and powers off the VM.
3594 *
3595 * @returns The appropriate VBox status code to pass around.
3596 * @param pDevIns The device instance.
3597 * @thread An emulation thread.
3598 */
3599 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3600
3601 /**
3602 * Power off the VM.
3603 *
3604 * @returns The appropriate VBox status code to pass around on power off.
3605 * @param pDevIns The device instance.
3606 * @thread The emulation thread.
3607 */
3608 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3609
3610 /**
3611 * Checks if the Gate A20 is enabled or not.
3612 *
3613 * @returns true if A20 is enabled.
3614 * @returns false if A20 is disabled.
3615 * @param pDevIns The device instance.
3616 * @thread The emulation thread.
3617 */
3618 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3619
3620 /**
3621 * Enables or disables the Gate A20.
3622 *
3623 * @param pDevIns The device instance.
3624 * @param fEnable Set this flag to enable the Gate A20; clear it
3625 * to disable.
3626 * @thread The emulation thread.
3627 */
3628 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3629
3630 /**
3631 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3632 * thread.
3633 *
3634 * @param pDevIns The device instance.
3635 * @param iLeaf The CPUID leaf to get.
3636 * @param pEax Where to store the EAX value.
3637 * @param pEbx Where to store the EBX value.
3638 * @param pEcx Where to store the ECX value.
3639 * @param pEdx Where to store the EDX value.
3640 * @thread EMT.
3641 */
3642 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3643
3644 /**
3645 * Get the current virtual clock time in a VM. The clock frequency must be
3646 * queried separately.
3647 *
3648 * @returns Current clock time.
3649 * @param pDevIns The device instance.
3650 */
3651 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3652
3653 /**
3654 * Get the frequency of the virtual clock.
3655 *
3656 * @returns The clock frequency (not variable at run-time).
3657 * @param pDevIns The device instance.
3658 */
3659 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3660
3661 /**
3662 * Get the current virtual clock time in a VM, in nanoseconds.
3663 *
3664 * @returns Current clock time (in ns).
3665 * @param pDevIns The device instance.
3666 */
3667 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3668
3669 /**
3670 * Gets the support driver session.
3671 *
3672 * This is intended for working with the semaphore API.
3673 *
3674 * @returns Support driver session handle.
3675 * @param pDevIns The device instance.
3676 */
3677 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3678
3679 /** @} */
3680
3681 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3682 uint32_t u32TheEnd;
3683} PDMDEVHLPR3;
3684#endif /* !IN_RING3 */
3685/** Pointer to the R3 PDM Device API. */
3686typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3687/** Pointer to the R3 PDM Device API, const variant. */
3688typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3689
3690/** Current PDMDEVHLPR3 version number. */
3691#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 15, 1)
3692
3693
3694/**
3695 * PDM Device API - RC Variant.
3696 */
3697typedef struct PDMDEVHLPRC
3698{
3699 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3700 uint32_t u32Version;
3701
3702 /**
3703 * Bus master physical memory read.
3704 *
3705 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3706 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3707 * @param pDevIns The device instance.
3708 * @param GCPhys Physical address start reading from.
3709 * @param pvBuf Where to put the read bits.
3710 * @param cbRead How many bytes to read.
3711 * @thread Any thread, but the call may involve the emulation thread.
3712 */
3713 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3714
3715 /**
3716 * Bus master physical memory write.
3717 *
3718 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3719 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3720 * @param pDevIns The device instance.
3721 * @param GCPhys Physical address to write to.
3722 * @param pvBuf What to write.
3723 * @param cbWrite How many bytes to write.
3724 * @thread Any thread, but the call may involve the emulation thread.
3725 */
3726 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3727
3728 /**
3729 * Set the IRQ for a PCI device.
3730 *
3731 * @param pDevIns Device instance.
3732 * @param iIrq IRQ number to set.
3733 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3734 * @thread Any thread, but will involve the emulation thread.
3735 */
3736 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3737
3738 /**
3739 * Set ISA IRQ for a device.
3740 *
3741 * @param pDevIns Device instance.
3742 * @param iIrq IRQ number to set.
3743 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3744 * @thread Any thread, but will involve the emulation thread.
3745 */
3746 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3747
3748 /**
3749 * Read physical memory.
3750 *
3751 * @returns VINF_SUCCESS (for now).
3752 * @param pDevIns Device instance.
3753 * @param GCPhys Physical address start reading from.
3754 * @param pvBuf Where to put the read bits.
3755 * @param cbRead How many bytes to read.
3756 */
3757 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3758
3759 /**
3760 * Write to physical memory.
3761 *
3762 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3763 * @param pDevIns Device instance.
3764 * @param GCPhys Physical address to write to.
3765 * @param pvBuf What to write.
3766 * @param cbWrite How many bytes to write.
3767 */
3768 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3769
3770 /**
3771 * Checks if the Gate A20 is enabled or not.
3772 *
3773 * @returns true if A20 is enabled.
3774 * @returns false if A20 is disabled.
3775 * @param pDevIns Device instance.
3776 * @thread The emulation thread.
3777 */
3778 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3779
3780 /**
3781 * Gets the VM state.
3782 *
3783 * @returns VM state.
3784 * @param pDevIns The device instance.
3785 * @thread Any thread (just keep in mind that it's volatile info).
3786 */
3787 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3788
3789 /**
3790 * Set the VM error message
3791 *
3792 * @returns rc.
3793 * @param pDevIns Driver instance.
3794 * @param rc VBox status code.
3795 * @param SRC_POS Use RT_SRC_POS.
3796 * @param pszFormat Error message format string.
3797 * @param ... Error message arguments.
3798 */
3799 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3800 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
3801
3802 /**
3803 * Set the VM error message
3804 *
3805 * @returns rc.
3806 * @param pDevIns Driver instance.
3807 * @param rc VBox status code.
3808 * @param SRC_POS Use RT_SRC_POS.
3809 * @param pszFormat Error message format string.
3810 * @param va Error message arguments.
3811 */
3812 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3813 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3814
3815 /**
3816 * Set the VM runtime error message
3817 *
3818 * @returns VBox status code.
3819 * @param pDevIns Device instance.
3820 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3821 * @param pszErrorId Error ID string.
3822 * @param pszFormat Error message format string.
3823 * @param ... Error message arguments.
3824 */
3825 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3826 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
3827
3828 /**
3829 * Set the VM runtime error message
3830 *
3831 * @returns VBox status code.
3832 * @param pDevIns Device instance.
3833 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3834 * @param pszErrorId Error ID string.
3835 * @param pszFormat Error message format string.
3836 * @param va Error message arguments.
3837 */
3838 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3839 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
3840
3841 /**
3842 * Set parameters for pending MMIO patch operation
3843 *
3844 * @returns VBox status code.
3845 * @param pDevIns Device instance.
3846 * @param GCPhys MMIO physical address
3847 * @param pCachedData GC pointer to cached data
3848 */
3849 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3850
3851 /**
3852 * Gets the VM handle. Restricted API.
3853 *
3854 * @returns VM Handle.
3855 * @param pDevIns Device instance.
3856 */
3857 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3858
3859 /**
3860 * Gets the VMCPU handle. Restricted API.
3861 *
3862 * @returns VMCPU Handle.
3863 * @param pDevIns The device instance.
3864 */
3865 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3866
3867 /**
3868 * The the VM CPU ID of the current thread (restricted API).
3869 *
3870 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3871 * @param pDevIns The device instance.
3872 */
3873 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3874
3875 /**
3876 * Get the current virtual clock time in a VM. The clock frequency must be
3877 * queried separately.
3878 *
3879 * @returns Current clock time.
3880 * @param pDevIns The device instance.
3881 */
3882 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3883
3884 /**
3885 * Get the frequency of the virtual clock.
3886 *
3887 * @returns The clock frequency (not variable at run-time).
3888 * @param pDevIns The device instance.
3889 */
3890 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3891
3892 /**
3893 * Get the current virtual clock time in a VM, in nanoseconds.
3894 *
3895 * @returns Current clock time (in ns).
3896 * @param pDevIns The device instance.
3897 */
3898 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3899
3900 /**
3901 * Gets the trace buffer handle.
3902 *
3903 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3904 * really inteded for direct usage, thus no inline wrapper function.
3905 *
3906 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3907 * @param pDevIns The device instance.
3908 */
3909 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3910
3911 /** Just a safety precaution. */
3912 uint32_t u32TheEnd;
3913} PDMDEVHLPRC;
3914/** Pointer PDM Device RC API. */
3915typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3916/** Pointer PDM Device RC API. */
3917typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3918
3919/** Current PDMDEVHLP version number. */
3920#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 4, 1)
3921
3922
3923/**
3924 * PDM Device API - R0 Variant.
3925 */
3926typedef struct PDMDEVHLPR0
3927{
3928 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3929 uint32_t u32Version;
3930
3931 /**
3932 * Bus master physical memory read.
3933 *
3934 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3935 * VERR_EM_MEMORY.
3936 * @param pDevIns The device instance.
3937 * @param GCPhys Physical address start reading from.
3938 * @param pvBuf Where to put the read bits.
3939 * @param cbRead How many bytes to read.
3940 * @thread Any thread, but the call may involve the emulation thread.
3941 */
3942 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3943
3944 /**
3945 * Bus master physical memory write.
3946 *
3947 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3948 * VERR_EM_MEMORY.
3949 * @param pDevIns The device instance.
3950 * @param GCPhys Physical address to write to.
3951 * @param pvBuf What to write.
3952 * @param cbWrite How many bytes to write.
3953 * @thread Any thread, but the call may involve the emulation thread.
3954 */
3955 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3956
3957 /**
3958 * Set the IRQ for a PCI device.
3959 *
3960 * @param pDevIns Device instance.
3961 * @param iIrq IRQ number to set.
3962 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3963 * @thread Any thread, but will involve the emulation thread.
3964 */
3965 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3966
3967 /**
3968 * Set ISA IRQ for a device.
3969 *
3970 * @param pDevIns Device instance.
3971 * @param iIrq IRQ number to set.
3972 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3973 * @thread Any thread, but will involve the emulation thread.
3974 */
3975 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3976
3977 /**
3978 * Read physical memory.
3979 *
3980 * @returns VINF_SUCCESS (for now).
3981 * @param pDevIns Device instance.
3982 * @param GCPhys Physical address start reading from.
3983 * @param pvBuf Where to put the read bits.
3984 * @param cbRead How many bytes to read.
3985 */
3986 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3987
3988 /**
3989 * Write to physical memory.
3990 *
3991 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3992 * @param pDevIns Device instance.
3993 * @param GCPhys Physical address to write to.
3994 * @param pvBuf What to write.
3995 * @param cbWrite How many bytes to write.
3996 */
3997 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3998
3999 /**
4000 * Checks if the Gate A20 is enabled or not.
4001 *
4002 * @returns true if A20 is enabled.
4003 * @returns false if A20 is disabled.
4004 * @param pDevIns Device instance.
4005 * @thread The emulation thread.
4006 */
4007 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
4008
4009 /**
4010 * Gets the VM state.
4011 *
4012 * @returns VM state.
4013 * @param pDevIns The device instance.
4014 * @thread Any thread (just keep in mind that it's volatile info).
4015 */
4016 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
4017
4018 /**
4019 * Set the VM error message
4020 *
4021 * @returns rc.
4022 * @param pDevIns Driver instance.
4023 * @param rc VBox status code.
4024 * @param SRC_POS Use RT_SRC_POS.
4025 * @param pszFormat Error message format string.
4026 * @param ... Error message arguments.
4027 */
4028 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4029 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
4030
4031 /**
4032 * Set the VM error message
4033 *
4034 * @returns rc.
4035 * @param pDevIns Driver instance.
4036 * @param rc VBox status code.
4037 * @param SRC_POS Use RT_SRC_POS.
4038 * @param pszFormat Error message format string.
4039 * @param va Error message arguments.
4040 */
4041 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4042 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
4043
4044 /**
4045 * Set the VM runtime error message
4046 *
4047 * @returns VBox status code.
4048 * @param pDevIns Device instance.
4049 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4050 * @param pszErrorId Error ID string.
4051 * @param pszFormat Error message format string.
4052 * @param ... Error message arguments.
4053 */
4054 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4055 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
4056
4057 /**
4058 * Set the VM runtime error message
4059 *
4060 * @returns VBox status code.
4061 * @param pDevIns Device instance.
4062 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4063 * @param pszErrorId Error ID string.
4064 * @param pszFormat Error message format string.
4065 * @param va Error message arguments.
4066 */
4067 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4068 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
4069
4070 /**
4071 * Set parameters for pending MMIO patch operation
4072 *
4073 * @returns rc.
4074 * @param pDevIns Device instance.
4075 * @param GCPhys MMIO physical address
4076 * @param pCachedData GC pointer to cached data
4077 */
4078 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4079
4080 /**
4081 * Gets the VM handle. Restricted API.
4082 *
4083 * @returns VM Handle.
4084 * @param pDevIns Device instance.
4085 */
4086 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4087
4088 /**
4089 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4090 *
4091 * @returns true = yes, false = no
4092 * @param pDevIns Device instance.
4093 */
4094 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4095
4096 /**
4097 * Gets the VMCPU handle. Restricted API.
4098 *
4099 * @returns VMCPU Handle.
4100 * @param pDevIns The device instance.
4101 */
4102 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4103
4104 /**
4105 * The the VM CPU ID of the current thread (restricted API).
4106 *
4107 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
4108 * @param pDevIns The device instance.
4109 */
4110 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4111
4112 /**
4113 * Get the current virtual clock time in a VM. The clock frequency must be
4114 * queried separately.
4115 *
4116 * @returns Current clock time.
4117 * @param pDevIns The device instance.
4118 */
4119 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4120
4121 /**
4122 * Get the frequency of the virtual clock.
4123 *
4124 * @returns The clock frequency (not variable at run-time).
4125 * @param pDevIns The device instance.
4126 */
4127 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4128
4129 /**
4130 * Get the current virtual clock time in a VM, in nanoseconds.
4131 *
4132 * @returns Current clock time (in ns).
4133 * @param pDevIns The device instance.
4134 */
4135 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4136
4137 /**
4138 * Gets the trace buffer handle.
4139 *
4140 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4141 * really inteded for direct usage, thus no inline wrapper function.
4142 *
4143 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4144 * @param pDevIns The device instance.
4145 */
4146 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4147
4148 /** Just a safety precaution. */
4149 uint32_t u32TheEnd;
4150} PDMDEVHLPR0;
4151/** Pointer PDM Device R0 API. */
4152typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4153/** Pointer PDM Device GC API. */
4154typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4155
4156/** Current PDMDEVHLP version number. */
4157#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 4, 1)
4158
4159
4160
4161/**
4162 * PDM Device Instance.
4163 */
4164typedef struct PDMDEVINS
4165{
4166 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4167 uint32_t u32Version;
4168 /** Device instance number. */
4169 uint32_t iInstance;
4170
4171 /** Pointer the GC PDM Device API. */
4172 PCPDMDEVHLPRC pHlpRC;
4173 /** Pointer to device instance data. */
4174 RTRCPTR pvInstanceDataRC;
4175 /** The critical section for the device, see pCritSectXR3. */
4176 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4177 /** Alignment padding. */
4178 RTRCPTR pAlignmentRC;
4179
4180 /** Pointer the R0 PDM Device API. */
4181 PCPDMDEVHLPR0 pHlpR0;
4182 /** Pointer to device instance data (R0). */
4183 RTR0PTR pvInstanceDataR0;
4184 /** The critical section for the device, see pCritSectXR3. */
4185 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4186
4187 /** Pointer the HC PDM Device API. */
4188 PCPDMDEVHLPR3 pHlpR3;
4189 /** Pointer to device instance data. */
4190 RTR3PTR pvInstanceDataR3;
4191 /** The critical section for the device.
4192 *
4193 * TM and IOM will enter this critical section before calling into the device
4194 * code. PDM will when doing power on, power off, reset, suspend and resume
4195 * notifications. SSM will currently not, but this will be changed later on.
4196 *
4197 * The device gets a critical section automatically assigned to it before
4198 * the constructor is called. If the constructor wishes to use a different
4199 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4200 * very early on.
4201 */
4202 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4203
4204 /** Pointer to device registration structure. */
4205 R3PTRTYPE(PCPDMDEVREG) pReg;
4206 /** Configuration handle. */
4207 R3PTRTYPE(PCFGMNODE) pCfg;
4208
4209 /** The base interface of the device.
4210 *
4211 * The device constructor initializes this if it has any
4212 * device level interfaces to export. To obtain this interface
4213 * call PDMR3QueryDevice(). */
4214 PDMIBASE IBase;
4215
4216 /** Tracing indicator. */
4217 uint32_t fTracing;
4218 /** The tracing ID of this device. */
4219 uint32_t idTracing;
4220#if HC_ARCH_BITS == 32
4221 /** Align the internal data more naturally. */
4222 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4223#endif
4224
4225 /** Internal data. */
4226 union
4227 {
4228#ifdef PDMDEVINSINT_DECLARED
4229 PDMDEVINSINT s;
4230#endif
4231 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4232 } Internal;
4233
4234 /** Device instance data. The size of this area is defined
4235 * in the PDMDEVREG::cbInstanceData field. */
4236 char achInstanceData[8];
4237} PDMDEVINS;
4238
4239/** Current PDMDEVINS version number. */
4240#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4241
4242/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4243#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4244
4245/**
4246 * Checks the structure versions of the device instance and device helpers,
4247 * returning if they are incompatible.
4248 *
4249 * This is for use in the constructor.
4250 *
4251 * @param pDevIns The device instance pointer.
4252 */
4253#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4254 do \
4255 { \
4256 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4257 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4258 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4259 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4260 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4261 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4262 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4263 } while (0)
4264
4265/**
4266 * Quietly checks the structure versions of the device instance and device
4267 * helpers, returning if they are incompatible.
4268 *
4269 * This is for use in the destructor.
4270 *
4271 * @param pDevIns The device instance pointer.
4272 */
4273#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4274 do \
4275 { \
4276 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4277 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4278 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4279 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4280 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4281 } while (0)
4282
4283/**
4284 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4285 * constructor - returns on failure.
4286 *
4287 * This should be invoked after having initialized the instance data
4288 * sufficiently for the correct operation of the destructor. The destructor is
4289 * always called!
4290 *
4291 * @param pDevIns Pointer to the PDM device instance.
4292 * @param pszValidValues Patterns describing the valid value names. See
4293 * RTStrSimplePatternMultiMatch for details on the
4294 * pattern syntax.
4295 * @param pszValidNodes Patterns describing the valid node (key) names.
4296 * Pass empty string if no valid nodes.
4297 */
4298#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4299 do \
4300 { \
4301 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4302 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4303 if (RT_SUCCESS(rcValCfg)) \
4304 { /* likely */ } else return rcValCfg; \
4305 } while (0)
4306
4307/** @def PDMDEV_ASSERT_EMT
4308 * Assert that the current thread is the emulation thread.
4309 */
4310#ifdef VBOX_STRICT
4311# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4312#else
4313# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4314#endif
4315
4316/** @def PDMDEV_ASSERT_OTHER
4317 * Assert that the current thread is NOT the emulation thread.
4318 */
4319#ifdef VBOX_STRICT
4320# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4321#else
4322# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4323#endif
4324
4325/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4326 * Assert that the current thread is owner of the VM lock.
4327 */
4328#ifdef VBOX_STRICT
4329# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4330#else
4331# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4332#endif
4333
4334/** @def PDMDEV_SET_ERROR
4335 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4336 */
4337#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4338 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4339
4340/** @def PDMDEV_SET_RUNTIME_ERROR
4341 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4342 */
4343#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4344 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4345
4346/** @def PDMDEVINS_2_RCPTR
4347 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4348 */
4349#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4350
4351/** @def PDMDEVINS_2_R3PTR
4352 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4353 */
4354#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4355
4356/** @def PDMDEVINS_2_R0PTR
4357 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4358 */
4359#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4360
4361
4362#ifdef IN_RING3
4363
4364/**
4365 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4366 */
4367DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4368 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4369 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4370{
4371 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4372}
4373
4374/**
4375 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4376 */
4377DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4378 const char *pszOut, const char *pszIn, const char *pszOutStr,
4379 const char *pszInStr, const char *pszDesc)
4380{
4381 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4382}
4383
4384/**
4385 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4386 */
4387DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4388 const char *pszOut, const char *pszIn, const char *pszOutStr,
4389 const char *pszInStr, const char *pszDesc)
4390{
4391 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4392}
4393
4394/**
4395 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4396 */
4397DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4398{
4399 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4400}
4401
4402/**
4403 * Register a Memory Mapped I/O (MMIO) region.
4404 *
4405 * These callbacks are of course for the ring-3 context (R3). Register HC
4406 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4407 * must be a R3 handler for every RC and R0 handler!
4408 *
4409 * @returns VBox status.
4410 * @param pDevIns The device instance to register the MMIO with.
4411 * @param GCPhysStart First physical address in the range.
4412 * @param cbRange The size of the range (in bytes).
4413 * @param pvUser User argument.
4414 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4415 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4416 * @param pfnRead Pointer to function which is gonna handle Read operations.
4417 * @param pszDesc Pointer to description string. This must not be freed.
4418 */
4419DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4420 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4421{
4422 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4423 fFlags, pszDesc);
4424}
4425
4426/**
4427 * Register a Memory Mapped I/O (MMIO) region for RC.
4428 *
4429 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4430 * (R3) handlers before guest context handlers! There must be a R3 handler for
4431 * every RC handler!
4432 *
4433 * @returns VBox status.
4434 * @param pDevIns The device instance to register the MMIO with.
4435 * @param GCPhysStart First physical address in the range.
4436 * @param cbRange The size of the range (in bytes).
4437 * @param pvUser User argument.
4438 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4439 * @param pszRead Name of the RC function which is gonna handle Read operations.
4440 */
4441DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4442 const char *pszWrite, const char *pszRead)
4443{
4444 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4445}
4446
4447/**
4448 * Register a Memory Mapped I/O (MMIO) region for R0.
4449 *
4450 * These callbacks are for the ring-0 host context (R0). Register ring-3
4451 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
4452 * every R0 handler!
4453 *
4454 * @returns VBox status.
4455 * @param pDevIns The device instance to register the MMIO with.
4456 * @param GCPhysStart First physical address in the range.
4457 * @param cbRange The size of the range (in bytes).
4458 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
4459 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4460 * @param pszRead Name of the RC function which is gonna handle Read operations.
4461 * @remarks Caller enters the device critical section prior to invoking the
4462 * registered callback methods.
4463 */
4464DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4465 const char *pszWrite, const char *pszRead)
4466{
4467 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4468}
4469
4470/**
4471 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4472 */
4473DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4474 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4475 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4476{
4477 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4478 fFlags, pszDesc);
4479}
4480
4481/**
4482 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4483 */
4484DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4485 const char *pszWrite, const char *pszRead, const char *pszFill)
4486{
4487 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4488}
4489
4490/**
4491 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4492 */
4493DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4494 const char *pszWrite, const char *pszRead, const char *pszFill)
4495{
4496 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4497}
4498
4499/**
4500 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4501 */
4502DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4503{
4504 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4505}
4506
4507/**
4508 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4509 */
4510DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4511{
4512 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4513}
4514
4515/**
4516 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4517 */
4518DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4519{
4520 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4521}
4522
4523/**
4524 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4525 */
4526DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4527{
4528 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4529}
4530
4531/**
4532 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4533 */
4534DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4535{
4536 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4537}
4538
4539/**
4540 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4541 */
4542DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4543 const char *pszDesc, PRTRCPTR pRCPtr)
4544{
4545 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4546}
4547
4548/**
4549 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4550 */
4551DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4552 const char *pszDesc, PRTR0PTR pR0Ptr)
4553{
4554 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4555}
4556
4557/**
4558 * @copydoc PDMDEVHLPR3::pfnROMRegister
4559 */
4560DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4561 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4562{
4563 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4564}
4565
4566/**
4567 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4568 */
4569DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4570{
4571 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4572}
4573
4574/**
4575 * Register a save state data unit.
4576 *
4577 * @returns VBox status.
4578 * @param pDevIns The device instance.
4579 * @param uVersion Data layout version number.
4580 * @param cbGuess The approximate amount of data in the unit.
4581 * Only for progress indicators.
4582 * @param pfnSaveExec Execute save callback, optional.
4583 * @param pfnLoadExec Execute load callback, optional.
4584 */
4585DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4586 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4587{
4588 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4589 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4590 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4591 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4592}
4593
4594/**
4595 * Register a save state data unit with a live save callback as well.
4596 *
4597 * @returns VBox status.
4598 * @param pDevIns The device instance.
4599 * @param uVersion Data layout version number.
4600 * @param cbGuess The approximate amount of data in the unit.
4601 * Only for progress indicators.
4602 * @param pfnLiveExec Execute live callback, optional.
4603 * @param pfnSaveExec Execute save callback, optional.
4604 * @param pfnLoadExec Execute load callback, optional.
4605 */
4606DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4607 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4608{
4609 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4610 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4611 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4612 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4613}
4614
4615/**
4616 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4617 */
4618DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4619 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4620 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4621 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4622{
4623 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4624 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4625 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4626 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4627}
4628
4629/**
4630 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4631 */
4632DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4633 const char *pszDesc, PPTMTIMERR3 ppTimer)
4634{
4635 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4636}
4637
4638/**
4639 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4640 */
4641DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4642{
4643 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4644}
4645
4646#endif /* IN_RING3 */
4647
4648/**
4649 * @copydoc PDMDEVHLPR3::pfnPhysRead
4650 */
4651DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4652{
4653 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4654}
4655
4656/**
4657 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4658 */
4659DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4660{
4661 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4662}
4663
4664#ifdef IN_RING3
4665
4666/**
4667 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4668 */
4669DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4670{
4671 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4672}
4673
4674/**
4675 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4676 */
4677DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv,
4678 PPGMPAGEMAPLOCK pLock)
4679{
4680 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4681}
4682
4683/**
4684 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4685 */
4686DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4687{
4688 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4689}
4690
4691/**
4692 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4693 */
4694DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4695{
4696 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4697}
4698
4699/**
4700 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4701 */
4702DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4703{
4704 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4705}
4706
4707/**
4708 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4709 */
4710DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4711{
4712 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4713}
4714
4715/**
4716 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4717 */
4718DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4719{
4720 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4721}
4722
4723/**
4724 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4725 */
4726DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4727{
4728 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4729}
4730
4731/**
4732 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4733 */
4734DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4735{
4736 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4737}
4738#endif /* IN_RING3 */
4739
4740/**
4741 * @copydoc PDMDEVHLPR3::pfnVMState
4742 */
4743DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4744{
4745 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4746}
4747
4748#ifdef IN_RING3
4749/**
4750 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4751 */
4752DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4753{
4754 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4755}
4756#endif /* IN_RING3 */
4757
4758/**
4759 * @copydoc PDMDEVHLPR3::pfnVMSetError
4760 */
4761DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL,
4762 const char *pszFormat, ...)
4763{
4764 va_list va;
4765 va_start(va, pszFormat);
4766 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4767 va_end(va);
4768 return rc;
4769}
4770
4771/**
4772 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4773 */
4774DECLINLINE(int) RT_IPRT_FORMAT_ATTR(4, 5) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4775 const char *pszFormat, ...)
4776{
4777 va_list va;
4778 int rc;
4779 va_start(va, pszFormat);
4780 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4781 va_end(va);
4782 return rc;
4783}
4784
4785/**
4786 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4787 *
4788 * @returns VBox status code which must be passed up to the VMM. This will be
4789 * VINF_SUCCESS in non-strict builds.
4790 * @param pDevIns The device instance.
4791 * @param SRC_POS Use RT_SRC_POS.
4792 * @param pszFormat Message. (optional)
4793 * @param ... Message parameters.
4794 */
4795DECLINLINE(int) RT_IPRT_FORMAT_ATTR(5, 6) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4796{
4797#ifdef VBOX_STRICT
4798# ifdef IN_RING3
4799 int rc;
4800 va_list args;
4801 va_start(args, pszFormat);
4802 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4803 va_end(args);
4804 return rc;
4805# else
4806 NOREF(pDevIns);
4807 NOREF(pszFile);
4808 NOREF(iLine);
4809 NOREF(pszFunction);
4810 NOREF(pszFormat);
4811 return VINF_EM_DBG_STOP;
4812# endif
4813#else
4814 NOREF(pDevIns);
4815 NOREF(pszFile);
4816 NOREF(iLine);
4817 NOREF(pszFunction);
4818 NOREF(pszFormat);
4819 return VINF_SUCCESS;
4820#endif
4821}
4822
4823#ifdef IN_RING3
4824
4825/**
4826 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4827 */
4828DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4829{
4830 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4831}
4832
4833/**
4834 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4835 */
4836DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4837{
4838 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4839}
4840
4841/**
4842 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4843 */
4844DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4845{
4846 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4847}
4848
4849/**
4850 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4851 */
4852DECLINLINE(void) RT_IPRT_FORMAT_ATTR(7, 8) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
4853 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4854 const char *pszDesc, const char *pszName, ...)
4855{
4856 va_list va;
4857 va_start(va, pszName);
4858 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4859 va_end(va);
4860}
4861
4862/**
4863 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4864 */
4865DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4866{
4867 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4868}
4869
4870/**
4871 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4872 */
4873DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
4874 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4875{
4876 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4877}
4878
4879/**
4880 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4881 */
4882DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4883{
4884 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4885}
4886
4887/**
4888 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4889 */
4890DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4891 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4892{
4893 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4894}
4895
4896#endif /* IN_RING3 */
4897
4898/**
4899 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4900 */
4901DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4902{
4903 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4904}
4905
4906/**
4907 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4908 */
4909DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4910{
4911 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4912}
4913
4914/**
4915 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4916 */
4917DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4918{
4919 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4920}
4921
4922/**
4923 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4924 */
4925DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4926{
4927 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4928}
4929
4930/**
4931 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4932 */
4933DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4934{
4935 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4936}
4937
4938/**
4939 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4940 */
4941DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4942{
4943 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4944}
4945
4946#ifdef IN_RING3
4947
4948/**
4949 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4950 */
4951DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4952{
4953 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4954}
4955
4956/**
4957 * @copydoc PDMDEVHLPR3::pfnDriverDetach
4958 */
4959DECLINLINE(int) PDMDevHlpDriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
4960{
4961 return pDevIns->pHlpR3->pfnDriverDetach(pDevIns, pDrvIns, fFlags);
4962}
4963
4964/**
4965 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4966 */
4967DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4968 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4969{
4970 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4971}
4972
4973/**
4974 * Initializes a PDM critical section.
4975 *
4976 * The PDM critical sections are derived from the IPRT critical sections, but
4977 * works in RC and R0 as well.
4978 *
4979 * @returns VBox status code.
4980 * @param pDevIns The device instance.
4981 * @param pCritSect Pointer to the critical section.
4982 * @param SRC_POS Use RT_SRC_POS.
4983 * @param pszNameFmt Format string for naming the critical section.
4984 * For statistics and lock validation.
4985 * @param ... Arguments for the format string.
4986 */
4987DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
4988 const char *pszNameFmt, ...)
4989{
4990 int rc;
4991 va_list va;
4992 va_start(va, pszNameFmt);
4993 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4994 va_end(va);
4995 return rc;
4996}
4997
4998/**
4999 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
5000 */
5001DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
5002{
5003 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
5004}
5005
5006/**
5007 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
5008 */
5009DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
5010{
5011 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
5012}
5013
5014/**
5015 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
5016 */
5017DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
5018{
5019 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
5020}
5021
5022/**
5023 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
5024 */
5025DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
5026{
5027 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
5028}
5029
5030/**
5031 * @copydoc PDMDEVHLPR3::pfnThreadCreate
5032 */
5033DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
5034 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
5035{
5036 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
5037}
5038
5039/**
5040 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
5041 */
5042DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
5043{
5044 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
5045}
5046
5047/**
5048 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
5049 */
5050DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
5051{
5052 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
5053}
5054
5055/**
5056 * @copydoc PDMDEVHLPR3::pfnA20Set
5057 */
5058DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
5059{
5060 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5061}
5062
5063/**
5064 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5065 */
5066DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5067{
5068 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5069}
5070
5071/**
5072 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5073 */
5074DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
5075{
5076 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
5077}
5078
5079/**
5080 * @copydoc PDMDEVHLPR3::pfnPICRegister
5081 */
5082DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5083{
5084 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5085}
5086
5087/**
5088 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5089 */
5090DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
5091{
5092 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
5093}
5094
5095/**
5096 * @copydoc PDMDEVHLPR3::pfnIOAPICRegister
5097 */
5098DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5099{
5100 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5101}
5102
5103/**
5104 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5105 */
5106DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5107{
5108 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5109}
5110
5111/**
5112 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5113 */
5114DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5115{
5116 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5117}
5118
5119/**
5120 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5121 */
5122DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5123{
5124 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5125}
5126
5127/**
5128 * @copydoc PDMDEVHLPR3::pfnDMARegister
5129 */
5130DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5131{
5132 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5133}
5134
5135/**
5136 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5137 */
5138DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5139{
5140 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5141}
5142
5143/**
5144 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5145 */
5146DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5147{
5148 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5149}
5150
5151/**
5152 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5153 */
5154DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5155{
5156 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5157}
5158
5159/**
5160 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5161 */
5162DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5163{
5164 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5165}
5166
5167/**
5168 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5169 */
5170DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5171{
5172 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5173}
5174
5175/**
5176 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5177 */
5178DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5179{
5180 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5181}
5182
5183/**
5184 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5185 */
5186DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5187{
5188 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5189}
5190
5191/**
5192 * @copydoc PDMDEVHLPR3::pfnCallR0
5193 */
5194DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5195{
5196 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5197}
5198
5199/**
5200 * @copydoc PDMDEVHLPR3::pfnVMGetSuspendReason
5201 */
5202DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5203{
5204 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5205}
5206
5207/**
5208 * @copydoc PDMDEVHLPR3::pfnVMGetResumeReason
5209 */
5210DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5211{
5212 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5213}
5214
5215/**
5216 * @copydoc PDMDEVHLPR3::pfnGetUVM
5217 */
5218DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5219{
5220 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5221}
5222
5223#endif /* IN_RING3 */
5224
5225/**
5226 * @copydoc PDMDEVHLPR3::pfnGetVM
5227 */
5228DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5229{
5230 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5231}
5232
5233/**
5234 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5235 */
5236DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5237{
5238 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5239}
5240
5241/**
5242 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5243 */
5244DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5245{
5246 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5247}
5248
5249/**
5250 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5251 */
5252DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5253{
5254 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5255}
5256
5257/**
5258 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5259 */
5260DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5261{
5262 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5263}
5264
5265/**
5266 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5267 */
5268DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5269{
5270 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5271}
5272
5273#ifdef IN_RING3
5274
5275/**
5276 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5277 */
5278DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5279{
5280 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5281}
5282
5283/**
5284 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5285 */
5286DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5287{
5288 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5289}
5290
5291/**
5292 * @copydoc PDMDEVHLPR3::pfnVMReset
5293 */
5294DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5295{
5296 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5297}
5298
5299/**
5300 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5301 */
5302DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5303{
5304 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5305}
5306
5307/**
5308 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5309 */
5310DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5311{
5312 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5313}
5314
5315/**
5316 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5317 */
5318DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5319{
5320 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5321}
5322
5323#endif /* IN_RING3 */
5324
5325/**
5326 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5327 */
5328DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5329{
5330 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5331}
5332
5333#ifdef IN_RING3
5334
5335/**
5336 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5337 */
5338DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5339{
5340 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5341}
5342
5343/**
5344 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5345 */
5346DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5347{
5348 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5349}
5350
5351#endif /* IN_RING3 */
5352#ifdef IN_RING0
5353
5354/**
5355 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5356 */
5357DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5358{
5359 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5360}
5361
5362#endif /* IN_RING0 */
5363
5364
5365
5366
5367/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5368typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5369
5370/**
5371 * Callbacks for VBoxDeviceRegister().
5372 */
5373typedef struct PDMDEVREGCB
5374{
5375 /** Interface version.
5376 * This is set to PDM_DEVREG_CB_VERSION. */
5377 uint32_t u32Version;
5378
5379 /**
5380 * Registers a device with the current VM instance.
5381 *
5382 * @returns VBox status code.
5383 * @param pCallbacks Pointer to the callback table.
5384 * @param pReg Pointer to the device registration record.
5385 * This data must be permanent and readonly.
5386 */
5387 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5388} PDMDEVREGCB;
5389
5390/** Current version of the PDMDEVREGCB structure. */
5391#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5392
5393
5394/**
5395 * The VBoxDevicesRegister callback function.
5396 *
5397 * PDM will invoke this function after loading a device module and letting
5398 * the module decide which devices to register and how to handle conflicts.
5399 *
5400 * @returns VBox status code.
5401 * @param pCallbacks Pointer to the callback table.
5402 * @param u32Version VBox version number.
5403 */
5404typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5405
5406/** @} */
5407
5408RT_C_DECLS_END
5409
5410#endif
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