VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 38847

Last change on this file since 38847 was 38847, checked in by vboxsync, 13 years ago

PDM: Enter the device critical section for PDM callback.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2011 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44
45RT_C_DECLS_BEGIN
46
47/** @defgroup grp_pdm_device The PDM Devices API
48 * @ingroup grp_pdm
49 * @{
50 */
51
52/**
53 * Construct a device instance for a VM.
54 *
55 * @returns VBox status.
56 * @param pDevIns The device instance data. If the registration structure
57 * is needed, it can be accessed thru pDevIns->pReg.
58 * @param iInstance Instance number. Use this to figure out which registers
59 * and such to use. The instance number is also found in
60 * pDevIns->iInstance, but since it's likely to be
61 * frequently used PDM passes it as parameter.
62 * @param pCfg Configuration node handle for the driver. This is
63 * expected to be in high demand in the constructor and is
64 * therefore passed as an argument. When using it at other
65 * times, it can be found in pDrvIns->pCfg.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 *
80 * @remarks The device critical section is not entered. The routine may delete
81 * the critical section, so the caller cannot exit it.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remarks A relocation CANNOT fail.
102 *
103 * @remarks The device critical section is not entered. The relocations should
104 * not normally require any locking.
105 */
106typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
107/** Pointer to a FNPDMDEVRELOCATE() function. */
108typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
109
110/**
111 * Device I/O Control interface.
112 *
113 * This is used by external components, such as the COM interface, to
114 * communicate with devices using a class wide interface or a device
115 * specific interface.
116 *
117 * @returns VBox status code.
118 * @param pDevIns Pointer to the device instance.
119 * @param uFunction Function to perform.
120 * @param pvIn Pointer to input data.
121 * @param cbIn Size of input data.
122 * @param pvOut Pointer to output data.
123 * @param cbOut Size of output data.
124 * @param pcbOut Where to store the actual size of the output data.
125 *
126 * @remarks Not used.
127 */
128typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
129 void *pvIn, RTUINT cbIn,
130 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
131/** Pointer to a FNPDMDEVIOCTL() function. */
132typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
133
134/**
135 * Power On notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 *
140 * @remarks Caller enters the device critical section.
141 */
142typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
143/** Pointer to a FNPDMDEVPOWERON() function. */
144typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
145
146/**
147 * Reset notification.
148 *
149 * @returns VBox status.
150 * @param pDevIns The device instance data.
151 *
152 * @remarks Caller enters the device critical section.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVRESET() function. */
156typedef FNPDMDEVRESET *PFNPDMDEVRESET;
157
158/**
159 * Suspend notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 * @thread EMT(0)
164 *
165 * @remarks Caller enters the device critical section.
166 */
167typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
168/** Pointer to a FNPDMDEVSUSPEND() function. */
169typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
170
171/**
172 * Resume notification.
173 *
174 * @returns VBox status.
175 * @param pDevIns The device instance data.
176 *
177 * @remarks Caller enters the device critical section.
178 */
179typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
180/** Pointer to a FNPDMDEVRESUME() function. */
181typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
182
183/**
184 * Power Off notification.
185 *
186 * This is only called when the VMR3PowerOff call is made on a running VM. This
187 * means that there is no notification if the VM was suspended before being
188 * powered of. There will also be no callback when hot plugging devices.
189 *
190 * @param pDevIns The device instance data.
191 * @thread EMT(0)
192 *
193 * @remarks Caller enters the device critical section.
194 */
195typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
196/** Pointer to a FNPDMDEVPOWEROFF() function. */
197typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
198
199/**
200 * Attach command.
201 *
202 * This is called to let the device attach to a driver for a specified LUN
203 * at runtime. This is not called during VM construction, the device
204 * constructor have to attach to all the available drivers.
205 *
206 * This is like plugging in the keyboard or mouse after turning on the PC.
207 *
208 * @returns VBox status code.
209 * @param pDevIns The device instance.
210 * @param iLUN The logical unit which is being detached.
211 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
212 *
213 * @remarks Caller enters the device critical section.
214 */
215typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
216/** Pointer to a FNPDMDEVATTACH() function. */
217typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
218
219/**
220 * Detach notification.
221 *
222 * This is called when a driver is detaching itself from a LUN of the device.
223 * The device should adjust it's state to reflect this.
224 *
225 * This is like unplugging the network cable to use it for the laptop or
226 * something while the PC is still running.
227 *
228 * @param pDevIns The device instance.
229 * @param iLUN The logical unit which is being detached.
230 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
231 *
232 * @remarks Caller enters the device critical section.
233 */
234typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
235/** Pointer to a FNPDMDEVDETACH() function. */
236typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
237
238/**
239 * Query the base interface of a logical unit.
240 *
241 * @returns VBOX status code.
242 * @param pDevIns The device instance.
243 * @param iLUN The logicial unit to query.
244 * @param ppBase Where to store the pointer to the base interface of the LUN.
245 *
246 * @remarks The device critical section is not entered.
247 */
248typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
249/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
250typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
251
252/**
253 * Init complete notification.
254 * This can be done to do communication with other devices and other
255 * initialization which requires everything to be in place.
256 *
257 * @returns VBOX status code.
258 * @param pDevIns The device instance.
259 *
260 * @remarks Caller enters the device critical section.
261 */
262typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
263/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
264typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
265
266
267
268/**
269 * PDM Device Registration Structure.
270 *
271 * This structure is used when registering a device from VBoxInitDevices() in HC
272 * Ring-3. PDM will continue use till the VM is terminated.
273 */
274typedef struct PDMDEVREG
275{
276 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
277 uint32_t u32Version;
278 /** Device name. */
279 char szName[32];
280 /** Name of the raw-mode context module (no path).
281 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
282 char szRCMod[32];
283 /** Name of the ring-0 module (no path).
284 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
285 char szR0Mod[32];
286 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
287 * remain unchanged from registration till VM destruction. */
288 const char *pszDescription;
289
290 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
291 uint32_t fFlags;
292 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
293 uint32_t fClass;
294 /** Maximum number of instances (per VM). */
295 uint32_t cMaxInstances;
296 /** Size of the instance data. */
297 uint32_t cbInstance;
298
299 /** Construct instance - required. */
300 PFNPDMDEVCONSTRUCT pfnConstruct;
301 /** Destruct instance - optional.
302 * Critical section NOT entered (will be destroyed). */
303 PFNPDMDEVDESTRUCT pfnDestruct;
304 /** Relocation command - optional.
305 * Critical section NOT entered. */
306 PFNPDMDEVRELOCATE pfnRelocate;
307 /** I/O Control interface - optional.
308 * Not used. */
309 PFNPDMDEVIOCTL pfnIOCtl;
310 /** Power on notification - optional.
311 * Critical section is entered. */
312 PFNPDMDEVPOWERON pfnPowerOn;
313 /** Reset notification - optional.
314 * Critical section is entered. */
315 PFNPDMDEVRESET pfnReset;
316 /** Suspend notification - optional.
317 * Critical section is entered. */
318 PFNPDMDEVSUSPEND pfnSuspend;
319 /** Resume notification - optional.
320 * Critical section is entered. */
321 PFNPDMDEVRESUME pfnResume;
322 /** Attach command - optional.
323 * Critical section is entered. */
324 PFNPDMDEVATTACH pfnAttach;
325 /** Detach notification - optional.
326 * Critical section is entered. */
327 PFNPDMDEVDETACH pfnDetach;
328 /** Query a LUN base interface - optional.
329 * Critical section is NOT entered. */
330 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
331 /** Init complete notification - optional.
332 * Critical section is entered. */
333 PFNPDMDEVINITCOMPLETE pfnInitComplete;
334 /** Power off notification - optional.
335 * Critical section is entered. */
336 PFNPDMDEVPOWEROFF pfnPowerOff;
337 /** @todo */
338 PFNRT pfnSoftReset;
339 /** Initialization safty marker. */
340 uint32_t u32VersionEnd;
341} PDMDEVREG;
342/** Pointer to a PDM Device Structure. */
343typedef PDMDEVREG *PPDMDEVREG;
344/** Const pointer to a PDM Device Structure. */
345typedef PDMDEVREG const *PCPDMDEVREG;
346
347/** Current DEVREG version number. */
348#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
349
350/** PDM Device Flags.
351 * @{ */
352/** This flag is used to indicate that the device has a RC component. */
353#define PDM_DEVREG_FLAGS_RC 0x00000001
354/** This flag is used to indicate that the device has a R0 component. */
355#define PDM_DEVREG_FLAGS_R0 0x00000002
356
357/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
358 * The bit count for the current host. */
359#if HC_ARCH_BITS == 32
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
361#elif HC_ARCH_BITS == 64
362# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
363#else
364# error Unsupported HC_ARCH_BITS value.
365#endif
366/** The host bit count mask. */
367#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
368
369/** The device support only 32-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
371/** The device support only 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
373/** The device support both 32-bit & 64-bit guests. */
374#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
375/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
376 * The guest bit count for the current compilation. */
377#if GC_ARCH_BITS == 32
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
379#elif GC_ARCH_BITS == 64
380# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
381#else
382# error Unsupported GC_ARCH_BITS value.
383#endif
384/** The guest bit count mask. */
385#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
386
387/** A convenience. */
388#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
389
390/** Indicates that the devices support PAE36 on a 32-bit guest. */
391#define PDM_DEVREG_FLAGS_PAE36 0x00001000
392
393/** Indicates that the device needs to be notified before the drivers when suspending. */
394#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
395
396/** Indicates that the device needs to be notified before the drivers when powering off. */
397#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
398/** @} */
399
400
401/** PDM Device Classes.
402 * The order is important, lower bit earlier instantiation.
403 * @{ */
404/** Architecture device. */
405#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
406/** Architecture BIOS device. */
407#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
408/** PCI bus brigde. */
409#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
410/** ISA bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
412/** Input device (mouse, keyboard, joystick, HID, ...). */
413#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
414/** Interrupt controller (PIC). */
415#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
416/** Interval controoler (PIT). */
417#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
418/** RTC/CMOS. */
419#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
420/** DMA controller. */
421#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
422/** VMM Device. */
423#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
424/** Graphics device, like VGA. */
425#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
426/** Storage controller device. */
427#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
428/** Network interface controller. */
429#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
430/** Audio. */
431#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
432/** USB HIC. */
433#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
434/** ACPI. */
435#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
436/** Serial controller device. */
437#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
438/** Parallel controller device */
439#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
440/** Host PCI pass-through device */
441#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
442/** Misc devices (always last). */
443#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
444/** @} */
445
446
447/** @name IRQ Level for use with the *SetIrq APIs.
448 * @{
449 */
450/** Assert the IRQ (can assume value 1). */
451#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
452/** Deassert the IRQ (can assume value 0). */
453#define PDM_IRQ_LEVEL_LOW 0
454/** flip-flop - deassert and then assert the IRQ again immediately. */
455#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
456/** @} */
457
458/**
459 * Registration record for MSI.
460 */
461typedef struct PDMMSIREG
462{
463 /** Number of MSI interrupt vectors, 0 if MSI not supported */
464 uint16_t cMsiVectors;
465 /** Offset of MSI capability */
466 uint8_t iMsiCapOffset;
467 /** Offset of next capability to MSI */
468 uint8_t iMsiNextOffset;
469 /** If we support 64-bit MSI addressing */
470 bool fMsi64bit;
471
472 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
473 uint16_t cMsixVectors;
474 /** Offset of MSI-X capability */
475 uint8_t iMsixCapOffset;
476 /** Offset of next capability to MSI-X */
477 uint8_t iMsixNextOffset;
478 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
479 uint8_t iMsixBar;
480} PDMMSIREG;
481typedef PDMMSIREG *PPDMMSIREG;
482
483/**
484 * PCI Bus registration structure.
485 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
486 */
487typedef struct PDMPCIBUSREG
488{
489 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
490 uint32_t u32Version;
491
492 /**
493 * Registers the device with the default PCI bus.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev The PCI device structure.
498 * Any PCI enabled device must keep this in it's instance data!
499 * Fill in the PCI data config before registration, please.
500 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
501 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
502 * If negative, the pci bus device will assign one.
503 */
504 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
505
506 /**
507 * Initialize MSI support in a PCI device.
508 *
509 * @returns VBox status code.
510 * @param pDevIns Device instance of the PCI Bus.
511 * @param pPciDev The PCI device structure.
512 * @param pMsiReg MSI registration structure
513 */
514 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
515
516 /**
517 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
518 *
519 * @returns VBox status code.
520 * @param pDevIns Device instance of the PCI Bus.
521 * @param pPciDev The PCI device structure.
522 * @param iRegion The region number.
523 * @param cbRegion Size of the region.
524 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
525 * @param pfnCallback Callback for doing the mapping.
526 */
527 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
528
529 /**
530 * Register PCI configuration space read/write callbacks.
531 *
532 * @param pDevIns Device instance of the PCI Bus.
533 * @param pPciDev The PCI device structure.
534 * @param pfnRead Pointer to the user defined PCI config read function.
535 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
536 * PCI config read function. This way, user can decide when (and if)
537 * to call default PCI config read function. Can be NULL.
538 * @param pfnWrite Pointer to the user defined PCI config write function.
539 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
540 * PCI config write function. This way, user can decide when (and if)
541 * to call default PCI config write function. Can be NULL.
542 * @thread EMT
543 */
544 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
545 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
546
547 /**
548 * Set the IRQ for a PCI device.
549 *
550 * @param pDevIns Device instance of the PCI Bus.
551 * @param pPciDev The PCI device structure.
552 * @param iIrq IRQ number to set.
553 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
554 */
555 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
556
557 /**
558 * Saves a state of the PCI device.
559 *
560 * @returns VBox status code.
561 * @param pDevIns Device instance of the PCI Bus.
562 * @param pPciDev Pointer to PCI device.
563 * @param pSSMHandle The handle to save the state to.
564 */
565 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
566
567 /**
568 * Loads a saved PCI device state.
569 *
570 * @returns VBox status code.
571 * @param pDevIns Device instance of the PCI Bus.
572 * @param pPciDev Pointer to PCI device.
573 * @param pSSMHandle The handle to the saved state.
574 */
575 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
576
577 /**
578 * Called to perform the job of the bios.
579 * This is only called for the first PCI Bus - it is expected to
580 * service all the PCI buses.
581 *
582 * @returns VBox status.
583 * @param pDevIns Device instance of the first bus.
584 */
585 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
586
587 /** The name of the SetIrq RC entry point. */
588 const char *pszSetIrqRC;
589
590 /** The name of the SetIrq R0 entry point. */
591 const char *pszSetIrqR0;
592
593} PDMPCIBUSREG;
594/** Pointer to a PCI bus registration structure. */
595typedef PDMPCIBUSREG *PPDMPCIBUSREG;
596
597/** Current PDMPCIBUSREG version number. */
598#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)
599
600/**
601 * PCI Bus RC helpers.
602 */
603typedef struct PDMPCIHLPRC
604{
605 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
606 uint32_t u32Version;
607
608 /**
609 * Set an ISA IRQ.
610 *
611 * @param pDevIns PCI device instance.
612 * @param iIrq IRQ number to set.
613 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
614 * @thread EMT only.
615 */
616 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
617
618 /**
619 * Set an I/O-APIC IRQ.
620 *
621 * @param pDevIns PCI device instance.
622 * @param iIrq IRQ number to set.
623 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
624 * @thread EMT only.
625 */
626 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
627
628 /**
629 * Send an MSI.
630 *
631 * @param pDevIns PCI device instance.
632 * @param GCAddr Physical address MSI request was written.
633 * @param uValue Value written.
634 * @thread EMT only.
635 */
636 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
637
638
639 /**
640 * Acquires the PDM lock.
641 *
642 * @returns VINF_SUCCESS on success.
643 * @returns rc if we failed to acquire the lock.
644 * @param pDevIns The PCI device instance.
645 * @param rc What to return if we fail to acquire the lock.
646 */
647 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
648
649 /**
650 * Releases the PDM lock.
651 *
652 * @param pDevIns The PCI device instance.
653 */
654 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
655
656 /** Just a safety precaution. */
657 uint32_t u32TheEnd;
658} PDMPCIHLPRC;
659/** Pointer to PCI helpers. */
660typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
661/** Pointer to const PCI helpers. */
662typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
663
664/** Current PDMPCIHLPRC version number. */
665#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 2, 0)
666
667
668/**
669 * PCI Bus R0 helpers.
670 */
671typedef struct PDMPCIHLPR0
672{
673 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
674 uint32_t u32Version;
675
676 /**
677 * Set an ISA IRQ.
678 *
679 * @param pDevIns PCI device instance.
680 * @param iIrq IRQ number to set.
681 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
682 * @thread EMT only.
683 */
684 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
685
686 /**
687 * Set an I/O-APIC IRQ.
688 *
689 * @param pDevIns PCI device instance.
690 * @param iIrq IRQ number to set.
691 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
692 * @thread EMT only.
693 */
694 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
695
696 /**
697 * Send an MSI.
698 *
699 * @param pDevIns PCI device instance.
700 * @param GCAddr Physical address MSI request was written.
701 * @param uValue Value written.
702 * @thread EMT only.
703 */
704 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
705
706
707 /**
708 * Acquires the PDM lock.
709 *
710 * @returns VINF_SUCCESS on success.
711 * @returns rc if we failed to acquire the lock.
712 * @param pDevIns The PCI device instance.
713 * @param rc What to return if we fail to acquire the lock.
714 */
715 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
716
717 /**
718 * Releases the PDM lock.
719 *
720 * @param pDevIns The PCI device instance.
721 */
722 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
723
724 /** Just a safety precaution. */
725 uint32_t u32TheEnd;
726} PDMPCIHLPR0;
727/** Pointer to PCI helpers. */
728typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
729/** Pointer to const PCI helpers. */
730typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
731
732/** Current PDMPCIHLPR0 version number. */
733#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 2, 0)
734
735/**
736 * PCI device helpers.
737 */
738typedef struct PDMPCIHLPR3
739{
740 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
741 uint32_t u32Version;
742
743 /**
744 * Set an ISA IRQ.
745 *
746 * @param pDevIns The PCI device instance.
747 * @param iIrq IRQ number to set.
748 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
749 * @thread EMT only.
750 */
751 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
752
753 /**
754 * Set an I/O-APIC IRQ.
755 *
756 * @param pDevIns The PCI device instance.
757 * @param iIrq IRQ number to set.
758 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
759 * @thread EMT only.
760 */
761 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
762
763 /**
764 * Send an MSI.
765 *
766 * @param pDevIns PCI device instance.
767 * @param GCAddr Physical address MSI request was written.
768 * @param uValue Value written.
769 * @thread EMT only.
770 */
771 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
772
773 /**
774 * Checks if the given address is an MMIO2 base address or not.
775 *
776 * @returns true/false accordingly.
777 * @param pDevIns The PCI device instance.
778 * @param pOwner The owner of the memory, optional.
779 * @param GCPhys The address to check.
780 */
781 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
782
783 /**
784 * Gets the address of the RC PCI Bus helpers.
785 *
786 * This should be called at both construction and relocation time
787 * to obtain the correct address of the RC helpers.
788 *
789 * @returns RC pointer to the PCI Bus helpers.
790 * @param pDevIns Device instance of the PCI Bus.
791 * @thread EMT only.
792 */
793 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
794
795 /**
796 * Gets the address of the R0 PCI Bus helpers.
797 *
798 * This should be called at both construction and relocation time
799 * to obtain the correct address of the R0 helpers.
800 *
801 * @returns R0 pointer to the PCI Bus helpers.
802 * @param pDevIns Device instance of the PCI Bus.
803 * @thread EMT only.
804 */
805 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
806
807 /**
808 * Acquires the PDM lock.
809 *
810 * @returns VINF_SUCCESS on success.
811 * @returns Fatal error on failure.
812 * @param pDevIns The PCI device instance.
813 * @param rc Dummy for making the interface identical to the RC and R0 versions.
814 */
815 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
816
817 /**
818 * Releases the PDM lock.
819 *
820 * @param pDevIns The PCI device instance.
821 */
822 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
823
824 /** Just a safety precaution. */
825 uint32_t u32TheEnd;
826} PDMPCIHLPR3;
827/** Pointer to PCI helpers. */
828typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
829/** Pointer to const PCI helpers. */
830typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
831
832/** Current PDMPCIHLPR3 version number. */
833#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 2, 0)
834
835
836/**
837 * Programmable Interrupt Controller registration structure.
838 */
839typedef struct PDMPICREG
840{
841 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
842 uint32_t u32Version;
843
844 /**
845 * Set the an IRQ.
846 *
847 * @param pDevIns Device instance of the PIC.
848 * @param iIrq IRQ number to set.
849 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
850 */
851 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
852
853 /**
854 * Get a pending interrupt.
855 *
856 * @returns Pending interrupt number.
857 * @param pDevIns Device instance of the PIC.
858 */
859 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
860
861 /** The name of the RC SetIrq entry point. */
862 const char *pszSetIrqRC;
863 /** The name of the RC GetInterrupt entry point. */
864 const char *pszGetInterruptRC;
865
866 /** The name of the R0 SetIrq entry point. */
867 const char *pszSetIrqR0;
868 /** The name of the R0 GetInterrupt entry point. */
869 const char *pszGetInterruptR0;
870} PDMPICREG;
871/** Pointer to a PIC registration structure. */
872typedef PDMPICREG *PPDMPICREG;
873
874/** Current PDMPICREG version number. */
875#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
876
877/**
878 * PIC RC helpers.
879 */
880typedef struct PDMPICHLPRC
881{
882 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
883 uint32_t u32Version;
884
885 /**
886 * Set the interrupt force action flag.
887 *
888 * @param pDevIns Device instance of the PIC.
889 */
890 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
891
892 /**
893 * Clear the interrupt force action flag.
894 *
895 * @param pDevIns Device instance of the PIC.
896 */
897 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
898
899 /**
900 * Acquires the PDM lock.
901 *
902 * @returns VINF_SUCCESS on success.
903 * @returns rc if we failed to acquire the lock.
904 * @param pDevIns The PIC device instance.
905 * @param rc What to return if we fail to acquire the lock.
906 */
907 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
908
909 /**
910 * Releases the PDM lock.
911 *
912 * @param pDevIns The PIC device instance.
913 */
914 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
915
916 /** Just a safety precaution. */
917 uint32_t u32TheEnd;
918} PDMPICHLPRC;
919
920/** Pointer to PIC RC helpers. */
921typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
922/** Pointer to const PIC RC helpers. */
923typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
924
925/** Current PDMPICHLPRC version number. */
926#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
927
928
929/**
930 * PIC R0 helpers.
931 */
932typedef struct PDMPICHLPR0
933{
934 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
935 uint32_t u32Version;
936
937 /**
938 * Set the interrupt force action flag.
939 *
940 * @param pDevIns Device instance of the PIC.
941 */
942 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
943
944 /**
945 * Clear the interrupt force action flag.
946 *
947 * @param pDevIns Device instance of the PIC.
948 */
949 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
950
951 /**
952 * Acquires the PDM lock.
953 *
954 * @returns VINF_SUCCESS on success.
955 * @returns rc if we failed to acquire the lock.
956 * @param pDevIns The PIC device instance.
957 * @param rc What to return if we fail to acquire the lock.
958 */
959 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
960
961 /**
962 * Releases the PDM lock.
963 *
964 * @param pDevIns The PCI device instance.
965 */
966 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
967
968 /** Just a safety precaution. */
969 uint32_t u32TheEnd;
970} PDMPICHLPR0;
971
972/** Pointer to PIC R0 helpers. */
973typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
974/** Pointer to const PIC R0 helpers. */
975typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
976
977/** Current PDMPICHLPR0 version number. */
978#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
979
980/**
981 * PIC R3 helpers.
982 */
983typedef struct PDMPICHLPR3
984{
985 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
986 uint32_t u32Version;
987
988 /**
989 * Set the interrupt force action flag.
990 *
991 * @param pDevIns Device instance of the PIC.
992 */
993 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
994
995 /**
996 * Clear the interrupt force action flag.
997 *
998 * @param pDevIns Device instance of the PIC.
999 */
1000 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1001
1002 /**
1003 * Acquires the PDM lock.
1004 *
1005 * @returns VINF_SUCCESS on success.
1006 * @returns Fatal error on failure.
1007 * @param pDevIns The PIC device instance.
1008 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1009 */
1010 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1011
1012 /**
1013 * Releases the PDM lock.
1014 *
1015 * @param pDevIns The PIC device instance.
1016 */
1017 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1018
1019 /**
1020 * Gets the address of the RC PIC helpers.
1021 *
1022 * This should be called at both construction and relocation time
1023 * to obtain the correct address of the RC helpers.
1024 *
1025 * @returns RC pointer to the PIC helpers.
1026 * @param pDevIns Device instance of the PIC.
1027 */
1028 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1029
1030 /**
1031 * Gets the address of the R0 PIC helpers.
1032 *
1033 * This should be called at both construction and relocation time
1034 * to obtain the correct address of the R0 helpers.
1035 *
1036 * @returns R0 pointer to the PIC helpers.
1037 * @param pDevIns Device instance of the PIC.
1038 */
1039 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1040
1041 /** Just a safety precaution. */
1042 uint32_t u32TheEnd;
1043} PDMPICHLPR3;
1044
1045/** Pointer to PIC R3 helpers. */
1046typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1047/** Pointer to const PIC R3 helpers. */
1048typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1049
1050/** Current PDMPICHLPR3 version number. */
1051#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1052
1053
1054
1055/**
1056 * Advanced Programmable Interrupt Controller registration structure.
1057 */
1058typedef struct PDMAPICREG
1059{
1060 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1061 uint32_t u32Version;
1062
1063 /**
1064 * Get a pending interrupt.
1065 *
1066 * @returns Pending interrupt number.
1067 * @param pDevIns Device instance of the APIC.
1068 */
1069 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
1070
1071 /**
1072 * Check if the APIC has a pending interrupt/if a TPR change would active one
1073 *
1074 * @returns Pending interrupt yes/no
1075 * @param pDevIns Device instance of the APIC.
1076 */
1077 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
1078
1079 /**
1080 * Set the APIC base.
1081 *
1082 * @param pDevIns Device instance of the APIC.
1083 * @param u64Base The new base.
1084 */
1085 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
1086
1087 /**
1088 * Get the APIC base.
1089 *
1090 * @returns Current base.
1091 * @param pDevIns Device instance of the APIC.
1092 */
1093 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
1094
1095 /**
1096 * Set the TPR (task priority register).
1097 *
1098 * @param pDevIns Device instance of the APIC.
1099 * @param idCpu VCPU id
1100 * @param u8TPR The new TPR.
1101 */
1102 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1103
1104 /**
1105 * Get the TPR (task priority register).
1106 *
1107 * @returns The current TPR.
1108 * @param pDevIns Device instance of the APIC.
1109 * @param idCpu VCPU id
1110 */
1111 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1112
1113 /**
1114 * Write to a MSR in APIC range.
1115 *
1116 * @returns VBox status code.
1117 * @param pDevIns Device instance of the APIC.
1118 * @param idCpu Target CPU.
1119 * @param u32Reg The MSR begin written to.
1120 * @param u64Value The value to write.
1121 *
1122 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1123 * calling this method.
1124 */
1125 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1126
1127 /**
1128 * Read from a MSR in APIC range.
1129 *
1130 * @returns VBox status code.
1131 * @param pDevIns Device instance of the APIC.
1132 * @param idCpu Target CPU.
1133 * @param u32Reg MSR to read.
1134 * @param pu64Value Where to return the read value.
1135 */
1136 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1137
1138 /**
1139 * Private interface between the IOAPIC and APIC.
1140 *
1141 * This is a low-level, APIC/IOAPIC implementation specific interface which
1142 * is registered with PDM only because it makes life so much simpler right
1143 * now (GC bits). This is a bad bad hack! The correct way of doing this
1144 * would involve some way of querying GC interfaces and relocating them.
1145 * Perhaps doing some kind of device init in GC...
1146 *
1147 * @returns status code.
1148 * @param pDevIns Device instance of the APIC.
1149 * @param u8Dest See APIC implementation.
1150 * @param u8DestMode See APIC implementation.
1151 * @param u8DeliveryMode See APIC implementation.
1152 * @param iVector See APIC implementation.
1153 * @param u8Polarity See APIC implementation.
1154 * @param u8TriggerMode See APIC implementation.
1155 */
1156 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1157 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1158
1159 /**
1160 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1161 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1162 *
1163 * @returns status code.
1164 * @param pDevIns Device instance of the APIC.
1165 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1166 */
1167 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1168
1169 /** The name of the RC GetInterrupt entry point. */
1170 const char *pszGetInterruptRC;
1171 /** The name of the RC HasPendingIrq entry point. */
1172 const char *pszHasPendingIrqRC;
1173 /** The name of the RC SetBase entry point. */
1174 const char *pszSetBaseRC;
1175 /** The name of the RC GetBase entry point. */
1176 const char *pszGetBaseRC;
1177 /** The name of the RC SetTPR entry point. */
1178 const char *pszSetTPRRC;
1179 /** The name of the RC GetTPR entry point. */
1180 const char *pszGetTPRRC;
1181 /** The name of the RC WriteMSR entry point. */
1182 const char *pszWriteMSRRC;
1183 /** The name of the RC ReadMSR entry point. */
1184 const char *pszReadMSRRC;
1185 /** The name of the RC BusDeliver entry point. */
1186 const char *pszBusDeliverRC;
1187 /** The name of the RC LocalInterrupt entry point. */
1188 const char *pszLocalInterruptRC;
1189
1190 /** The name of the R0 GetInterrupt entry point. */
1191 const char *pszGetInterruptR0;
1192 /** The name of the R0 HasPendingIrq entry point. */
1193 const char *pszHasPendingIrqR0;
1194 /** The name of the R0 SetBase entry point. */
1195 const char *pszSetBaseR0;
1196 /** The name of the R0 GetBase entry point. */
1197 const char *pszGetBaseR0;
1198 /** The name of the R0 SetTPR entry point. */
1199 const char *pszSetTPRR0;
1200 /** The name of the R0 GetTPR entry point. */
1201 const char *pszGetTPRR0;
1202 /** The name of the R0 WriteMSR entry point. */
1203 const char *pszWriteMSRR0;
1204 /** The name of the R0 ReadMSR entry point. */
1205 const char *pszReadMSRR0;
1206 /** The name of the R0 BusDeliver entry point. */
1207 const char *pszBusDeliverR0;
1208 /** The name of the R0 LocalInterrupt entry point. */
1209 const char *pszLocalInterruptR0;
1210
1211} PDMAPICREG;
1212/** Pointer to an APIC registration structure. */
1213typedef PDMAPICREG *PPDMAPICREG;
1214
1215/** Current PDMAPICREG version number. */
1216#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1217
1218
1219/**
1220 * APIC version argument for pfnChangeFeature.
1221 */
1222typedef enum PDMAPICVERSION
1223{
1224 /** Invalid 0 entry. */
1225 PDMAPICVERSION_INVALID = 0,
1226 /** No APIC. */
1227 PDMAPICVERSION_NONE,
1228 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1229 PDMAPICVERSION_APIC,
1230 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1231 PDMAPICVERSION_X2APIC,
1232 /** The usual 32-bit paranoia. */
1233 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1234} PDMAPICVERSION;
1235
1236/**
1237 * APIC irq argument for SetInterruptFF.
1238 */
1239typedef enum PDMAPICIRQ
1240{
1241 /** Invalid 0 entry. */
1242 PDMAPICIRQ_INVALID = 0,
1243 /** Normal hardware interrupt. */
1244 PDMAPICIRQ_HARDWARE,
1245 /** NMI. */
1246 PDMAPICIRQ_NMI,
1247 /** SMI. */
1248 PDMAPICIRQ_SMI,
1249 /** ExtINT (HW interrupt via PIC). */
1250 PDMAPICIRQ_EXTINT,
1251 /** The usual 32-bit paranoia. */
1252 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1253} PDMAPICIRQ;
1254
1255
1256/**
1257 * APIC RC helpers.
1258 */
1259typedef struct PDMAPICHLPRC
1260{
1261 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1262 uint32_t u32Version;
1263
1264 /**
1265 * Set the interrupt force action flag.
1266 *
1267 * @param pDevIns Device instance of the APIC.
1268 * @param enmType IRQ type.
1269 * @param idCpu Virtual CPU to set flag upon.
1270 */
1271 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1272
1273 /**
1274 * Clear the interrupt force action flag.
1275 *
1276 * @param pDevIns Device instance of the APIC.
1277 * @param enmType IRQ type.
1278 * @param idCpu Virtual CPU to clear flag upon.
1279 */
1280 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1281
1282 /**
1283 * Modifies APIC-related bits in the CPUID feature mask.
1284 *
1285 * @param pDevIns Device instance of the APIC.
1286 * @param enmVersion Supported APIC version.
1287 */
1288 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1289
1290 /**
1291 * Acquires the PDM lock.
1292 *
1293 * @returns VINF_SUCCESS on success.
1294 * @returns rc if we failed to acquire the lock.
1295 * @param pDevIns The APIC device instance.
1296 * @param rc What to return if we fail to acquire the lock.
1297 */
1298 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1299
1300 /**
1301 * Releases the PDM lock.
1302 *
1303 * @param pDevIns The APIC device instance.
1304 */
1305 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1306
1307 /**
1308 * Get the virtual CPU id corresponding to the current EMT.
1309 *
1310 * @param pDevIns The APIC device instance.
1311 */
1312 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1313
1314 /** Just a safety precaution. */
1315 uint32_t u32TheEnd;
1316} PDMAPICHLPRC;
1317/** Pointer to APIC GC helpers. */
1318typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1319/** Pointer to const APIC helpers. */
1320typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1321
1322/** Current PDMAPICHLPRC version number. */
1323#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1324
1325
1326/**
1327 * APIC R0 helpers.
1328 */
1329typedef struct PDMAPICHLPR0
1330{
1331 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1332 uint32_t u32Version;
1333
1334 /**
1335 * Set the interrupt force action flag.
1336 *
1337 * @param pDevIns Device instance of the APIC.
1338 * @param enmType IRQ type.
1339 * @param idCpu Virtual CPU to set flag upon.
1340 */
1341 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1342
1343 /**
1344 * Clear the interrupt force action flag.
1345 *
1346 * @param pDevIns Device instance of the APIC.
1347 * @param enmType IRQ type.
1348 * @param idCpu Virtual CPU to clear flag upon.
1349 */
1350 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1351
1352 /**
1353 * Modifies APIC-related bits in the CPUID feature mask.
1354 *
1355 * @param pDevIns Device instance of the APIC.
1356 * @param enmVersion Supported APIC version.
1357 */
1358 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1359
1360 /**
1361 * Acquires the PDM lock.
1362 *
1363 * @returns VINF_SUCCESS on success.
1364 * @returns rc if we failed to acquire the lock.
1365 * @param pDevIns The APIC device instance.
1366 * @param rc What to return if we fail to acquire the lock.
1367 */
1368 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1369
1370 /**
1371 * Releases the PDM lock.
1372 *
1373 * @param pDevIns The APIC device instance.
1374 */
1375 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1376
1377 /**
1378 * Get the virtual CPU id corresponding to the current EMT.
1379 *
1380 * @param pDevIns The APIC device instance.
1381 */
1382 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1383
1384 /** Just a safety precaution. */
1385 uint32_t u32TheEnd;
1386} PDMAPICHLPR0;
1387/** Pointer to APIC GC helpers. */
1388typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1389/** Pointer to const APIC helpers. */
1390typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1391
1392/** Current PDMAPICHLPR0 version number. */
1393#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1394
1395/**
1396 * APIC R3 helpers.
1397 */
1398typedef struct PDMAPICHLPR3
1399{
1400 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1401 uint32_t u32Version;
1402
1403 /**
1404 * Set the interrupt force action flag.
1405 *
1406 * @param pDevIns Device instance of the APIC.
1407 * @param enmType IRQ type.
1408 * @param idCpu Virtual CPU to set flag upon.
1409 */
1410 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1411
1412 /**
1413 * Clear the interrupt force action flag.
1414 *
1415 * @param pDevIns Device instance of the APIC.
1416 * @param enmType IRQ type.
1417 * @param idCpu Virtual CPU to clear flag upon.
1418 */
1419 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1420
1421 /**
1422 * Modifies APIC-related bits in the CPUID feature mask.
1423 *
1424 * @param pDevIns Device instance of the APIC.
1425 * @param enmVersion Supported APIC version.
1426 */
1427 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1428
1429 /**
1430 * Get the virtual CPU id corresponding to the current EMT.
1431 *
1432 * @param pDevIns The APIC device instance.
1433 */
1434 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1435
1436 /**
1437 * Sends SIPI to given virtual CPU.
1438 *
1439 * @param pDevIns The APIC device instance.
1440 * @param idCpu Virtual CPU to perform SIPI on
1441 * @param iVector SIPI vector
1442 */
1443 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1444
1445 /**
1446 * Sends init IPI to given virtual CPU, should result in reset and
1447 * halting till SIPI.
1448 *
1449 * @param pDevIns The APIC device instance.
1450 * @param idCpu Virtual CPU to perform SIPI on
1451 */
1452 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1453
1454 /**
1455 * Gets the address of the RC APIC helpers.
1456 *
1457 * This should be called at both construction and relocation time
1458 * to obtain the correct address of the RC helpers.
1459 *
1460 * @returns GC pointer to the APIC helpers.
1461 * @param pDevIns Device instance of the APIC.
1462 */
1463 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1464
1465 /**
1466 * Gets the address of the R0 APIC helpers.
1467 *
1468 * This should be called at both construction and relocation time
1469 * to obtain the correct address of the R0 helpers.
1470 *
1471 * @returns R0 pointer to the APIC helpers.
1472 * @param pDevIns Device instance of the APIC.
1473 */
1474 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1475
1476 /**
1477 * Get the critical section used to synchronize the PICs, PCI and stuff.
1478 *
1479 * @returns Ring-3 pointer to the critical section.
1480 * @param pDevIns The APIC device instance.
1481 */
1482 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1483
1484 /**
1485 * Get the critical section used to synchronize the PICs, PCI and stuff.
1486 *
1487 * @returns Raw-mode context pointer to the critical section.
1488 * @param pDevIns The APIC device instance.
1489 */
1490 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1491
1492 /**
1493 * Get the critical section used to synchronize the PICs, PCI and stuff.
1494 *
1495 * @returns Ring-0 pointer to the critical section.
1496 * @param pDevIns The APIC device instance.
1497 */
1498 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1499
1500 /** Just a safety precaution. */
1501 uint32_t u32TheEnd;
1502} PDMAPICHLPR3;
1503/** Pointer to APIC helpers. */
1504typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1505/** Pointer to const APIC helpers. */
1506typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1507
1508/** Current PDMAPICHLP version number. */
1509#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1510
1511
1512/**
1513 * I/O APIC registration structure.
1514 */
1515typedef struct PDMIOAPICREG
1516{
1517 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1518 uint32_t u32Version;
1519
1520 /**
1521 * Set the an IRQ.
1522 *
1523 * @param pDevIns Device instance of the I/O APIC.
1524 * @param iIrq IRQ number to set.
1525 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1526 */
1527 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1528
1529 /** The name of the GC SetIrq entry point. */
1530 const char *pszSetIrqRC;
1531
1532 /** The name of the R0 SetIrq entry point. */
1533 const char *pszSetIrqR0;
1534
1535 /**
1536 * Send a MSI.
1537 *
1538 * @param pDevIns Device instance of the I/O APIC.
1539 * @param GCPhys Request address.
1540 * @param uValue Request value.
1541 */
1542 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
1543
1544 /** The name of the GC SendMsi entry point. */
1545 const char *pszSendMsiRC;
1546
1547 /** The name of the R0 SendMsi entry point. */
1548 const char *pszSendMsiR0;
1549} PDMIOAPICREG;
1550/** Pointer to an APIC registration structure. */
1551typedef PDMIOAPICREG *PPDMIOAPICREG;
1552
1553/** Current PDMAPICREG version number. */
1554#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 2, 0)
1555
1556
1557/**
1558 * IOAPIC RC helpers.
1559 */
1560typedef struct PDMIOAPICHLPRC
1561{
1562 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1563 uint32_t u32Version;
1564
1565 /**
1566 * Private interface between the IOAPIC and APIC.
1567 *
1568 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1569 *
1570 * @returns status code.
1571 * @param pDevIns Device instance of the IOAPIC.
1572 * @param u8Dest See APIC implementation.
1573 * @param u8DestMode See APIC implementation.
1574 * @param u8DeliveryMode See APIC implementation.
1575 * @param iVector See APIC implementation.
1576 * @param u8Polarity See APIC implementation.
1577 * @param u8TriggerMode See APIC implementation.
1578 */
1579 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1580 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1581
1582 /**
1583 * Acquires the PDM lock.
1584 *
1585 * @returns VINF_SUCCESS on success.
1586 * @returns rc if we failed to acquire the lock.
1587 * @param pDevIns The IOAPIC device instance.
1588 * @param rc What to return if we fail to acquire the lock.
1589 */
1590 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1591
1592 /**
1593 * Releases the PDM lock.
1594 *
1595 * @param pDevIns The IOAPIC device instance.
1596 */
1597 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1598
1599 /** Just a safety precaution. */
1600 uint32_t u32TheEnd;
1601} PDMIOAPICHLPRC;
1602/** Pointer to IOAPIC RC helpers. */
1603typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1604/** Pointer to const IOAPIC helpers. */
1605typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1606
1607/** Current PDMIOAPICHLPRC version number. */
1608#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1609
1610
1611/**
1612 * IOAPIC R0 helpers.
1613 */
1614typedef struct PDMIOAPICHLPR0
1615{
1616 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1617 uint32_t u32Version;
1618
1619 /**
1620 * Private interface between the IOAPIC and APIC.
1621 *
1622 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1623 *
1624 * @returns status code.
1625 * @param pDevIns Device instance of the IOAPIC.
1626 * @param u8Dest See APIC implementation.
1627 * @param u8DestMode See APIC implementation.
1628 * @param u8DeliveryMode See APIC implementation.
1629 * @param iVector See APIC implementation.
1630 * @param u8Polarity See APIC implementation.
1631 * @param u8TriggerMode See APIC implementation.
1632 */
1633 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1634 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1635
1636 /**
1637 * Acquires the PDM lock.
1638 *
1639 * @returns VINF_SUCCESS on success.
1640 * @returns rc if we failed to acquire the lock.
1641 * @param pDevIns The IOAPIC device instance.
1642 * @param rc What to return if we fail to acquire the lock.
1643 */
1644 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1645
1646 /**
1647 * Releases the PDM lock.
1648 *
1649 * @param pDevIns The IOAPIC device instance.
1650 */
1651 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1652
1653 /** Just a safety precaution. */
1654 uint32_t u32TheEnd;
1655} PDMIOAPICHLPR0;
1656/** Pointer to IOAPIC R0 helpers. */
1657typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1658/** Pointer to const IOAPIC helpers. */
1659typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1660
1661/** Current PDMIOAPICHLPR0 version number. */
1662#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1663
1664/**
1665 * IOAPIC R3 helpers.
1666 */
1667typedef struct PDMIOAPICHLPR3
1668{
1669 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1670 uint32_t u32Version;
1671
1672 /**
1673 * Private interface between the IOAPIC and APIC.
1674 *
1675 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1676 *
1677 * @returns status code
1678 * @param pDevIns Device instance of the IOAPIC.
1679 * @param u8Dest See APIC implementation.
1680 * @param u8DestMode See APIC implementation.
1681 * @param u8DeliveryMode See APIC implementation.
1682 * @param iVector See APIC implementation.
1683 * @param u8Polarity See APIC implementation.
1684 * @param u8TriggerMode See APIC implementation.
1685 */
1686 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1687 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1688
1689 /**
1690 * Acquires the PDM lock.
1691 *
1692 * @returns VINF_SUCCESS on success.
1693 * @returns Fatal error on failure.
1694 * @param pDevIns The IOAPIC device instance.
1695 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1696 */
1697 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1698
1699 /**
1700 * Releases the PDM lock.
1701 *
1702 * @param pDevIns The IOAPIC device instance.
1703 */
1704 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1705
1706 /**
1707 * Gets the address of the RC IOAPIC helpers.
1708 *
1709 * This should be called at both construction and relocation time
1710 * to obtain the correct address of the RC helpers.
1711 *
1712 * @returns RC pointer to the IOAPIC helpers.
1713 * @param pDevIns Device instance of the IOAPIC.
1714 */
1715 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1716
1717 /**
1718 * Gets the address of the R0 IOAPIC helpers.
1719 *
1720 * This should be called at both construction and relocation time
1721 * to obtain the correct address of the R0 helpers.
1722 *
1723 * @returns R0 pointer to the IOAPIC helpers.
1724 * @param pDevIns Device instance of the IOAPIC.
1725 */
1726 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1727
1728 /** Just a safety precaution. */
1729 uint32_t u32TheEnd;
1730} PDMIOAPICHLPR3;
1731/** Pointer to IOAPIC R3 helpers. */
1732typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1733/** Pointer to const IOAPIC helpers. */
1734typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1735
1736/** Current PDMIOAPICHLPR3 version number. */
1737#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1738
1739
1740/**
1741 * HPET registration structure.
1742 */
1743typedef struct PDMHPETREG
1744{
1745 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1746 uint32_t u32Version;
1747
1748} PDMHPETREG;
1749/** Pointer to an HPET registration structure. */
1750typedef PDMHPETREG *PPDMHPETREG;
1751
1752/** Current PDMHPETREG version number. */
1753#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1754
1755/**
1756 * HPET RC helpers.
1757 *
1758 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1759 * at some later point.
1760 */
1761typedef struct PDMHPETHLPRC
1762{
1763 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1764 uint32_t u32Version;
1765
1766 /** Just a safety precaution. */
1767 uint32_t u32TheEnd;
1768} PDMHPETHLPRC;
1769
1770/** Pointer to HPET RC helpers. */
1771typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1772/** Pointer to const HPET RC helpers. */
1773typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1774
1775/** Current PDMHPETHLPRC version number. */
1776#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1777
1778
1779/**
1780 * HPET R0 helpers.
1781 *
1782 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1783 * at some later point.
1784 */
1785typedef struct PDMHPETHLPR0
1786{
1787 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1788 uint32_t u32Version;
1789
1790 /** Just a safety precaution. */
1791 uint32_t u32TheEnd;
1792} PDMHPETHLPR0;
1793
1794/** Pointer to HPET R0 helpers. */
1795typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1796/** Pointer to const HPET R0 helpers. */
1797typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1798
1799/** Current PDMHPETHLPR0 version number. */
1800#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1801
1802/**
1803 * HPET R3 helpers.
1804 */
1805typedef struct PDMHPETHLPR3
1806{
1807 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1808 uint32_t u32Version;
1809
1810 /**
1811 * Gets the address of the RC HPET helpers.
1812 *
1813 * This should be called at both construction and relocation time
1814 * to obtain the correct address of the RC helpers.
1815 *
1816 * @returns RC pointer to the HPET helpers.
1817 * @param pDevIns Device instance of the HPET.
1818 */
1819 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1820
1821 /**
1822 * Gets the address of the R0 HPET helpers.
1823 *
1824 * This should be called at both construction and relocation time
1825 * to obtain the correct address of the R0 helpers.
1826 *
1827 * @returns R0 pointer to the HPET helpers.
1828 * @param pDevIns Device instance of the HPET.
1829 */
1830 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1831
1832 /**
1833 * Set legacy mode on PIT and RTC.
1834 *
1835 * @returns VINF_SUCCESS on success.
1836 * @returns rc if we failed to set legacy mode.
1837 * @param pDevIns Device instance of the HPET.
1838 * @param fActivated Whether legacy mode is activated or deactivated.
1839 */
1840 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1841
1842
1843 /**
1844 * Set IRQ, bypassing ISA bus override rules.
1845 *
1846 * @returns VINF_SUCCESS on success.
1847 * @returns rc if we failed to set legacy mode.
1848 * @param pDevIns Device instance of the HPET.
1849 * @param fActivate Activate or deactivate legacy mode.
1850 */
1851 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1852
1853 /** Just a safety precaution. */
1854 uint32_t u32TheEnd;
1855} PDMHPETHLPR3;
1856
1857/** Pointer to HPET R3 helpers. */
1858typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1859/** Pointer to const HPET R3 helpers. */
1860typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1861
1862/** Current PDMHPETHLPR3 version number. */
1863#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1864
1865
1866/**
1867 * Raw PCI device registration structure.
1868 */
1869typedef struct PDMPCIRAWREG
1870{
1871 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1872 uint32_t u32Version;
1873 /** Just a safety precaution. */
1874 uint32_t u32TheEnd;
1875} PDMPCIRAWREG;
1876/** Pointer to a raw PCI registration structure. */
1877typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1878
1879/** Current PDMPCIRAWREG version number. */
1880#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1881
1882/**
1883 * Raw PCI device raw-mode context helpers.
1884 */
1885typedef struct PDMPCIRAWHLPRC
1886{
1887 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1888 uint32_t u32Version;
1889 /** Just a safety precaution. */
1890 uint32_t u32TheEnd;
1891} PDMPCIRAWHLPRC;
1892/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1893typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1894/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1895typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1896
1897/** Current PDMPCIRAWHLPRC version number. */
1898#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1899
1900/**
1901 * Raw PCI device ring-0 context helpers.
1902 */
1903typedef struct PDMPCIRAWHLPR0
1904{
1905 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1906 uint32_t u32Version;
1907 /** Just a safety precaution. */
1908 uint32_t u32TheEnd;
1909} PDMPCIRAWHLPR0;
1910/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1911typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1912/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1913typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1914
1915/** Current PDMPCIRAWHLPR0 version number. */
1916#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1917
1918
1919/**
1920 * Raw PCI device ring-3 context helpers.
1921 */
1922typedef struct PDMPCIRAWHLPR3
1923{
1924 /** Undefined structure version and magic number. */
1925 uint32_t u32Version;
1926
1927 /**
1928 * Gets the address of the RC raw PCI device helpers.
1929 *
1930 * This should be called at both construction and relocation time to obtain
1931 * the correct address of the RC helpers.
1932 *
1933 * @returns RC pointer to the raw PCI device helpers.
1934 * @param pDevIns Device instance of the raw PCI device.
1935 */
1936 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1937
1938 /**
1939 * Gets the address of the R0 raw PCI device helpers.
1940 *
1941 * This should be called at both construction and relocation time to obtain
1942 * the correct address of the R0 helpers.
1943 *
1944 * @returns R0 pointer to the raw PCI device helpers.
1945 * @param pDevIns Device instance of the raw PCI device.
1946 */
1947 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1948
1949 /** Just a safety precaution. */
1950 uint32_t u32TheEnd;
1951} PDMPCIRAWHLPR3;
1952/** Pointer to raw PCI R3 helpers. */
1953typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
1954/** Pointer to const raw PCI R3 helpers. */
1955typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
1956
1957/** Current PDMPCIRAWHLPR3 version number. */
1958#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
1959
1960
1961#ifdef IN_RING3
1962
1963/**
1964 * DMA Transfer Handler.
1965 *
1966 * @returns Number of bytes transferred.
1967 * @param pDevIns Device instance of the DMA.
1968 * @param pvUser User pointer.
1969 * @param uChannel Channel number.
1970 * @param off DMA position.
1971 * @param cb Block size.
1972 */
1973typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1974/** Pointer to a FNDMATRANSFERHANDLER(). */
1975typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1976
1977/**
1978 * DMA Controller registration structure.
1979 */
1980typedef struct PDMDMAREG
1981{
1982 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1983 uint32_t u32Version;
1984
1985 /**
1986 * Execute pending transfers.
1987 *
1988 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1989 * @param pDevIns Device instance of the DMAC.
1990 */
1991 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1992
1993 /**
1994 * Register transfer function for DMA channel.
1995 *
1996 * @param pDevIns Device instance of the DMAC.
1997 * @param uChannel Channel number.
1998 * @param pfnTransferHandler Device specific transfer function.
1999 * @param pvUSer User pointer to be passed to the callback.
2000 */
2001 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2002
2003 /**
2004 * Read memory
2005 *
2006 * @returns Number of bytes read.
2007 * @param pDevIns Device instance of the DMAC.
2008 * @param pvBuffer Pointer to target buffer.
2009 * @param off DMA position.
2010 * @param cbBlock Block size.
2011 */
2012 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2013
2014 /**
2015 * Write memory
2016 *
2017 * @returns Number of bytes written.
2018 * @param pDevIns Device instance of the DMAC.
2019 * @param pvBuffer Memory to write.
2020 * @param off DMA position.
2021 * @param cbBlock Block size.
2022 */
2023 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2024
2025 /**
2026 * Set the DREQ line.
2027 *
2028 * @param pDevIns Device instance of the DMAC.
2029 * @param uChannel Channel number.
2030 * @param uLevel Level of the line.
2031 */
2032 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2033
2034 /**
2035 * Get channel mode
2036 *
2037 * @returns Channel mode.
2038 * @param pDevIns Device instance of the DMAC.
2039 * @param uChannel Channel number.
2040 */
2041 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2042
2043} PDMDMACREG;
2044/** Pointer to a DMAC registration structure. */
2045typedef PDMDMACREG *PPDMDMACREG;
2046
2047/** Current PDMDMACREG version number. */
2048#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2049
2050
2051/**
2052 * DMA Controller device helpers.
2053 */
2054typedef struct PDMDMACHLP
2055{
2056 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2057 uint32_t u32Version;
2058
2059 /* to-be-defined */
2060
2061} PDMDMACHLP;
2062/** Pointer to DMAC helpers. */
2063typedef PDMDMACHLP *PPDMDMACHLP;
2064/** Pointer to const DMAC helpers. */
2065typedef const PDMDMACHLP *PCPDMDMACHLP;
2066
2067/** Current PDMDMACHLP version number. */
2068#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2069
2070#endif /* IN_RING3 */
2071
2072
2073
2074/**
2075 * RTC registration structure.
2076 */
2077typedef struct PDMRTCREG
2078{
2079 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2080 uint32_t u32Version;
2081 uint32_t u32Alignment; /**< structure size alignment. */
2082
2083 /**
2084 * Write to a CMOS register and update the checksum if necessary.
2085 *
2086 * @returns VBox status code.
2087 * @param pDevIns Device instance of the RTC.
2088 * @param iReg The CMOS register index.
2089 * @param u8Value The CMOS register value.
2090 */
2091 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2092
2093 /**
2094 * Read a CMOS register.
2095 *
2096 * @returns VBox status code.
2097 * @param pDevIns Device instance of the RTC.
2098 * @param iReg The CMOS register index.
2099 * @param pu8Value Where to store the CMOS register value.
2100 */
2101 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2102
2103} PDMRTCREG;
2104/** Pointer to a RTC registration structure. */
2105typedef PDMRTCREG *PPDMRTCREG;
2106/** Pointer to a const RTC registration structure. */
2107typedef const PDMRTCREG *PCPDMRTCREG;
2108
2109/** Current PDMRTCREG version number. */
2110#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
2111
2112
2113/**
2114 * RTC device helpers.
2115 */
2116typedef struct PDMRTCHLP
2117{
2118 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2119 uint32_t u32Version;
2120
2121 /* to-be-defined */
2122
2123} PDMRTCHLP;
2124/** Pointer to RTC helpers. */
2125typedef PDMRTCHLP *PPDMRTCHLP;
2126/** Pointer to const RTC helpers. */
2127typedef const PDMRTCHLP *PCPDMRTCHLP;
2128
2129/** Current PDMRTCHLP version number. */
2130#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2131
2132
2133
2134#ifdef IN_RING3
2135
2136/**
2137 * PDM Device API.
2138 */
2139typedef struct PDMDEVHLPR3
2140{
2141 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
2142 uint32_t u32Version;
2143
2144 /**
2145 * Register a number of I/O ports with a device.
2146 *
2147 * These callbacks are of course for the host context (HC).
2148 * Register HC handlers before guest context (GC) handlers! There must be a
2149 * HC handler for every GC handler!
2150 *
2151 * @returns VBox status.
2152 * @param pDevIns The device instance to register the ports with.
2153 * @param Port First port number in the range.
2154 * @param cPorts Number of ports to register.
2155 * @param pvUser User argument.
2156 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2157 * @param pfnIn Pointer to function which is gonna handle IN operations.
2158 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2159 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2160 * @param pszDesc Pointer to description string. This must not be freed.
2161 */
2162 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2163 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2164 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2165
2166 /**
2167 * Register a number of I/O ports with a device for RC.
2168 *
2169 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2170 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2171 * for every RC handler!
2172 *
2173 * @returns VBox status.
2174 * @param pDevIns The device instance to register the ports with
2175 * and which RC module to resolve the names
2176 * against.
2177 * @param Port First port number in the range.
2178 * @param cPorts Number of ports to register.
2179 * @param pvUser User argument.
2180 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2181 * @param pszIn Name of the RC function which is gonna handle IN operations.
2182 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2183 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2184 * @param pszDesc Pointer to description string. This must not be freed.
2185 */
2186 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
2187 const char *pszOut, const char *pszIn,
2188 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2189
2190 /**
2191 * Register a number of I/O ports with a device.
2192 *
2193 * These callbacks are of course for the ring-0 host context (R0).
2194 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2195 *
2196 * @returns VBox status.
2197 * @param pDevIns The device instance to register the ports with.
2198 * @param Port First port number in the range.
2199 * @param cPorts Number of ports to register.
2200 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2201 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2202 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2203 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2204 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2205 * @param pszDesc Pointer to description string. This must not be freed.
2206 */
2207 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2208 const char *pszOut, const char *pszIn,
2209 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2210
2211 /**
2212 * Deregister I/O ports.
2213 *
2214 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2215 *
2216 * @returns VBox status.
2217 * @param pDevIns The device instance owning the ports.
2218 * @param Port First port number in the range.
2219 * @param cPorts Number of ports to deregister.
2220 */
2221 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2222
2223 /**
2224 * Register a Memory Mapped I/O (MMIO) region.
2225 *
2226 * These callbacks are of course for the ring-3 context (R3). Register HC
2227 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2228 * must be a R3 handler for every RC and R0 handler!
2229 *
2230 * @returns VBox status.
2231 * @param pDevIns The device instance to register the MMIO with.
2232 * @param GCPhysStart First physical address in the range.
2233 * @param cbRange The size of the range (in bytes).
2234 * @param pvUser User argument.
2235 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2236 * @param pfnRead Pointer to function which is gonna handle Read operations.
2237 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2238 * @param pszDesc Pointer to description string. This must not be freed.
2239 */
2240 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2241 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2242 const char *pszDesc));
2243
2244 /**
2245 * Register a Memory Mapped I/O (MMIO) region for GC.
2246 *
2247 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2248 * (R3) handlers before guest context handlers! There must be a R3 handler for
2249 * every RC handler!
2250 *
2251 * @returns VBox status.
2252 * @param pDevIns The device instance to register the MMIO with.
2253 * @param GCPhysStart First physical address in the range.
2254 * @param cbRange The size of the range (in bytes).
2255 * @param pvUser User argument.
2256 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2257 * @param pszRead Name of the RC function which is gonna handle Read operations.
2258 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2259 * @param pszDesc Obsolete. NULL is fine.
2260 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2261 */
2262 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2263 const char *pszWrite, const char *pszRead, const char *pszFill,
2264 const char *pszDesc));
2265
2266 /**
2267 * Register a Memory Mapped I/O (MMIO) region for R0.
2268 *
2269 * These callbacks are for the ring-0 host context (R0). Register ring-3
2270 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2271 * every R0 handler!
2272 *
2273 * @returns VBox status.
2274 * @param pDevIns The device instance to register the MMIO with.
2275 * @param GCPhysStart First physical address in the range.
2276 * @param cbRange The size of the range (in bytes).
2277 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2278 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2279 * @param pszRead Name of the RC function which is gonna handle Read operations.
2280 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2281 * @param pszDesc Obsolete. NULL is fine.
2282 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
2283 */
2284 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2285 const char *pszWrite, const char *pszRead, const char *pszFill,
2286 const char *pszDesc));
2287
2288 /**
2289 * Deregister a Memory Mapped I/O (MMIO) region.
2290 *
2291 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2292 *
2293 * @returns VBox status.
2294 * @param pDevIns The device instance owning the MMIO region(s).
2295 * @param GCPhysStart First physical address in the range.
2296 * @param cbRange The size of the range (in bytes).
2297 */
2298 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2299
2300 /**
2301 * Allocate and register a MMIO2 region.
2302 *
2303 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2304 * RAM associated with a device. It is also non-shared memory with a
2305 * permanent ring-3 mapping and page backing (presently).
2306 *
2307 * @returns VBox status.
2308 * @param pDevIns The device instance.
2309 * @param iRegion The region number. Use the PCI region number as
2310 * this must be known to the PCI bus device too. If
2311 * it's not associated with the PCI device, then
2312 * any number up to UINT8_MAX is fine.
2313 * @param cb The size (in bytes) of the region.
2314 * @param fFlags Reserved for future use, must be zero.
2315 * @param ppv Where to store the address of the ring-3 mapping
2316 * of the memory.
2317 * @param pszDesc Pointer to description string. This must not be
2318 * freed.
2319 * @thread EMT.
2320 */
2321 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2322
2323 /**
2324 * Deregisters and frees a MMIO2 region.
2325 *
2326 * Any physical (and virtual) access handlers registered for the region must
2327 * be deregistered before calling this function.
2328 *
2329 * @returns VBox status code.
2330 * @param pDevIns The device instance.
2331 * @param iRegion The region number used during registration.
2332 * @thread EMT.
2333 */
2334 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2335
2336 /**
2337 * Maps a MMIO2 region into the physical memory space.
2338 *
2339 * A MMIO2 range may overlap with base memory if a lot of RAM
2340 * is configured for the VM, in which case we'll drop the base
2341 * memory pages. Presently we will make no attempt to preserve
2342 * anything that happens to be present in the base memory that
2343 * is replaced, this is of course incorrectly but it's too much
2344 * effort.
2345 *
2346 * @returns VBox status code.
2347 * @param pDevIns The device instance.
2348 * @param iRegion The region number used during registration.
2349 * @param GCPhys The physical address to map it at.
2350 * @thread EMT.
2351 */
2352 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2353
2354 /**
2355 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2356 *
2357 * @returns VBox status code.
2358 * @param pDevIns The device instance.
2359 * @param iRegion The region number used during registration.
2360 * @param GCPhys The physical address it's currently mapped at.
2361 * @thread EMT.
2362 */
2363 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2364
2365 /**
2366 * Maps a portion of an MMIO2 region into the hypervisor region.
2367 *
2368 * Callers of this API must never deregister the MMIO2 region before the
2369 * VM is powered off.
2370 *
2371 * @return VBox status code.
2372 * @param pDevIns The device owning the MMIO2 memory.
2373 * @param iRegion The region.
2374 * @param off The offset into the region. Will be rounded down
2375 * to closest page boundary.
2376 * @param cb The number of bytes to map. Will be rounded up
2377 * to the closest page boundary.
2378 * @param pszDesc Mapping description.
2379 * @param pRCPtr Where to store the RC address.
2380 */
2381 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2382 const char *pszDesc, PRTRCPTR pRCPtr));
2383
2384 /**
2385 * Maps a portion of an MMIO2 region into kernel space (host).
2386 *
2387 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2388 * or the VM is terminated.
2389 *
2390 * @return VBox status code.
2391 * @param pDevIns The device owning the MMIO2 memory.
2392 * @param iRegion The region.
2393 * @param off The offset into the region. Must be page
2394 * aligned.
2395 * @param cb The number of bytes to map. Must be page
2396 * aligned.
2397 * @param pszDesc Mapping description.
2398 * @param pR0Ptr Where to store the R0 address.
2399 */
2400 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2401 const char *pszDesc, PRTR0PTR pR0Ptr));
2402
2403 /**
2404 * Register a ROM (BIOS) region.
2405 *
2406 * It goes without saying that this is read-only memory. The memory region must be
2407 * in unassigned memory. I.e. from the top of the address space or on the PC in
2408 * the 0xa0000-0xfffff range.
2409 *
2410 * @returns VBox status.
2411 * @param pDevIns The device instance owning the ROM region.
2412 * @param GCPhysStart First physical address in the range.
2413 * Must be page aligned!
2414 * @param cbRange The size of the range (in bytes).
2415 * Must be page aligned!
2416 * @param pvBinary Pointer to the binary data backing the ROM image.
2417 * @param cbBinary The size of the binary pointer. This must
2418 * be equal or smaller than @a cbRange.
2419 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2420 * @param pszDesc Pointer to description string. This must not be freed.
2421 *
2422 * @remark There is no way to remove the rom, automatically on device cleanup or
2423 * manually from the device yet. At present I doubt we need such features...
2424 */
2425 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
2426 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2427
2428 /**
2429 * Changes the protection of shadowed ROM mapping.
2430 *
2431 * This is intented for use by the system BIOS, chipset or device in question to
2432 * change the protection of shadowed ROM code after init and on reset.
2433 *
2434 * @param pDevIns The device instance.
2435 * @param GCPhysStart Where the mapping starts.
2436 * @param cbRange The size of the mapping.
2437 * @param enmProt The new protection type.
2438 */
2439 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2440
2441 /**
2442 * Register a save state data unit.
2443 *
2444 * @returns VBox status.
2445 * @param pDevIns The device instance.
2446 * @param pszName Data unit name.
2447 * @param uInstance The instance identifier of the data unit.
2448 * This must together with the name be unique.
2449 * @param uVersion Data layout version number.
2450 * @param cbGuess The approximate amount of data in the unit.
2451 * Only for progress indicators.
2452 * @param pszBefore Name of data unit which we should be put in
2453 * front of. Optional (NULL).
2454 *
2455 * @param pfnLivePrep Prepare live save callback, optional.
2456 * @param pfnLiveExec Execute live save callback, optional.
2457 * @param pfnLiveVote Vote live save callback, optional.
2458 *
2459 * @param pfnSavePrep Prepare save callback, optional.
2460 * @param pfnSaveExec Execute save callback, optional.
2461 * @param pfnSaveDone Done save callback, optional.
2462 *
2463 * @param pfnLoadPrep Prepare load callback, optional.
2464 * @param pfnLoadExec Execute load callback, optional.
2465 * @param pfnLoadDone Done load callback, optional.
2466 */
2467 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2468 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2469 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2470 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2471
2472 /**
2473 * Creates a timer.
2474 *
2475 * @returns VBox status.
2476 * @param pDevIns The device instance.
2477 * @param enmClock The clock to use on this timer.
2478 * @param pfnCallback Callback function.
2479 * @param pvUser User argument for the callback.
2480 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2481 * @param pszDesc Pointer to description string which must stay around
2482 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2483 * @param ppTimer Where to store the timer on success.
2484 */
2485 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2486
2487 /**
2488 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2489 *
2490 * @returns pTime.
2491 * @param pDevIns The device instance.
2492 * @param pTime Where to store the time.
2493 */
2494 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2495
2496 /**
2497 * Read physical memory.
2498 *
2499 * @returns VINF_SUCCESS (for now).
2500 * @param pDevIns The device instance.
2501 * @param GCPhys Physical address start reading from.
2502 * @param pvBuf Where to put the read bits.
2503 * @param cbRead How many bytes to read.
2504 * @thread Any thread, but the call may involve the emulation thread.
2505 */
2506 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2507
2508 /**
2509 * Write to physical memory.
2510 *
2511 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2512 * @param pDevIns The device instance.
2513 * @param GCPhys Physical address to write to.
2514 * @param pvBuf What to write.
2515 * @param cbWrite How many bytes to write.
2516 * @thread Any thread, but the call may involve the emulation thread.
2517 */
2518 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2519
2520 /**
2521 * Requests the mapping of a guest page into ring-3.
2522 *
2523 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2524 * release it.
2525 *
2526 * This API will assume your intention is to write to the page, and will
2527 * therefore replace shared and zero pages. If you do not intend to modify the
2528 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2529 *
2530 * @returns VBox status code.
2531 * @retval VINF_SUCCESS on success.
2532 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2533 * backing or if the page has any active access handlers. The caller
2534 * must fall back on using PGMR3PhysWriteExternal.
2535 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2536 *
2537 * @param pVM The VM handle.
2538 * @param GCPhys The guest physical address of the page that
2539 * should be mapped.
2540 * @param fFlags Flags reserved for future use, MBZ.
2541 * @param ppv Where to store the address corresponding to
2542 * GCPhys.
2543 * @param pLock Where to store the lock information that
2544 * pfnPhysReleasePageMappingLock needs.
2545 *
2546 * @remark Avoid calling this API from within critical sections (other than the
2547 * PGM one) because of the deadlock risk when we have to delegating the
2548 * task to an EMT.
2549 * @thread Any.
2550 */
2551 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2552
2553 /**
2554 * Requests the mapping of a guest page into ring-3, external threads.
2555 *
2556 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2557 * release it.
2558 *
2559 * @returns VBox status code.
2560 * @retval VINF_SUCCESS on success.
2561 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2562 * backing or if the page as an active ALL access handler. The caller
2563 * must fall back on using PGMPhysRead.
2564 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2565 *
2566 * @param pDevIns The device instance.
2567 * @param GCPhys The guest physical address of the page that
2568 * should be mapped.
2569 * @param fFlags Flags reserved for future use, MBZ.
2570 * @param ppv Where to store the address corresponding to
2571 * GCPhys.
2572 * @param pLock Where to store the lock information that
2573 * pfnPhysReleasePageMappingLock needs.
2574 *
2575 * @remark Avoid calling this API from within critical sections.
2576 * @thread Any.
2577 */
2578 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2579
2580 /**
2581 * Release the mapping of a guest page.
2582 *
2583 * This is the counter part of pfnPhysGCPhys2CCPtr and
2584 * pfnPhysGCPhys2CCPtrReadOnly.
2585 *
2586 * @param pDevIns The device instance.
2587 * @param pLock The lock structure initialized by the mapping
2588 * function.
2589 */
2590 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2591
2592 /**
2593 * Read guest physical memory by virtual address.
2594 *
2595 * @param pDevIns The device instance.
2596 * @param pvDst Where to put the read bits.
2597 * @param GCVirtSrc Guest virtual address to start reading from.
2598 * @param cb How many bytes to read.
2599 * @thread The emulation thread.
2600 */
2601 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2602
2603 /**
2604 * Write to guest physical memory by virtual address.
2605 *
2606 * @param pDevIns The device instance.
2607 * @param GCVirtDst Guest virtual address to write to.
2608 * @param pvSrc What to write.
2609 * @param cb How many bytes to write.
2610 * @thread The emulation thread.
2611 */
2612 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2613
2614 /**
2615 * Convert a guest virtual address to a guest physical address.
2616 *
2617 * @returns VBox status code.
2618 * @param pDevIns The device instance.
2619 * @param GCPtr Guest virtual address.
2620 * @param pGCPhys Where to store the GC physical address
2621 * corresponding to GCPtr.
2622 * @thread The emulation thread.
2623 * @remark Careful with page boundaries.
2624 */
2625 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2626
2627 /**
2628 * Allocate memory which is associated with current VM instance
2629 * and automatically freed on it's destruction.
2630 *
2631 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2632 * @param pDevIns The device instance.
2633 * @param cb Number of bytes to allocate.
2634 */
2635 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2636
2637 /**
2638 * Allocate memory which is associated with current VM instance
2639 * and automatically freed on it's destruction. The memory is ZEROed.
2640 *
2641 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2642 * @param pDevIns The device instance.
2643 * @param cb Number of bytes to allocate.
2644 */
2645 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2646
2647 /**
2648 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2649 *
2650 * @param pDevIns The device instance.
2651 * @param pv Pointer to the memory to free.
2652 */
2653 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2654
2655 /**
2656 * Gets the VM state.
2657 *
2658 * @returns VM state.
2659 * @param pDevIns The device instance.
2660 * @thread Any thread (just keep in mind that it's volatile info).
2661 */
2662 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2663
2664 /**
2665 * Checks if the VM was teleported and hasn't been fully resumed yet.
2666 *
2667 * @returns true / false.
2668 * @param pDevIns The device instance.
2669 * @thread Any thread.
2670 */
2671 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2672
2673 /**
2674 * Set the VM error message
2675 *
2676 * @returns rc.
2677 * @param pDevIns The device instance.
2678 * @param rc VBox status code.
2679 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2680 * @param pszFormat Error message format string.
2681 * @param ... Error message arguments.
2682 */
2683 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2684
2685 /**
2686 * Set the VM error message
2687 *
2688 * @returns rc.
2689 * @param pDevIns The device instance.
2690 * @param rc VBox status code.
2691 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2692 * @param pszFormat Error message format string.
2693 * @param va Error message arguments.
2694 */
2695 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2696
2697 /**
2698 * Set the VM runtime error message
2699 *
2700 * @returns VBox status code.
2701 * @param pDevIns The device instance.
2702 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2703 * @param pszErrorId Error ID string.
2704 * @param pszFormat Error message format string.
2705 * @param ... Error message arguments.
2706 */
2707 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2708
2709 /**
2710 * Set the VM runtime error message
2711 *
2712 * @returns VBox status code.
2713 * @param pDevIns The device instance.
2714 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2715 * @param pszErrorId Error ID string.
2716 * @param pszFormat Error message format string.
2717 * @param va Error message arguments.
2718 */
2719 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2720
2721 /**
2722 * Stops the VM and enters the debugger to look at the guest state.
2723 *
2724 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2725 * invoking this function directly.
2726 *
2727 * @returns VBox status code which must be passed up to the VMM.
2728 * @param pDevIns The device instance.
2729 * @param pszFile Filename of the assertion location.
2730 * @param iLine The linenumber of the assertion location.
2731 * @param pszFunction Function of the assertion location.
2732 * @param pszFormat Message. (optional)
2733 * @param args Message parameters.
2734 */
2735 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2736
2737 /**
2738 * Register a info handler with DBGF,
2739 *
2740 * @returns VBox status code.
2741 * @param pDevIns The device instance.
2742 * @param pszName The identifier of the info.
2743 * @param pszDesc The description of the info and any arguments
2744 * the handler may take.
2745 * @param pfnHandler The handler function to be called to display the
2746 * info.
2747 */
2748 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2749
2750 /**
2751 * Gets the trace buffer handle.
2752 *
2753 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2754 * really inteded for direct usage, thus no inline wrapper function.
2755 *
2756 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2757 * @param pDevIns The device instance.
2758 */
2759 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2760
2761 /**
2762 * Registers a statistics sample if statistics are enabled.
2763 *
2764 * @param pDevIns Device instance of the DMA.
2765 * @param pvSample Pointer to the sample.
2766 * @param enmType Sample type. This indicates what pvSample is
2767 * pointing at.
2768 * @param pszName Sample name. The name is on this form
2769 * "/<component>/<sample>". Further nesting is
2770 * possible.
2771 * @param enmUnit Sample unit.
2772 * @param pszDesc Sample description.
2773 */
2774 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2775
2776 /**
2777 * Same as pfnSTAMRegister except that the name is specified in a
2778 * RTStrPrintf like fashion.
2779 *
2780 * @returns VBox status.
2781 * @param pDevIns Device instance of the DMA.
2782 * @param pvSample Pointer to the sample.
2783 * @param enmType Sample type. This indicates what pvSample is
2784 * pointing at.
2785 * @param enmVisibility Visibility type specifying whether unused
2786 * statistics should be visible or not.
2787 * @param enmUnit Sample unit.
2788 * @param pszDesc Sample description.
2789 * @param pszName The sample name format string.
2790 * @param ... Arguments to the format string.
2791 */
2792 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2793 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2794
2795 /**
2796 * Same as pfnSTAMRegister except that the name is specified in a
2797 * RTStrPrintfV like fashion.
2798 *
2799 * @returns VBox status.
2800 * @param pDevIns Device instance of the DMA.
2801 * @param pvSample Pointer to the sample.
2802 * @param enmType Sample type. This indicates what pvSample is
2803 * pointing at.
2804 * @param enmVisibility Visibility type specifying whether unused
2805 * statistics should be visible or not.
2806 * @param enmUnit Sample unit.
2807 * @param pszDesc Sample description.
2808 * @param pszName The sample name format string.
2809 * @param args Arguments to the format string.
2810 */
2811 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2812 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2813
2814 /**
2815 * Registers the device with the default PCI bus.
2816 *
2817 * @returns VBox status code.
2818 * @param pDevIns The device instance.
2819 * @param pPciDev The PCI device structure.
2820 * Any PCI enabled device must keep this in it's instance data!
2821 * Fill in the PCI data config before registration, please.
2822 * @remark This is the simple interface, a Ex interface will be created if
2823 * more features are needed later.
2824 */
2825 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2826
2827 /**
2828 * Initialize MSI support in a PCI device.
2829 *
2830 * @returns VBox status code.
2831 * @param pDevIns The device instance.
2832 * @param pMsiReg MSI registartion structure.
2833 */
2834 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2835
2836 /**
2837 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2838 *
2839 * @returns VBox status code.
2840 * @param pDevIns The device instance.
2841 * @param iRegion The region number.
2842 * @param cbRegion Size of the region.
2843 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2844 * @param pfnCallback Callback for doing the mapping.
2845 */
2846 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2847
2848 /**
2849 * Register PCI configuration space read/write callbacks.
2850 *
2851 * @param pDevIns The device instance.
2852 * @param pPciDev The PCI device structure.
2853 * If NULL the default PCI device for this device instance is used.
2854 * @param pfnRead Pointer to the user defined PCI config read function.
2855 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2856 * PCI config read function. This way, user can decide when (and if)
2857 * to call default PCI config read function. Can be NULL.
2858 * @param pfnWrite Pointer to the user defined PCI config write function.
2859 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2860 * PCI config write function. This way, user can decide when (and if)
2861 * to call default PCI config write function. Can be NULL.
2862 * @thread EMT
2863 */
2864 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2865 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2866
2867 /**
2868 * Set the IRQ for a PCI device.
2869 *
2870 * @param pDevIns The device instance.
2871 * @param iIrq IRQ number to set.
2872 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2873 * @thread Any thread, but will involve the emulation thread.
2874 */
2875 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2876
2877 /**
2878 * Set the IRQ for a PCI device, but don't wait for EMT to process
2879 * the request when not called from EMT.
2880 *
2881 * @param pDevIns The device instance.
2882 * @param iIrq IRQ number to set.
2883 * @param iLevel IRQ level.
2884 * @thread Any thread, but will involve the emulation thread.
2885 */
2886 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2887
2888 /**
2889 * Set ISA IRQ for a device.
2890 *
2891 * @param pDevIns The device instance.
2892 * @param iIrq IRQ number to set.
2893 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2894 * @thread Any thread, but will involve the emulation thread.
2895 */
2896 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2897
2898 /**
2899 * Set the ISA IRQ for a device, but don't wait for EMT to process
2900 * the request when not called from EMT.
2901 *
2902 * @param pDevIns The device instance.
2903 * @param iIrq IRQ number to set.
2904 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2905 * @thread Any thread, but will involve the emulation thread.
2906 */
2907 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2908
2909 /**
2910 * Attaches a driver (chain) to the device.
2911 *
2912 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2913 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2914 *
2915 * @returns VBox status code.
2916 * @param pDevIns The device instance.
2917 * @param iLun The logical unit to attach.
2918 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2919 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2920 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2921 * for the live of the device instance.
2922 */
2923 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2924
2925 /**
2926 * Create a queue.
2927 *
2928 * @returns VBox status code.
2929 * @param pDevIns The device instance.
2930 * @param cbItem The size of a queue item.
2931 * @param cItems The number of items in the queue.
2932 * @param cMilliesInterval The number of milliseconds between polling the queue.
2933 * If 0 then the emulation thread will be notified whenever an item arrives.
2934 * @param pfnCallback The consumer function.
2935 * @param fRZEnabled Set if the queue should work in RC and R0.
2936 * @param pszName The queue base name. The instance number will be
2937 * appended automatically.
2938 * @param ppQueue Where to store the queue handle on success.
2939 * @thread The emulation thread.
2940 */
2941 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2942 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2943
2944 /**
2945 * Initializes a PDM critical section.
2946 *
2947 * The PDM critical sections are derived from the IPRT critical sections, but
2948 * works in RC and R0 as well.
2949 *
2950 * @returns VBox status code.
2951 * @param pDevIns The device instance.
2952 * @param pCritSect Pointer to the critical section.
2953 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2954 * @param pszNameFmt Format string for naming the critical section.
2955 * For statistics and lock validation.
2956 * @param va Arguments for the format string.
2957 */
2958 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2959 const char *pszNameFmt, va_list va));
2960
2961 /**
2962 * Gets the NOP critical section.
2963 *
2964 * @returns The ring-3 address of the NOP critical section.
2965 * @param pDevIns The device instance.
2966 */
2967 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
2968
2969 /**
2970 * Gets the NOP critical section.
2971 *
2972 * @returns The ring-0 address of the NOP critical section.
2973 * @param pDevIns The device instance.
2974 */
2975 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
2976
2977 /**
2978 * Gets the NOP critical section.
2979 *
2980 * @returns The raw-mode context address of the NOP critical section.
2981 * @param pDevIns The device instance.
2982 */
2983 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
2984
2985 /**
2986 * Changes the device level critical section from the automatically created
2987 * default to one desired by the device constructor.
2988 *
2989 * @returns VBox status code.
2990 * @param pDevIns The device instance.
2991 * @param pCritSect The critical section to use. NULL is not
2992 * valid, instead use the NOP critical
2993 * section.
2994 */
2995 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
2996
2997 /**
2998 * Creates a PDM thread.
2999 *
3000 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3001 * resuming, and destroying the thread as the VM state changes.
3002 *
3003 * @returns VBox status code.
3004 * @param pDevIns The device instance.
3005 * @param ppThread Where to store the thread 'handle'.
3006 * @param pvUser The user argument to the thread function.
3007 * @param pfnThread The thread function.
3008 * @param pfnWakeup The wakup callback. This is called on the EMT
3009 * thread when a state change is pending.
3010 * @param cbStack See RTThreadCreate.
3011 * @param enmType See RTThreadCreate.
3012 * @param pszName See RTThreadCreate.
3013 */
3014 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3015 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3016
3017 /**
3018 * Set up asynchronous handling of a suspend, reset or power off notification.
3019 *
3020 * This shall only be called when getting the notification. It must be called
3021 * for each one.
3022 *
3023 * @returns VBox status code.
3024 * @param pDevIns The device instance.
3025 * @param pfnAsyncNotify The callback.
3026 * @thread EMT(0)
3027 */
3028 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3029
3030 /**
3031 * Notify EMT(0) that the device has completed the asynchronous notification
3032 * handling.
3033 *
3034 * This can be called at any time, spurious calls will simply be ignored.
3035 *
3036 * @param pDevIns The device instance.
3037 * @thread Any
3038 */
3039 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3040
3041 /**
3042 * Register the RTC device.
3043 *
3044 * @returns VBox status code.
3045 * @param pDevIns The device instance.
3046 * @param pRtcReg Pointer to a RTC registration structure.
3047 * @param ppRtcHlp Where to store the pointer to the helper
3048 * functions.
3049 */
3050 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3051
3052 /**
3053 * Register the PCI Bus.
3054 *
3055 * @returns VBox status code.
3056 * @param pDevIns The device instance.
3057 * @param pPciBusReg Pointer to PCI bus registration structure.
3058 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3059 * helpers.
3060 */
3061 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3062
3063 /**
3064 * Register the PIC device.
3065 *
3066 * @returns VBox status code.
3067 * @param pDevIns The device instance.
3068 * @param pPicReg Pointer to a PIC registration structure.
3069 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3070 * helpers.
3071 */
3072 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3073
3074 /**
3075 * Register the APIC device.
3076 *
3077 * @returns VBox status code.
3078 * @param pDevIns The device instance.
3079 * @param pApicReg Pointer to a APIC registration structure.
3080 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3081 */
3082 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3083
3084 /**
3085 * Register the I/O APIC device.
3086 *
3087 * @returns VBox status code.
3088 * @param pDevIns The device instance.
3089 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3090 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3091 * helpers.
3092 */
3093 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3094
3095 /**
3096 * Register the HPET device.
3097 *
3098 * @returns VBox status code.
3099 * @param pDevIns The device instance.
3100 * @param pHpetReg Pointer to a HPET registration structure.
3101 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3102 * helpers.
3103 */
3104 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3105
3106 /**
3107 * Register a raw PCI device.
3108 *
3109 * @returns VBox status code.
3110 * @param pDevIns The device instance.
3111 * @param pHpetReg Pointer to a raw PCI registration structure.
3112 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3113 * device helpers.
3114 */
3115 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3116
3117 /**
3118 * Register the DMA device.
3119 *
3120 * @returns VBox status code.
3121 * @param pDevIns The device instance.
3122 * @param pDmacReg Pointer to a DMAC registration structure.
3123 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3124 */
3125 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3126
3127 /**
3128 * Register transfer function for DMA channel.
3129 *
3130 * @returns VBox status code.
3131 * @param pDevIns The device instance.
3132 * @param uChannel Channel number.
3133 * @param pfnTransferHandler Device specific transfer callback function.
3134 * @param pvUser User pointer to pass to the callback.
3135 * @thread EMT
3136 */
3137 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3138
3139 /**
3140 * Read memory.
3141 *
3142 * @returns VBox status code.
3143 * @param pDevIns The device instance.
3144 * @param uChannel Channel number.
3145 * @param pvBuffer Pointer to target buffer.
3146 * @param off DMA position.
3147 * @param cbBlock Block size.
3148 * @param pcbRead Where to store the number of bytes which was
3149 * read. optional.
3150 * @thread EMT
3151 */
3152 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3153
3154 /**
3155 * Write memory.
3156 *
3157 * @returns VBox status code.
3158 * @param pDevIns The device instance.
3159 * @param uChannel Channel number.
3160 * @param pvBuffer Memory to write.
3161 * @param off DMA position.
3162 * @param cbBlock Block size.
3163 * @param pcbWritten Where to store the number of bytes which was
3164 * written. optional.
3165 * @thread EMT
3166 */
3167 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3168
3169 /**
3170 * Set the DREQ line.
3171 *
3172 * @returns VBox status code.
3173 * @param pDevIns Device instance.
3174 * @param uChannel Channel number.
3175 * @param uLevel Level of the line.
3176 * @thread EMT
3177 */
3178 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3179
3180 /**
3181 * Get channel mode.
3182 *
3183 * @returns Channel mode. See specs.
3184 * @param pDevIns The device instance.
3185 * @param uChannel Channel number.
3186 * @thread EMT
3187 */
3188 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3189
3190 /**
3191 * Schedule DMA execution.
3192 *
3193 * @param pDevIns The device instance.
3194 * @thread Any thread.
3195 */
3196 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3197
3198 /**
3199 * Write CMOS value and update the checksum(s).
3200 *
3201 * @returns VBox status code.
3202 * @param pDevIns The device instance.
3203 * @param iReg The CMOS register index.
3204 * @param u8Value The CMOS register value.
3205 * @thread EMT
3206 */
3207 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3208
3209 /**
3210 * Read CMOS value.
3211 *
3212 * @returns VBox status code.
3213 * @param pDevIns The device instance.
3214 * @param iReg The CMOS register index.
3215 * @param pu8Value Where to store the CMOS register value.
3216 * @thread EMT
3217 */
3218 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3219
3220 /**
3221 * Assert that the current thread is the emulation thread.
3222 *
3223 * @returns True if correct.
3224 * @returns False if wrong.
3225 * @param pDevIns The device instance.
3226 * @param pszFile Filename of the assertion location.
3227 * @param iLine The linenumber of the assertion location.
3228 * @param pszFunction Function of the assertion location.
3229 */
3230 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3231
3232 /**
3233 * Assert that the current thread is NOT the emulation thread.
3234 *
3235 * @returns True if correct.
3236 * @returns False if wrong.
3237 * @param pDevIns The device instance.
3238 * @param pszFile Filename of the assertion location.
3239 * @param iLine The linenumber of the assertion location.
3240 * @param pszFunction Function of the assertion location.
3241 */
3242 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3243
3244 /**
3245 * Resolves the symbol for a raw-mode context interface.
3246 *
3247 * @returns VBox status code.
3248 * @param pDevIns The device instance.
3249 * @param pvInterface The interface structure.
3250 * @param cbInterface The size of the interface structure.
3251 * @param pszSymPrefix What to prefix the symbols in the list with
3252 * before resolving them. This must start with
3253 * 'dev' and contain the driver name.
3254 * @param pszSymList List of symbols corresponding to the interface.
3255 * There is generally a there is generally a define
3256 * holding this list associated with the interface
3257 * definition (INTERFACE_SYM_LIST). For more
3258 * details see PDMR3LdrGetInterfaceSymbols.
3259 * @thread EMT
3260 */
3261 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3262 const char *pszSymPrefix, const char *pszSymList));
3263
3264 /**
3265 * Resolves the symbol for a ring-0 context interface.
3266 *
3267 * @returns VBox status code.
3268 * @param pDevIns The device instance.
3269 * @param pvInterface The interface structure.
3270 * @param cbInterface The size of the interface structure.
3271 * @param pszSymPrefix What to prefix the symbols in the list with
3272 * before resolving them. This must start with
3273 * 'dev' and contain the driver name.
3274 * @param pszSymList List of symbols corresponding to the interface.
3275 * There is generally a there is generally a define
3276 * holding this list associated with the interface
3277 * definition (INTERFACE_SYM_LIST). For more
3278 * details see PDMR3LdrGetInterfaceSymbols.
3279 * @thread EMT
3280 */
3281 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3282 const char *pszSymPrefix, const char *pszSymList));
3283
3284 /**
3285 * Call the ring-0 request handler routine of the device.
3286 *
3287 * For this to work, the device must be ring-0 enabled and export a request
3288 * handler function. The name of the function must be the device name in
3289 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3290 * 'ReqHandler'. The device name will be captialized. It shall take the
3291 * exact same arguments as this function and be declared using
3292 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3293 *
3294 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3295 * or two as the handler address will be resolved on each invocation. This
3296 * is the reason for the EMT only restriction as well.
3297 *
3298 * @returns VBox status code.
3299 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3300 * handler function.
3301 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3302 *
3303 * @param pDevIns The device instance.
3304 * @param uOperation The operation to perform.
3305 * @param u64Arg 64-bit integer argument.
3306 * @thread EMT
3307 */
3308 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3309
3310 /** Space reserved for future members.
3311 * @{ */
3312 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3313 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3314 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3315 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3316 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3317 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3318 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3319 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3320 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3321 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3322 /** @} */
3323
3324
3325 /** API available to trusted devices only.
3326 *
3327 * These APIs are providing unrestricted access to the guest and the VM,
3328 * or they are interacting intimately with PDM.
3329 *
3330 * @{
3331 */
3332 /**
3333 * Gets the VM handle. Restricted API.
3334 *
3335 * @returns VM Handle.
3336 * @param pDevIns The device instance.
3337 */
3338 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3339
3340 /**
3341 * Gets the VMCPU handle. Restricted API.
3342 *
3343 * @returns VMCPU Handle.
3344 * @param pDevIns The device instance.
3345 */
3346 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3347
3348 /**
3349 * Registers the VMM device heap
3350 *
3351 * @returns VBox status code.
3352 * @param pDevIns The device instance.
3353 * @param GCPhys The physical address.
3354 * @param pvHeap Ring 3 heap pointer.
3355 * @param cbSize Size of the heap.
3356 * @thread EMT.
3357 */
3358 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3359
3360 /**
3361 * Unregisters the VMM device heap
3362 *
3363 * @returns VBox status code.
3364 * @param pDevIns The device instance.
3365 * @param GCPhys The physical address.
3366 * @thread EMT.
3367 */
3368 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3369
3370 /**
3371 * Resets the VM.
3372 *
3373 * @returns The appropriate VBox status code to pass around on reset.
3374 * @param pDevIns The device instance.
3375 * @thread The emulation thread.
3376 */
3377 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3378
3379 /**
3380 * Suspends the VM.
3381 *
3382 * @returns The appropriate VBox status code to pass around on suspend.
3383 * @param pDevIns The device instance.
3384 * @thread The emulation thread.
3385 */
3386 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3387
3388 /**
3389 * Suspends, saves and powers off the VM.
3390 *
3391 * @returns The appropriate VBox status code to pass around.
3392 * @param pDevIns The device instance.
3393 * @thread An emulation thread.
3394 */
3395 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3396
3397 /**
3398 * Power off the VM.
3399 *
3400 * @returns The appropriate VBox status code to pass around on power off.
3401 * @param pDevIns The device instance.
3402 * @thread The emulation thread.
3403 */
3404 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3405
3406 /**
3407 * Checks if the Gate A20 is enabled or not.
3408 *
3409 * @returns true if A20 is enabled.
3410 * @returns false if A20 is disabled.
3411 * @param pDevIns The device instance.
3412 * @thread The emulation thread.
3413 */
3414 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3415
3416 /**
3417 * Enables or disables the Gate A20.
3418 *
3419 * @param pDevIns The device instance.
3420 * @param fEnable Set this flag to enable the Gate A20; clear it
3421 * to disable.
3422 * @thread The emulation thread.
3423 */
3424 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3425
3426 /**
3427 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3428 * thread.
3429 *
3430 * @param pDevIns The device instance.
3431 * @param iLeaf The CPUID leaf to get.
3432 * @param pEax Where to store the EAX value.
3433 * @param pEbx Where to store the EBX value.
3434 * @param pEcx Where to store the ECX value.
3435 * @param pEdx Where to store the EDX value.
3436 * @thread EMT.
3437 */
3438 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3439
3440 /**
3441 * Get the current virtual clock time in a VM. The clock frequency must be
3442 * queried separately.
3443 *
3444 * @returns Current clock time.
3445 * @param pDevIns The device instance.
3446 */
3447 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3448
3449 /**
3450 * Get the frequency of the virtual clock.
3451 *
3452 * @returns The clock frequency (not variable at run-time).
3453 * @param pDevIns The device instance.
3454 */
3455 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3456
3457 /**
3458 * Get the current virtual clock time in a VM, in nanoseconds.
3459 *
3460 * @returns Current clock time (in ns).
3461 * @param pDevIns The device instance.
3462 */
3463 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3464
3465 /** @} */
3466
3467 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3468 uint32_t u32TheEnd;
3469} PDMDEVHLPR3;
3470#endif /* !IN_RING3 */
3471/** Pointer to the R3 PDM Device API. */
3472typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3473/** Pointer to the R3 PDM Device API, const variant. */
3474typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3475
3476/** Current PDMDEVHLPR3 version number. */
3477#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 7, 0)
3478
3479
3480/**
3481 * PDM Device API - RC Variant.
3482 */
3483typedef struct PDMDEVHLPRC
3484{
3485 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3486 uint32_t u32Version;
3487
3488 /**
3489 * Set the IRQ for a PCI device.
3490 *
3491 * @param pDevIns Device instance.
3492 * @param iIrq IRQ number to set.
3493 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3494 * @thread Any thread, but will involve the emulation thread.
3495 */
3496 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3497
3498 /**
3499 * Set ISA IRQ for a device.
3500 *
3501 * @param pDevIns Device instance.
3502 * @param iIrq IRQ number to set.
3503 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3504 * @thread Any thread, but will involve the emulation thread.
3505 */
3506 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3507
3508 /**
3509 * Read physical memory.
3510 *
3511 * @returns VINF_SUCCESS (for now).
3512 * @param pDevIns Device instance.
3513 * @param GCPhys Physical address start reading from.
3514 * @param pvBuf Where to put the read bits.
3515 * @param cbRead How many bytes to read.
3516 */
3517 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3518
3519 /**
3520 * Write to physical memory.
3521 *
3522 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3523 * @param pDevIns Device instance.
3524 * @param GCPhys Physical address to write to.
3525 * @param pvBuf What to write.
3526 * @param cbWrite How many bytes to write.
3527 */
3528 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3529
3530 /**
3531 * Checks if the Gate A20 is enabled or not.
3532 *
3533 * @returns true if A20 is enabled.
3534 * @returns false if A20 is disabled.
3535 * @param pDevIns Device instance.
3536 * @thread The emulation thread.
3537 */
3538 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3539
3540 /**
3541 * Gets the VM state.
3542 *
3543 * @returns VM state.
3544 * @param pDevIns The device instance.
3545 * @thread Any thread (just keep in mind that it's volatile info).
3546 */
3547 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3548
3549 /**
3550 * Set the VM error message
3551 *
3552 * @returns rc.
3553 * @param pDrvIns Driver instance.
3554 * @param rc VBox status code.
3555 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3556 * @param pszFormat Error message format string.
3557 * @param ... Error message arguments.
3558 */
3559 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3560
3561 /**
3562 * Set the VM error message
3563 *
3564 * @returns rc.
3565 * @param pDrvIns Driver instance.
3566 * @param rc VBox status code.
3567 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3568 * @param pszFormat Error message format string.
3569 * @param va Error message arguments.
3570 */
3571 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3572
3573 /**
3574 * Set the VM runtime error message
3575 *
3576 * @returns VBox status code.
3577 * @param pDevIns Device instance.
3578 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3579 * @param pszErrorId Error ID string.
3580 * @param pszFormat Error message format string.
3581 * @param ... Error message arguments.
3582 */
3583 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3584
3585 /**
3586 * Set the VM runtime error message
3587 *
3588 * @returns VBox status code.
3589 * @param pDevIns Device instance.
3590 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3591 * @param pszErrorId Error ID string.
3592 * @param pszFormat Error message format string.
3593 * @param va Error message arguments.
3594 */
3595 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3596
3597 /**
3598 * Set parameters for pending MMIO patch operation
3599 *
3600 * @returns VBox status code.
3601 * @param pDevIns Device instance.
3602 * @param GCPhys MMIO physical address
3603 * @param pCachedData GC pointer to cached data
3604 */
3605 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3606
3607 /**
3608 * Gets the VM handle. Restricted API.
3609 *
3610 * @returns VM Handle.
3611 * @param pDevIns Device instance.
3612 */
3613 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3614
3615 /**
3616 * Gets the VMCPU handle. Restricted API.
3617 *
3618 * @returns VMCPU Handle.
3619 * @param pDevIns The device instance.
3620 */
3621 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3622
3623 /**
3624 * Get the current virtual clock time in a VM. The clock frequency must be
3625 * queried separately.
3626 *
3627 * @returns Current clock time.
3628 * @param pDevIns The device instance.
3629 */
3630 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3631
3632 /**
3633 * Get the frequency of the virtual clock.
3634 *
3635 * @returns The clock frequency (not variable at run-time).
3636 * @param pDevIns The device instance.
3637 */
3638 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3639
3640 /**
3641 * Get the current virtual clock time in a VM, in nanoseconds.
3642 *
3643 * @returns Current clock time (in ns).
3644 * @param pDevIns The device instance.
3645 */
3646 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3647
3648 /**
3649 * Gets the trace buffer handle.
3650 *
3651 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3652 * really inteded for direct usage, thus no inline wrapper function.
3653 *
3654 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3655 * @param pDevIns The device instance.
3656 */
3657 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3658
3659 /** Just a safety precaution. */
3660 uint32_t u32TheEnd;
3661} PDMDEVHLPRC;
3662/** Pointer PDM Device RC API. */
3663typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3664/** Pointer PDM Device RC API. */
3665typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3666
3667/** Current PDMDEVHLP version number. */
3668#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 2, 0)
3669
3670
3671/**
3672 * PDM Device API - R0 Variant.
3673 */
3674typedef struct PDMDEVHLPR0
3675{
3676 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3677 uint32_t u32Version;
3678
3679 /**
3680 * Set the IRQ for a PCI device.
3681 *
3682 * @param pDevIns Device instance.
3683 * @param iIrq IRQ number to set.
3684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3685 * @thread Any thread, but will involve the emulation thread.
3686 */
3687 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3688
3689 /**
3690 * Set ISA IRQ for a device.
3691 *
3692 * @param pDevIns Device instance.
3693 * @param iIrq IRQ number to set.
3694 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3695 * @thread Any thread, but will involve the emulation thread.
3696 */
3697 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3698
3699 /**
3700 * Read physical memory.
3701 *
3702 * @returns VINF_SUCCESS (for now).
3703 * @param pDevIns Device instance.
3704 * @param GCPhys Physical address start reading from.
3705 * @param pvBuf Where to put the read bits.
3706 * @param cbRead How many bytes to read.
3707 */
3708 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3709
3710 /**
3711 * Write to physical memory.
3712 *
3713 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3714 * @param pDevIns Device instance.
3715 * @param GCPhys Physical address to write to.
3716 * @param pvBuf What to write.
3717 * @param cbWrite How many bytes to write.
3718 */
3719 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3720
3721 /**
3722 * Checks if the Gate A20 is enabled or not.
3723 *
3724 * @returns true if A20 is enabled.
3725 * @returns false if A20 is disabled.
3726 * @param pDevIns Device instance.
3727 * @thread The emulation thread.
3728 */
3729 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3730
3731 /**
3732 * Gets the VM state.
3733 *
3734 * @returns VM state.
3735 * @param pDevIns The device instance.
3736 * @thread Any thread (just keep in mind that it's volatile info).
3737 */
3738 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3739
3740 /**
3741 * Set the VM error message
3742 *
3743 * @returns rc.
3744 * @param pDrvIns Driver instance.
3745 * @param rc VBox status code.
3746 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3747 * @param pszFormat Error message format string.
3748 * @param ... Error message arguments.
3749 */
3750 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3751
3752 /**
3753 * Set the VM error message
3754 *
3755 * @returns rc.
3756 * @param pDrvIns Driver instance.
3757 * @param rc VBox status code.
3758 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3759 * @param pszFormat Error message format string.
3760 * @param va Error message arguments.
3761 */
3762 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3763
3764 /**
3765 * Set the VM runtime error message
3766 *
3767 * @returns VBox status code.
3768 * @param pDevIns Device instance.
3769 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3770 * @param pszErrorId Error ID string.
3771 * @param pszFormat Error message format string.
3772 * @param ... Error message arguments.
3773 */
3774 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3775
3776 /**
3777 * Set the VM runtime error message
3778 *
3779 * @returns VBox status code.
3780 * @param pDevIns Device instance.
3781 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3782 * @param pszErrorId Error ID string.
3783 * @param pszFormat Error message format string.
3784 * @param va Error message arguments.
3785 */
3786 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3787
3788 /**
3789 * Set parameters for pending MMIO patch operation
3790 *
3791 * @returns rc.
3792 * @param pDevIns Device instance.
3793 * @param GCPhys MMIO physical address
3794 * @param pCachedData GC pointer to cached data
3795 */
3796 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3797
3798 /**
3799 * Gets the VM handle. Restricted API.
3800 *
3801 * @returns VM Handle.
3802 * @param pDevIns Device instance.
3803 */
3804 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3805
3806 /**
3807 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3808 *
3809 * @returns true = yes, false = no
3810 * @param pDevIns Device instance.
3811 */
3812 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3813
3814 /**
3815 * Gets the VMCPU handle. Restricted API.
3816 *
3817 * @returns VMCPU Handle.
3818 * @param pDevIns The device instance.
3819 */
3820 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3821
3822 /**
3823 * Get the current virtual clock time in a VM. The clock frequency must be
3824 * queried separately.
3825 *
3826 * @returns Current clock time.
3827 * @param pDevIns The device instance.
3828 */
3829 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3830
3831 /**
3832 * Get the frequency of the virtual clock.
3833 *
3834 * @returns The clock frequency (not variable at run-time).
3835 * @param pDevIns The device instance.
3836 */
3837 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3838
3839 /**
3840 * Get the current virtual clock time in a VM, in nanoseconds.
3841 *
3842 * @returns Current clock time (in ns).
3843 * @param pDevIns The device instance.
3844 */
3845 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3846
3847 /**
3848 * Gets the trace buffer handle.
3849 *
3850 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3851 * really inteded for direct usage, thus no inline wrapper function.
3852 *
3853 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3854 * @param pDevIns The device instance.
3855 */
3856 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3857
3858 /** Just a safety precaution. */
3859 uint32_t u32TheEnd;
3860} PDMDEVHLPR0;
3861/** Pointer PDM Device R0 API. */
3862typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3863/** Pointer PDM Device GC API. */
3864typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3865
3866/** Current PDMDEVHLP version number. */
3867#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 2, 0)
3868
3869
3870
3871/**
3872 * PDM Device Instance.
3873 */
3874typedef struct PDMDEVINS
3875{
3876 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3877 uint32_t u32Version;
3878 /** Device instance number. */
3879 uint32_t iInstance;
3880
3881 /** Pointer the GC PDM Device API. */
3882 PCPDMDEVHLPRC pHlpRC;
3883 /** Pointer to device instance data. */
3884 RTRCPTR pvInstanceDataRC;
3885 /** The critical section for the device, see pCritSectXR3. */
3886 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
3887 /** Alignment padding. */
3888 RTRCPTR pAlignmentRC;
3889
3890 /** Pointer the R0 PDM Device API. */
3891 PCPDMDEVHLPR0 pHlpR0;
3892 /** Pointer to device instance data (R0). */
3893 RTR0PTR pvInstanceDataR0;
3894 /** The critical section for the device, see pCritSectXR3. */
3895 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
3896
3897 /** Pointer the HC PDM Device API. */
3898 PCPDMDEVHLPR3 pHlpR3;
3899 /** Pointer to device instance data. */
3900 RTR3PTR pvInstanceDataR3;
3901 /** The critical section for the device.
3902 *
3903 * TM and IOM will enter this critical section before calling into the device
3904 * code. PDM will when doing power on, power off, reset, suspend and resume
3905 * notifications. SSM will currently not, but this will be changed later on.
3906 *
3907 * The device gets a critical section automatically assigned to it before
3908 * the constructor is called. If the constructor wishes to use a different
3909 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
3910 * very early on.
3911 */
3912 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
3913
3914 /** Pointer to device registration structure. */
3915 R3PTRTYPE(PCPDMDEVREG) pReg;
3916 /** Configuration handle. */
3917 R3PTRTYPE(PCFGMNODE) pCfg;
3918
3919 /** The base interface of the device.
3920 *
3921 * The device constructor initializes this if it has any
3922 * device level interfaces to export. To obtain this interface
3923 * call PDMR3QueryDevice(). */
3924 PDMIBASE IBase;
3925 /** Align the internal data more naturally. */
3926 RTR3PTR R3PtrPadding;
3927
3928 /** Internal data. */
3929 union
3930 {
3931#ifdef PDMDEVINSINT_DECLARED
3932 PDMDEVINSINT s;
3933#endif
3934 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3935 } Internal;
3936
3937 /** Device instance data. The size of this area is defined
3938 * in the PDMDEVREG::cbInstanceData field. */
3939 char achInstanceData[8];
3940} PDMDEVINS;
3941
3942/** Current PDMDEVINS version number. */
3943#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3944
3945/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3946#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3947
3948/**
3949 * Checks the structure versions of the device instance and device helpers,
3950 * returning if they are incompatible.
3951 *
3952 * This is for use in the constructor.
3953 *
3954 * @param pDevIns The device instance pointer.
3955 */
3956#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3957 do \
3958 { \
3959 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3960 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3961 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3962 VERR_PDM_DEVINS_VERSION_MISMATCH); \
3963 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3964 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3965 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
3966 } while (0)
3967
3968/**
3969 * Quietly checks the structure versions of the device instance and device
3970 * helpers, returning if they are incompatible.
3971 *
3972 * This is for use in the destructor.
3973 *
3974 * @param pDevIns The device instance pointer.
3975 */
3976#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3977 do \
3978 { \
3979 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3980 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
3981 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
3982 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3983 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
3984 } while (0)
3985
3986/**
3987 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
3988 * constructor - returns on failure.
3989 *
3990 * This should be invoked after having initialized the instance data
3991 * sufficiently for the correct operation of the destructor. The destructor is
3992 * always called!
3993 *
3994 * @param pDevIns Pointer to the PDM device instance.
3995 * @param pszValidValues Patterns describing the valid value names. See
3996 * RTStrSimplePatternMultiMatch for details on the
3997 * pattern syntax.
3998 * @param pszValidNodes Patterns describing the valid node (key) names.
3999 * Pass empty string if no valid nodes.
4000 */
4001#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4002 do \
4003 { \
4004 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4005 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4006 if (RT_FAILURE(rcValCfg)) \
4007 return rcValCfg; \
4008 } while (0)
4009
4010/** @def PDMDEV_ASSERT_EMT
4011 * Assert that the current thread is the emulation thread.
4012 */
4013#ifdef VBOX_STRICT
4014# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4015#else
4016# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4017#endif
4018
4019/** @def PDMDEV_ASSERT_OTHER
4020 * Assert that the current thread is NOT the emulation thread.
4021 */
4022#ifdef VBOX_STRICT
4023# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4024#else
4025# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4026#endif
4027
4028/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4029 * Assert that the current thread is owner of the VM lock.
4030 */
4031#ifdef VBOX_STRICT
4032# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4033#else
4034# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4035#endif
4036
4037/** @def PDMDEV_SET_ERROR
4038 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4039 */
4040#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4041 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4042
4043/** @def PDMDEV_SET_RUNTIME_ERROR
4044 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4045 */
4046#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4047 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4048
4049/** @def PDMDEVINS_2_RCPTR
4050 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4051 */
4052#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4053
4054/** @def PDMDEVINS_2_R3PTR
4055 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4056 */
4057#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4058
4059/** @def PDMDEVINS_2_R0PTR
4060 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4061 */
4062#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4063
4064
4065#ifdef IN_RING3
4066
4067/**
4068 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4069 */
4070DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
4071 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4072 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4073{
4074 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4075}
4076
4077/**
4078 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4079 */
4080DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
4081 const char *pszOut, const char *pszIn, const char *pszOutStr,
4082 const char *pszInStr, const char *pszDesc)
4083{
4084 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4085}
4086
4087/**
4088 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4089 */
4090DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
4091 const char *pszOut, const char *pszIn, const char *pszOutStr,
4092 const char *pszInStr, const char *pszDesc)
4093{
4094 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4095}
4096
4097/**
4098 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4099 */
4100DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
4101{
4102 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4103}
4104
4105/**
4106 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4107 */
4108DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
4109 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
4110 const char *pszDesc)
4111{
4112 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
4113}
4114
4115/**
4116 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4117 */
4118DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
4119 const char *pszWrite, const char *pszRead, const char *pszFill)
4120{
4121 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
4122}
4123
4124/**
4125 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4126 */
4127DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
4128 const char *pszWrite, const char *pszRead, const char *pszFill)
4129{
4130 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
4131}
4132
4133/**
4134 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4135 */
4136DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
4137{
4138 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4139}
4140
4141/**
4142 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4143 */
4144DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4145{
4146 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4147}
4148
4149/**
4150 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4151 */
4152DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4153{
4154 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4155}
4156
4157/**
4158 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4159 */
4160DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4161{
4162 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4163}
4164
4165/**
4166 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4167 */
4168DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4169{
4170 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4171}
4172
4173/**
4174 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4175 */
4176DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4177 const char *pszDesc, PRTRCPTR pRCPtr)
4178{
4179 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4180}
4181
4182/**
4183 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4184 */
4185DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4186 const char *pszDesc, PRTR0PTR pR0Ptr)
4187{
4188 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4189}
4190
4191/**
4192 * @copydoc PDMDEVHLPR3::pfnROMRegister
4193 */
4194DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
4195 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4196{
4197 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4198}
4199
4200/**
4201 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4202 */
4203DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
4204{
4205 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4206}
4207
4208/**
4209 * Register a save state data unit.
4210 *
4211 * @returns VBox status.
4212 * @param pDevIns The device instance.
4213 * @param uVersion Data layout version number.
4214 * @param cbGuess The approximate amount of data in the unit.
4215 * Only for progress indicators.
4216 * @param pfnSaveExec Execute save callback, optional.
4217 * @param pfnLoadExec Execute load callback, optional.
4218 */
4219DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4220 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4221{
4222 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4223 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4224 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4225 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4226}
4227
4228/**
4229 * Register a save state data unit with a live save callback as well.
4230 *
4231 * @returns VBox status.
4232 * @param pDevIns The device instance.
4233 * @param uVersion Data layout version number.
4234 * @param cbGuess The approximate amount of data in the unit.
4235 * Only for progress indicators.
4236 * @param pfnLiveExec Execute live callback, optional.
4237 * @param pfnSaveExec Execute save callback, optional.
4238 * @param pfnLoadExec Execute load callback, optional.
4239 */
4240DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4241 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4242{
4243 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4244 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4245 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4246 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4247}
4248
4249/**
4250 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4251 */
4252DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4253 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4254 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4255 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4256{
4257 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4258 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4259 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4260 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4261}
4262
4263/**
4264 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4265 */
4266DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4267 const char *pszDesc, PPTMTIMERR3 ppTimer)
4268{
4269 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4270}
4271
4272/**
4273 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4274 */
4275DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4276{
4277 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4278}
4279
4280#endif /* IN_RING3 */
4281
4282/**
4283 * @copydoc PDMDEVHLPR3::pfnPhysRead
4284 */
4285DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4286{
4287 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4288}
4289
4290/**
4291 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4292 */
4293DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4294{
4295 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4296}
4297
4298#ifdef IN_RING3
4299
4300/**
4301 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4302 */
4303DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4304{
4305 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4306}
4307
4308/**
4309 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4310 */
4311DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4312{
4313 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4314}
4315
4316/**
4317 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4318 */
4319DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4320{
4321 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4322}
4323
4324/**
4325 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4326 */
4327DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4328{
4329 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4330}
4331
4332/**
4333 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4334 */
4335DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4336{
4337 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4338}
4339
4340/**
4341 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4342 */
4343DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4344{
4345 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4346}
4347
4348/**
4349 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4350 */
4351DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4352{
4353 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4354}
4355
4356/**
4357 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4358 */
4359DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4360{
4361 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4362}
4363
4364/**
4365 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4366 */
4367DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4368{
4369 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4370}
4371#endif /* IN_RING3 */
4372
4373/**
4374 * @copydoc PDMDEVHLPR3::pfnVMState
4375 */
4376DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4377{
4378 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4379}
4380
4381#ifdef IN_RING3
4382/**
4383 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4384 */
4385DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4386{
4387 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4388}
4389#endif /* IN_RING3 */
4390
4391/**
4392 * @copydoc PDMDEVHLPR3::pfnVMSetError
4393 */
4394DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4395{
4396 va_list va;
4397 va_start(va, pszFormat);
4398 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4399 va_end(va);
4400 return rc;
4401}
4402
4403/**
4404 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4405 */
4406DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4407{
4408 va_list va;
4409 int rc;
4410 va_start(va, pszFormat);
4411 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4412 va_end(va);
4413 return rc;
4414}
4415
4416/**
4417 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4418 *
4419 * @returns VBox status code which must be passed up to the VMM. This will be
4420 * VINF_SUCCESS in non-strict builds.
4421 * @param pDevIns The device instance.
4422 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4423 * @param pszFormat Message. (optional)
4424 * @param ... Message parameters.
4425 */
4426DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4427{
4428#ifdef VBOX_STRICT
4429# ifdef IN_RING3
4430 int rc;
4431 va_list args;
4432 va_start(args, pszFormat);
4433 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4434 va_end(args);
4435 return rc;
4436# else
4437 return VINF_EM_DBG_STOP;
4438# endif
4439#else
4440 NOREF(pDevIns);
4441 NOREF(pszFile);
4442 NOREF(iLine);
4443 NOREF(pszFunction);
4444 NOREF(pszFormat);
4445 return VINF_SUCCESS;
4446#endif
4447}
4448
4449#ifdef IN_RING3
4450
4451/**
4452 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4453 */
4454DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4455{
4456 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4457}
4458
4459/**
4460 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4461 */
4462DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4463{
4464 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4465}
4466
4467/**
4468 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4469 */
4470DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4471 const char *pszDesc, const char *pszName, ...)
4472{
4473 va_list va;
4474 va_start(va, pszName);
4475 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4476 va_end(va);
4477}
4478
4479/**
4480 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4481 */
4482DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4483{
4484 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4485}
4486
4487/**
4488 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4489 */
4490DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4491{
4492 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4493}
4494
4495/**
4496 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4497 */
4498DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4499{
4500 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4501}
4502
4503
4504/**
4505 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4506 */
4507DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4508 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4509{
4510 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4511}
4512
4513#endif /* IN_RING3 */
4514
4515/**
4516 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4517 */
4518DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4519{
4520 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4521}
4522
4523/**
4524 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4525 */
4526DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4527{
4528 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4529}
4530
4531/**
4532 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4533 */
4534DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4535{
4536 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4537}
4538
4539/**
4540 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4541 */
4542DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4543{
4544 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4545}
4546
4547#ifdef IN_RING3
4548
4549/**
4550 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4551 */
4552DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4553{
4554 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4555}
4556
4557/**
4558 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4559 */
4560DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4561 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4562{
4563 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4564}
4565
4566/**
4567 * Initializes a PDM critical section.
4568 *
4569 * The PDM critical sections are derived from the IPRT critical sections, but
4570 * works in RC and R0 as well.
4571 *
4572 * @returns VBox status code.
4573 * @param pDevIns The device instance.
4574 * @param pCritSect Pointer to the critical section.
4575 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4576 * @param pszNameFmt Format string for naming the critical section.
4577 * For statistics and lock validation.
4578 * @param ... Arguments for the format string.
4579 */
4580DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4581{
4582 int rc;
4583 va_list va;
4584 va_start(va, pszNameFmt);
4585 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4586 va_end(va);
4587 return rc;
4588}
4589
4590/**
4591 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4592 */
4593DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4594{
4595 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4596}
4597
4598/**
4599 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4600 */
4601DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4602{
4603 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4604}
4605
4606/**
4607 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4608 */
4609DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4610{
4611 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4612}
4613
4614/**
4615 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4616 */
4617DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4618{
4619 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4620}
4621
4622/**
4623 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4624 */
4625DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4626 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4627{
4628 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4629}
4630
4631/**
4632 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4633 */
4634DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4635{
4636 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4637}
4638
4639/**
4640 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4641 */
4642DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4643{
4644 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4645}
4646
4647/**
4648 * @copydoc PDMDEVHLPR3::pfnA20Set
4649 */
4650DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4651{
4652 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4653}
4654
4655/**
4656 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4657 */
4658DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4659{
4660 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4661}
4662
4663/**
4664 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4665 */
4666DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4667{
4668 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4669}
4670
4671/**
4672 * @copydoc PDMDEVHLPR3::pfnPICRegister
4673 */
4674DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4675{
4676 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4677}
4678
4679/**
4680 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4681 */
4682DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4683{
4684 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4685}
4686
4687/**
4688 * @copydoc PDMDEVHLPR3::pfn
4689 */
4690DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4691{
4692 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4693}
4694
4695/**
4696 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4697 */
4698DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4699{
4700 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4701}
4702
4703/**
4704 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4705 */
4706DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
4707{
4708 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
4709}
4710
4711/**
4712 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4713 */
4714DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4715{
4716 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4717}
4718
4719/**
4720 * @copydoc PDMDEVHLPR3::pfnDMARegister
4721 */
4722DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4723{
4724 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4725}
4726
4727/**
4728 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4729 */
4730DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4731{
4732 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4733}
4734
4735/**
4736 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4737 */
4738DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4739{
4740 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4741}
4742
4743/**
4744 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4745 */
4746DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4747{
4748 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4749}
4750
4751/**
4752 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4753 */
4754DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4755{
4756 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4757}
4758
4759/**
4760 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4761 */
4762DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4763{
4764 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4765}
4766
4767/**
4768 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4769 */
4770DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4771{
4772 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4773}
4774
4775/**
4776 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4777 */
4778DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4779{
4780 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4781}
4782
4783/**
4784 * @copydoc PDMDEVHLP::pfnCallR0
4785 */
4786DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4787{
4788 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4789}
4790
4791#endif /* IN_RING3 */
4792
4793/**
4794 * @copydoc PDMDEVHLPR3::pfnGetVM
4795 */
4796DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4797{
4798 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4799}
4800
4801/**
4802 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4803 */
4804DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4805{
4806 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4807}
4808
4809/**
4810 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
4811 */
4812DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
4813{
4814 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
4815}
4816
4817/**
4818 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
4819 */
4820DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
4821{
4822 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
4823}
4824
4825/**
4826 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
4827 */
4828DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
4829{
4830 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
4831}
4832
4833#ifdef IN_RING3
4834
4835/**
4836 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4837 */
4838DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4839{
4840 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4841}
4842
4843/**
4844 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4845 */
4846DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4847{
4848 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4849}
4850
4851/**
4852 * @copydoc PDMDEVHLPR3::pfnVMReset
4853 */
4854DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4855{
4856 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4857}
4858
4859/**
4860 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4861 */
4862DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4863{
4864 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4865}
4866
4867/**
4868 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
4869 */
4870DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
4871{
4872 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
4873}
4874
4875/**
4876 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4877 */
4878DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4879{
4880 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4881}
4882
4883#endif /* IN_RING3 */
4884
4885/**
4886 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4887 */
4888DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4889{
4890 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4891}
4892
4893#ifdef IN_RING3
4894
4895/**
4896 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4897 */
4898DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4899{
4900 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4901}
4902
4903#endif /* IN_RING3 */
4904#ifdef IN_RING0
4905
4906/**
4907 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4908 */
4909DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4910{
4911 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4912}
4913
4914#endif /* IN_RING0 */
4915
4916
4917
4918
4919/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4920typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4921
4922/**
4923 * Callbacks for VBoxDeviceRegister().
4924 */
4925typedef struct PDMDEVREGCB
4926{
4927 /** Interface version.
4928 * This is set to PDM_DEVREG_CB_VERSION. */
4929 uint32_t u32Version;
4930
4931 /**
4932 * Registers a device with the current VM instance.
4933 *
4934 * @returns VBox status code.
4935 * @param pCallbacks Pointer to the callback table.
4936 * @param pReg Pointer to the device registration record.
4937 * This data must be permanent and readonly.
4938 */
4939 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4940} PDMDEVREGCB;
4941
4942/** Current version of the PDMDEVREGCB structure. */
4943#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4944
4945
4946/**
4947 * The VBoxDevicesRegister callback function.
4948 *
4949 * PDM will invoke this function after loading a device module and letting
4950 * the module decide which devices to register and how to handle conflicts.
4951 *
4952 * @returns VBox status code.
4953 * @param pCallbacks Pointer to the callback table.
4954 * @param u32Version VBox version number.
4955 */
4956typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4957
4958/** @} */
4959
4960RT_C_DECLS_END
4961
4962#endif
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