VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 45681

Last change on this file since 45681 was 45645, checked in by vboxsync, 12 years ago

VMM/PDMDevHlp: Add helper to get the SUPDrv session handle (intended for the semaphore API)

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDrvIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is only called when the VMR3PowerOff call is made on a running VM. This
164 * means that there is no notification if the VM was suspended before being
165 * powered off. There will also be no callback when hot plugging devices.
166 *
167 * @param pDevIns The device instance data.
168 * @thread EMT(0)
169 *
170 * @remarks Caller enters the device critical section.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
189 *
190 * @remarks Caller enters the device critical section.
191 */
192typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
193/** Pointer to a FNPDMDEVATTACH() function. */
194typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
195
196/**
197 * Detach notification.
198 *
199 * This is called when a driver is detaching itself from a LUN of the device.
200 * The device should adjust it's state to reflect this.
201 *
202 * This is like unplugging the network cable to use it for the laptop or
203 * something while the PC is still running.
204 *
205 * @param pDevIns The device instance.
206 * @param iLUN The logical unit which is being detached.
207 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
208 *
209 * @remarks Caller enters the device critical section.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 *
223 * @remarks The device critical section is not entered.
224 */
225typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
226/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
227typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
228
229/**
230 * Init complete notification.
231 * This can be done to do communication with other devices and other
232 * initialization which requires everything to be in place.
233 *
234 * @returns VBOX status code.
235 * @param pDevIns The device instance.
236 *
237 * @remarks Caller enters the device critical section.
238 */
239typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
240/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
241typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
242
243
244/**
245 * The context of a pfnMemSetup call.
246 */
247typedef enum PDMDEVMEMSETUPCTX
248{
249 /** Invalid zero value. */
250 PDMDEVMEMSETUPCTX_INVALID = 0,
251 /** After construction. */
252 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
253 /** After reset. */
254 PDMDEVMEMSETUPCTX_AFTER_RESET,
255 /** Type size hack. */
256 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
257} PDMDEVMEMSETUPCTX;
258
259
260/**
261 * PDM Device Registration Structure.
262 *
263 * This structure is used when registering a device from VBoxInitDevices() in HC
264 * Ring-3. PDM will continue use till the VM is terminated.
265 */
266typedef struct PDMDEVREG
267{
268 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
269 uint32_t u32Version;
270 /** Device name. */
271 char szName[32];
272 /** Name of the raw-mode context module (no path).
273 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
274 char szRCMod[32];
275 /** Name of the ring-0 module (no path).
276 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
277 char szR0Mod[32];
278 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
279 * remain unchanged from registration till VM destruction. */
280 const char *pszDescription;
281
282 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
283 uint32_t fFlags;
284 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
285 uint32_t fClass;
286 /** Maximum number of instances (per VM). */
287 uint32_t cMaxInstances;
288 /** Size of the instance data. */
289 uint32_t cbInstance;
290
291 /** Construct instance - required. */
292 PFNPDMDEVCONSTRUCT pfnConstruct;
293 /** Destruct instance - optional.
294 * Critical section NOT entered (will be destroyed). */
295 PFNPDMDEVDESTRUCT pfnDestruct;
296 /** Relocation command - optional.
297 * Critical section NOT entered. */
298 PFNPDMDEVRELOCATE pfnRelocate;
299
300 /**
301 * Memory setup callback.
302 *
303 * @param pDevIns The device instance data.
304 * @param enmCtx Indicates the context of the call.
305 * @remarks The critical section is entered prior to calling this method.
306 */
307 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
308
309 /** Power on notification - optional.
310 * Critical section is entered. */
311 PFNPDMDEVPOWERON pfnPowerOn;
312 /** Reset notification - optional.
313 * Critical section is entered. */
314 PFNPDMDEVRESET pfnReset;
315 /** Suspend notification - optional.
316 * Critical section is entered. */
317 PFNPDMDEVSUSPEND pfnSuspend;
318 /** Resume notification - optional.
319 * Critical section is entered. */
320 PFNPDMDEVRESUME pfnResume;
321 /** Attach command - optional.
322 * Critical section is entered. */
323 PFNPDMDEVATTACH pfnAttach;
324 /** Detach notification - optional.
325 * Critical section is entered. */
326 PFNPDMDEVDETACH pfnDetach;
327 /** Query a LUN base interface - optional.
328 * Critical section is NOT entered. */
329 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
330 /** Init complete notification - optional.
331 * Critical section is entered. */
332 PFNPDMDEVINITCOMPLETE pfnInitComplete;
333 /** Power off notification - optional.
334 * Critical section is entered. */
335 PFNPDMDEVPOWEROFF pfnPowerOff;
336 /** @todo */
337 PFNRT pfnSoftReset;
338 /** Initialization safty marker. */
339 uint32_t u32VersionEnd;
340} PDMDEVREG;
341/** Pointer to a PDM Device Structure. */
342typedef PDMDEVREG *PPDMDEVREG;
343/** Const pointer to a PDM Device Structure. */
344typedef PDMDEVREG const *PCPDMDEVREG;
345
346/** Current DEVREG version number. */
347#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
348
349/** PDM Device Flags.
350 * @{ */
351/** This flag is used to indicate that the device has a RC component. */
352#define PDM_DEVREG_FLAGS_RC 0x00000001
353/** This flag is used to indicate that the device has a R0 component. */
354#define PDM_DEVREG_FLAGS_R0 0x00000002
355
356/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
357 * The bit count for the current host. */
358#if HC_ARCH_BITS == 32
359# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
360#elif HC_ARCH_BITS == 64
361# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
362#else
363# error Unsupported HC_ARCH_BITS value.
364#endif
365/** The host bit count mask. */
366#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
367
368/** The device support only 32-bit guests. */
369#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
370/** The device support only 64-bit guests. */
371#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
372/** The device support both 32-bit & 64-bit guests. */
373#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
374/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
375 * The guest bit count for the current compilation. */
376#if GC_ARCH_BITS == 32
377# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
378#elif GC_ARCH_BITS == 64
379# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
380#else
381# error Unsupported GC_ARCH_BITS value.
382#endif
383/** The guest bit count mask. */
384#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
385
386/** A convenience. */
387#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
388
389/** Indicates that the devices support PAE36 on a 32-bit guest. */
390#define PDM_DEVREG_FLAGS_PAE36 0x00001000
391
392/** Indicates that the device needs to be notified before the drivers when suspending. */
393#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
394
395/** Indicates that the device needs to be notified before the drivers when powering off. */
396#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
397
398/** Indicates that the device needs to be notified before the drivers when resetting. */
399#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
400/** @} */
401
402
403/** PDM Device Classes.
404 * The order is important, lower bit earlier instantiation.
405 * @{ */
406/** Architecture device. */
407#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
408/** Architecture BIOS device. */
409#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
410/** PCI bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
412/** ISA bus brigde. */
413#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
414/** Input device (mouse, keyboard, joystick, HID, ...). */
415#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
416/** Interrupt controller (PIC). */
417#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
418/** Interval controoler (PIT). */
419#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
420/** RTC/CMOS. */
421#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
422/** DMA controller. */
423#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
424/** VMM Device. */
425#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
426/** Graphics device, like VGA. */
427#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
428/** Storage controller device. */
429#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
430/** Network interface controller. */
431#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
432/** Audio. */
433#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
434/** USB HIC. */
435#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
436/** ACPI. */
437#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
438/** Serial controller device. */
439#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
440/** Parallel controller device */
441#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
442/** Host PCI pass-through device */
443#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
444/** Misc devices (always last). */
445#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
446/** @} */
447
448
449/** @name IRQ Level for use with the *SetIrq APIs.
450 * @{
451 */
452/** Assert the IRQ (can assume value 1). */
453#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
454/** Deassert the IRQ (can assume value 0). */
455#define PDM_IRQ_LEVEL_LOW 0
456/** flip-flop - deassert and then assert the IRQ again immediately. */
457#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
458/** @} */
459
460/**
461 * Registration record for MSI.
462 */
463typedef struct PDMMSIREG
464{
465 /** Number of MSI interrupt vectors, 0 if MSI not supported */
466 uint16_t cMsiVectors;
467 /** Offset of MSI capability */
468 uint8_t iMsiCapOffset;
469 /** Offset of next capability to MSI */
470 uint8_t iMsiNextOffset;
471 /** If we support 64-bit MSI addressing */
472 bool fMsi64bit;
473
474 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
475 uint16_t cMsixVectors;
476 /** Offset of MSI-X capability */
477 uint8_t iMsixCapOffset;
478 /** Offset of next capability to MSI-X */
479 uint8_t iMsixNextOffset;
480 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
481 uint8_t iMsixBar;
482} PDMMSIREG;
483typedef PDMMSIREG *PPDMMSIREG;
484
485/**
486 * PCI Bus registration structure.
487 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
488 */
489typedef struct PDMPCIBUSREG
490{
491 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
492 uint32_t u32Version;
493
494 /**
495 * Registers the device with the default PCI bus.
496 *
497 * @returns VBox status code.
498 * @param pDevIns Device instance of the PCI Bus.
499 * @param pPciDev The PCI device structure.
500 * Any PCI enabled device must keep this in it's instance data!
501 * Fill in the PCI data config before registration, please.
502 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
503 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
504 * If negative, the pci bus device will assign one.
505 * @remarks Caller enters the PDM critical section.
506 */
507 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
508
509 /**
510 * Initialize MSI support in a PCI device.
511 *
512 * @returns VBox status code.
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev The PCI device structure.
515 * @param pMsiReg MSI registration structure
516 * @remarks Caller enters the PDM critical section.
517 */
518 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
519
520 /**
521 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
522 *
523 * @returns VBox status code.
524 * @param pDevIns Device instance of the PCI Bus.
525 * @param pPciDev The PCI device structure.
526 * @param iRegion The region number.
527 * @param cbRegion Size of the region.
528 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
529 * @param pfnCallback Callback for doing the mapping.
530 * @remarks Caller enters the PDM critical section.
531 */
532 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
533
534 /**
535 * Register PCI configuration space read/write callbacks.
536 *
537 * @param pDevIns Device instance of the PCI Bus.
538 * @param pPciDev The PCI device structure.
539 * @param pfnRead Pointer to the user defined PCI config read function.
540 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
541 * PCI config read function. This way, user can decide when (and if)
542 * to call default PCI config read function. Can be NULL.
543 * @param pfnWrite Pointer to the user defined PCI config write function.
544 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
545 * PCI config write function. This way, user can decide when (and if)
546 * to call default PCI config write function. Can be NULL.
547 * @remarks Caller enters the PDM critical section.
548 * @thread EMT
549 */
550 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
551 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
552
553 /**
554 * Set the IRQ for a PCI device.
555 *
556 * @param pDevIns Device instance of the PCI Bus.
557 * @param pPciDev The PCI device structure.
558 * @param iIrq IRQ number to set.
559 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
560 * @param uTagSrc The IRQ tag and source (for tracing).
561 * @remarks Caller enters the PDM critical section.
562 */
563 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
564
565 /**
566 * Called to perform the job of the bios.
567 * This is only called for the first PCI Bus - it is expected to
568 * service all the PCI buses.
569 *
570 * @returns VBox status.
571 * @param pDevIns Device instance of the first bus.
572 * @remarks Caller enters the PDM critical section.
573 */
574 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
575
576 /** The name of the SetIrq RC entry point. */
577 const char *pszSetIrqRC;
578
579 /** The name of the SetIrq R0 entry point. */
580 const char *pszSetIrqR0;
581
582} PDMPCIBUSREG;
583/** Pointer to a PCI bus registration structure. */
584typedef PDMPCIBUSREG *PPDMPCIBUSREG;
585
586/** Current PDMPCIBUSREG version number. */
587#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
588
589/**
590 * PCI Bus RC helpers.
591 */
592typedef struct PDMPCIHLPRC
593{
594 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
595 uint32_t u32Version;
596
597 /**
598 * Set an ISA IRQ.
599 *
600 * @param pDevIns PCI device instance.
601 * @param iIrq IRQ number to set.
602 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
603 * @param uTagSrc The IRQ tag and source (for tracing).
604 * @thread EMT only.
605 */
606 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
607
608 /**
609 * Set an I/O-APIC IRQ.
610 *
611 * @param pDevIns PCI device instance.
612 * @param iIrq IRQ number to set.
613 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
614 * @param uTagSrc The IRQ tag and source (for tracing).
615 * @thread EMT only.
616 */
617 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
618
619 /**
620 * Send an MSI.
621 *
622 * @param pDevIns PCI device instance.
623 * @param GCPhys Physical address MSI request was written.
624 * @param uValue Value written.
625 * @param uTagSrc The IRQ tag and source (for tracing).
626 * @thread EMT only.
627 */
628 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
629
630
631 /**
632 * Acquires the PDM lock.
633 *
634 * @returns VINF_SUCCESS on success.
635 * @returns rc if we failed to acquire the lock.
636 * @param pDevIns The PCI device instance.
637 * @param rc What to return if we fail to acquire the lock.
638 */
639 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
640
641 /**
642 * Releases the PDM lock.
643 *
644 * @param pDevIns The PCI device instance.
645 */
646 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
647
648 /** Just a safety precaution. */
649 uint32_t u32TheEnd;
650} PDMPCIHLPRC;
651/** Pointer to PCI helpers. */
652typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
653/** Pointer to const PCI helpers. */
654typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
655
656/** Current PDMPCIHLPRC version number. */
657#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
658
659
660/**
661 * PCI Bus R0 helpers.
662 */
663typedef struct PDMPCIHLPR0
664{
665 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
666 uint32_t u32Version;
667
668 /**
669 * Set an ISA IRQ.
670 *
671 * @param pDevIns PCI device instance.
672 * @param iIrq IRQ number to set.
673 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
674 * @param uTagSrc The IRQ tag and source (for tracing).
675 * @thread EMT only.
676 */
677 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
678
679 /**
680 * Set an I/O-APIC IRQ.
681 *
682 * @param pDevIns PCI device instance.
683 * @param iIrq IRQ number to set.
684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
685 * @param uTagSrc The IRQ tag and source (for tracing).
686 * @thread EMT only.
687 */
688 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
689
690 /**
691 * Send an MSI.
692 *
693 * @param pDevIns PCI device instance.
694 * @param GCPhys Physical address MSI request was written.
695 * @param uValue Value written.
696 * @param uTagSrc The IRQ tag and source (for tracing).
697 * @thread EMT only.
698 */
699 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
700
701
702 /**
703 * Acquires the PDM lock.
704 *
705 * @returns VINF_SUCCESS on success.
706 * @returns rc if we failed to acquire the lock.
707 * @param pDevIns The PCI device instance.
708 * @param rc What to return if we fail to acquire the lock.
709 */
710 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
711
712 /**
713 * Releases the PDM lock.
714 *
715 * @param pDevIns The PCI device instance.
716 */
717 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
718
719 /** Just a safety precaution. */
720 uint32_t u32TheEnd;
721} PDMPCIHLPR0;
722/** Pointer to PCI helpers. */
723typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
724/** Pointer to const PCI helpers. */
725typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
726
727/** Current PDMPCIHLPR0 version number. */
728#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
729
730/**
731 * PCI device helpers.
732 */
733typedef struct PDMPCIHLPR3
734{
735 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
736 uint32_t u32Version;
737
738 /**
739 * Set an ISA IRQ.
740 *
741 * @param pDevIns The PCI device instance.
742 * @param iIrq IRQ number to set.
743 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
744 * @param uTagSrc The IRQ tag and source (for tracing).
745 */
746 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
747
748 /**
749 * Set an I/O-APIC IRQ.
750 *
751 * @param pDevIns The PCI device instance.
752 * @param iIrq IRQ number to set.
753 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
754 * @param uTagSrc The IRQ tag and source (for tracing).
755 */
756 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
757
758 /**
759 * Send an MSI.
760 *
761 * @param pDevIns PCI device instance.
762 * @param GCPhys Physical address MSI request was written.
763 * @param uValue Value written.
764 * @param uTagSrc The IRQ tag and source (for tracing).
765 */
766 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
767
768 /**
769 * Checks if the given address is an MMIO2 base address or not.
770 *
771 * @returns true/false accordingly.
772 * @param pDevIns The PCI device instance.
773 * @param pOwner The owner of the memory, optional.
774 * @param GCPhys The address to check.
775 */
776 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
777
778 /**
779 * Gets the address of the RC PCI Bus helpers.
780 *
781 * This should be called at both construction and relocation time
782 * to obtain the correct address of the RC helpers.
783 *
784 * @returns RC pointer to the PCI Bus helpers.
785 * @param pDevIns Device instance of the PCI Bus.
786 * @thread EMT only.
787 */
788 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
789
790 /**
791 * Gets the address of the R0 PCI Bus helpers.
792 *
793 * This should be called at both construction and relocation time
794 * to obtain the correct address of the R0 helpers.
795 *
796 * @returns R0 pointer to the PCI Bus helpers.
797 * @param pDevIns Device instance of the PCI Bus.
798 * @thread EMT only.
799 */
800 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
801
802 /**
803 * Acquires the PDM lock.
804 *
805 * @returns VINF_SUCCESS on success.
806 * @returns Fatal error on failure.
807 * @param pDevIns The PCI device instance.
808 * @param rc Dummy for making the interface identical to the RC and R0 versions.
809 */
810 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
811
812 /**
813 * Releases the PDM lock.
814 *
815 * @param pDevIns The PCI device instance.
816 */
817 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
818
819 /** Just a safety precaution. */
820 uint32_t u32TheEnd;
821} PDMPCIHLPR3;
822/** Pointer to PCI helpers. */
823typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
824/** Pointer to const PCI helpers. */
825typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
826
827/** Current PDMPCIHLPR3 version number. */
828#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
829
830
831/**
832 * Programmable Interrupt Controller registration structure.
833 */
834typedef struct PDMPICREG
835{
836 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
837 uint32_t u32Version;
838
839 /**
840 * Set the an IRQ.
841 *
842 * @param pDevIns Device instance of the PIC.
843 * @param iIrq IRQ number to set.
844 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
845 * @param uTagSrc The IRQ tag and source (for tracing).
846 * @remarks Caller enters the PDM critical section.
847 */
848 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
849
850 /**
851 * Get a pending interrupt.
852 *
853 * @returns Pending interrupt number.
854 * @param pDevIns Device instance of the PIC.
855 * @param puTagSrc Where to return the IRQ tag and source.
856 * @remarks Caller enters the PDM critical section.
857 */
858 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
859
860 /** The name of the RC SetIrq entry point. */
861 const char *pszSetIrqRC;
862 /** The name of the RC GetInterrupt entry point. */
863 const char *pszGetInterruptRC;
864
865 /** The name of the R0 SetIrq entry point. */
866 const char *pszSetIrqR0;
867 /** The name of the R0 GetInterrupt entry point. */
868 const char *pszGetInterruptR0;
869} PDMPICREG;
870/** Pointer to a PIC registration structure. */
871typedef PDMPICREG *PPDMPICREG;
872
873/** Current PDMPICREG version number. */
874#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
875
876/**
877 * PIC RC helpers.
878 */
879typedef struct PDMPICHLPRC
880{
881 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
882 uint32_t u32Version;
883
884 /**
885 * Set the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Clear the interrupt force action flag.
893 *
894 * @param pDevIns Device instance of the PIC.
895 */
896 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
897
898 /**
899 * Acquires the PDM lock.
900 *
901 * @returns VINF_SUCCESS on success.
902 * @returns rc if we failed to acquire the lock.
903 * @param pDevIns The PIC device instance.
904 * @param rc What to return if we fail to acquire the lock.
905 */
906 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
907
908 /**
909 * Releases the PDM lock.
910 *
911 * @param pDevIns The PIC device instance.
912 */
913 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPRC;
918
919/** Pointer to PIC RC helpers. */
920typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
921/** Pointer to const PIC RC helpers. */
922typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
923
924/** Current PDMPICHLPRC version number. */
925#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
926
927
928/**
929 * PIC R0 helpers.
930 */
931typedef struct PDMPICHLPR0
932{
933 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
934 uint32_t u32Version;
935
936 /**
937 * Set the interrupt force action flag.
938 *
939 * @param pDevIns Device instance of the PIC.
940 */
941 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
942
943 /**
944 * Clear the interrupt force action flag.
945 *
946 * @param pDevIns Device instance of the PIC.
947 */
948 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
949
950 /**
951 * Acquires the PDM lock.
952 *
953 * @returns VINF_SUCCESS on success.
954 * @returns rc if we failed to acquire the lock.
955 * @param pDevIns The PIC device instance.
956 * @param rc What to return if we fail to acquire the lock.
957 */
958 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
959
960 /**
961 * Releases the PDM lock.
962 *
963 * @param pDevIns The PCI device instance.
964 */
965 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
966
967 /** Just a safety precaution. */
968 uint32_t u32TheEnd;
969} PDMPICHLPR0;
970
971/** Pointer to PIC R0 helpers. */
972typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
973/** Pointer to const PIC R0 helpers. */
974typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
975
976/** Current PDMPICHLPR0 version number. */
977#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
978
979/**
980 * PIC R3 helpers.
981 */
982typedef struct PDMPICHLPR3
983{
984 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
985 uint32_t u32Version;
986
987 /**
988 * Set the interrupt force action flag.
989 *
990 * @param pDevIns Device instance of the PIC.
991 */
992 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
993
994 /**
995 * Clear the interrupt force action flag.
996 *
997 * @param pDevIns Device instance of the PIC.
998 */
999 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1000
1001 /**
1002 * Acquires the PDM lock.
1003 *
1004 * @returns VINF_SUCCESS on success.
1005 * @returns Fatal error on failure.
1006 * @param pDevIns The PIC device instance.
1007 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1008 */
1009 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1010
1011 /**
1012 * Releases the PDM lock.
1013 *
1014 * @param pDevIns The PIC device instance.
1015 */
1016 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1017
1018 /**
1019 * Gets the address of the RC PIC helpers.
1020 *
1021 * This should be called at both construction and relocation time
1022 * to obtain the correct address of the RC helpers.
1023 *
1024 * @returns RC pointer to the PIC helpers.
1025 * @param pDevIns Device instance of the PIC.
1026 */
1027 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1028
1029 /**
1030 * Gets the address of the R0 PIC helpers.
1031 *
1032 * This should be called at both construction and relocation time
1033 * to obtain the correct address of the R0 helpers.
1034 *
1035 * @returns R0 pointer to the PIC helpers.
1036 * @param pDevIns Device instance of the PIC.
1037 */
1038 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1039
1040 /** Just a safety precaution. */
1041 uint32_t u32TheEnd;
1042} PDMPICHLPR3;
1043
1044/** Pointer to PIC R3 helpers. */
1045typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1046/** Pointer to const PIC R3 helpers. */
1047typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1048
1049/** Current PDMPICHLPR3 version number. */
1050#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1051
1052
1053
1054/**
1055 * Advanced Programmable Interrupt Controller registration structure.
1056 */
1057typedef struct PDMAPICREG
1058{
1059 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1060 uint32_t u32Version;
1061
1062 /**
1063 * Get a pending interrupt.
1064 *
1065 * @returns Pending interrupt number.
1066 * @param pDevIns Device instance of the APIC.
1067 * @param idCpu The VCPU Id.
1068 * @param puTagSrc Where to return the tag source.
1069 * @remarks Caller enters the PDM critical section
1070 */
1071 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1072
1073 /**
1074 * Check if the APIC has a pending interrupt/if a TPR change would active one
1075 *
1076 * @returns Pending interrupt yes/no
1077 * @param pDevIns Device instance of the APIC.
1078 * @param idCpu The VCPU Id.
1079 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1080 * prior to calling this method.
1081 */
1082 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1083
1084 /**
1085 * Set the APIC base.
1086 *
1087 * @param pDevIns Device instance of the APIC.
1088 * @param idCpu The VCPU Id.
1089 * @param u64Base The new base.
1090 * @remarks Caller enters the PDM critical section.
1091 */
1092 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1093
1094 /**
1095 * Get the APIC base.
1096 *
1097 * @returns Current base.
1098 * @param pDevIns Device instance of the APIC.
1099 * @param idCpu The VCPU Id.
1100 * @remarks Caller enters the PDM critical section.
1101 */
1102 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1103
1104 /**
1105 * Set the TPR (task priority register).
1106 *
1107 * @param pDevIns Device instance of the APIC.
1108 * @param idCpu The VCPU id.
1109 * @param u8TPR The new TPR.
1110 * @remarks Caller enters the PDM critical section.
1111 */
1112 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1113
1114 /**
1115 * Get the TPR (task priority register).
1116 *
1117 * @returns The current TPR.
1118 * @param pDevIns Device instance of the APIC.
1119 * @param idCpu VCPU id
1120 * @remarks Caller enters the PDM critical section.
1121 */
1122 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1123
1124 /**
1125 * Write to a MSR in APIC range.
1126 *
1127 * @returns VBox status code.
1128 * @param pDevIns Device instance of the APIC.
1129 * @param idCpu Target CPU.
1130 * @param u32Reg The MSR begin written to.
1131 * @param u64Value The value to write.
1132 *
1133 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1134 * calling this method.
1135 */
1136 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1137
1138 /**
1139 * Read from a MSR in APIC range.
1140 *
1141 * @returns VBox status code.
1142 * @param pDevIns Device instance of the APIC.
1143 * @param idCpu Target CPU.
1144 * @param u32Reg MSR to read.
1145 * @param pu64Value Where to return the read value.
1146 *
1147 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1148 * calling this method.
1149 */
1150 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1151
1152 /**
1153 * Private interface between the IOAPIC and APIC.
1154 *
1155 * This is a low-level, APIC/IOAPIC implementation specific interface which
1156 * is registered with PDM only because it makes life so much simpler right
1157 * now (GC bits). This is a bad bad hack! The correct way of doing this
1158 * would involve some way of querying GC interfaces and relocating them.
1159 * Perhaps doing some kind of device init in GC...
1160 *
1161 * @returns status code.
1162 * @param pDevIns Device instance of the APIC.
1163 * @param u8Dest See APIC implementation.
1164 * @param u8DestMode See APIC implementation.
1165 * @param u8DeliveryMode See APIC implementation.
1166 * @param iVector See APIC implementation.
1167 * @param u8Polarity See APIC implementation.
1168 * @param u8TriggerMode See APIC implementation.
1169 * @param uTagSrc The IRQ tag and source (for tracing).
1170 * @remarks Caller enters the PDM critical section
1171 */
1172 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1173 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1174
1175 /**
1176 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1177 *
1178 * Used for virtual wire mode when interrupts from the PIC are passed through
1179 * LAPIC.
1180 *
1181 * @returns status code.
1182 * @param pDevIns Device instance of the APIC.
1183 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1184 * @param u8Level The level.
1185 * @param uTagSrc The IRQ tag and source (for tracing).
1186 * @remarks Caller enters the PDM critical section
1187 */
1188 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1189
1190 /** The name of the RC GetInterrupt entry point. */
1191 const char *pszGetInterruptRC;
1192 /** The name of the RC HasPendingIrq entry point. */
1193 const char *pszHasPendingIrqRC;
1194 /** The name of the RC SetBase entry point. */
1195 const char *pszSetBaseRC;
1196 /** The name of the RC GetBase entry point. */
1197 const char *pszGetBaseRC;
1198 /** The name of the RC SetTPR entry point. */
1199 const char *pszSetTPRRC;
1200 /** The name of the RC GetTPR entry point. */
1201 const char *pszGetTPRRC;
1202 /** The name of the RC WriteMSR entry point. */
1203 const char *pszWriteMSRRC;
1204 /** The name of the RC ReadMSR entry point. */
1205 const char *pszReadMSRRC;
1206 /** The name of the RC BusDeliver entry point. */
1207 const char *pszBusDeliverRC;
1208 /** The name of the RC LocalInterrupt entry point. */
1209 const char *pszLocalInterruptRC;
1210
1211 /** The name of the R0 GetInterrupt entry point. */
1212 const char *pszGetInterruptR0;
1213 /** The name of the R0 HasPendingIrq entry point. */
1214 const char *pszHasPendingIrqR0;
1215 /** The name of the R0 SetBase entry point. */
1216 const char *pszSetBaseR0;
1217 /** The name of the R0 GetBase entry point. */
1218 const char *pszGetBaseR0;
1219 /** The name of the R0 SetTPR entry point. */
1220 const char *pszSetTPRR0;
1221 /** The name of the R0 GetTPR entry point. */
1222 const char *pszGetTPRR0;
1223 /** The name of the R0 WriteMSR entry point. */
1224 const char *pszWriteMSRR0;
1225 /** The name of the R0 ReadMSR entry point. */
1226 const char *pszReadMSRR0;
1227 /** The name of the R0 BusDeliver entry point. */
1228 const char *pszBusDeliverR0;
1229 /** The name of the R0 LocalInterrupt entry point. */
1230 const char *pszLocalInterruptR0;
1231
1232} PDMAPICREG;
1233/** Pointer to an APIC registration structure. */
1234typedef PDMAPICREG *PPDMAPICREG;
1235
1236/** Current PDMAPICREG version number. */
1237#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1238
1239
1240/**
1241 * APIC version argument for pfnChangeFeature.
1242 */
1243typedef enum PDMAPICVERSION
1244{
1245 /** Invalid 0 entry. */
1246 PDMAPICVERSION_INVALID = 0,
1247 /** No APIC. */
1248 PDMAPICVERSION_NONE,
1249 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1250 PDMAPICVERSION_APIC,
1251 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1252 PDMAPICVERSION_X2APIC,
1253 /** The usual 32-bit paranoia. */
1254 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1255} PDMAPICVERSION;
1256
1257/**
1258 * APIC irq argument for SetInterruptFF.
1259 */
1260typedef enum PDMAPICIRQ
1261{
1262 /** Invalid 0 entry. */
1263 PDMAPICIRQ_INVALID = 0,
1264 /** Normal hardware interrupt. */
1265 PDMAPICIRQ_HARDWARE,
1266 /** NMI. */
1267 PDMAPICIRQ_NMI,
1268 /** SMI. */
1269 PDMAPICIRQ_SMI,
1270 /** ExtINT (HW interrupt via PIC). */
1271 PDMAPICIRQ_EXTINT,
1272 /** The usual 32-bit paranoia. */
1273 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1274} PDMAPICIRQ;
1275
1276
1277/**
1278 * APIC RC helpers.
1279 */
1280typedef struct PDMAPICHLPRC
1281{
1282 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1283 uint32_t u32Version;
1284
1285 /**
1286 * Set the interrupt force action flag.
1287 *
1288 * @param pDevIns Device instance of the APIC.
1289 * @param enmType IRQ type.
1290 * @param idCpu Virtual CPU to set flag upon.
1291 */
1292 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1293
1294 /**
1295 * Clear the interrupt force action flag.
1296 *
1297 * @param pDevIns Device instance of the APIC.
1298 * @param enmType IRQ type.
1299 * @param idCpu Virtual CPU to clear flag upon.
1300 */
1301 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1302
1303 /**
1304 * Calculates an IRQ tag for a timer, IPI or similar event.
1305 *
1306 * @returns The IRQ tag.
1307 * @param pDevIns Device instance of the APIC.
1308 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1309 */
1310 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1311
1312 /**
1313 * Modifies APIC-related bits in the CPUID feature mask.
1314 *
1315 * @param pDevIns Device instance of the APIC.
1316 * @param enmVersion Supported APIC version.
1317 */
1318 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1319
1320 /**
1321 * Acquires the PDM lock.
1322 *
1323 * @returns VINF_SUCCESS on success.
1324 * @returns rc if we failed to acquire the lock.
1325 * @param pDevIns The APIC device instance.
1326 * @param rc What to return if we fail to acquire the lock.
1327 */
1328 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1329
1330 /**
1331 * Releases the PDM lock.
1332 *
1333 * @param pDevIns The APIC device instance.
1334 */
1335 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1336
1337 /**
1338 * Get the virtual CPU id corresponding to the current EMT.
1339 *
1340 * @param pDevIns The APIC device instance.
1341 */
1342 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1343
1344 /** Just a safety precaution. */
1345 uint32_t u32TheEnd;
1346} PDMAPICHLPRC;
1347/** Pointer to APIC GC helpers. */
1348typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1349/** Pointer to const APIC helpers. */
1350typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1351
1352/** Current PDMAPICHLPRC version number. */
1353#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1354
1355
1356/**
1357 * APIC R0 helpers.
1358 */
1359typedef struct PDMAPICHLPR0
1360{
1361 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1362 uint32_t u32Version;
1363
1364 /**
1365 * Set the interrupt force action flag.
1366 *
1367 * @param pDevIns Device instance of the APIC.
1368 * @param enmType IRQ type.
1369 * @param idCpu Virtual CPU to set flag upon.
1370 */
1371 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1372
1373 /**
1374 * Clear the interrupt force action flag.
1375 *
1376 * @param pDevIns Device instance of the APIC.
1377 * @param enmType IRQ type.
1378 * @param idCpu Virtual CPU to clear flag upon.
1379 */
1380 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1381
1382 /**
1383 * Calculates an IRQ tag for a timer, IPI or similar event.
1384 *
1385 * @returns The IRQ tag.
1386 * @param pDevIns Device instance of the APIC.
1387 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1388 */
1389 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1390
1391 /**
1392 * Modifies APIC-related bits in the CPUID feature mask.
1393 *
1394 * @param pDevIns Device instance of the APIC.
1395 * @param enmVersion Supported APIC version.
1396 */
1397 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1398
1399 /**
1400 * Acquires the PDM lock.
1401 *
1402 * @returns VINF_SUCCESS on success.
1403 * @returns rc if we failed to acquire the lock.
1404 * @param pDevIns The APIC device instance.
1405 * @param rc What to return if we fail to acquire the lock.
1406 */
1407 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1408
1409 /**
1410 * Releases the PDM lock.
1411 *
1412 * @param pDevIns The APIC device instance.
1413 */
1414 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1415
1416 /**
1417 * Get the virtual CPU id corresponding to the current EMT.
1418 *
1419 * @param pDevIns The APIC device instance.
1420 */
1421 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1422
1423 /** Just a safety precaution. */
1424 uint32_t u32TheEnd;
1425} PDMAPICHLPR0;
1426/** Pointer to APIC GC helpers. */
1427typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1428/** Pointer to const APIC helpers. */
1429typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1430
1431/** Current PDMAPICHLPR0 version number. */
1432#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1433
1434/**
1435 * APIC R3 helpers.
1436 */
1437typedef struct PDMAPICHLPR3
1438{
1439 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1440 uint32_t u32Version;
1441
1442 /**
1443 * Set the interrupt force action flag.
1444 *
1445 * @param pDevIns Device instance of the APIC.
1446 * @param enmType IRQ type.
1447 * @param idCpu Virtual CPU to set flag upon.
1448 */
1449 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1450
1451 /**
1452 * Clear the interrupt force action flag.
1453 *
1454 * @param pDevIns Device instance of the APIC.
1455 * @param enmType IRQ type.
1456 * @param idCpu Virtual CPU to clear flag upon.
1457 */
1458 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1459
1460 /**
1461 * Calculates an IRQ tag for a timer, IPI or similar event.
1462 *
1463 * @returns The IRQ tag.
1464 * @param pDevIns Device instance of the APIC.
1465 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1466 */
1467 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1468
1469 /**
1470 * Modifies APIC-related bits in the CPUID feature mask.
1471 *
1472 * @param pDevIns Device instance of the APIC.
1473 * @param enmVersion Supported APIC version.
1474 */
1475 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1476
1477 /**
1478 * Get the virtual CPU id corresponding to the current EMT.
1479 *
1480 * @param pDevIns The APIC device instance.
1481 */
1482 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1483
1484 /**
1485 * Sends SIPI to given virtual CPU.
1486 *
1487 * @param pDevIns The APIC device instance.
1488 * @param idCpu Virtual CPU to perform SIPI on
1489 * @param iVector SIPI vector
1490 */
1491 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1492
1493 /**
1494 * Sends init IPI to given virtual CPU, should result in reset and
1495 * halting till SIPI.
1496 *
1497 * @param pDevIns The APIC device instance.
1498 * @param idCpu Virtual CPU to perform SIPI on
1499 */
1500 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1501
1502 /**
1503 * Gets the address of the RC APIC helpers.
1504 *
1505 * This should be called at both construction and relocation time
1506 * to obtain the correct address of the RC helpers.
1507 *
1508 * @returns GC pointer to the APIC helpers.
1509 * @param pDevIns Device instance of the APIC.
1510 */
1511 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1512
1513 /**
1514 * Gets the address of the R0 APIC helpers.
1515 *
1516 * This should be called at both construction and relocation time
1517 * to obtain the correct address of the R0 helpers.
1518 *
1519 * @returns R0 pointer to the APIC helpers.
1520 * @param pDevIns Device instance of the APIC.
1521 */
1522 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1523
1524 /**
1525 * Get the critical section used to synchronize the PICs, PCI and stuff.
1526 *
1527 * @returns Ring-3 pointer to the critical section.
1528 * @param pDevIns The APIC device instance.
1529 */
1530 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1531
1532 /**
1533 * Get the critical section used to synchronize the PICs, PCI and stuff.
1534 *
1535 * @returns Raw-mode context pointer to the critical section.
1536 * @param pDevIns The APIC device instance.
1537 */
1538 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1539
1540 /**
1541 * Get the critical section used to synchronize the PICs, PCI and stuff.
1542 *
1543 * @returns Ring-0 pointer to the critical section.
1544 * @param pDevIns The APIC device instance.
1545 */
1546 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1547
1548 /** Just a safety precaution. */
1549 uint32_t u32TheEnd;
1550} PDMAPICHLPR3;
1551/** Pointer to APIC helpers. */
1552typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1553/** Pointer to const APIC helpers. */
1554typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1555
1556/** Current PDMAPICHLP version number. */
1557#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1558
1559
1560/**
1561 * I/O APIC registration structure.
1562 */
1563typedef struct PDMIOAPICREG
1564{
1565 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1566 uint32_t u32Version;
1567
1568 /**
1569 * Set the an IRQ.
1570 *
1571 * @param pDevIns Device instance of the I/O APIC.
1572 * @param iIrq IRQ number to set.
1573 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1574 * @param uTagSrc The IRQ tag and source (for tracing).
1575 * @remarks Caller enters the PDM critical section
1576 */
1577 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1578
1579 /** The name of the RC SetIrq entry point. */
1580 const char *pszSetIrqRC;
1581
1582 /** The name of the R0 SetIrq entry point. */
1583 const char *pszSetIrqR0;
1584
1585 /**
1586 * Send a MSI.
1587 *
1588 * @param pDevIns Device instance of the I/O APIC.
1589 * @param GCPhys Request address.
1590 * @param uValue Request value.
1591 * @param uTagSrc The IRQ tag and source (for tracing).
1592 * @remarks Caller enters the PDM critical section
1593 */
1594 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1595
1596 /** The name of the RC SendMsi entry point. */
1597 const char *pszSendMsiRC;
1598
1599 /** The name of the R0 SendMsi entry point. */
1600 const char *pszSendMsiR0;
1601} PDMIOAPICREG;
1602/** Pointer to an APIC registration structure. */
1603typedef PDMIOAPICREG *PPDMIOAPICREG;
1604
1605/** Current PDMAPICREG version number. */
1606#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1607
1608
1609/**
1610 * IOAPIC RC helpers.
1611 */
1612typedef struct PDMIOAPICHLPRC
1613{
1614 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1615 uint32_t u32Version;
1616
1617 /**
1618 * Private interface between the IOAPIC and APIC.
1619 *
1620 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1621 *
1622 * @returns status code.
1623 * @param pDevIns Device instance of the IOAPIC.
1624 * @param u8Dest See APIC implementation.
1625 * @param u8DestMode See APIC implementation.
1626 * @param u8DeliveryMode See APIC implementation.
1627 * @param iVector See APIC implementation.
1628 * @param u8Polarity See APIC implementation.
1629 * @param u8TriggerMode See APIC implementation.
1630 * @param uTagSrc The IRQ tag and source (for tracing).
1631 */
1632 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1633 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1634
1635 /**
1636 * Acquires the PDM lock.
1637 *
1638 * @returns VINF_SUCCESS on success.
1639 * @returns rc if we failed to acquire the lock.
1640 * @param pDevIns The IOAPIC device instance.
1641 * @param rc What to return if we fail to acquire the lock.
1642 */
1643 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1644
1645 /**
1646 * Releases the PDM lock.
1647 *
1648 * @param pDevIns The IOAPIC device instance.
1649 */
1650 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1651
1652 /** Just a safety precaution. */
1653 uint32_t u32TheEnd;
1654} PDMIOAPICHLPRC;
1655/** Pointer to IOAPIC RC helpers. */
1656typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1657/** Pointer to const IOAPIC helpers. */
1658typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1659
1660/** Current PDMIOAPICHLPRC version number. */
1661#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1662
1663
1664/**
1665 * IOAPIC R0 helpers.
1666 */
1667typedef struct PDMIOAPICHLPR0
1668{
1669 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1670 uint32_t u32Version;
1671
1672 /**
1673 * Private interface between the IOAPIC and APIC.
1674 *
1675 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1676 *
1677 * @returns status code.
1678 * @param pDevIns Device instance of the IOAPIC.
1679 * @param u8Dest See APIC implementation.
1680 * @param u8DestMode See APIC implementation.
1681 * @param u8DeliveryMode See APIC implementation.
1682 * @param iVector See APIC implementation.
1683 * @param u8Polarity See APIC implementation.
1684 * @param u8TriggerMode See APIC implementation.
1685 * @param uTagSrc The IRQ tag and source (for tracing).
1686 */
1687 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1688 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1689
1690 /**
1691 * Acquires the PDM lock.
1692 *
1693 * @returns VINF_SUCCESS on success.
1694 * @returns rc if we failed to acquire the lock.
1695 * @param pDevIns The IOAPIC device instance.
1696 * @param rc What to return if we fail to acquire the lock.
1697 */
1698 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1699
1700 /**
1701 * Releases the PDM lock.
1702 *
1703 * @param pDevIns The IOAPIC device instance.
1704 */
1705 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1706
1707 /** Just a safety precaution. */
1708 uint32_t u32TheEnd;
1709} PDMIOAPICHLPR0;
1710/** Pointer to IOAPIC R0 helpers. */
1711typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1712/** Pointer to const IOAPIC helpers. */
1713typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1714
1715/** Current PDMIOAPICHLPR0 version number. */
1716#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1717
1718/**
1719 * IOAPIC R3 helpers.
1720 */
1721typedef struct PDMIOAPICHLPR3
1722{
1723 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1724 uint32_t u32Version;
1725
1726 /**
1727 * Private interface between the IOAPIC and APIC.
1728 *
1729 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1730 *
1731 * @returns status code
1732 * @param pDevIns Device instance of the IOAPIC.
1733 * @param u8Dest See APIC implementation.
1734 * @param u8DestMode See APIC implementation.
1735 * @param u8DeliveryMode See APIC implementation.
1736 * @param iVector See APIC implementation.
1737 * @param u8Polarity See APIC implementation.
1738 * @param u8TriggerMode See APIC implementation.
1739 * @param uTagSrc The IRQ tag and source (for tracing).
1740 */
1741 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1742 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1743
1744 /**
1745 * Acquires the PDM lock.
1746 *
1747 * @returns VINF_SUCCESS on success.
1748 * @returns Fatal error on failure.
1749 * @param pDevIns The IOAPIC device instance.
1750 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1751 */
1752 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1753
1754 /**
1755 * Releases the PDM lock.
1756 *
1757 * @param pDevIns The IOAPIC device instance.
1758 */
1759 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1760
1761 /**
1762 * Gets the address of the RC IOAPIC helpers.
1763 *
1764 * This should be called at both construction and relocation time
1765 * to obtain the correct address of the RC helpers.
1766 *
1767 * @returns RC pointer to the IOAPIC helpers.
1768 * @param pDevIns Device instance of the IOAPIC.
1769 */
1770 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1771
1772 /**
1773 * Gets the address of the R0 IOAPIC helpers.
1774 *
1775 * This should be called at both construction and relocation time
1776 * to obtain the correct address of the R0 helpers.
1777 *
1778 * @returns R0 pointer to the IOAPIC helpers.
1779 * @param pDevIns Device instance of the IOAPIC.
1780 */
1781 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1782
1783 /** Just a safety precaution. */
1784 uint32_t u32TheEnd;
1785} PDMIOAPICHLPR3;
1786/** Pointer to IOAPIC R3 helpers. */
1787typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1788/** Pointer to const IOAPIC helpers. */
1789typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1790
1791/** Current PDMIOAPICHLPR3 version number. */
1792#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1793
1794
1795/**
1796 * HPET registration structure.
1797 */
1798typedef struct PDMHPETREG
1799{
1800 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1801 uint32_t u32Version;
1802
1803} PDMHPETREG;
1804/** Pointer to an HPET registration structure. */
1805typedef PDMHPETREG *PPDMHPETREG;
1806
1807/** Current PDMHPETREG version number. */
1808#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1809
1810/**
1811 * HPET RC helpers.
1812 *
1813 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1814 * at some later point.
1815 */
1816typedef struct PDMHPETHLPRC
1817{
1818 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1819 uint32_t u32Version;
1820
1821 /** Just a safety precaution. */
1822 uint32_t u32TheEnd;
1823} PDMHPETHLPRC;
1824
1825/** Pointer to HPET RC helpers. */
1826typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1827/** Pointer to const HPET RC helpers. */
1828typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1829
1830/** Current PDMHPETHLPRC version number. */
1831#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1832
1833
1834/**
1835 * HPET R0 helpers.
1836 *
1837 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1838 * at some later point.
1839 */
1840typedef struct PDMHPETHLPR0
1841{
1842 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1843 uint32_t u32Version;
1844
1845 /** Just a safety precaution. */
1846 uint32_t u32TheEnd;
1847} PDMHPETHLPR0;
1848
1849/** Pointer to HPET R0 helpers. */
1850typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1851/** Pointer to const HPET R0 helpers. */
1852typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1853
1854/** Current PDMHPETHLPR0 version number. */
1855#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1856
1857/**
1858 * HPET R3 helpers.
1859 */
1860typedef struct PDMHPETHLPR3
1861{
1862 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1863 uint32_t u32Version;
1864
1865 /**
1866 * Gets the address of the RC HPET helpers.
1867 *
1868 * This should be called at both construction and relocation time
1869 * to obtain the correct address of the RC helpers.
1870 *
1871 * @returns RC pointer to the HPET helpers.
1872 * @param pDevIns Device instance of the HPET.
1873 */
1874 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1875
1876 /**
1877 * Gets the address of the R0 HPET helpers.
1878 *
1879 * This should be called at both construction and relocation time
1880 * to obtain the correct address of the R0 helpers.
1881 *
1882 * @returns R0 pointer to the HPET helpers.
1883 * @param pDevIns Device instance of the HPET.
1884 */
1885 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1886
1887 /**
1888 * Set legacy mode on PIT and RTC.
1889 *
1890 * @returns VINF_SUCCESS on success.
1891 * @returns rc if we failed to set legacy mode.
1892 * @param pDevIns Device instance of the HPET.
1893 * @param fActivated Whether legacy mode is activated or deactivated.
1894 */
1895 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1896
1897
1898 /**
1899 * Set IRQ, bypassing ISA bus override rules.
1900 *
1901 * @returns VINF_SUCCESS on success.
1902 * @returns rc if we failed to set legacy mode.
1903 * @param pDevIns Device instance of the HPET.
1904 * @param fActivate Activate or deactivate legacy mode.
1905 */
1906 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1907
1908 /** Just a safety precaution. */
1909 uint32_t u32TheEnd;
1910} PDMHPETHLPR3;
1911
1912/** Pointer to HPET R3 helpers. */
1913typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1914/** Pointer to const HPET R3 helpers. */
1915typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1916
1917/** Current PDMHPETHLPR3 version number. */
1918#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1919
1920
1921/**
1922 * Raw PCI device registration structure.
1923 */
1924typedef struct PDMPCIRAWREG
1925{
1926 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1927 uint32_t u32Version;
1928 /** Just a safety precaution. */
1929 uint32_t u32TheEnd;
1930} PDMPCIRAWREG;
1931/** Pointer to a raw PCI registration structure. */
1932typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1933
1934/** Current PDMPCIRAWREG version number. */
1935#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1936
1937/**
1938 * Raw PCI device raw-mode context helpers.
1939 */
1940typedef struct PDMPCIRAWHLPRC
1941{
1942 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1943 uint32_t u32Version;
1944 /** Just a safety precaution. */
1945 uint32_t u32TheEnd;
1946} PDMPCIRAWHLPRC;
1947/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1948typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1949/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1950typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1951
1952/** Current PDMPCIRAWHLPRC version number. */
1953#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1954
1955/**
1956 * Raw PCI device ring-0 context helpers.
1957 */
1958typedef struct PDMPCIRAWHLPR0
1959{
1960 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1961 uint32_t u32Version;
1962 /** Just a safety precaution. */
1963 uint32_t u32TheEnd;
1964} PDMPCIRAWHLPR0;
1965/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1966typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1967/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1968typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1969
1970/** Current PDMPCIRAWHLPR0 version number. */
1971#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1972
1973
1974/**
1975 * Raw PCI device ring-3 context helpers.
1976 */
1977typedef struct PDMPCIRAWHLPR3
1978{
1979 /** Undefined structure version and magic number. */
1980 uint32_t u32Version;
1981
1982 /**
1983 * Gets the address of the RC raw PCI device helpers.
1984 *
1985 * This should be called at both construction and relocation time to obtain
1986 * the correct address of the RC helpers.
1987 *
1988 * @returns RC pointer to the raw PCI device helpers.
1989 * @param pDevIns Device instance of the raw PCI device.
1990 */
1991 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1992
1993 /**
1994 * Gets the address of the R0 raw PCI device helpers.
1995 *
1996 * This should be called at both construction and relocation time to obtain
1997 * the correct address of the R0 helpers.
1998 *
1999 * @returns R0 pointer to the raw PCI device helpers.
2000 * @param pDevIns Device instance of the raw PCI device.
2001 */
2002 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2003
2004 /** Just a safety precaution. */
2005 uint32_t u32TheEnd;
2006} PDMPCIRAWHLPR3;
2007/** Pointer to raw PCI R3 helpers. */
2008typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2009/** Pointer to const raw PCI R3 helpers. */
2010typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2011
2012/** Current PDMPCIRAWHLPR3 version number. */
2013#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2014
2015
2016#ifdef IN_RING3
2017
2018/**
2019 * DMA Transfer Handler.
2020 *
2021 * @returns Number of bytes transferred.
2022 * @param pDevIns Device instance of the DMA.
2023 * @param pvUser User pointer.
2024 * @param uChannel Channel number.
2025 * @param off DMA position.
2026 * @param cb Block size.
2027 * @remarks The device lock is not taken, however, the DMA device lock is held.
2028 */
2029typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2030/** Pointer to a FNDMATRANSFERHANDLER(). */
2031typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2032
2033/**
2034 * DMA Controller registration structure.
2035 */
2036typedef struct PDMDMAREG
2037{
2038 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2039 uint32_t u32Version;
2040
2041 /**
2042 * Execute pending transfers.
2043 *
2044 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2045 * @param pDevIns Device instance of the DMAC.
2046 * @remarks No locks held, called on EMT(0) as a form of serialization.
2047 */
2048 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2049
2050 /**
2051 * Register transfer function for DMA channel.
2052 *
2053 * @param pDevIns Device instance of the DMAC.
2054 * @param uChannel Channel number.
2055 * @param pfnTransferHandler Device specific transfer function.
2056 * @param pvUSer User pointer to be passed to the callback.
2057 * @remarks No locks held, called on an EMT.
2058 */
2059 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2060
2061 /**
2062 * Read memory
2063 *
2064 * @returns Number of bytes read.
2065 * @param pDevIns Device instance of the DMAC.
2066 * @param pvBuffer Pointer to target buffer.
2067 * @param off DMA position.
2068 * @param cbBlock Block size.
2069 * @remarks No locks held, called on an EMT.
2070 */
2071 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2072
2073 /**
2074 * Write memory
2075 *
2076 * @returns Number of bytes written.
2077 * @param pDevIns Device instance of the DMAC.
2078 * @param pvBuffer Memory to write.
2079 * @param off DMA position.
2080 * @param cbBlock Block size.
2081 * @remarks No locks held, called on an EMT.
2082 */
2083 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2084
2085 /**
2086 * Set the DREQ line.
2087 *
2088 * @param pDevIns Device instance of the DMAC.
2089 * @param uChannel Channel number.
2090 * @param uLevel Level of the line.
2091 * @remarks No locks held, called on an EMT.
2092 */
2093 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2094
2095 /**
2096 * Get channel mode
2097 *
2098 * @returns Channel mode.
2099 * @param pDevIns Device instance of the DMAC.
2100 * @param uChannel Channel number.
2101 * @remarks No locks held, called on an EMT.
2102 */
2103 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2104
2105} PDMDMACREG;
2106/** Pointer to a DMAC registration structure. */
2107typedef PDMDMACREG *PPDMDMACREG;
2108
2109/** Current PDMDMACREG version number. */
2110#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2111
2112
2113/**
2114 * DMA Controller device helpers.
2115 */
2116typedef struct PDMDMACHLP
2117{
2118 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2119 uint32_t u32Version;
2120
2121 /* to-be-defined */
2122
2123} PDMDMACHLP;
2124/** Pointer to DMAC helpers. */
2125typedef PDMDMACHLP *PPDMDMACHLP;
2126/** Pointer to const DMAC helpers. */
2127typedef const PDMDMACHLP *PCPDMDMACHLP;
2128
2129/** Current PDMDMACHLP version number. */
2130#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2131
2132#endif /* IN_RING3 */
2133
2134
2135
2136/**
2137 * RTC registration structure.
2138 */
2139typedef struct PDMRTCREG
2140{
2141 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2142 uint32_t u32Version;
2143 uint32_t u32Alignment; /**< structure size alignment. */
2144
2145 /**
2146 * Write to a CMOS register and update the checksum if necessary.
2147 *
2148 * @returns VBox status code.
2149 * @param pDevIns Device instance of the RTC.
2150 * @param iReg The CMOS register index.
2151 * @param u8Value The CMOS register value.
2152 * @remarks Caller enters the device critical section.
2153 */
2154 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2155
2156 /**
2157 * Read a CMOS register.
2158 *
2159 * @returns VBox status code.
2160 * @param pDevIns Device instance of the RTC.
2161 * @param iReg The CMOS register index.
2162 * @param pu8Value Where to store the CMOS register value.
2163 * @remarks Caller enters the device critical section.
2164 */
2165 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2166
2167} PDMRTCREG;
2168/** Pointer to a RTC registration structure. */
2169typedef PDMRTCREG *PPDMRTCREG;
2170/** Pointer to a const RTC registration structure. */
2171typedef const PDMRTCREG *PCPDMRTCREG;
2172
2173/** Current PDMRTCREG version number. */
2174#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2175
2176
2177/**
2178 * RTC device helpers.
2179 */
2180typedef struct PDMRTCHLP
2181{
2182 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2183 uint32_t u32Version;
2184
2185 /* to-be-defined */
2186
2187} PDMRTCHLP;
2188/** Pointer to RTC helpers. */
2189typedef PDMRTCHLP *PPDMRTCHLP;
2190/** Pointer to const RTC helpers. */
2191typedef const PDMRTCHLP *PCPDMRTCHLP;
2192
2193/** Current PDMRTCHLP version number. */
2194#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2195
2196
2197
2198#ifdef IN_RING3
2199
2200/**
2201 * PDM Device API.
2202 */
2203typedef struct PDMDEVHLPR3
2204{
2205 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2206 uint32_t u32Version;
2207
2208 /**
2209 * Register a number of I/O ports with a device.
2210 *
2211 * These callbacks are of course for the host context (HC).
2212 * Register HC handlers before guest context (GC) handlers! There must be a
2213 * HC handler for every GC handler!
2214 *
2215 * @returns VBox status.
2216 * @param pDevIns The device instance to register the ports with.
2217 * @param Port First port number in the range.
2218 * @param cPorts Number of ports to register.
2219 * @param pvUser User argument.
2220 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2221 * @param pfnIn Pointer to function which is gonna handle IN operations.
2222 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2223 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2224 * @param pszDesc Pointer to description string. This must not be freed.
2225 * @remarks Caller enters the device critical section prior to invoking the
2226 * registered callback methods.
2227 */
2228 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2229 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2230 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2231
2232 /**
2233 * Register a number of I/O ports with a device for RC.
2234 *
2235 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2236 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2237 * for every RC handler!
2238 *
2239 * @returns VBox status.
2240 * @param pDevIns The device instance to register the ports with
2241 * and which RC module to resolve the names
2242 * against.
2243 * @param Port First port number in the range.
2244 * @param cPorts Number of ports to register.
2245 * @param pvUser User argument.
2246 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2247 * @param pszIn Name of the RC function which is gonna handle IN operations.
2248 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2249 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2250 * @param pszDesc Pointer to description string. This must not be freed.
2251 * @remarks Caller enters the device critical section prior to invoking the
2252 * registered callback methods.
2253 */
2254 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2255 const char *pszOut, const char *pszIn,
2256 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2257
2258 /**
2259 * Register a number of I/O ports with a device.
2260 *
2261 * These callbacks are of course for the ring-0 host context (R0).
2262 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2263 *
2264 * @returns VBox status.
2265 * @param pDevIns The device instance to register the ports with.
2266 * @param Port First port number in the range.
2267 * @param cPorts Number of ports to register.
2268 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2269 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2270 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2271 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2272 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2273 * @param pszDesc Pointer to description string. This must not be freed.
2274 * @remarks Caller enters the device critical section prior to invoking the
2275 * registered callback methods.
2276 */
2277 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2278 const char *pszOut, const char *pszIn,
2279 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2280
2281 /**
2282 * Deregister I/O ports.
2283 *
2284 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2285 *
2286 * @returns VBox status.
2287 * @param pDevIns The device instance owning the ports.
2288 * @param Port First port number in the range.
2289 * @param cPorts Number of ports to deregister.
2290 */
2291 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2292
2293 /**
2294 * Register a Memory Mapped I/O (MMIO) region.
2295 *
2296 * These callbacks are of course for the ring-3 context (R3). Register HC
2297 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2298 * must be a R3 handler for every RC and R0 handler!
2299 *
2300 * @returns VBox status.
2301 * @param pDevIns The device instance to register the MMIO with.
2302 * @param GCPhysStart First physical address in the range.
2303 * @param cbRange The size of the range (in bytes).
2304 * @param pvUser User argument.
2305 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2306 * @param pfnRead Pointer to function which is gonna handle Read operations.
2307 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2308 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2309 * @param pszDesc Pointer to description string. This must not be freed.
2310 * @remarks Caller enters the device critical section prior to invoking the
2311 * registered callback methods.
2312 */
2313 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2314 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2315 uint32_t fFlags, const char *pszDesc));
2316
2317 /**
2318 * Register a Memory Mapped I/O (MMIO) region for GC.
2319 *
2320 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2321 * (R3) handlers before guest context handlers! There must be a R3 handler for
2322 * every RC handler!
2323 *
2324 * @returns VBox status.
2325 * @param pDevIns The device instance to register the MMIO with.
2326 * @param GCPhysStart First physical address in the range.
2327 * @param cbRange The size of the range (in bytes).
2328 * @param pvUser User argument.
2329 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2330 * @param pszRead Name of the RC function which is gonna handle Read operations.
2331 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2332 * @remarks Caller enters the device critical section prior to invoking the
2333 * registered callback methods.
2334 */
2335 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2336 const char *pszWrite, const char *pszRead, const char *pszFill));
2337
2338 /**
2339 * Register a Memory Mapped I/O (MMIO) region for R0.
2340 *
2341 * These callbacks are for the ring-0 host context (R0). Register ring-3
2342 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2343 * every R0 handler!
2344 *
2345 * @returns VBox status.
2346 * @param pDevIns The device instance to register the MMIO with.
2347 * @param GCPhysStart First physical address in the range.
2348 * @param cbRange The size of the range (in bytes).
2349 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2350 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2351 * @param pszRead Name of the RC function which is gonna handle Read operations.
2352 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2353 * @param pszDesc Obsolete. NULL is fine.
2354 * @remarks Caller enters the device critical section prior to invoking the
2355 * registered callback methods.
2356 */
2357 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2358 const char *pszWrite, const char *pszRead, const char *pszFill));
2359
2360 /**
2361 * Deregister a Memory Mapped I/O (MMIO) region.
2362 *
2363 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2364 *
2365 * @returns VBox status.
2366 * @param pDevIns The device instance owning the MMIO region(s).
2367 * @param GCPhysStart First physical address in the range.
2368 * @param cbRange The size of the range (in bytes).
2369 */
2370 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2371
2372 /**
2373 * Allocate and register a MMIO2 region.
2374 *
2375 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2376 * RAM associated with a device. It is also non-shared memory with a
2377 * permanent ring-3 mapping and page backing (presently).
2378 *
2379 * @returns VBox status.
2380 * @param pDevIns The device instance.
2381 * @param iRegion The region number. Use the PCI region number as
2382 * this must be known to the PCI bus device too. If
2383 * it's not associated with the PCI device, then
2384 * any number up to UINT8_MAX is fine.
2385 * @param cb The size (in bytes) of the region.
2386 * @param fFlags Reserved for future use, must be zero.
2387 * @param ppv Where to store the address of the ring-3 mapping
2388 * of the memory.
2389 * @param pszDesc Pointer to description string. This must not be
2390 * freed.
2391 * @thread EMT.
2392 */
2393 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2394
2395 /**
2396 * Deregisters and frees a MMIO2 region.
2397 *
2398 * Any physical (and virtual) access handlers registered for the region must
2399 * be deregistered before calling this function.
2400 *
2401 * @returns VBox status code.
2402 * @param pDevIns The device instance.
2403 * @param iRegion The region number used during registration.
2404 * @thread EMT.
2405 */
2406 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2407
2408 /**
2409 * Maps a MMIO2 region into the physical memory space.
2410 *
2411 * A MMIO2 range may overlap with base memory if a lot of RAM
2412 * is configured for the VM, in which case we'll drop the base
2413 * memory pages. Presently we will make no attempt to preserve
2414 * anything that happens to be present in the base memory that
2415 * is replaced, this is of course incorrectly but it's too much
2416 * effort.
2417 *
2418 * @returns VBox status code.
2419 * @param pDevIns The device instance.
2420 * @param iRegion The region number used during registration.
2421 * @param GCPhys The physical address to map it at.
2422 * @thread EMT.
2423 */
2424 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2425
2426 /**
2427 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2428 *
2429 * @returns VBox status code.
2430 * @param pDevIns The device instance.
2431 * @param iRegion The region number used during registration.
2432 * @param GCPhys The physical address it's currently mapped at.
2433 * @thread EMT.
2434 */
2435 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2436
2437 /**
2438 * Maps a portion of an MMIO2 region into the hypervisor region.
2439 *
2440 * Callers of this API must never deregister the MMIO2 region before the
2441 * VM is powered off.
2442 *
2443 * @return VBox status code.
2444 * @param pDevIns The device owning the MMIO2 memory.
2445 * @param iRegion The region.
2446 * @param off The offset into the region. Will be rounded down
2447 * to closest page boundary.
2448 * @param cb The number of bytes to map. Will be rounded up
2449 * to the closest page boundary.
2450 * @param pszDesc Mapping description.
2451 * @param pRCPtr Where to store the RC address.
2452 */
2453 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2454 const char *pszDesc, PRTRCPTR pRCPtr));
2455
2456 /**
2457 * Maps a portion of an MMIO2 region into kernel space (host).
2458 *
2459 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2460 * or the VM is terminated.
2461 *
2462 * @return VBox status code.
2463 * @param pDevIns The device owning the MMIO2 memory.
2464 * @param iRegion The region.
2465 * @param off The offset into the region. Must be page
2466 * aligned.
2467 * @param cb The number of bytes to map. Must be page
2468 * aligned.
2469 * @param pszDesc Mapping description.
2470 * @param pR0Ptr Where to store the R0 address.
2471 */
2472 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2473 const char *pszDesc, PRTR0PTR pR0Ptr));
2474
2475 /**
2476 * Register a ROM (BIOS) region.
2477 *
2478 * It goes without saying that this is read-only memory. The memory region must be
2479 * in unassigned memory. I.e. from the top of the address space or on the PC in
2480 * the 0xa0000-0xfffff range.
2481 *
2482 * @returns VBox status.
2483 * @param pDevIns The device instance owning the ROM region.
2484 * @param GCPhysStart First physical address in the range.
2485 * Must be page aligned!
2486 * @param cbRange The size of the range (in bytes).
2487 * Must be page aligned!
2488 * @param pvBinary Pointer to the binary data backing the ROM image.
2489 * @param cbBinary The size of the binary pointer. This must
2490 * be equal or smaller than @a cbRange.
2491 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2492 * @param pszDesc Pointer to description string. This must not be freed.
2493 *
2494 * @remark There is no way to remove the rom, automatically on device cleanup or
2495 * manually from the device yet. At present I doubt we need such features...
2496 */
2497 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2498 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2499
2500 /**
2501 * Changes the protection of shadowed ROM mapping.
2502 *
2503 * This is intented for use by the system BIOS, chipset or device in question to
2504 * change the protection of shadowed ROM code after init and on reset.
2505 *
2506 * @param pDevIns The device instance.
2507 * @param GCPhysStart Where the mapping starts.
2508 * @param cbRange The size of the mapping.
2509 * @param enmProt The new protection type.
2510 */
2511 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2512
2513 /**
2514 * Register a save state data unit.
2515 *
2516 * @returns VBox status.
2517 * @param pDevIns The device instance.
2518 * @param pszName Data unit name.
2519 * @param uInstance The instance identifier of the data unit.
2520 * This must together with the name be unique.
2521 * @param uVersion Data layout version number.
2522 * @param cbGuess The approximate amount of data in the unit.
2523 * Only for progress indicators.
2524 * @param pszBefore Name of data unit which we should be put in
2525 * front of. Optional (NULL).
2526 *
2527 * @param pfnLivePrep Prepare live save callback, optional.
2528 * @param pfnLiveExec Execute live save callback, optional.
2529 * @param pfnLiveVote Vote live save callback, optional.
2530 *
2531 * @param pfnSavePrep Prepare save callback, optional.
2532 * @param pfnSaveExec Execute save callback, optional.
2533 * @param pfnSaveDone Done save callback, optional.
2534 *
2535 * @param pfnLoadPrep Prepare load callback, optional.
2536 * @param pfnLoadExec Execute load callback, optional.
2537 * @param pfnLoadDone Done load callback, optional.
2538 * @remarks Caller enters the device critical section prior to invoking the
2539 * registered callback methods.
2540 */
2541 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2542 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2543 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2544 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2545
2546 /**
2547 * Creates a timer.
2548 *
2549 * @returns VBox status.
2550 * @param pDevIns The device instance.
2551 * @param enmClock The clock to use on this timer.
2552 * @param pfnCallback Callback function.
2553 * @param pvUser User argument for the callback.
2554 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2555 * @param pszDesc Pointer to description string which must stay around
2556 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2557 * @param ppTimer Where to store the timer on success.
2558 * @remarks Caller enters the device critical section prior to invoking the
2559 * callback.
2560 */
2561 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2562
2563 /**
2564 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2565 *
2566 * @returns pTime.
2567 * @param pDevIns The device instance.
2568 * @param pTime Where to store the time.
2569 */
2570 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2571
2572 /**
2573 * Read physical memory.
2574 *
2575 * @returns VINF_SUCCESS (for now).
2576 * @param pDevIns The device instance.
2577 * @param GCPhys Physical address start reading from.
2578 * @param pvBuf Where to put the read bits.
2579 * @param cbRead How many bytes to read.
2580 * @thread Any thread, but the call may involve the emulation thread.
2581 */
2582 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2583
2584 /**
2585 * Write to physical memory.
2586 *
2587 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2588 * @param pDevIns The device instance.
2589 * @param GCPhys Physical address to write to.
2590 * @param pvBuf What to write.
2591 * @param cbWrite How many bytes to write.
2592 * @thread Any thread, but the call may involve the emulation thread.
2593 */
2594 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2595
2596 /**
2597 * Requests the mapping of a guest page into ring-3.
2598 *
2599 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2600 * release it.
2601 *
2602 * This API will assume your intention is to write to the page, and will
2603 * therefore replace shared and zero pages. If you do not intend to modify the
2604 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2605 *
2606 * @returns VBox status code.
2607 * @retval VINF_SUCCESS on success.
2608 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2609 * backing or if the page has any active access handlers. The caller
2610 * must fall back on using PGMR3PhysWriteExternal.
2611 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2612 *
2613 * @param pVM The VM handle.
2614 * @param GCPhys The guest physical address of the page that
2615 * should be mapped.
2616 * @param fFlags Flags reserved for future use, MBZ.
2617 * @param ppv Where to store the address corresponding to
2618 * GCPhys.
2619 * @param pLock Where to store the lock information that
2620 * pfnPhysReleasePageMappingLock needs.
2621 *
2622 * @remark Avoid calling this API from within critical sections (other than the
2623 * PGM one) because of the deadlock risk when we have to delegating the
2624 * task to an EMT.
2625 * @thread Any.
2626 */
2627 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2628
2629 /**
2630 * Requests the mapping of a guest page into ring-3, external threads.
2631 *
2632 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2633 * release it.
2634 *
2635 * @returns VBox status code.
2636 * @retval VINF_SUCCESS on success.
2637 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2638 * backing or if the page as an active ALL access handler. The caller
2639 * must fall back on using PGMPhysRead.
2640 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2641 *
2642 * @param pDevIns The device instance.
2643 * @param GCPhys The guest physical address of the page that
2644 * should be mapped.
2645 * @param fFlags Flags reserved for future use, MBZ.
2646 * @param ppv Where to store the address corresponding to
2647 * GCPhys.
2648 * @param pLock Where to store the lock information that
2649 * pfnPhysReleasePageMappingLock needs.
2650 *
2651 * @remark Avoid calling this API from within critical sections.
2652 * @thread Any.
2653 */
2654 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2655
2656 /**
2657 * Release the mapping of a guest page.
2658 *
2659 * This is the counter part of pfnPhysGCPhys2CCPtr and
2660 * pfnPhysGCPhys2CCPtrReadOnly.
2661 *
2662 * @param pDevIns The device instance.
2663 * @param pLock The lock structure initialized by the mapping
2664 * function.
2665 */
2666 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2667
2668 /**
2669 * Read guest physical memory by virtual address.
2670 *
2671 * @param pDevIns The device instance.
2672 * @param pvDst Where to put the read bits.
2673 * @param GCVirtSrc Guest virtual address to start reading from.
2674 * @param cb How many bytes to read.
2675 * @thread The emulation thread.
2676 */
2677 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2678
2679 /**
2680 * Write to guest physical memory by virtual address.
2681 *
2682 * @param pDevIns The device instance.
2683 * @param GCVirtDst Guest virtual address to write to.
2684 * @param pvSrc What to write.
2685 * @param cb How many bytes to write.
2686 * @thread The emulation thread.
2687 */
2688 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2689
2690 /**
2691 * Convert a guest virtual address to a guest physical address.
2692 *
2693 * @returns VBox status code.
2694 * @param pDevIns The device instance.
2695 * @param GCPtr Guest virtual address.
2696 * @param pGCPhys Where to store the GC physical address
2697 * corresponding to GCPtr.
2698 * @thread The emulation thread.
2699 * @remark Careful with page boundaries.
2700 */
2701 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2702
2703 /**
2704 * Allocate memory which is associated with current VM instance
2705 * and automatically freed on it's destruction.
2706 *
2707 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2708 * @param pDevIns The device instance.
2709 * @param cb Number of bytes to allocate.
2710 */
2711 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2712
2713 /**
2714 * Allocate memory which is associated with current VM instance
2715 * and automatically freed on it's destruction. The memory is ZEROed.
2716 *
2717 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2718 * @param pDevIns The device instance.
2719 * @param cb Number of bytes to allocate.
2720 */
2721 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2722
2723 /**
2724 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2725 *
2726 * @param pDevIns The device instance.
2727 * @param pv Pointer to the memory to free.
2728 */
2729 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2730
2731 /**
2732 * Gets the VM state.
2733 *
2734 * @returns VM state.
2735 * @param pDevIns The device instance.
2736 * @thread Any thread (just keep in mind that it's volatile info).
2737 */
2738 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2739
2740 /**
2741 * Checks if the VM was teleported and hasn't been fully resumed yet.
2742 *
2743 * @returns true / false.
2744 * @param pDevIns The device instance.
2745 * @thread Any thread.
2746 */
2747 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2748
2749 /**
2750 * Set the VM error message
2751 *
2752 * @returns rc.
2753 * @param pDevIns The device instance.
2754 * @param rc VBox status code.
2755 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2756 * @param pszFormat Error message format string.
2757 * @param ... Error message arguments.
2758 */
2759 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2760
2761 /**
2762 * Set the VM error message
2763 *
2764 * @returns rc.
2765 * @param pDevIns The device instance.
2766 * @param rc VBox status code.
2767 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2768 * @param pszFormat Error message format string.
2769 * @param va Error message arguments.
2770 */
2771 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2772
2773 /**
2774 * Set the VM runtime error message
2775 *
2776 * @returns VBox status code.
2777 * @param pDevIns The device instance.
2778 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2779 * @param pszErrorId Error ID string.
2780 * @param pszFormat Error message format string.
2781 * @param ... Error message arguments.
2782 */
2783 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2784
2785 /**
2786 * Set the VM runtime error message
2787 *
2788 * @returns VBox status code.
2789 * @param pDevIns The device instance.
2790 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2791 * @param pszErrorId Error ID string.
2792 * @param pszFormat Error message format string.
2793 * @param va Error message arguments.
2794 */
2795 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2796
2797 /**
2798 * Stops the VM and enters the debugger to look at the guest state.
2799 *
2800 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2801 * invoking this function directly.
2802 *
2803 * @returns VBox status code which must be passed up to the VMM.
2804 * @param pDevIns The device instance.
2805 * @param pszFile Filename of the assertion location.
2806 * @param iLine The linenumber of the assertion location.
2807 * @param pszFunction Function of the assertion location.
2808 * @param pszFormat Message. (optional)
2809 * @param args Message parameters.
2810 */
2811 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2812
2813 /**
2814 * Register a info handler with DBGF,
2815 *
2816 * @returns VBox status code.
2817 * @param pDevIns The device instance.
2818 * @param pszName The identifier of the info.
2819 * @param pszDesc The description of the info and any arguments
2820 * the handler may take.
2821 * @param pfnHandler The handler function to be called to display the
2822 * info.
2823 */
2824 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2825
2826 /**
2827 * Registers a set of registers for a device.
2828 *
2829 * The @a pvUser argument of the getter and setter callbacks will be
2830 * @a pDevIns. The register names will be prefixed by the device name followed
2831 * immediately by the instance number.
2832 *
2833 * @returns VBox status code.
2834 * @param pDevIns The device instance.
2835 * @param paRegisters The register descriptors.
2836 *
2837 * @remarks The device critical section is NOT entered prior to working the
2838 * callbacks registered via this helper!
2839 */
2840 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2841
2842 /**
2843 * Gets the trace buffer handle.
2844 *
2845 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2846 * really inteded for direct usage, thus no inline wrapper function.
2847 *
2848 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2849 * @param pDevIns The device instance.
2850 */
2851 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2852
2853 /**
2854 * Registers a statistics sample if statistics are enabled.
2855 *
2856 * @param pDevIns Device instance of the DMA.
2857 * @param pvSample Pointer to the sample.
2858 * @param enmType Sample type. This indicates what pvSample is
2859 * pointing at.
2860 * @param pszName Sample name. The name is on this form
2861 * "/<component>/<sample>". Further nesting is
2862 * possible.
2863 * @param enmUnit Sample unit.
2864 * @param pszDesc Sample description.
2865 */
2866 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2867
2868 /**
2869 * Same as pfnSTAMRegister except that the name is specified in a
2870 * RTStrPrintf like fashion.
2871 *
2872 * @returns VBox status.
2873 * @param pDevIns Device instance of the DMA.
2874 * @param pvSample Pointer to the sample.
2875 * @param enmType Sample type. This indicates what pvSample is
2876 * pointing at.
2877 * @param enmVisibility Visibility type specifying whether unused
2878 * statistics should be visible or not.
2879 * @param enmUnit Sample unit.
2880 * @param pszDesc Sample description.
2881 * @param pszName The sample name format string.
2882 * @param ... Arguments to the format string.
2883 */
2884 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2885 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2886
2887 /**
2888 * Same as pfnSTAMRegister except that the name is specified in a
2889 * RTStrPrintfV like fashion.
2890 *
2891 * @returns VBox status.
2892 * @param pDevIns Device instance of the DMA.
2893 * @param pvSample Pointer to the sample.
2894 * @param enmType Sample type. This indicates what pvSample is
2895 * pointing at.
2896 * @param enmVisibility Visibility type specifying whether unused
2897 * statistics should be visible or not.
2898 * @param enmUnit Sample unit.
2899 * @param pszDesc Sample description.
2900 * @param pszName The sample name format string.
2901 * @param args Arguments to the format string.
2902 */
2903 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2904 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2905
2906 /**
2907 * Registers the device with the default PCI bus.
2908 *
2909 * @returns VBox status code.
2910 * @param pDevIns The device instance.
2911 * @param pPciDev The PCI device structure.
2912 * Any PCI enabled device must keep this in it's instance data!
2913 * Fill in the PCI data config before registration, please.
2914 * @remark This is the simple interface, a Ex interface will be created if
2915 * more features are needed later.
2916 */
2917 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2918
2919 /**
2920 * Initialize MSI support in a PCI device.
2921 *
2922 * @returns VBox status code.
2923 * @param pDevIns The device instance.
2924 * @param pMsiReg MSI registartion structure.
2925 */
2926 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2927
2928 /**
2929 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2930 *
2931 * @returns VBox status code.
2932 * @param pDevIns The device instance.
2933 * @param iRegion The region number.
2934 * @param cbRegion Size of the region.
2935 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2936 * @param pfnCallback Callback for doing the mapping.
2937 * @remarks The callback will be invoked holding the PDM lock. The device lock
2938 * is NOT take because that is very likely be a lock order violation.
2939 */
2940 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2941 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2942
2943 /**
2944 * Register PCI configuration space read/write callbacks.
2945 *
2946 * @param pDevIns The device instance.
2947 * @param pPciDev The PCI device structure.
2948 * If NULL the default PCI device for this device instance is used.
2949 * @param pfnRead Pointer to the user defined PCI config read function.
2950 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2951 * PCI config read function. This way, user can decide when (and if)
2952 * to call default PCI config read function. Can be NULL.
2953 * @param pfnWrite Pointer to the user defined PCI config write function.
2954 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2955 * PCI config write function. This way, user can decide when (and if)
2956 * to call default PCI config write function. Can be NULL.
2957 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2958 * is NOT take because that is very likely be a lock order violation.
2959 * @thread EMT
2960 */
2961 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2962 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2963
2964 /**
2965 * Bus master physical memory read.
2966 *
2967 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2968 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2969 * @param pDevIns The device instance.
2970 * @param GCPhys Physical address start reading from.
2971 * @param pvBuf Where to put the read bits.
2972 * @param cbRead How many bytes to read.
2973 * @thread Any thread, but the call may involve the emulation thread.
2974 */
2975 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2976
2977 /**
2978 * Bus master physical memory write.
2979 *
2980 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2981 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2982 * @param pDevIns The device instance.
2983 * @param GCPhys Physical address to write to.
2984 * @param pvBuf What to write.
2985 * @param cbWrite How many bytes to write.
2986 * @thread Any thread, but the call may involve the emulation thread.
2987 */
2988 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2989
2990 /**
2991 * Set the IRQ for a PCI device.
2992 *
2993 * @param pDevIns The device instance.
2994 * @param iIrq IRQ number to set.
2995 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2996 * @thread Any thread, but will involve the emulation thread.
2997 */
2998 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2999
3000 /**
3001 * Set the IRQ for a PCI device, but don't wait for EMT to process
3002 * the request when not called from EMT.
3003 *
3004 * @param pDevIns The device instance.
3005 * @param iIrq IRQ number to set.
3006 * @param iLevel IRQ level.
3007 * @thread Any thread, but will involve the emulation thread.
3008 */
3009 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3010
3011 /**
3012 * Set ISA IRQ for a device.
3013 *
3014 * @param pDevIns The device instance.
3015 * @param iIrq IRQ number to set.
3016 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3017 * @thread Any thread, but will involve the emulation thread.
3018 */
3019 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3020
3021 /**
3022 * Set the ISA IRQ for a device, but don't wait for EMT to process
3023 * the request when not called from EMT.
3024 *
3025 * @param pDevIns The device instance.
3026 * @param iIrq IRQ number to set.
3027 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3028 * @thread Any thread, but will involve the emulation thread.
3029 */
3030 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3031
3032 /**
3033 * Attaches a driver (chain) to the device.
3034 *
3035 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3036 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3037 *
3038 * @returns VBox status code.
3039 * @param pDevIns The device instance.
3040 * @param iLun The logical unit to attach.
3041 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3042 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3043 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3044 * for the live of the device instance.
3045 */
3046 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3047 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3048
3049 /**
3050 * Create a queue.
3051 *
3052 * @returns VBox status code.
3053 * @param pDevIns The device instance.
3054 * @param cbItem The size of a queue item.
3055 * @param cItems The number of items in the queue.
3056 * @param cMilliesInterval The number of milliseconds between polling the queue.
3057 * If 0 then the emulation thread will be notified whenever an item arrives.
3058 * @param pfnCallback The consumer function.
3059 * @param fRZEnabled Set if the queue should work in RC and R0.
3060 * @param pszName The queue base name. The instance number will be
3061 * appended automatically.
3062 * @param ppQueue Where to store the queue handle on success.
3063 * @thread The emulation thread.
3064 * @remarks The device critical section will NOT be entered before calling the
3065 * callback. No locks will be held, but for now it's safe to assume
3066 * that only one EMT will do queue callbacks at any one time.
3067 */
3068 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3069 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3070
3071 /**
3072 * Initializes a PDM critical section.
3073 *
3074 * The PDM critical sections are derived from the IPRT critical sections, but
3075 * works in RC and R0 as well.
3076 *
3077 * @returns VBox status code.
3078 * @param pDevIns The device instance.
3079 * @param pCritSect Pointer to the critical section.
3080 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3081 * @param pszNameFmt Format string for naming the critical section.
3082 * For statistics and lock validation.
3083 * @param va Arguments for the format string.
3084 */
3085 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3086 const char *pszNameFmt, va_list va));
3087
3088 /**
3089 * Gets the NOP critical section.
3090 *
3091 * @returns The ring-3 address of the NOP critical section.
3092 * @param pDevIns The device instance.
3093 */
3094 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3095
3096 /**
3097 * Gets the NOP critical section.
3098 *
3099 * @returns The ring-0 address of the NOP critical section.
3100 * @param pDevIns The device instance.
3101 */
3102 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3103
3104 /**
3105 * Gets the NOP critical section.
3106 *
3107 * @returns The raw-mode context address of the NOP critical section.
3108 * @param pDevIns The device instance.
3109 */
3110 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3111
3112 /**
3113 * Changes the device level critical section from the automatically created
3114 * default to one desired by the device constructor.
3115 *
3116 * @returns VBox status code.
3117 * @param pDevIns The device instance.
3118 * @param pCritSect The critical section to use. NULL is not
3119 * valid, instead use the NOP critical
3120 * section.
3121 */
3122 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3123
3124 /**
3125 * Creates a PDM thread.
3126 *
3127 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3128 * resuming, and destroying the thread as the VM state changes.
3129 *
3130 * @returns VBox status code.
3131 * @param pDevIns The device instance.
3132 * @param ppThread Where to store the thread 'handle'.
3133 * @param pvUser The user argument to the thread function.
3134 * @param pfnThread The thread function.
3135 * @param pfnWakeup The wakup callback. This is called on the EMT
3136 * thread when a state change is pending.
3137 * @param cbStack See RTThreadCreate.
3138 * @param enmType See RTThreadCreate.
3139 * @param pszName See RTThreadCreate.
3140 * @remarks The device critical section will NOT be entered prior to invoking
3141 * the function pointers.
3142 */
3143 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3144 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3145
3146 /**
3147 * Set up asynchronous handling of a suspend, reset or power off notification.
3148 *
3149 * This shall only be called when getting the notification. It must be called
3150 * for each one.
3151 *
3152 * @returns VBox status code.
3153 * @param pDevIns The device instance.
3154 * @param pfnAsyncNotify The callback.
3155 * @thread EMT(0)
3156 * @remarks The caller will enter the device critical section prior to invoking
3157 * the callback.
3158 */
3159 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3160
3161 /**
3162 * Notify EMT(0) that the device has completed the asynchronous notification
3163 * handling.
3164 *
3165 * This can be called at any time, spurious calls will simply be ignored.
3166 *
3167 * @param pDevIns The device instance.
3168 * @thread Any
3169 */
3170 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3171
3172 /**
3173 * Register the RTC device.
3174 *
3175 * @returns VBox status code.
3176 * @param pDevIns The device instance.
3177 * @param pRtcReg Pointer to a RTC registration structure.
3178 * @param ppRtcHlp Where to store the pointer to the helper
3179 * functions.
3180 */
3181 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3182
3183 /**
3184 * Register the PCI Bus.
3185 *
3186 * @returns VBox status code.
3187 * @param pDevIns The device instance.
3188 * @param pPciBusReg Pointer to PCI bus registration structure.
3189 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3190 * helpers.
3191 */
3192 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3193
3194 /**
3195 * Register the PIC device.
3196 *
3197 * @returns VBox status code.
3198 * @param pDevIns The device instance.
3199 * @param pPicReg Pointer to a PIC registration structure.
3200 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3201 * helpers.
3202 */
3203 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3204
3205 /**
3206 * Register the APIC device.
3207 *
3208 * @returns VBox status code.
3209 * @param pDevIns The device instance.
3210 * @param pApicReg Pointer to a APIC registration structure.
3211 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3212 */
3213 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3214
3215 /**
3216 * Register the I/O APIC device.
3217 *
3218 * @returns VBox status code.
3219 * @param pDevIns The device instance.
3220 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3221 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3222 * helpers.
3223 */
3224 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3225
3226 /**
3227 * Register the HPET device.
3228 *
3229 * @returns VBox status code.
3230 * @param pDevIns The device instance.
3231 * @param pHpetReg Pointer to a HPET registration structure.
3232 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3233 * helpers.
3234 */
3235 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3236
3237 /**
3238 * Register a raw PCI device.
3239 *
3240 * @returns VBox status code.
3241 * @param pDevIns The device instance.
3242 * @param pHpetReg Pointer to a raw PCI registration structure.
3243 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3244 * device helpers.
3245 */
3246 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3247
3248 /**
3249 * Register the DMA device.
3250 *
3251 * @returns VBox status code.
3252 * @param pDevIns The device instance.
3253 * @param pDmacReg Pointer to a DMAC registration structure.
3254 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3255 */
3256 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3257
3258 /**
3259 * Register transfer function for DMA channel.
3260 *
3261 * @returns VBox status code.
3262 * @param pDevIns The device instance.
3263 * @param uChannel Channel number.
3264 * @param pfnTransferHandler Device specific transfer callback function.
3265 * @param pvUser User pointer to pass to the callback.
3266 * @thread EMT
3267 */
3268 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3269
3270 /**
3271 * Read memory.
3272 *
3273 * @returns VBox status code.
3274 * @param pDevIns The device instance.
3275 * @param uChannel Channel number.
3276 * @param pvBuffer Pointer to target buffer.
3277 * @param off DMA position.
3278 * @param cbBlock Block size.
3279 * @param pcbRead Where to store the number of bytes which was
3280 * read. optional.
3281 * @thread EMT
3282 */
3283 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3284
3285 /**
3286 * Write memory.
3287 *
3288 * @returns VBox status code.
3289 * @param pDevIns The device instance.
3290 * @param uChannel Channel number.
3291 * @param pvBuffer Memory to write.
3292 * @param off DMA position.
3293 * @param cbBlock Block size.
3294 * @param pcbWritten Where to store the number of bytes which was
3295 * written. optional.
3296 * @thread EMT
3297 */
3298 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3299
3300 /**
3301 * Set the DREQ line.
3302 *
3303 * @returns VBox status code.
3304 * @param pDevIns Device instance.
3305 * @param uChannel Channel number.
3306 * @param uLevel Level of the line.
3307 * @thread EMT
3308 */
3309 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3310
3311 /**
3312 * Get channel mode.
3313 *
3314 * @returns Channel mode. See specs.
3315 * @param pDevIns The device instance.
3316 * @param uChannel Channel number.
3317 * @thread EMT
3318 */
3319 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3320
3321 /**
3322 * Schedule DMA execution.
3323 *
3324 * @param pDevIns The device instance.
3325 * @thread Any thread.
3326 */
3327 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3328
3329 /**
3330 * Write CMOS value and update the checksum(s).
3331 *
3332 * @returns VBox status code.
3333 * @param pDevIns The device instance.
3334 * @param iReg The CMOS register index.
3335 * @param u8Value The CMOS register value.
3336 * @thread EMT
3337 */
3338 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3339
3340 /**
3341 * Read CMOS value.
3342 *
3343 * @returns VBox status code.
3344 * @param pDevIns The device instance.
3345 * @param iReg The CMOS register index.
3346 * @param pu8Value Where to store the CMOS register value.
3347 * @thread EMT
3348 */
3349 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3350
3351 /**
3352 * Assert that the current thread is the emulation thread.
3353 *
3354 * @returns True if correct.
3355 * @returns False if wrong.
3356 * @param pDevIns The device instance.
3357 * @param pszFile Filename of the assertion location.
3358 * @param iLine The linenumber of the assertion location.
3359 * @param pszFunction Function of the assertion location.
3360 */
3361 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3362
3363 /**
3364 * Assert that the current thread is NOT the emulation thread.
3365 *
3366 * @returns True if correct.
3367 * @returns False if wrong.
3368 * @param pDevIns The device instance.
3369 * @param pszFile Filename of the assertion location.
3370 * @param iLine The linenumber of the assertion location.
3371 * @param pszFunction Function of the assertion location.
3372 */
3373 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3374
3375 /**
3376 * Resolves the symbol for a raw-mode context interface.
3377 *
3378 * @returns VBox status code.
3379 * @param pDevIns The device instance.
3380 * @param pvInterface The interface structure.
3381 * @param cbInterface The size of the interface structure.
3382 * @param pszSymPrefix What to prefix the symbols in the list with
3383 * before resolving them. This must start with
3384 * 'dev' and contain the driver name.
3385 * @param pszSymList List of symbols corresponding to the interface.
3386 * There is generally a there is generally a define
3387 * holding this list associated with the interface
3388 * definition (INTERFACE_SYM_LIST). For more
3389 * details see PDMR3LdrGetInterfaceSymbols.
3390 * @thread EMT
3391 */
3392 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3393 const char *pszSymPrefix, const char *pszSymList));
3394
3395 /**
3396 * Resolves the symbol for a ring-0 context interface.
3397 *
3398 * @returns VBox status code.
3399 * @param pDevIns The device instance.
3400 * @param pvInterface The interface structure.
3401 * @param cbInterface The size of the interface structure.
3402 * @param pszSymPrefix What to prefix the symbols in the list with
3403 * before resolving them. This must start with
3404 * 'dev' and contain the driver name.
3405 * @param pszSymList List of symbols corresponding to the interface.
3406 * There is generally a there is generally a define
3407 * holding this list associated with the interface
3408 * definition (INTERFACE_SYM_LIST). For more
3409 * details see PDMR3LdrGetInterfaceSymbols.
3410 * @thread EMT
3411 */
3412 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3413 const char *pszSymPrefix, const char *pszSymList));
3414
3415 /**
3416 * Call the ring-0 request handler routine of the device.
3417 *
3418 * For this to work, the device must be ring-0 enabled and export a request
3419 * handler function. The name of the function must be the device name in
3420 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3421 * 'ReqHandler'. The device name will be captialized. It shall take the
3422 * exact same arguments as this function and be declared using
3423 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3424 *
3425 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3426 * or two as the handler address will be resolved on each invocation. This
3427 * is the reason for the EMT only restriction as well.
3428 *
3429 * @returns VBox status code.
3430 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3431 * handler function.
3432 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3433 *
3434 * @param pDevIns The device instance.
3435 * @param uOperation The operation to perform.
3436 * @param u64Arg 64-bit integer argument.
3437 * @thread EMT
3438 */
3439 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3440
3441 /** Space reserved for future members.
3442 * @{ */
3443 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3444 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3445 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3446 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3447 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3448 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3449 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3450 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3451 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3452 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3453 /** @} */
3454
3455
3456 /** API available to trusted devices only.
3457 *
3458 * These APIs are providing unrestricted access to the guest and the VM,
3459 * or they are interacting intimately with PDM.
3460 *
3461 * @{
3462 */
3463
3464 /**
3465 * Gets the user mode VM handle. Restricted API.
3466 *
3467 * @returns User mode VM Handle.
3468 * @param pDevIns The device instance.
3469 */
3470 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3471
3472 /**
3473 * Gets the global VM handle. Restricted API.
3474 *
3475 * @returns VM Handle.
3476 * @param pDevIns The device instance.
3477 */
3478 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3479
3480 /**
3481 * Gets the VMCPU handle. Restricted API.
3482 *
3483 * @returns VMCPU Handle.
3484 * @param pDevIns The device instance.
3485 */
3486 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3487
3488 /**
3489 * Registers the VMM device heap
3490 *
3491 * @returns VBox status code.
3492 * @param pDevIns The device instance.
3493 * @param GCPhys The physical address.
3494 * @param pvHeap Ring 3 heap pointer.
3495 * @param cbSize Size of the heap.
3496 * @thread EMT.
3497 */
3498 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3499
3500 /**
3501 * Unregisters the VMM device heap
3502 *
3503 * @returns VBox status code.
3504 * @param pDevIns The device instance.
3505 * @param GCPhys The physical address.
3506 * @thread EMT.
3507 */
3508 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3509
3510 /**
3511 * Resets the VM.
3512 *
3513 * @returns The appropriate VBox status code to pass around on reset.
3514 * @param pDevIns The device instance.
3515 * @thread The emulation thread.
3516 */
3517 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3518
3519 /**
3520 * Suspends the VM.
3521 *
3522 * @returns The appropriate VBox status code to pass around on suspend.
3523 * @param pDevIns The device instance.
3524 * @thread The emulation thread.
3525 */
3526 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3527
3528 /**
3529 * Suspends, saves and powers off the VM.
3530 *
3531 * @returns The appropriate VBox status code to pass around.
3532 * @param pDevIns The device instance.
3533 * @thread An emulation thread.
3534 */
3535 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3536
3537 /**
3538 * Power off the VM.
3539 *
3540 * @returns The appropriate VBox status code to pass around on power off.
3541 * @param pDevIns The device instance.
3542 * @thread The emulation thread.
3543 */
3544 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3545
3546 /**
3547 * Checks if the Gate A20 is enabled or not.
3548 *
3549 * @returns true if A20 is enabled.
3550 * @returns false if A20 is disabled.
3551 * @param pDevIns The device instance.
3552 * @thread The emulation thread.
3553 */
3554 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3555
3556 /**
3557 * Enables or disables the Gate A20.
3558 *
3559 * @param pDevIns The device instance.
3560 * @param fEnable Set this flag to enable the Gate A20; clear it
3561 * to disable.
3562 * @thread The emulation thread.
3563 */
3564 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3565
3566 /**
3567 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3568 * thread.
3569 *
3570 * @param pDevIns The device instance.
3571 * @param iLeaf The CPUID leaf to get.
3572 * @param pEax Where to store the EAX value.
3573 * @param pEbx Where to store the EBX value.
3574 * @param pEcx Where to store the ECX value.
3575 * @param pEdx Where to store the EDX value.
3576 * @thread EMT.
3577 */
3578 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3579
3580 /**
3581 * Get the current virtual clock time in a VM. The clock frequency must be
3582 * queried separately.
3583 *
3584 * @returns Current clock time.
3585 * @param pDevIns The device instance.
3586 */
3587 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3588
3589 /**
3590 * Get the frequency of the virtual clock.
3591 *
3592 * @returns The clock frequency (not variable at run-time).
3593 * @param pDevIns The device instance.
3594 */
3595 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3596
3597 /**
3598 * Get the current virtual clock time in a VM, in nanoseconds.
3599 *
3600 * @returns Current clock time (in ns).
3601 * @param pDevIns The device instance.
3602 */
3603 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3604
3605 /**
3606 * Gets the support driver session.
3607 *
3608 * This is intended for working with the semaphore API.
3609 *
3610 * @returns Support driver session handle.
3611 * @param pDrvIns The driver instance.
3612 */
3613 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3614
3615 /** @} */
3616
3617 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3618 uint32_t u32TheEnd;
3619} PDMDEVHLPR3;
3620#endif /* !IN_RING3 */
3621/** Pointer to the R3 PDM Device API. */
3622typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3623/** Pointer to the R3 PDM Device API, const variant. */
3624typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3625
3626/** Current PDMDEVHLPR3 version number. */
3627#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 12, 0)
3628
3629
3630/**
3631 * PDM Device API - RC Variant.
3632 */
3633typedef struct PDMDEVHLPRC
3634{
3635 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3636 uint32_t u32Version;
3637
3638 /**
3639 * Bus master physical memory read.
3640 *
3641 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3642 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3643 * @param pDevIns The device instance.
3644 * @param GCPhys Physical address start reading from.
3645 * @param pvBuf Where to put the read bits.
3646 * @param cbRead How many bytes to read.
3647 * @thread Any thread, but the call may involve the emulation thread.
3648 */
3649 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3650
3651 /**
3652 * Bus master physical memory write.
3653 *
3654 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3655 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3656 * @param pDevIns The device instance.
3657 * @param GCPhys Physical address to write to.
3658 * @param pvBuf What to write.
3659 * @param cbWrite How many bytes to write.
3660 * @thread Any thread, but the call may involve the emulation thread.
3661 */
3662 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3663
3664 /**
3665 * Set the IRQ for a PCI device.
3666 *
3667 * @param pDevIns Device instance.
3668 * @param iIrq IRQ number to set.
3669 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3670 * @thread Any thread, but will involve the emulation thread.
3671 */
3672 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3673
3674 /**
3675 * Set ISA IRQ for a device.
3676 *
3677 * @param pDevIns Device instance.
3678 * @param iIrq IRQ number to set.
3679 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3680 * @thread Any thread, but will involve the emulation thread.
3681 */
3682 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3683
3684 /**
3685 * Read physical memory.
3686 *
3687 * @returns VINF_SUCCESS (for now).
3688 * @param pDevIns Device instance.
3689 * @param GCPhys Physical address start reading from.
3690 * @param pvBuf Where to put the read bits.
3691 * @param cbRead How many bytes to read.
3692 */
3693 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3694
3695 /**
3696 * Write to physical memory.
3697 *
3698 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3699 * @param pDevIns Device instance.
3700 * @param GCPhys Physical address to write to.
3701 * @param pvBuf What to write.
3702 * @param cbWrite How many bytes to write.
3703 */
3704 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3705
3706 /**
3707 * Checks if the Gate A20 is enabled or not.
3708 *
3709 * @returns true if A20 is enabled.
3710 * @returns false if A20 is disabled.
3711 * @param pDevIns Device instance.
3712 * @thread The emulation thread.
3713 */
3714 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3715
3716 /**
3717 * Gets the VM state.
3718 *
3719 * @returns VM state.
3720 * @param pDevIns The device instance.
3721 * @thread Any thread (just keep in mind that it's volatile info).
3722 */
3723 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3724
3725 /**
3726 * Set the VM error message
3727 *
3728 * @returns rc.
3729 * @param pDrvIns Driver instance.
3730 * @param rc VBox status code.
3731 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3732 * @param pszFormat Error message format string.
3733 * @param ... Error message arguments.
3734 */
3735 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3736
3737 /**
3738 * Set the VM error message
3739 *
3740 * @returns rc.
3741 * @param pDrvIns Driver instance.
3742 * @param rc VBox status code.
3743 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3744 * @param pszFormat Error message format string.
3745 * @param va Error message arguments.
3746 */
3747 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3748
3749 /**
3750 * Set the VM runtime error message
3751 *
3752 * @returns VBox status code.
3753 * @param pDevIns Device instance.
3754 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3755 * @param pszErrorId Error ID string.
3756 * @param pszFormat Error message format string.
3757 * @param ... Error message arguments.
3758 */
3759 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3760
3761 /**
3762 * Set the VM runtime error message
3763 *
3764 * @returns VBox status code.
3765 * @param pDevIns Device instance.
3766 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3767 * @param pszErrorId Error ID string.
3768 * @param pszFormat Error message format string.
3769 * @param va Error message arguments.
3770 */
3771 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3772
3773 /**
3774 * Set parameters for pending MMIO patch operation
3775 *
3776 * @returns VBox status code.
3777 * @param pDevIns Device instance.
3778 * @param GCPhys MMIO physical address
3779 * @param pCachedData GC pointer to cached data
3780 */
3781 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3782
3783 /**
3784 * Gets the VM handle. Restricted API.
3785 *
3786 * @returns VM Handle.
3787 * @param pDevIns Device instance.
3788 */
3789 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3790
3791 /**
3792 * Gets the VMCPU handle. Restricted API.
3793 *
3794 * @returns VMCPU Handle.
3795 * @param pDevIns The device instance.
3796 */
3797 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3798
3799 /**
3800 * Get the current virtual clock time in a VM. The clock frequency must be
3801 * queried separately.
3802 *
3803 * @returns Current clock time.
3804 * @param pDevIns The device instance.
3805 */
3806 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3807
3808 /**
3809 * Get the frequency of the virtual clock.
3810 *
3811 * @returns The clock frequency (not variable at run-time).
3812 * @param pDevIns The device instance.
3813 */
3814 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3815
3816 /**
3817 * Get the current virtual clock time in a VM, in nanoseconds.
3818 *
3819 * @returns Current clock time (in ns).
3820 * @param pDevIns The device instance.
3821 */
3822 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3823
3824 /**
3825 * Gets the trace buffer handle.
3826 *
3827 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3828 * really inteded for direct usage, thus no inline wrapper function.
3829 *
3830 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3831 * @param pDevIns The device instance.
3832 */
3833 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3834
3835 /** Just a safety precaution. */
3836 uint32_t u32TheEnd;
3837} PDMDEVHLPRC;
3838/** Pointer PDM Device RC API. */
3839typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3840/** Pointer PDM Device RC API. */
3841typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3842
3843/** Current PDMDEVHLP version number. */
3844#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 1)
3845
3846
3847/**
3848 * PDM Device API - R0 Variant.
3849 */
3850typedef struct PDMDEVHLPR0
3851{
3852 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3853 uint32_t u32Version;
3854
3855 /**
3856 * Bus master physical memory read.
3857 *
3858 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3859 * VERR_EM_MEMORY.
3860 * @param pDevIns The device instance.
3861 * @param GCPhys Physical address start reading from.
3862 * @param pvBuf Where to put the read bits.
3863 * @param cbRead How many bytes to read.
3864 * @thread Any thread, but the call may involve the emulation thread.
3865 */
3866 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3867
3868 /**
3869 * Bus master physical memory write.
3870 *
3871 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3872 * VERR_EM_MEMORY.
3873 * @param pDevIns The device instance.
3874 * @param GCPhys Physical address to write to.
3875 * @param pvBuf What to write.
3876 * @param cbWrite How many bytes to write.
3877 * @thread Any thread, but the call may involve the emulation thread.
3878 */
3879 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3880
3881 /**
3882 * Set the IRQ for a PCI device.
3883 *
3884 * @param pDevIns Device instance.
3885 * @param iIrq IRQ number to set.
3886 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3887 * @thread Any thread, but will involve the emulation thread.
3888 */
3889 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3890
3891 /**
3892 * Set ISA IRQ for a device.
3893 *
3894 * @param pDevIns Device instance.
3895 * @param iIrq IRQ number to set.
3896 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3897 * @thread Any thread, but will involve the emulation thread.
3898 */
3899 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3900
3901 /**
3902 * Read physical memory.
3903 *
3904 * @returns VINF_SUCCESS (for now).
3905 * @param pDevIns Device instance.
3906 * @param GCPhys Physical address start reading from.
3907 * @param pvBuf Where to put the read bits.
3908 * @param cbRead How many bytes to read.
3909 */
3910 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3911
3912 /**
3913 * Write to physical memory.
3914 *
3915 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3916 * @param pDevIns Device instance.
3917 * @param GCPhys Physical address to write to.
3918 * @param pvBuf What to write.
3919 * @param cbWrite How many bytes to write.
3920 */
3921 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3922
3923 /**
3924 * Checks if the Gate A20 is enabled or not.
3925 *
3926 * @returns true if A20 is enabled.
3927 * @returns false if A20 is disabled.
3928 * @param pDevIns Device instance.
3929 * @thread The emulation thread.
3930 */
3931 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3932
3933 /**
3934 * Gets the VM state.
3935 *
3936 * @returns VM state.
3937 * @param pDevIns The device instance.
3938 * @thread Any thread (just keep in mind that it's volatile info).
3939 */
3940 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3941
3942 /**
3943 * Set the VM error message
3944 *
3945 * @returns rc.
3946 * @param pDrvIns Driver instance.
3947 * @param rc VBox status code.
3948 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3949 * @param pszFormat Error message format string.
3950 * @param ... Error message arguments.
3951 */
3952 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3953
3954 /**
3955 * Set the VM error message
3956 *
3957 * @returns rc.
3958 * @param pDrvIns Driver instance.
3959 * @param rc VBox status code.
3960 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3961 * @param pszFormat Error message format string.
3962 * @param va Error message arguments.
3963 */
3964 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3965
3966 /**
3967 * Set the VM runtime error message
3968 *
3969 * @returns VBox status code.
3970 * @param pDevIns Device instance.
3971 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3972 * @param pszErrorId Error ID string.
3973 * @param pszFormat Error message format string.
3974 * @param ... Error message arguments.
3975 */
3976 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3977
3978 /**
3979 * Set the VM runtime error message
3980 *
3981 * @returns VBox status code.
3982 * @param pDevIns Device instance.
3983 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3984 * @param pszErrorId Error ID string.
3985 * @param pszFormat Error message format string.
3986 * @param va Error message arguments.
3987 */
3988 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3989
3990 /**
3991 * Set parameters for pending MMIO patch operation
3992 *
3993 * @returns rc.
3994 * @param pDevIns Device instance.
3995 * @param GCPhys MMIO physical address
3996 * @param pCachedData GC pointer to cached data
3997 */
3998 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3999
4000 /**
4001 * Gets the VM handle. Restricted API.
4002 *
4003 * @returns VM Handle.
4004 * @param pDevIns Device instance.
4005 */
4006 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4007
4008 /**
4009 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4010 *
4011 * @returns true = yes, false = no
4012 * @param pDevIns Device instance.
4013 */
4014 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4015
4016 /**
4017 * Gets the VMCPU handle. Restricted API.
4018 *
4019 * @returns VMCPU Handle.
4020 * @param pDevIns The device instance.
4021 */
4022 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4023
4024 /**
4025 * Get the current virtual clock time in a VM. The clock frequency must be
4026 * queried separately.
4027 *
4028 * @returns Current clock time.
4029 * @param pDevIns The device instance.
4030 */
4031 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4032
4033 /**
4034 * Get the frequency of the virtual clock.
4035 *
4036 * @returns The clock frequency (not variable at run-time).
4037 * @param pDevIns The device instance.
4038 */
4039 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4040
4041 /**
4042 * Get the current virtual clock time in a VM, in nanoseconds.
4043 *
4044 * @returns Current clock time (in ns).
4045 * @param pDevIns The device instance.
4046 */
4047 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4048
4049 /**
4050 * Gets the trace buffer handle.
4051 *
4052 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4053 * really inteded for direct usage, thus no inline wrapper function.
4054 *
4055 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4056 * @param pDevIns The device instance.
4057 */
4058 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4059
4060 /** Just a safety precaution. */
4061 uint32_t u32TheEnd;
4062} PDMDEVHLPR0;
4063/** Pointer PDM Device R0 API. */
4064typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4065/** Pointer PDM Device GC API. */
4066typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4067
4068/** Current PDMDEVHLP version number. */
4069#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 1)
4070
4071
4072
4073/**
4074 * PDM Device Instance.
4075 */
4076typedef struct PDMDEVINS
4077{
4078 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4079 uint32_t u32Version;
4080 /** Device instance number. */
4081 uint32_t iInstance;
4082
4083 /** Pointer the GC PDM Device API. */
4084 PCPDMDEVHLPRC pHlpRC;
4085 /** Pointer to device instance data. */
4086 RTRCPTR pvInstanceDataRC;
4087 /** The critical section for the device, see pCritSectXR3. */
4088 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4089 /** Alignment padding. */
4090 RTRCPTR pAlignmentRC;
4091
4092 /** Pointer the R0 PDM Device API. */
4093 PCPDMDEVHLPR0 pHlpR0;
4094 /** Pointer to device instance data (R0). */
4095 RTR0PTR pvInstanceDataR0;
4096 /** The critical section for the device, see pCritSectXR3. */
4097 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4098
4099 /** Pointer the HC PDM Device API. */
4100 PCPDMDEVHLPR3 pHlpR3;
4101 /** Pointer to device instance data. */
4102 RTR3PTR pvInstanceDataR3;
4103 /** The critical section for the device.
4104 *
4105 * TM and IOM will enter this critical section before calling into the device
4106 * code. PDM will when doing power on, power off, reset, suspend and resume
4107 * notifications. SSM will currently not, but this will be changed later on.
4108 *
4109 * The device gets a critical section automatically assigned to it before
4110 * the constructor is called. If the constructor wishes to use a different
4111 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4112 * very early on.
4113 */
4114 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4115
4116 /** Pointer to device registration structure. */
4117 R3PTRTYPE(PCPDMDEVREG) pReg;
4118 /** Configuration handle. */
4119 R3PTRTYPE(PCFGMNODE) pCfg;
4120
4121 /** The base interface of the device.
4122 *
4123 * The device constructor initializes this if it has any
4124 * device level interfaces to export. To obtain this interface
4125 * call PDMR3QueryDevice(). */
4126 PDMIBASE IBase;
4127
4128 /** Tracing indicator. */
4129 uint32_t fTracing;
4130 /** The tracing ID of this device. */
4131 uint32_t idTracing;
4132#if HC_ARCH_BITS == 32
4133 /** Align the internal data more naturally. */
4134 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4135#endif
4136
4137 /** Internal data. */
4138 union
4139 {
4140#ifdef PDMDEVINSINT_DECLARED
4141 PDMDEVINSINT s;
4142#endif
4143 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4144 } Internal;
4145
4146 /** Device instance data. The size of this area is defined
4147 * in the PDMDEVREG::cbInstanceData field. */
4148 char achInstanceData[8];
4149} PDMDEVINS;
4150
4151/** Current PDMDEVINS version number. */
4152#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4153
4154/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4155#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4156
4157/**
4158 * Checks the structure versions of the device instance and device helpers,
4159 * returning if they are incompatible.
4160 *
4161 * This is for use in the constructor.
4162 *
4163 * @param pDevIns The device instance pointer.
4164 */
4165#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4166 do \
4167 { \
4168 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4169 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4170 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4171 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4172 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4173 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4174 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4175 } while (0)
4176
4177/**
4178 * Quietly checks the structure versions of the device instance and device
4179 * helpers, returning if they are incompatible.
4180 *
4181 * This is for use in the destructor.
4182 *
4183 * @param pDevIns The device instance pointer.
4184 */
4185#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4186 do \
4187 { \
4188 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4189 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4190 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4191 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4192 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4193 } while (0)
4194
4195/**
4196 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4197 * constructor - returns on failure.
4198 *
4199 * This should be invoked after having initialized the instance data
4200 * sufficiently for the correct operation of the destructor. The destructor is
4201 * always called!
4202 *
4203 * @param pDevIns Pointer to the PDM device instance.
4204 * @param pszValidValues Patterns describing the valid value names. See
4205 * RTStrSimplePatternMultiMatch for details on the
4206 * pattern syntax.
4207 * @param pszValidNodes Patterns describing the valid node (key) names.
4208 * Pass empty string if no valid nodes.
4209 */
4210#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4211 do \
4212 { \
4213 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4214 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4215 if (RT_FAILURE(rcValCfg)) \
4216 return rcValCfg; \
4217 } while (0)
4218
4219/** @def PDMDEV_ASSERT_EMT
4220 * Assert that the current thread is the emulation thread.
4221 */
4222#ifdef VBOX_STRICT
4223# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4224#else
4225# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4226#endif
4227
4228/** @def PDMDEV_ASSERT_OTHER
4229 * Assert that the current thread is NOT the emulation thread.
4230 */
4231#ifdef VBOX_STRICT
4232# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4233#else
4234# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4235#endif
4236
4237/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4238 * Assert that the current thread is owner of the VM lock.
4239 */
4240#ifdef VBOX_STRICT
4241# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4242#else
4243# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4244#endif
4245
4246/** @def PDMDEV_SET_ERROR
4247 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4248 */
4249#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4250 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4251
4252/** @def PDMDEV_SET_RUNTIME_ERROR
4253 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4254 */
4255#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4256 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4257
4258/** @def PDMDEVINS_2_RCPTR
4259 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4260 */
4261#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4262
4263/** @def PDMDEVINS_2_R3PTR
4264 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4265 */
4266#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4267
4268/** @def PDMDEVINS_2_R0PTR
4269 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4270 */
4271#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4272
4273
4274#ifdef IN_RING3
4275
4276/**
4277 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4278 */
4279DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4280 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4281 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4282{
4283 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4284}
4285
4286/**
4287 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4288 */
4289DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4290 const char *pszOut, const char *pszIn, const char *pszOutStr,
4291 const char *pszInStr, const char *pszDesc)
4292{
4293 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4294}
4295
4296/**
4297 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4298 */
4299DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4300 const char *pszOut, const char *pszIn, const char *pszOutStr,
4301 const char *pszInStr, const char *pszDesc)
4302{
4303 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4304}
4305
4306/**
4307 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4308 */
4309DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4310{
4311 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4312}
4313
4314/**
4315 * Register a Memory Mapped I/O (MMIO) region.
4316 *
4317 * These callbacks are of course for the ring-3 context (R3). Register HC
4318 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4319 * must be a R3 handler for every RC and R0 handler!
4320 *
4321 * @returns VBox status.
4322 * @param pDevIns The device instance to register the MMIO with.
4323 * @param GCPhysStart First physical address in the range.
4324 * @param cbRange The size of the range (in bytes).
4325 * @param pvUser User argument.
4326 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4327 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4328 * @param pfnRead Pointer to function which is gonna handle Read operations.
4329 * @param pszDesc Pointer to description string. This must not be freed.
4330 */
4331DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4332 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4333{
4334 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4335 fFlags, pszDesc);
4336}
4337
4338/**
4339 * Register a Memory Mapped I/O (MMIO) region for GC.
4340 *
4341 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4342 * (R3) handlers before guest context handlers! There must be a R3 handler for
4343 * every RC handler!
4344 *
4345 * @returns VBox status.
4346 * @param pDevIns The device instance to register the MMIO with.
4347 * @param GCPhysStart First physical address in the range.
4348 * @param cbRange The size of the range (in bytes).
4349 * @param pvUser User argument.
4350 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4351 * @param pszRead Name of the RC function which is gonna handle Read operations.
4352 */
4353DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4354 const char *pszWrite, const char *pszRead)
4355{
4356 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4357}
4358
4359/**
4360 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4361 */
4362DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4363 const char *pszWrite, const char *pszRead)
4364{
4365 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4366}
4367
4368/**
4369 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4370 */
4371DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4372 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4373 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4374{
4375 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4376 fFlags, pszDesc);
4377}
4378
4379/**
4380 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4381 */
4382DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4383 const char *pszWrite, const char *pszRead, const char *pszFill)
4384{
4385 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4386}
4387
4388/**
4389 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4390 */
4391DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4392 const char *pszWrite, const char *pszRead, const char *pszFill)
4393{
4394 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4395}
4396
4397/**
4398 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4399 */
4400DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4401{
4402 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4403}
4404
4405/**
4406 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4407 */
4408DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4409{
4410 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4411}
4412
4413/**
4414 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4415 */
4416DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4417{
4418 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4419}
4420
4421/**
4422 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4423 */
4424DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4425{
4426 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4427}
4428
4429/**
4430 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4431 */
4432DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4433{
4434 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4435}
4436
4437/**
4438 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4439 */
4440DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4441 const char *pszDesc, PRTRCPTR pRCPtr)
4442{
4443 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4444}
4445
4446/**
4447 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4448 */
4449DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4450 const char *pszDesc, PRTR0PTR pR0Ptr)
4451{
4452 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4453}
4454
4455/**
4456 * @copydoc PDMDEVHLPR3::pfnROMRegister
4457 */
4458DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4459 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4460{
4461 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4462}
4463
4464/**
4465 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4466 */
4467DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4468{
4469 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4470}
4471
4472/**
4473 * Register a save state data unit.
4474 *
4475 * @returns VBox status.
4476 * @param pDevIns The device instance.
4477 * @param uVersion Data layout version number.
4478 * @param cbGuess The approximate amount of data in the unit.
4479 * Only for progress indicators.
4480 * @param pfnSaveExec Execute save callback, optional.
4481 * @param pfnLoadExec Execute load callback, optional.
4482 */
4483DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4484 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4485{
4486 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4487 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4488 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4489 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4490}
4491
4492/**
4493 * Register a save state data unit with a live save callback as well.
4494 *
4495 * @returns VBox status.
4496 * @param pDevIns The device instance.
4497 * @param uVersion Data layout version number.
4498 * @param cbGuess The approximate amount of data in the unit.
4499 * Only for progress indicators.
4500 * @param pfnLiveExec Execute live callback, optional.
4501 * @param pfnSaveExec Execute save callback, optional.
4502 * @param pfnLoadExec Execute load callback, optional.
4503 */
4504DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4505 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4506{
4507 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4508 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4509 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4510 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4511}
4512
4513/**
4514 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4515 */
4516DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4517 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4518 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4519 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4520{
4521 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4522 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4523 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4524 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4525}
4526
4527/**
4528 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4529 */
4530DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4531 const char *pszDesc, PPTMTIMERR3 ppTimer)
4532{
4533 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4534}
4535
4536/**
4537 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4538 */
4539DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4540{
4541 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4542}
4543
4544#endif /* IN_RING3 */
4545
4546/**
4547 * @copydoc PDMDEVHLPR3::pfnPhysRead
4548 */
4549DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4550{
4551 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4552}
4553
4554/**
4555 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4556 */
4557DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4558{
4559 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4560}
4561
4562#ifdef IN_RING3
4563
4564/**
4565 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4566 */
4567DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4568{
4569 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4570}
4571
4572/**
4573 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4574 */
4575DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4576{
4577 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4578}
4579
4580/**
4581 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4582 */
4583DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4584{
4585 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4586}
4587
4588/**
4589 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4590 */
4591DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4592{
4593 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4594}
4595
4596/**
4597 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4598 */
4599DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4600{
4601 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4602}
4603
4604/**
4605 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4606 */
4607DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4608{
4609 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4610}
4611
4612/**
4613 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4614 */
4615DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4616{
4617 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4618}
4619
4620/**
4621 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4622 */
4623DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4624{
4625 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4626}
4627
4628/**
4629 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4630 */
4631DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4632{
4633 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4634}
4635#endif /* IN_RING3 */
4636
4637/**
4638 * @copydoc PDMDEVHLPR3::pfnVMState
4639 */
4640DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4641{
4642 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4643}
4644
4645#ifdef IN_RING3
4646/**
4647 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4648 */
4649DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4650{
4651 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4652}
4653#endif /* IN_RING3 */
4654
4655/**
4656 * @copydoc PDMDEVHLPR3::pfnVMSetError
4657 */
4658DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4659{
4660 va_list va;
4661 va_start(va, pszFormat);
4662 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4663 va_end(va);
4664 return rc;
4665}
4666
4667/**
4668 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4669 */
4670DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4671{
4672 va_list va;
4673 int rc;
4674 va_start(va, pszFormat);
4675 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4676 va_end(va);
4677 return rc;
4678}
4679
4680/**
4681 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4682 *
4683 * @returns VBox status code which must be passed up to the VMM. This will be
4684 * VINF_SUCCESS in non-strict builds.
4685 * @param pDevIns The device instance.
4686 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4687 * @param pszFormat Message. (optional)
4688 * @param ... Message parameters.
4689 */
4690DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4691{
4692#ifdef VBOX_STRICT
4693# ifdef IN_RING3
4694 int rc;
4695 va_list args;
4696 va_start(args, pszFormat);
4697 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4698 va_end(args);
4699 return rc;
4700# else
4701 NOREF(pDevIns);
4702 NOREF(pszFile);
4703 NOREF(iLine);
4704 NOREF(pszFunction);
4705 NOREF(pszFormat);
4706 return VINF_EM_DBG_STOP;
4707# endif
4708#else
4709 NOREF(pDevIns);
4710 NOREF(pszFile);
4711 NOREF(iLine);
4712 NOREF(pszFunction);
4713 NOREF(pszFormat);
4714 return VINF_SUCCESS;
4715#endif
4716}
4717
4718#ifdef IN_RING3
4719
4720/**
4721 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4722 */
4723DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4724{
4725 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4726}
4727
4728/**
4729 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4730 */
4731DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4732{
4733 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4734}
4735
4736/**
4737 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4738 */
4739DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4740{
4741 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4742}
4743
4744/**
4745 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4746 */
4747DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4748 const char *pszDesc, const char *pszName, ...)
4749{
4750 va_list va;
4751 va_start(va, pszName);
4752 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4753 va_end(va);
4754}
4755
4756/**
4757 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4758 */
4759DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4760{
4761 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4762}
4763
4764/**
4765 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4766 */
4767DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4768{
4769 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4770}
4771
4772/**
4773 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4774 */
4775DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4776{
4777 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4778}
4779
4780/**
4781 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4782 */
4783DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4784 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4785{
4786 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4787}
4788
4789#endif /* IN_RING3 */
4790
4791/**
4792 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4793 */
4794DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4795{
4796 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4797}
4798
4799/**
4800 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4801 */
4802DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4803{
4804 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4805}
4806
4807/**
4808 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4809 */
4810DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4811{
4812 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4813}
4814
4815/**
4816 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4817 */
4818DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4819{
4820 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4821}
4822
4823/**
4824 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4825 */
4826DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4827{
4828 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4829}
4830
4831/**
4832 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4833 */
4834DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4835{
4836 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4837}
4838
4839#ifdef IN_RING3
4840
4841/**
4842 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4843 */
4844DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4845{
4846 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4847}
4848
4849/**
4850 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4851 */
4852DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4853 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4854{
4855 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4856}
4857
4858/**
4859 * Initializes a PDM critical section.
4860 *
4861 * The PDM critical sections are derived from the IPRT critical sections, but
4862 * works in RC and R0 as well.
4863 *
4864 * @returns VBox status code.
4865 * @param pDevIns The device instance.
4866 * @param pCritSect Pointer to the critical section.
4867 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4868 * @param pszNameFmt Format string for naming the critical section.
4869 * For statistics and lock validation.
4870 * @param ... Arguments for the format string.
4871 */
4872DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4873{
4874 int rc;
4875 va_list va;
4876 va_start(va, pszNameFmt);
4877 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4878 va_end(va);
4879 return rc;
4880}
4881
4882/**
4883 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4884 */
4885DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4886{
4887 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4888}
4889
4890/**
4891 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4892 */
4893DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4894{
4895 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4896}
4897
4898/**
4899 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4900 */
4901DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4902{
4903 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4904}
4905
4906/**
4907 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4908 */
4909DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4910{
4911 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4912}
4913
4914/**
4915 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4916 */
4917DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4918 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4919{
4920 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4921}
4922
4923/**
4924 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4925 */
4926DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4927{
4928 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4929}
4930
4931/**
4932 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4933 */
4934DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4935{
4936 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4937}
4938
4939/**
4940 * @copydoc PDMDEVHLPR3::pfnA20Set
4941 */
4942DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4943{
4944 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4945}
4946
4947/**
4948 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4949 */
4950DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4951{
4952 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4953}
4954
4955/**
4956 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4957 */
4958DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4959{
4960 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4961}
4962
4963/**
4964 * @copydoc PDMDEVHLPR3::pfnPICRegister
4965 */
4966DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4967{
4968 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4969}
4970
4971/**
4972 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4973 */
4974DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4975{
4976 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4977}
4978
4979/**
4980 * @copydoc PDMDEVHLPR3::pfn
4981 */
4982DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4983{
4984 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4985}
4986
4987/**
4988 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4989 */
4990DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4991{
4992 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4993}
4994
4995/**
4996 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4997 */
4998DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
4999{
5000 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5001}
5002
5003/**
5004 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5005 */
5006DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5007{
5008 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5009}
5010
5011/**
5012 * @copydoc PDMDEVHLPR3::pfnDMARegister
5013 */
5014DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5015{
5016 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5017}
5018
5019/**
5020 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5021 */
5022DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5023{
5024 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5025}
5026
5027/**
5028 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5029 */
5030DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5031{
5032 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5033}
5034
5035/**
5036 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5037 */
5038DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5039{
5040 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5041}
5042
5043/**
5044 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5045 */
5046DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5047{
5048 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5049}
5050
5051/**
5052 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5053 */
5054DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5055{
5056 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5057}
5058
5059/**
5060 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5061 */
5062DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5063{
5064 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5065}
5066
5067/**
5068 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5069 */
5070DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5071{
5072 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5073}
5074
5075/**
5076 * @copydoc PDMDEVHLP::pfnCallR0
5077 */
5078DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5079{
5080 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5081}
5082
5083/**
5084 * @copydoc PDMDEVHLPR3::pfnGetUVM
5085 */
5086DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5087{
5088 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5089}
5090
5091#endif /* IN_RING3 */
5092
5093/**
5094 * @copydoc PDMDEVHLPR3::pfnGetVM
5095 */
5096DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5097{
5098 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5099}
5100
5101/**
5102 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5103 */
5104DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5105{
5106 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5107}
5108
5109/**
5110 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5111 */
5112DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5113{
5114 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5115}
5116
5117/**
5118 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5119 */
5120DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5121{
5122 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5123}
5124
5125/**
5126 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5127 */
5128DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5129{
5130 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5131}
5132
5133#ifdef IN_RING3
5134
5135/**
5136 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5137 */
5138DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5139{
5140 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5141}
5142
5143/**
5144 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5145 */
5146DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5147{
5148 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5149}
5150
5151/**
5152 * @copydoc PDMDEVHLPR3::pfnVMReset
5153 */
5154DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5155{
5156 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5157}
5158
5159/**
5160 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5161 */
5162DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5163{
5164 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5165}
5166
5167/**
5168 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5169 */
5170DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5171{
5172 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5173}
5174
5175/**
5176 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5177 */
5178DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5179{
5180 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5181}
5182
5183#endif /* IN_RING3 */
5184
5185/**
5186 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5187 */
5188DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5189{
5190 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5191}
5192
5193#ifdef IN_RING3
5194
5195/**
5196 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5197 */
5198DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5199{
5200 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5201}
5202
5203/*
5204 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5205 */
5206DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5207{
5208 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5209}
5210#endif /* IN_RING3 */
5211#ifdef IN_RING0
5212
5213/**
5214 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5215 */
5216DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5217{
5218 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5219}
5220
5221#endif /* IN_RING0 */
5222
5223
5224
5225
5226/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5227typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5228
5229/**
5230 * Callbacks for VBoxDeviceRegister().
5231 */
5232typedef struct PDMDEVREGCB
5233{
5234 /** Interface version.
5235 * This is set to PDM_DEVREG_CB_VERSION. */
5236 uint32_t u32Version;
5237
5238 /**
5239 * Registers a device with the current VM instance.
5240 *
5241 * @returns VBox status code.
5242 * @param pCallbacks Pointer to the callback table.
5243 * @param pReg Pointer to the device registration record.
5244 * This data must be permanent and readonly.
5245 */
5246 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5247} PDMDEVREGCB;
5248
5249/** Current version of the PDMDEVREGCB structure. */
5250#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5251
5252
5253/**
5254 * The VBoxDevicesRegister callback function.
5255 *
5256 * PDM will invoke this function after loading a device module and letting
5257 * the module decide which devices to register and how to handle conflicts.
5258 *
5259 * @returns VBox status code.
5260 * @param pCallbacks Pointer to the callback table.
5261 * @param u32Version VBox version number.
5262 */
5263typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5264
5265/** @} */
5266
5267RT_C_DECLS_END
5268
5269#endif
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