VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 46197

Last change on this file since 46197 was 45965, checked in by vboxsync, 12 years ago

VMM: Facility for getting the highest-priority pending interrupt from the APIC device.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDrvIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is only called when the VMR3PowerOff call is made on a running VM. This
164 * means that there is no notification if the VM was suspended before being
165 * powered off. There will also be no callback when hot plugging devices.
166 *
167 * @param pDevIns The device instance data.
168 * @thread EMT(0)
169 *
170 * @remarks Caller enters the device critical section.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
189 *
190 * @remarks Caller enters the device critical section.
191 */
192typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
193/** Pointer to a FNPDMDEVATTACH() function. */
194typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
195
196/**
197 * Detach notification.
198 *
199 * This is called when a driver is detaching itself from a LUN of the device.
200 * The device should adjust it's state to reflect this.
201 *
202 * This is like unplugging the network cable to use it for the laptop or
203 * something while the PC is still running.
204 *
205 * @param pDevIns The device instance.
206 * @param iLUN The logical unit which is being detached.
207 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
208 *
209 * @remarks Caller enters the device critical section.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 *
223 * @remarks The device critical section is not entered.
224 */
225typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
226/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
227typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
228
229/**
230 * Init complete notification.
231 * This can be done to do communication with other devices and other
232 * initialization which requires everything to be in place.
233 *
234 * @returns VBOX status code.
235 * @param pDevIns The device instance.
236 *
237 * @remarks Caller enters the device critical section.
238 */
239typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
240/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
241typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
242
243
244/**
245 * The context of a pfnMemSetup call.
246 */
247typedef enum PDMDEVMEMSETUPCTX
248{
249 /** Invalid zero value. */
250 PDMDEVMEMSETUPCTX_INVALID = 0,
251 /** After construction. */
252 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
253 /** After reset. */
254 PDMDEVMEMSETUPCTX_AFTER_RESET,
255 /** Type size hack. */
256 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
257} PDMDEVMEMSETUPCTX;
258
259
260/**
261 * PDM Device Registration Structure.
262 *
263 * This structure is used when registering a device from VBoxInitDevices() in HC
264 * Ring-3. PDM will continue use till the VM is terminated.
265 */
266typedef struct PDMDEVREG
267{
268 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
269 uint32_t u32Version;
270 /** Device name. */
271 char szName[32];
272 /** Name of the raw-mode context module (no path).
273 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
274 char szRCMod[32];
275 /** Name of the ring-0 module (no path).
276 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
277 char szR0Mod[32];
278 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
279 * remain unchanged from registration till VM destruction. */
280 const char *pszDescription;
281
282 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
283 uint32_t fFlags;
284 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
285 uint32_t fClass;
286 /** Maximum number of instances (per VM). */
287 uint32_t cMaxInstances;
288 /** Size of the instance data. */
289 uint32_t cbInstance;
290
291 /** Construct instance - required. */
292 PFNPDMDEVCONSTRUCT pfnConstruct;
293 /** Destruct instance - optional.
294 * Critical section NOT entered (will be destroyed). */
295 PFNPDMDEVDESTRUCT pfnDestruct;
296 /** Relocation command - optional.
297 * Critical section NOT entered. */
298 PFNPDMDEVRELOCATE pfnRelocate;
299
300 /**
301 * Memory setup callback.
302 *
303 * @param pDevIns The device instance data.
304 * @param enmCtx Indicates the context of the call.
305 * @remarks The critical section is entered prior to calling this method.
306 */
307 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
308
309 /** Power on notification - optional.
310 * Critical section is entered. */
311 PFNPDMDEVPOWERON pfnPowerOn;
312 /** Reset notification - optional.
313 * Critical section is entered. */
314 PFNPDMDEVRESET pfnReset;
315 /** Suspend notification - optional.
316 * Critical section is entered. */
317 PFNPDMDEVSUSPEND pfnSuspend;
318 /** Resume notification - optional.
319 * Critical section is entered. */
320 PFNPDMDEVRESUME pfnResume;
321 /** Attach command - optional.
322 * Critical section is entered. */
323 PFNPDMDEVATTACH pfnAttach;
324 /** Detach notification - optional.
325 * Critical section is entered. */
326 PFNPDMDEVDETACH pfnDetach;
327 /** Query a LUN base interface - optional.
328 * Critical section is NOT entered. */
329 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
330 /** Init complete notification - optional.
331 * Critical section is entered. */
332 PFNPDMDEVINITCOMPLETE pfnInitComplete;
333 /** Power off notification - optional.
334 * Critical section is entered. */
335 PFNPDMDEVPOWEROFF pfnPowerOff;
336 /** @todo */
337 PFNRT pfnSoftReset;
338 /** Initialization safty marker. */
339 uint32_t u32VersionEnd;
340} PDMDEVREG;
341/** Pointer to a PDM Device Structure. */
342typedef PDMDEVREG *PPDMDEVREG;
343/** Const pointer to a PDM Device Structure. */
344typedef PDMDEVREG const *PCPDMDEVREG;
345
346/** Current DEVREG version number. */
347#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
348
349/** PDM Device Flags.
350 * @{ */
351/** This flag is used to indicate that the device has a RC component. */
352#define PDM_DEVREG_FLAGS_RC 0x00000001
353/** This flag is used to indicate that the device has a R0 component. */
354#define PDM_DEVREG_FLAGS_R0 0x00000002
355
356/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
357 * The bit count for the current host. */
358#if HC_ARCH_BITS == 32
359# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
360#elif HC_ARCH_BITS == 64
361# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
362#else
363# error Unsupported HC_ARCH_BITS value.
364#endif
365/** The host bit count mask. */
366#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
367
368/** The device support only 32-bit guests. */
369#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
370/** The device support only 64-bit guests. */
371#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
372/** The device support both 32-bit & 64-bit guests. */
373#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
374/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
375 * The guest bit count for the current compilation. */
376#if GC_ARCH_BITS == 32
377# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
378#elif GC_ARCH_BITS == 64
379# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
380#else
381# error Unsupported GC_ARCH_BITS value.
382#endif
383/** The guest bit count mask. */
384#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
385
386/** A convenience. */
387#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
388
389/** Indicates that the devices support PAE36 on a 32-bit guest. */
390#define PDM_DEVREG_FLAGS_PAE36 0x00001000
391
392/** Indicates that the device needs to be notified before the drivers when suspending. */
393#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
394
395/** Indicates that the device needs to be notified before the drivers when powering off. */
396#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
397
398/** Indicates that the device needs to be notified before the drivers when resetting. */
399#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
400/** @} */
401
402
403/** PDM Device Classes.
404 * The order is important, lower bit earlier instantiation.
405 * @{ */
406/** Architecture device. */
407#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
408/** Architecture BIOS device. */
409#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
410/** PCI bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
412/** ISA bus brigde. */
413#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
414/** Input device (mouse, keyboard, joystick, HID, ...). */
415#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
416/** Interrupt controller (PIC). */
417#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
418/** Interval controoler (PIT). */
419#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
420/** RTC/CMOS. */
421#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
422/** DMA controller. */
423#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
424/** VMM Device. */
425#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
426/** Graphics device, like VGA. */
427#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
428/** Storage controller device. */
429#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
430/** Network interface controller. */
431#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
432/** Audio. */
433#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
434/** USB HIC. */
435#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
436/** ACPI. */
437#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
438/** Serial controller device. */
439#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
440/** Parallel controller device */
441#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
442/** Host PCI pass-through device */
443#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
444/** Misc devices (always last). */
445#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
446/** @} */
447
448
449/** @name IRQ Level for use with the *SetIrq APIs.
450 * @{
451 */
452/** Assert the IRQ (can assume value 1). */
453#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
454/** Deassert the IRQ (can assume value 0). */
455#define PDM_IRQ_LEVEL_LOW 0
456/** flip-flop - deassert and then assert the IRQ again immediately. */
457#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
458/** @} */
459
460/**
461 * Registration record for MSI.
462 */
463typedef struct PDMMSIREG
464{
465 /** Number of MSI interrupt vectors, 0 if MSI not supported */
466 uint16_t cMsiVectors;
467 /** Offset of MSI capability */
468 uint8_t iMsiCapOffset;
469 /** Offset of next capability to MSI */
470 uint8_t iMsiNextOffset;
471 /** If we support 64-bit MSI addressing */
472 bool fMsi64bit;
473
474 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
475 uint16_t cMsixVectors;
476 /** Offset of MSI-X capability */
477 uint8_t iMsixCapOffset;
478 /** Offset of next capability to MSI-X */
479 uint8_t iMsixNextOffset;
480 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
481 uint8_t iMsixBar;
482} PDMMSIREG;
483typedef PDMMSIREG *PPDMMSIREG;
484
485/**
486 * PCI Bus registration structure.
487 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
488 */
489typedef struct PDMPCIBUSREG
490{
491 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
492 uint32_t u32Version;
493
494 /**
495 * Registers the device with the default PCI bus.
496 *
497 * @returns VBox status code.
498 * @param pDevIns Device instance of the PCI Bus.
499 * @param pPciDev The PCI device structure.
500 * Any PCI enabled device must keep this in it's instance data!
501 * Fill in the PCI data config before registration, please.
502 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
503 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
504 * If negative, the pci bus device will assign one.
505 * @remarks Caller enters the PDM critical section.
506 */
507 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
508
509 /**
510 * Initialize MSI support in a PCI device.
511 *
512 * @returns VBox status code.
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev The PCI device structure.
515 * @param pMsiReg MSI registration structure
516 * @remarks Caller enters the PDM critical section.
517 */
518 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
519
520 /**
521 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
522 *
523 * @returns VBox status code.
524 * @param pDevIns Device instance of the PCI Bus.
525 * @param pPciDev The PCI device structure.
526 * @param iRegion The region number.
527 * @param cbRegion Size of the region.
528 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
529 * @param pfnCallback Callback for doing the mapping.
530 * @remarks Caller enters the PDM critical section.
531 */
532 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
533
534 /**
535 * Register PCI configuration space read/write callbacks.
536 *
537 * @param pDevIns Device instance of the PCI Bus.
538 * @param pPciDev The PCI device structure.
539 * @param pfnRead Pointer to the user defined PCI config read function.
540 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
541 * PCI config read function. This way, user can decide when (and if)
542 * to call default PCI config read function. Can be NULL.
543 * @param pfnWrite Pointer to the user defined PCI config write function.
544 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
545 * PCI config write function. This way, user can decide when (and if)
546 * to call default PCI config write function. Can be NULL.
547 * @remarks Caller enters the PDM critical section.
548 * @thread EMT
549 */
550 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
551 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
552
553 /**
554 * Set the IRQ for a PCI device.
555 *
556 * @param pDevIns Device instance of the PCI Bus.
557 * @param pPciDev The PCI device structure.
558 * @param iIrq IRQ number to set.
559 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
560 * @param uTagSrc The IRQ tag and source (for tracing).
561 * @remarks Caller enters the PDM critical section.
562 */
563 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
564
565 /**
566 * Called to perform the job of the bios.
567 * This is only called for the first PCI Bus - it is expected to
568 * service all the PCI buses.
569 *
570 * @returns VBox status.
571 * @param pDevIns Device instance of the first bus.
572 * @remarks Caller enters the PDM critical section.
573 */
574 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
575
576 /** The name of the SetIrq RC entry point. */
577 const char *pszSetIrqRC;
578
579 /** The name of the SetIrq R0 entry point. */
580 const char *pszSetIrqR0;
581
582} PDMPCIBUSREG;
583/** Pointer to a PCI bus registration structure. */
584typedef PDMPCIBUSREG *PPDMPCIBUSREG;
585
586/** Current PDMPCIBUSREG version number. */
587#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
588
589/**
590 * PCI Bus RC helpers.
591 */
592typedef struct PDMPCIHLPRC
593{
594 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
595 uint32_t u32Version;
596
597 /**
598 * Set an ISA IRQ.
599 *
600 * @param pDevIns PCI device instance.
601 * @param iIrq IRQ number to set.
602 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
603 * @param uTagSrc The IRQ tag and source (for tracing).
604 * @thread EMT only.
605 */
606 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
607
608 /**
609 * Set an I/O-APIC IRQ.
610 *
611 * @param pDevIns PCI device instance.
612 * @param iIrq IRQ number to set.
613 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
614 * @param uTagSrc The IRQ tag and source (for tracing).
615 * @thread EMT only.
616 */
617 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
618
619 /**
620 * Send an MSI.
621 *
622 * @param pDevIns PCI device instance.
623 * @param GCPhys Physical address MSI request was written.
624 * @param uValue Value written.
625 * @param uTagSrc The IRQ tag and source (for tracing).
626 * @thread EMT only.
627 */
628 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
629
630
631 /**
632 * Acquires the PDM lock.
633 *
634 * @returns VINF_SUCCESS on success.
635 * @returns rc if we failed to acquire the lock.
636 * @param pDevIns The PCI device instance.
637 * @param rc What to return if we fail to acquire the lock.
638 */
639 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
640
641 /**
642 * Releases the PDM lock.
643 *
644 * @param pDevIns The PCI device instance.
645 */
646 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
647
648 /** Just a safety precaution. */
649 uint32_t u32TheEnd;
650} PDMPCIHLPRC;
651/** Pointer to PCI helpers. */
652typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
653/** Pointer to const PCI helpers. */
654typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
655
656/** Current PDMPCIHLPRC version number. */
657#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
658
659
660/**
661 * PCI Bus R0 helpers.
662 */
663typedef struct PDMPCIHLPR0
664{
665 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
666 uint32_t u32Version;
667
668 /**
669 * Set an ISA IRQ.
670 *
671 * @param pDevIns PCI device instance.
672 * @param iIrq IRQ number to set.
673 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
674 * @param uTagSrc The IRQ tag and source (for tracing).
675 * @thread EMT only.
676 */
677 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
678
679 /**
680 * Set an I/O-APIC IRQ.
681 *
682 * @param pDevIns PCI device instance.
683 * @param iIrq IRQ number to set.
684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
685 * @param uTagSrc The IRQ tag and source (for tracing).
686 * @thread EMT only.
687 */
688 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
689
690 /**
691 * Send an MSI.
692 *
693 * @param pDevIns PCI device instance.
694 * @param GCPhys Physical address MSI request was written.
695 * @param uValue Value written.
696 * @param uTagSrc The IRQ tag and source (for tracing).
697 * @thread EMT only.
698 */
699 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
700
701
702 /**
703 * Acquires the PDM lock.
704 *
705 * @returns VINF_SUCCESS on success.
706 * @returns rc if we failed to acquire the lock.
707 * @param pDevIns The PCI device instance.
708 * @param rc What to return if we fail to acquire the lock.
709 */
710 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
711
712 /**
713 * Releases the PDM lock.
714 *
715 * @param pDevIns The PCI device instance.
716 */
717 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
718
719 /** Just a safety precaution. */
720 uint32_t u32TheEnd;
721} PDMPCIHLPR0;
722/** Pointer to PCI helpers. */
723typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
724/** Pointer to const PCI helpers. */
725typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
726
727/** Current PDMPCIHLPR0 version number. */
728#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
729
730/**
731 * PCI device helpers.
732 */
733typedef struct PDMPCIHLPR3
734{
735 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
736 uint32_t u32Version;
737
738 /**
739 * Set an ISA IRQ.
740 *
741 * @param pDevIns The PCI device instance.
742 * @param iIrq IRQ number to set.
743 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
744 * @param uTagSrc The IRQ tag and source (for tracing).
745 */
746 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
747
748 /**
749 * Set an I/O-APIC IRQ.
750 *
751 * @param pDevIns The PCI device instance.
752 * @param iIrq IRQ number to set.
753 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
754 * @param uTagSrc The IRQ tag and source (for tracing).
755 */
756 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
757
758 /**
759 * Send an MSI.
760 *
761 * @param pDevIns PCI device instance.
762 * @param GCPhys Physical address MSI request was written.
763 * @param uValue Value written.
764 * @param uTagSrc The IRQ tag and source (for tracing).
765 */
766 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
767
768 /**
769 * Checks if the given address is an MMIO2 base address or not.
770 *
771 * @returns true/false accordingly.
772 * @param pDevIns The PCI device instance.
773 * @param pOwner The owner of the memory, optional.
774 * @param GCPhys The address to check.
775 */
776 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
777
778 /**
779 * Gets the address of the RC PCI Bus helpers.
780 *
781 * This should be called at both construction and relocation time
782 * to obtain the correct address of the RC helpers.
783 *
784 * @returns RC pointer to the PCI Bus helpers.
785 * @param pDevIns Device instance of the PCI Bus.
786 * @thread EMT only.
787 */
788 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
789
790 /**
791 * Gets the address of the R0 PCI Bus helpers.
792 *
793 * This should be called at both construction and relocation time
794 * to obtain the correct address of the R0 helpers.
795 *
796 * @returns R0 pointer to the PCI Bus helpers.
797 * @param pDevIns Device instance of the PCI Bus.
798 * @thread EMT only.
799 */
800 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
801
802 /**
803 * Acquires the PDM lock.
804 *
805 * @returns VINF_SUCCESS on success.
806 * @returns Fatal error on failure.
807 * @param pDevIns The PCI device instance.
808 * @param rc Dummy for making the interface identical to the RC and R0 versions.
809 */
810 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
811
812 /**
813 * Releases the PDM lock.
814 *
815 * @param pDevIns The PCI device instance.
816 */
817 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
818
819 /** Just a safety precaution. */
820 uint32_t u32TheEnd;
821} PDMPCIHLPR3;
822/** Pointer to PCI helpers. */
823typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
824/** Pointer to const PCI helpers. */
825typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
826
827/** Current PDMPCIHLPR3 version number. */
828#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
829
830
831/**
832 * Programmable Interrupt Controller registration structure.
833 */
834typedef struct PDMPICREG
835{
836 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
837 uint32_t u32Version;
838
839 /**
840 * Set the an IRQ.
841 *
842 * @param pDevIns Device instance of the PIC.
843 * @param iIrq IRQ number to set.
844 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
845 * @param uTagSrc The IRQ tag and source (for tracing).
846 * @remarks Caller enters the PDM critical section.
847 */
848 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
849
850 /**
851 * Get a pending interrupt.
852 *
853 * @returns Pending interrupt number.
854 * @param pDevIns Device instance of the PIC.
855 * @param puTagSrc Where to return the IRQ tag and source.
856 * @remarks Caller enters the PDM critical section.
857 */
858 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
859
860 /** The name of the RC SetIrq entry point. */
861 const char *pszSetIrqRC;
862 /** The name of the RC GetInterrupt entry point. */
863 const char *pszGetInterruptRC;
864
865 /** The name of the R0 SetIrq entry point. */
866 const char *pszSetIrqR0;
867 /** The name of the R0 GetInterrupt entry point. */
868 const char *pszGetInterruptR0;
869} PDMPICREG;
870/** Pointer to a PIC registration structure. */
871typedef PDMPICREG *PPDMPICREG;
872
873/** Current PDMPICREG version number. */
874#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
875
876/**
877 * PIC RC helpers.
878 */
879typedef struct PDMPICHLPRC
880{
881 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
882 uint32_t u32Version;
883
884 /**
885 * Set the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Clear the interrupt force action flag.
893 *
894 * @param pDevIns Device instance of the PIC.
895 */
896 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
897
898 /**
899 * Acquires the PDM lock.
900 *
901 * @returns VINF_SUCCESS on success.
902 * @returns rc if we failed to acquire the lock.
903 * @param pDevIns The PIC device instance.
904 * @param rc What to return if we fail to acquire the lock.
905 */
906 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
907
908 /**
909 * Releases the PDM lock.
910 *
911 * @param pDevIns The PIC device instance.
912 */
913 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPRC;
918
919/** Pointer to PIC RC helpers. */
920typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
921/** Pointer to const PIC RC helpers. */
922typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
923
924/** Current PDMPICHLPRC version number. */
925#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
926
927
928/**
929 * PIC R0 helpers.
930 */
931typedef struct PDMPICHLPR0
932{
933 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
934 uint32_t u32Version;
935
936 /**
937 * Set the interrupt force action flag.
938 *
939 * @param pDevIns Device instance of the PIC.
940 */
941 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
942
943 /**
944 * Clear the interrupt force action flag.
945 *
946 * @param pDevIns Device instance of the PIC.
947 */
948 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
949
950 /**
951 * Acquires the PDM lock.
952 *
953 * @returns VINF_SUCCESS on success.
954 * @returns rc if we failed to acquire the lock.
955 * @param pDevIns The PIC device instance.
956 * @param rc What to return if we fail to acquire the lock.
957 */
958 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
959
960 /**
961 * Releases the PDM lock.
962 *
963 * @param pDevIns The PCI device instance.
964 */
965 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
966
967 /** Just a safety precaution. */
968 uint32_t u32TheEnd;
969} PDMPICHLPR0;
970
971/** Pointer to PIC R0 helpers. */
972typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
973/** Pointer to const PIC R0 helpers. */
974typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
975
976/** Current PDMPICHLPR0 version number. */
977#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
978
979/**
980 * PIC R3 helpers.
981 */
982typedef struct PDMPICHLPR3
983{
984 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
985 uint32_t u32Version;
986
987 /**
988 * Set the interrupt force action flag.
989 *
990 * @param pDevIns Device instance of the PIC.
991 */
992 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
993
994 /**
995 * Clear the interrupt force action flag.
996 *
997 * @param pDevIns Device instance of the PIC.
998 */
999 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1000
1001 /**
1002 * Acquires the PDM lock.
1003 *
1004 * @returns VINF_SUCCESS on success.
1005 * @returns Fatal error on failure.
1006 * @param pDevIns The PIC device instance.
1007 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1008 */
1009 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1010
1011 /**
1012 * Releases the PDM lock.
1013 *
1014 * @param pDevIns The PIC device instance.
1015 */
1016 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1017
1018 /**
1019 * Gets the address of the RC PIC helpers.
1020 *
1021 * This should be called at both construction and relocation time
1022 * to obtain the correct address of the RC helpers.
1023 *
1024 * @returns RC pointer to the PIC helpers.
1025 * @param pDevIns Device instance of the PIC.
1026 */
1027 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1028
1029 /**
1030 * Gets the address of the R0 PIC helpers.
1031 *
1032 * This should be called at both construction and relocation time
1033 * to obtain the correct address of the R0 helpers.
1034 *
1035 * @returns R0 pointer to the PIC helpers.
1036 * @param pDevIns Device instance of the PIC.
1037 */
1038 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1039
1040 /** Just a safety precaution. */
1041 uint32_t u32TheEnd;
1042} PDMPICHLPR3;
1043
1044/** Pointer to PIC R3 helpers. */
1045typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1046/** Pointer to const PIC R3 helpers. */
1047typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1048
1049/** Current PDMPICHLPR3 version number. */
1050#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1051
1052
1053
1054/**
1055 * Advanced Programmable Interrupt Controller registration structure.
1056 */
1057typedef struct PDMAPICREG
1058{
1059 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1060 uint32_t u32Version;
1061
1062 /**
1063 * Get a pending interrupt.
1064 *
1065 * @returns Pending interrupt number.
1066 * @param pDevIns Device instance of the APIC.
1067 * @param idCpu The VCPU Id.
1068 * @param puTagSrc Where to return the tag source.
1069 * @remarks Caller enters the PDM critical section
1070 */
1071 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1072
1073 /**
1074 * Check if the APIC has a pending interrupt/if a TPR change would active one
1075 *
1076 * @returns Pending interrupt yes/no
1077 * @param pDevIns Device instance of the APIC.
1078 * @param idCpu The VCPU Id.
1079 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1080 * (optional, can be NULL).
1081 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1082 * prior to calling this method.
1083 */
1084 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t *pu8PendingIrq));
1085
1086 /**
1087 * Set the APIC base.
1088 *
1089 * @param pDevIns Device instance of the APIC.
1090 * @param idCpu The VCPU Id.
1091 * @param u64Base The new base.
1092 * @remarks Caller enters the PDM critical section.
1093 */
1094 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1095
1096 /**
1097 * Get the APIC base.
1098 *
1099 * @returns Current base.
1100 * @param pDevIns Device instance of the APIC.
1101 * @param idCpu The VCPU Id.
1102 * @remarks Caller enters the PDM critical section.
1103 */
1104 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1105
1106 /**
1107 * Set the TPR (task priority register).
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 * @param idCpu The VCPU id.
1111 * @param u8TPR The new TPR.
1112 * @remarks Caller enters the PDM critical section.
1113 */
1114 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1115
1116 /**
1117 * Get the TPR (task priority register).
1118 *
1119 * @returns The current TPR.
1120 * @param pDevIns Device instance of the APIC.
1121 * @param idCpu VCPU id
1122 * @remarks Caller enters the PDM critical section.
1123 */
1124 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1125
1126 /**
1127 * Write to a MSR in APIC range.
1128 *
1129 * @returns VBox status code.
1130 * @param pDevIns Device instance of the APIC.
1131 * @param idCpu Target CPU.
1132 * @param u32Reg The MSR begin written to.
1133 * @param u64Value The value to write.
1134 *
1135 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1136 * calling this method.
1137 */
1138 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1139
1140 /**
1141 * Read from a MSR in APIC range.
1142 *
1143 * @returns VBox status code.
1144 * @param pDevIns Device instance of the APIC.
1145 * @param idCpu Target CPU.
1146 * @param u32Reg MSR to read.
1147 * @param pu64Value Where to return the read value.
1148 *
1149 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1150 * calling this method.
1151 */
1152 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1153
1154 /**
1155 * Private interface between the IOAPIC and APIC.
1156 *
1157 * This is a low-level, APIC/IOAPIC implementation specific interface which
1158 * is registered with PDM only because it makes life so much simpler right
1159 * now (GC bits). This is a bad bad hack! The correct way of doing this
1160 * would involve some way of querying GC interfaces and relocating them.
1161 * Perhaps doing some kind of device init in GC...
1162 *
1163 * @returns status code.
1164 * @param pDevIns Device instance of the APIC.
1165 * @param u8Dest See APIC implementation.
1166 * @param u8DestMode See APIC implementation.
1167 * @param u8DeliveryMode See APIC implementation.
1168 * @param iVector See APIC implementation.
1169 * @param u8Polarity See APIC implementation.
1170 * @param u8TriggerMode See APIC implementation.
1171 * @param uTagSrc The IRQ tag and source (for tracing).
1172 * @remarks Caller enters the PDM critical section
1173 */
1174 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1175 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1176
1177 /**
1178 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1179 *
1180 * Used for virtual wire mode when interrupts from the PIC are passed through
1181 * LAPIC.
1182 *
1183 * @returns status code.
1184 * @param pDevIns Device instance of the APIC.
1185 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1186 * @param u8Level The level.
1187 * @param uTagSrc The IRQ tag and source (for tracing).
1188 * @remarks Caller enters the PDM critical section
1189 */
1190 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1191
1192 /** The name of the RC GetInterrupt entry point. */
1193 const char *pszGetInterruptRC;
1194 /** The name of the RC HasPendingIrq entry point. */
1195 const char *pszHasPendingIrqRC;
1196 /** The name of the RC SetBase entry point. */
1197 const char *pszSetBaseRC;
1198 /** The name of the RC GetBase entry point. */
1199 const char *pszGetBaseRC;
1200 /** The name of the RC SetTPR entry point. */
1201 const char *pszSetTPRRC;
1202 /** The name of the RC GetTPR entry point. */
1203 const char *pszGetTPRRC;
1204 /** The name of the RC WriteMSR entry point. */
1205 const char *pszWriteMSRRC;
1206 /** The name of the RC ReadMSR entry point. */
1207 const char *pszReadMSRRC;
1208 /** The name of the RC BusDeliver entry point. */
1209 const char *pszBusDeliverRC;
1210 /** The name of the RC LocalInterrupt entry point. */
1211 const char *pszLocalInterruptRC;
1212
1213 /** The name of the R0 GetInterrupt entry point. */
1214 const char *pszGetInterruptR0;
1215 /** The name of the R0 HasPendingIrq entry point. */
1216 const char *pszHasPendingIrqR0;
1217 /** The name of the R0 SetBase entry point. */
1218 const char *pszSetBaseR0;
1219 /** The name of the R0 GetBase entry point. */
1220 const char *pszGetBaseR0;
1221 /** The name of the R0 SetTPR entry point. */
1222 const char *pszSetTPRR0;
1223 /** The name of the R0 GetTPR entry point. */
1224 const char *pszGetTPRR0;
1225 /** The name of the R0 WriteMSR entry point. */
1226 const char *pszWriteMSRR0;
1227 /** The name of the R0 ReadMSR entry point. */
1228 const char *pszReadMSRR0;
1229 /** The name of the R0 BusDeliver entry point. */
1230 const char *pszBusDeliverR0;
1231 /** The name of the R0 LocalInterrupt entry point. */
1232 const char *pszLocalInterruptR0;
1233
1234} PDMAPICREG;
1235/** Pointer to an APIC registration structure. */
1236typedef PDMAPICREG *PPDMAPICREG;
1237
1238/** Current PDMAPICREG version number. */
1239#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1240
1241
1242/**
1243 * APIC version argument for pfnChangeFeature.
1244 */
1245typedef enum PDMAPICVERSION
1246{
1247 /** Invalid 0 entry. */
1248 PDMAPICVERSION_INVALID = 0,
1249 /** No APIC. */
1250 PDMAPICVERSION_NONE,
1251 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1252 PDMAPICVERSION_APIC,
1253 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1254 PDMAPICVERSION_X2APIC,
1255 /** The usual 32-bit paranoia. */
1256 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1257} PDMAPICVERSION;
1258
1259/**
1260 * APIC irq argument for SetInterruptFF.
1261 */
1262typedef enum PDMAPICIRQ
1263{
1264 /** Invalid 0 entry. */
1265 PDMAPICIRQ_INVALID = 0,
1266 /** Normal hardware interrupt. */
1267 PDMAPICIRQ_HARDWARE,
1268 /** NMI. */
1269 PDMAPICIRQ_NMI,
1270 /** SMI. */
1271 PDMAPICIRQ_SMI,
1272 /** ExtINT (HW interrupt via PIC). */
1273 PDMAPICIRQ_EXTINT,
1274 /** The usual 32-bit paranoia. */
1275 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1276} PDMAPICIRQ;
1277
1278
1279/**
1280 * APIC RC helpers.
1281 */
1282typedef struct PDMAPICHLPRC
1283{
1284 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1285 uint32_t u32Version;
1286
1287 /**
1288 * Set the interrupt force action flag.
1289 *
1290 * @param pDevIns Device instance of the APIC.
1291 * @param enmType IRQ type.
1292 * @param idCpu Virtual CPU to set flag upon.
1293 */
1294 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1295
1296 /**
1297 * Clear the interrupt force action flag.
1298 *
1299 * @param pDevIns Device instance of the APIC.
1300 * @param enmType IRQ type.
1301 * @param idCpu Virtual CPU to clear flag upon.
1302 */
1303 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1304
1305 /**
1306 * Calculates an IRQ tag for a timer, IPI or similar event.
1307 *
1308 * @returns The IRQ tag.
1309 * @param pDevIns Device instance of the APIC.
1310 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1311 */
1312 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1313
1314 /**
1315 * Modifies APIC-related bits in the CPUID feature mask.
1316 *
1317 * @param pDevIns Device instance of the APIC.
1318 * @param enmVersion Supported APIC version.
1319 */
1320 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1321
1322 /**
1323 * Acquires the PDM lock.
1324 *
1325 * @returns VINF_SUCCESS on success.
1326 * @returns rc if we failed to acquire the lock.
1327 * @param pDevIns The APIC device instance.
1328 * @param rc What to return if we fail to acquire the lock.
1329 */
1330 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1331
1332 /**
1333 * Releases the PDM lock.
1334 *
1335 * @param pDevIns The APIC device instance.
1336 */
1337 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1338
1339 /**
1340 * Get the virtual CPU id corresponding to the current EMT.
1341 *
1342 * @param pDevIns The APIC device instance.
1343 */
1344 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1345
1346 /** Just a safety precaution. */
1347 uint32_t u32TheEnd;
1348} PDMAPICHLPRC;
1349/** Pointer to APIC GC helpers. */
1350typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1351/** Pointer to const APIC helpers. */
1352typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1353
1354/** Current PDMAPICHLPRC version number. */
1355#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1356
1357
1358/**
1359 * APIC R0 helpers.
1360 */
1361typedef struct PDMAPICHLPR0
1362{
1363 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1364 uint32_t u32Version;
1365
1366 /**
1367 * Set the interrupt force action flag.
1368 *
1369 * @param pDevIns Device instance of the APIC.
1370 * @param enmType IRQ type.
1371 * @param idCpu Virtual CPU to set flag upon.
1372 */
1373 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1374
1375 /**
1376 * Clear the interrupt force action flag.
1377 *
1378 * @param pDevIns Device instance of the APIC.
1379 * @param enmType IRQ type.
1380 * @param idCpu Virtual CPU to clear flag upon.
1381 */
1382 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1383
1384 /**
1385 * Calculates an IRQ tag for a timer, IPI or similar event.
1386 *
1387 * @returns The IRQ tag.
1388 * @param pDevIns Device instance of the APIC.
1389 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1390 */
1391 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1392
1393 /**
1394 * Modifies APIC-related bits in the CPUID feature mask.
1395 *
1396 * @param pDevIns Device instance of the APIC.
1397 * @param enmVersion Supported APIC version.
1398 */
1399 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1400
1401 /**
1402 * Acquires the PDM lock.
1403 *
1404 * @returns VINF_SUCCESS on success.
1405 * @returns rc if we failed to acquire the lock.
1406 * @param pDevIns The APIC device instance.
1407 * @param rc What to return if we fail to acquire the lock.
1408 */
1409 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1410
1411 /**
1412 * Releases the PDM lock.
1413 *
1414 * @param pDevIns The APIC device instance.
1415 */
1416 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1417
1418 /**
1419 * Get the virtual CPU id corresponding to the current EMT.
1420 *
1421 * @param pDevIns The APIC device instance.
1422 */
1423 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1424
1425 /** Just a safety precaution. */
1426 uint32_t u32TheEnd;
1427} PDMAPICHLPR0;
1428/** Pointer to APIC GC helpers. */
1429typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1430/** Pointer to const APIC helpers. */
1431typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1432
1433/** Current PDMAPICHLPR0 version number. */
1434#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1435
1436/**
1437 * APIC R3 helpers.
1438 */
1439typedef struct PDMAPICHLPR3
1440{
1441 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1442 uint32_t u32Version;
1443
1444 /**
1445 * Set the interrupt force action flag.
1446 *
1447 * @param pDevIns Device instance of the APIC.
1448 * @param enmType IRQ type.
1449 * @param idCpu Virtual CPU to set flag upon.
1450 */
1451 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1452
1453 /**
1454 * Clear the interrupt force action flag.
1455 *
1456 * @param pDevIns Device instance of the APIC.
1457 * @param enmType IRQ type.
1458 * @param idCpu Virtual CPU to clear flag upon.
1459 */
1460 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1461
1462 /**
1463 * Calculates an IRQ tag for a timer, IPI or similar event.
1464 *
1465 * @returns The IRQ tag.
1466 * @param pDevIns Device instance of the APIC.
1467 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1468 */
1469 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1470
1471 /**
1472 * Modifies APIC-related bits in the CPUID feature mask.
1473 *
1474 * @param pDevIns Device instance of the APIC.
1475 * @param enmVersion Supported APIC version.
1476 */
1477 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1478
1479 /**
1480 * Get the virtual CPU id corresponding to the current EMT.
1481 *
1482 * @param pDevIns The APIC device instance.
1483 */
1484 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1485
1486 /**
1487 * Sends SIPI to given virtual CPU.
1488 *
1489 * @param pDevIns The APIC device instance.
1490 * @param idCpu Virtual CPU to perform SIPI on
1491 * @param iVector SIPI vector
1492 */
1493 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1494
1495 /**
1496 * Sends init IPI to given virtual CPU, should result in reset and
1497 * halting till SIPI.
1498 *
1499 * @param pDevIns The APIC device instance.
1500 * @param idCpu Virtual CPU to perform SIPI on
1501 */
1502 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1503
1504 /**
1505 * Gets the address of the RC APIC helpers.
1506 *
1507 * This should be called at both construction and relocation time
1508 * to obtain the correct address of the RC helpers.
1509 *
1510 * @returns GC pointer to the APIC helpers.
1511 * @param pDevIns Device instance of the APIC.
1512 */
1513 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1514
1515 /**
1516 * Gets the address of the R0 APIC helpers.
1517 *
1518 * This should be called at both construction and relocation time
1519 * to obtain the correct address of the R0 helpers.
1520 *
1521 * @returns R0 pointer to the APIC helpers.
1522 * @param pDevIns Device instance of the APIC.
1523 */
1524 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1525
1526 /**
1527 * Get the critical section used to synchronize the PICs, PCI and stuff.
1528 *
1529 * @returns Ring-3 pointer to the critical section.
1530 * @param pDevIns The APIC device instance.
1531 */
1532 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1533
1534 /**
1535 * Get the critical section used to synchronize the PICs, PCI and stuff.
1536 *
1537 * @returns Raw-mode context pointer to the critical section.
1538 * @param pDevIns The APIC device instance.
1539 */
1540 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1541
1542 /**
1543 * Get the critical section used to synchronize the PICs, PCI and stuff.
1544 *
1545 * @returns Ring-0 pointer to the critical section.
1546 * @param pDevIns The APIC device instance.
1547 */
1548 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1549
1550 /** Just a safety precaution. */
1551 uint32_t u32TheEnd;
1552} PDMAPICHLPR3;
1553/** Pointer to APIC helpers. */
1554typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1555/** Pointer to const APIC helpers. */
1556typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1557
1558/** Current PDMAPICHLP version number. */
1559#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1560
1561
1562/**
1563 * I/O APIC registration structure.
1564 */
1565typedef struct PDMIOAPICREG
1566{
1567 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1568 uint32_t u32Version;
1569
1570 /**
1571 * Set the an IRQ.
1572 *
1573 * @param pDevIns Device instance of the I/O APIC.
1574 * @param iIrq IRQ number to set.
1575 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1576 * @param uTagSrc The IRQ tag and source (for tracing).
1577 * @remarks Caller enters the PDM critical section
1578 */
1579 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1580
1581 /** The name of the RC SetIrq entry point. */
1582 const char *pszSetIrqRC;
1583
1584 /** The name of the R0 SetIrq entry point. */
1585 const char *pszSetIrqR0;
1586
1587 /**
1588 * Send a MSI.
1589 *
1590 * @param pDevIns Device instance of the I/O APIC.
1591 * @param GCPhys Request address.
1592 * @param uValue Request value.
1593 * @param uTagSrc The IRQ tag and source (for tracing).
1594 * @remarks Caller enters the PDM critical section
1595 */
1596 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1597
1598 /** The name of the RC SendMsi entry point. */
1599 const char *pszSendMsiRC;
1600
1601 /** The name of the R0 SendMsi entry point. */
1602 const char *pszSendMsiR0;
1603} PDMIOAPICREG;
1604/** Pointer to an APIC registration structure. */
1605typedef PDMIOAPICREG *PPDMIOAPICREG;
1606
1607/** Current PDMAPICREG version number. */
1608#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1609
1610
1611/**
1612 * IOAPIC RC helpers.
1613 */
1614typedef struct PDMIOAPICHLPRC
1615{
1616 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1617 uint32_t u32Version;
1618
1619 /**
1620 * Private interface between the IOAPIC and APIC.
1621 *
1622 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1623 *
1624 * @returns status code.
1625 * @param pDevIns Device instance of the IOAPIC.
1626 * @param u8Dest See APIC implementation.
1627 * @param u8DestMode See APIC implementation.
1628 * @param u8DeliveryMode See APIC implementation.
1629 * @param iVector See APIC implementation.
1630 * @param u8Polarity See APIC implementation.
1631 * @param u8TriggerMode See APIC implementation.
1632 * @param uTagSrc The IRQ tag and source (for tracing).
1633 */
1634 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1635 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1636
1637 /**
1638 * Acquires the PDM lock.
1639 *
1640 * @returns VINF_SUCCESS on success.
1641 * @returns rc if we failed to acquire the lock.
1642 * @param pDevIns The IOAPIC device instance.
1643 * @param rc What to return if we fail to acquire the lock.
1644 */
1645 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1646
1647 /**
1648 * Releases the PDM lock.
1649 *
1650 * @param pDevIns The IOAPIC device instance.
1651 */
1652 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1653
1654 /** Just a safety precaution. */
1655 uint32_t u32TheEnd;
1656} PDMIOAPICHLPRC;
1657/** Pointer to IOAPIC RC helpers. */
1658typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1659/** Pointer to const IOAPIC helpers. */
1660typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1661
1662/** Current PDMIOAPICHLPRC version number. */
1663#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1664
1665
1666/**
1667 * IOAPIC R0 helpers.
1668 */
1669typedef struct PDMIOAPICHLPR0
1670{
1671 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1672 uint32_t u32Version;
1673
1674 /**
1675 * Private interface between the IOAPIC and APIC.
1676 *
1677 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1678 *
1679 * @returns status code.
1680 * @param pDevIns Device instance of the IOAPIC.
1681 * @param u8Dest See APIC implementation.
1682 * @param u8DestMode See APIC implementation.
1683 * @param u8DeliveryMode See APIC implementation.
1684 * @param iVector See APIC implementation.
1685 * @param u8Polarity See APIC implementation.
1686 * @param u8TriggerMode See APIC implementation.
1687 * @param uTagSrc The IRQ tag and source (for tracing).
1688 */
1689 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1690 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1691
1692 /**
1693 * Acquires the PDM lock.
1694 *
1695 * @returns VINF_SUCCESS on success.
1696 * @returns rc if we failed to acquire the lock.
1697 * @param pDevIns The IOAPIC device instance.
1698 * @param rc What to return if we fail to acquire the lock.
1699 */
1700 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1701
1702 /**
1703 * Releases the PDM lock.
1704 *
1705 * @param pDevIns The IOAPIC device instance.
1706 */
1707 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1708
1709 /** Just a safety precaution. */
1710 uint32_t u32TheEnd;
1711} PDMIOAPICHLPR0;
1712/** Pointer to IOAPIC R0 helpers. */
1713typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1714/** Pointer to const IOAPIC helpers. */
1715typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1716
1717/** Current PDMIOAPICHLPR0 version number. */
1718#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1719
1720/**
1721 * IOAPIC R3 helpers.
1722 */
1723typedef struct PDMIOAPICHLPR3
1724{
1725 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1726 uint32_t u32Version;
1727
1728 /**
1729 * Private interface between the IOAPIC and APIC.
1730 *
1731 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1732 *
1733 * @returns status code
1734 * @param pDevIns Device instance of the IOAPIC.
1735 * @param u8Dest See APIC implementation.
1736 * @param u8DestMode See APIC implementation.
1737 * @param u8DeliveryMode See APIC implementation.
1738 * @param iVector See APIC implementation.
1739 * @param u8Polarity See APIC implementation.
1740 * @param u8TriggerMode See APIC implementation.
1741 * @param uTagSrc The IRQ tag and source (for tracing).
1742 */
1743 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1744 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1745
1746 /**
1747 * Acquires the PDM lock.
1748 *
1749 * @returns VINF_SUCCESS on success.
1750 * @returns Fatal error on failure.
1751 * @param pDevIns The IOAPIC device instance.
1752 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1753 */
1754 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1755
1756 /**
1757 * Releases the PDM lock.
1758 *
1759 * @param pDevIns The IOAPIC device instance.
1760 */
1761 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1762
1763 /**
1764 * Gets the address of the RC IOAPIC helpers.
1765 *
1766 * This should be called at both construction and relocation time
1767 * to obtain the correct address of the RC helpers.
1768 *
1769 * @returns RC pointer to the IOAPIC helpers.
1770 * @param pDevIns Device instance of the IOAPIC.
1771 */
1772 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1773
1774 /**
1775 * Gets the address of the R0 IOAPIC helpers.
1776 *
1777 * This should be called at both construction and relocation time
1778 * to obtain the correct address of the R0 helpers.
1779 *
1780 * @returns R0 pointer to the IOAPIC helpers.
1781 * @param pDevIns Device instance of the IOAPIC.
1782 */
1783 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1784
1785 /** Just a safety precaution. */
1786 uint32_t u32TheEnd;
1787} PDMIOAPICHLPR3;
1788/** Pointer to IOAPIC R3 helpers. */
1789typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1790/** Pointer to const IOAPIC helpers. */
1791typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1792
1793/** Current PDMIOAPICHLPR3 version number. */
1794#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1795
1796
1797/**
1798 * HPET registration structure.
1799 */
1800typedef struct PDMHPETREG
1801{
1802 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1803 uint32_t u32Version;
1804
1805} PDMHPETREG;
1806/** Pointer to an HPET registration structure. */
1807typedef PDMHPETREG *PPDMHPETREG;
1808
1809/** Current PDMHPETREG version number. */
1810#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1811
1812/**
1813 * HPET RC helpers.
1814 *
1815 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1816 * at some later point.
1817 */
1818typedef struct PDMHPETHLPRC
1819{
1820 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1821 uint32_t u32Version;
1822
1823 /** Just a safety precaution. */
1824 uint32_t u32TheEnd;
1825} PDMHPETHLPRC;
1826
1827/** Pointer to HPET RC helpers. */
1828typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1829/** Pointer to const HPET RC helpers. */
1830typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1831
1832/** Current PDMHPETHLPRC version number. */
1833#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1834
1835
1836/**
1837 * HPET R0 helpers.
1838 *
1839 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1840 * at some later point.
1841 */
1842typedef struct PDMHPETHLPR0
1843{
1844 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1845 uint32_t u32Version;
1846
1847 /** Just a safety precaution. */
1848 uint32_t u32TheEnd;
1849} PDMHPETHLPR0;
1850
1851/** Pointer to HPET R0 helpers. */
1852typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1853/** Pointer to const HPET R0 helpers. */
1854typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1855
1856/** Current PDMHPETHLPR0 version number. */
1857#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1858
1859/**
1860 * HPET R3 helpers.
1861 */
1862typedef struct PDMHPETHLPR3
1863{
1864 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1865 uint32_t u32Version;
1866
1867 /**
1868 * Gets the address of the RC HPET helpers.
1869 *
1870 * This should be called at both construction and relocation time
1871 * to obtain the correct address of the RC helpers.
1872 *
1873 * @returns RC pointer to the HPET helpers.
1874 * @param pDevIns Device instance of the HPET.
1875 */
1876 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1877
1878 /**
1879 * Gets the address of the R0 HPET helpers.
1880 *
1881 * This should be called at both construction and relocation time
1882 * to obtain the correct address of the R0 helpers.
1883 *
1884 * @returns R0 pointer to the HPET helpers.
1885 * @param pDevIns Device instance of the HPET.
1886 */
1887 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1888
1889 /**
1890 * Set legacy mode on PIT and RTC.
1891 *
1892 * @returns VINF_SUCCESS on success.
1893 * @returns rc if we failed to set legacy mode.
1894 * @param pDevIns Device instance of the HPET.
1895 * @param fActivated Whether legacy mode is activated or deactivated.
1896 */
1897 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1898
1899
1900 /**
1901 * Set IRQ, bypassing ISA bus override rules.
1902 *
1903 * @returns VINF_SUCCESS on success.
1904 * @returns rc if we failed to set legacy mode.
1905 * @param pDevIns Device instance of the HPET.
1906 * @param fActivate Activate or deactivate legacy mode.
1907 */
1908 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1909
1910 /** Just a safety precaution. */
1911 uint32_t u32TheEnd;
1912} PDMHPETHLPR3;
1913
1914/** Pointer to HPET R3 helpers. */
1915typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1916/** Pointer to const HPET R3 helpers. */
1917typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1918
1919/** Current PDMHPETHLPR3 version number. */
1920#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1921
1922
1923/**
1924 * Raw PCI device registration structure.
1925 */
1926typedef struct PDMPCIRAWREG
1927{
1928 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1929 uint32_t u32Version;
1930 /** Just a safety precaution. */
1931 uint32_t u32TheEnd;
1932} PDMPCIRAWREG;
1933/** Pointer to a raw PCI registration structure. */
1934typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1935
1936/** Current PDMPCIRAWREG version number. */
1937#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1938
1939/**
1940 * Raw PCI device raw-mode context helpers.
1941 */
1942typedef struct PDMPCIRAWHLPRC
1943{
1944 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1945 uint32_t u32Version;
1946 /** Just a safety precaution. */
1947 uint32_t u32TheEnd;
1948} PDMPCIRAWHLPRC;
1949/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1950typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1951/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1952typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1953
1954/** Current PDMPCIRAWHLPRC version number. */
1955#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1956
1957/**
1958 * Raw PCI device ring-0 context helpers.
1959 */
1960typedef struct PDMPCIRAWHLPR0
1961{
1962 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1963 uint32_t u32Version;
1964 /** Just a safety precaution. */
1965 uint32_t u32TheEnd;
1966} PDMPCIRAWHLPR0;
1967/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1968typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1969/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1970typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1971
1972/** Current PDMPCIRAWHLPR0 version number. */
1973#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1974
1975
1976/**
1977 * Raw PCI device ring-3 context helpers.
1978 */
1979typedef struct PDMPCIRAWHLPR3
1980{
1981 /** Undefined structure version and magic number. */
1982 uint32_t u32Version;
1983
1984 /**
1985 * Gets the address of the RC raw PCI device helpers.
1986 *
1987 * This should be called at both construction and relocation time to obtain
1988 * the correct address of the RC helpers.
1989 *
1990 * @returns RC pointer to the raw PCI device helpers.
1991 * @param pDevIns Device instance of the raw PCI device.
1992 */
1993 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1994
1995 /**
1996 * Gets the address of the R0 raw PCI device helpers.
1997 *
1998 * This should be called at both construction and relocation time to obtain
1999 * the correct address of the R0 helpers.
2000 *
2001 * @returns R0 pointer to the raw PCI device helpers.
2002 * @param pDevIns Device instance of the raw PCI device.
2003 */
2004 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2005
2006 /** Just a safety precaution. */
2007 uint32_t u32TheEnd;
2008} PDMPCIRAWHLPR3;
2009/** Pointer to raw PCI R3 helpers. */
2010typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2011/** Pointer to const raw PCI R3 helpers. */
2012typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2013
2014/** Current PDMPCIRAWHLPR3 version number. */
2015#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2016
2017
2018#ifdef IN_RING3
2019
2020/**
2021 * DMA Transfer Handler.
2022 *
2023 * @returns Number of bytes transferred.
2024 * @param pDevIns Device instance of the DMA.
2025 * @param pvUser User pointer.
2026 * @param uChannel Channel number.
2027 * @param off DMA position.
2028 * @param cb Block size.
2029 * @remarks The device lock is not taken, however, the DMA device lock is held.
2030 */
2031typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2032/** Pointer to a FNDMATRANSFERHANDLER(). */
2033typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2034
2035/**
2036 * DMA Controller registration structure.
2037 */
2038typedef struct PDMDMAREG
2039{
2040 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2041 uint32_t u32Version;
2042
2043 /**
2044 * Execute pending transfers.
2045 *
2046 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2047 * @param pDevIns Device instance of the DMAC.
2048 * @remarks No locks held, called on EMT(0) as a form of serialization.
2049 */
2050 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2051
2052 /**
2053 * Register transfer function for DMA channel.
2054 *
2055 * @param pDevIns Device instance of the DMAC.
2056 * @param uChannel Channel number.
2057 * @param pfnTransferHandler Device specific transfer function.
2058 * @param pvUSer User pointer to be passed to the callback.
2059 * @remarks No locks held, called on an EMT.
2060 */
2061 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2062
2063 /**
2064 * Read memory
2065 *
2066 * @returns Number of bytes read.
2067 * @param pDevIns Device instance of the DMAC.
2068 * @param pvBuffer Pointer to target buffer.
2069 * @param off DMA position.
2070 * @param cbBlock Block size.
2071 * @remarks No locks held, called on an EMT.
2072 */
2073 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2074
2075 /**
2076 * Write memory
2077 *
2078 * @returns Number of bytes written.
2079 * @param pDevIns Device instance of the DMAC.
2080 * @param pvBuffer Memory to write.
2081 * @param off DMA position.
2082 * @param cbBlock Block size.
2083 * @remarks No locks held, called on an EMT.
2084 */
2085 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2086
2087 /**
2088 * Set the DREQ line.
2089 *
2090 * @param pDevIns Device instance of the DMAC.
2091 * @param uChannel Channel number.
2092 * @param uLevel Level of the line.
2093 * @remarks No locks held, called on an EMT.
2094 */
2095 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2096
2097 /**
2098 * Get channel mode
2099 *
2100 * @returns Channel mode.
2101 * @param pDevIns Device instance of the DMAC.
2102 * @param uChannel Channel number.
2103 * @remarks No locks held, called on an EMT.
2104 */
2105 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2106
2107} PDMDMACREG;
2108/** Pointer to a DMAC registration structure. */
2109typedef PDMDMACREG *PPDMDMACREG;
2110
2111/** Current PDMDMACREG version number. */
2112#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2113
2114
2115/**
2116 * DMA Controller device helpers.
2117 */
2118typedef struct PDMDMACHLP
2119{
2120 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2121 uint32_t u32Version;
2122
2123 /* to-be-defined */
2124
2125} PDMDMACHLP;
2126/** Pointer to DMAC helpers. */
2127typedef PDMDMACHLP *PPDMDMACHLP;
2128/** Pointer to const DMAC helpers. */
2129typedef const PDMDMACHLP *PCPDMDMACHLP;
2130
2131/** Current PDMDMACHLP version number. */
2132#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2133
2134#endif /* IN_RING3 */
2135
2136
2137
2138/**
2139 * RTC registration structure.
2140 */
2141typedef struct PDMRTCREG
2142{
2143 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2144 uint32_t u32Version;
2145 uint32_t u32Alignment; /**< structure size alignment. */
2146
2147 /**
2148 * Write to a CMOS register and update the checksum if necessary.
2149 *
2150 * @returns VBox status code.
2151 * @param pDevIns Device instance of the RTC.
2152 * @param iReg The CMOS register index.
2153 * @param u8Value The CMOS register value.
2154 * @remarks Caller enters the device critical section.
2155 */
2156 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2157
2158 /**
2159 * Read a CMOS register.
2160 *
2161 * @returns VBox status code.
2162 * @param pDevIns Device instance of the RTC.
2163 * @param iReg The CMOS register index.
2164 * @param pu8Value Where to store the CMOS register value.
2165 * @remarks Caller enters the device critical section.
2166 */
2167 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2168
2169} PDMRTCREG;
2170/** Pointer to a RTC registration structure. */
2171typedef PDMRTCREG *PPDMRTCREG;
2172/** Pointer to a const RTC registration structure. */
2173typedef const PDMRTCREG *PCPDMRTCREG;
2174
2175/** Current PDMRTCREG version number. */
2176#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2177
2178
2179/**
2180 * RTC device helpers.
2181 */
2182typedef struct PDMRTCHLP
2183{
2184 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2185 uint32_t u32Version;
2186
2187 /* to-be-defined */
2188
2189} PDMRTCHLP;
2190/** Pointer to RTC helpers. */
2191typedef PDMRTCHLP *PPDMRTCHLP;
2192/** Pointer to const RTC helpers. */
2193typedef const PDMRTCHLP *PCPDMRTCHLP;
2194
2195/** Current PDMRTCHLP version number. */
2196#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2197
2198
2199
2200#ifdef IN_RING3
2201
2202/**
2203 * PDM Device API.
2204 */
2205typedef struct PDMDEVHLPR3
2206{
2207 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2208 uint32_t u32Version;
2209
2210 /**
2211 * Register a number of I/O ports with a device.
2212 *
2213 * These callbacks are of course for the host context (HC).
2214 * Register HC handlers before guest context (GC) handlers! There must be a
2215 * HC handler for every GC handler!
2216 *
2217 * @returns VBox status.
2218 * @param pDevIns The device instance to register the ports with.
2219 * @param Port First port number in the range.
2220 * @param cPorts Number of ports to register.
2221 * @param pvUser User argument.
2222 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2223 * @param pfnIn Pointer to function which is gonna handle IN operations.
2224 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2225 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2226 * @param pszDesc Pointer to description string. This must not be freed.
2227 * @remarks Caller enters the device critical section prior to invoking the
2228 * registered callback methods.
2229 */
2230 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2231 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2232 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2233
2234 /**
2235 * Register a number of I/O ports with a device for RC.
2236 *
2237 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2238 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2239 * for every RC handler!
2240 *
2241 * @returns VBox status.
2242 * @param pDevIns The device instance to register the ports with
2243 * and which RC module to resolve the names
2244 * against.
2245 * @param Port First port number in the range.
2246 * @param cPorts Number of ports to register.
2247 * @param pvUser User argument.
2248 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2249 * @param pszIn Name of the RC function which is gonna handle IN operations.
2250 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2251 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2252 * @param pszDesc Pointer to description string. This must not be freed.
2253 * @remarks Caller enters the device critical section prior to invoking the
2254 * registered callback methods.
2255 */
2256 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2257 const char *pszOut, const char *pszIn,
2258 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2259
2260 /**
2261 * Register a number of I/O ports with a device.
2262 *
2263 * These callbacks are of course for the ring-0 host context (R0).
2264 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2265 *
2266 * @returns VBox status.
2267 * @param pDevIns The device instance to register the ports with.
2268 * @param Port First port number in the range.
2269 * @param cPorts Number of ports to register.
2270 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2271 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2272 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2273 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2274 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2275 * @param pszDesc Pointer to description string. This must not be freed.
2276 * @remarks Caller enters the device critical section prior to invoking the
2277 * registered callback methods.
2278 */
2279 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2280 const char *pszOut, const char *pszIn,
2281 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2282
2283 /**
2284 * Deregister I/O ports.
2285 *
2286 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2287 *
2288 * @returns VBox status.
2289 * @param pDevIns The device instance owning the ports.
2290 * @param Port First port number in the range.
2291 * @param cPorts Number of ports to deregister.
2292 */
2293 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2294
2295 /**
2296 * Register a Memory Mapped I/O (MMIO) region.
2297 *
2298 * These callbacks are of course for the ring-3 context (R3). Register HC
2299 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2300 * must be a R3 handler for every RC and R0 handler!
2301 *
2302 * @returns VBox status.
2303 * @param pDevIns The device instance to register the MMIO with.
2304 * @param GCPhysStart First physical address in the range.
2305 * @param cbRange The size of the range (in bytes).
2306 * @param pvUser User argument.
2307 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2308 * @param pfnRead Pointer to function which is gonna handle Read operations.
2309 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2310 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2311 * @param pszDesc Pointer to description string. This must not be freed.
2312 * @remarks Caller enters the device critical section prior to invoking the
2313 * registered callback methods.
2314 */
2315 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2316 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2317 uint32_t fFlags, const char *pszDesc));
2318
2319 /**
2320 * Register a Memory Mapped I/O (MMIO) region for GC.
2321 *
2322 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2323 * (R3) handlers before guest context handlers! There must be a R3 handler for
2324 * every RC handler!
2325 *
2326 * @returns VBox status.
2327 * @param pDevIns The device instance to register the MMIO with.
2328 * @param GCPhysStart First physical address in the range.
2329 * @param cbRange The size of the range (in bytes).
2330 * @param pvUser User argument.
2331 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2332 * @param pszRead Name of the RC function which is gonna handle Read operations.
2333 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2334 * @remarks Caller enters the device critical section prior to invoking the
2335 * registered callback methods.
2336 */
2337 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2338 const char *pszWrite, const char *pszRead, const char *pszFill));
2339
2340 /**
2341 * Register a Memory Mapped I/O (MMIO) region for R0.
2342 *
2343 * These callbacks are for the ring-0 host context (R0). Register ring-3
2344 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2345 * every R0 handler!
2346 *
2347 * @returns VBox status.
2348 * @param pDevIns The device instance to register the MMIO with.
2349 * @param GCPhysStart First physical address in the range.
2350 * @param cbRange The size of the range (in bytes).
2351 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2352 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2353 * @param pszRead Name of the RC function which is gonna handle Read operations.
2354 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2355 * @param pszDesc Obsolete. NULL is fine.
2356 * @remarks Caller enters the device critical section prior to invoking the
2357 * registered callback methods.
2358 */
2359 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2360 const char *pszWrite, const char *pszRead, const char *pszFill));
2361
2362 /**
2363 * Deregister a Memory Mapped I/O (MMIO) region.
2364 *
2365 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2366 *
2367 * @returns VBox status.
2368 * @param pDevIns The device instance owning the MMIO region(s).
2369 * @param GCPhysStart First physical address in the range.
2370 * @param cbRange The size of the range (in bytes).
2371 */
2372 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2373
2374 /**
2375 * Allocate and register a MMIO2 region.
2376 *
2377 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2378 * RAM associated with a device. It is also non-shared memory with a
2379 * permanent ring-3 mapping and page backing (presently).
2380 *
2381 * @returns VBox status.
2382 * @param pDevIns The device instance.
2383 * @param iRegion The region number. Use the PCI region number as
2384 * this must be known to the PCI bus device too. If
2385 * it's not associated with the PCI device, then
2386 * any number up to UINT8_MAX is fine.
2387 * @param cb The size (in bytes) of the region.
2388 * @param fFlags Reserved for future use, must be zero.
2389 * @param ppv Where to store the address of the ring-3 mapping
2390 * of the memory.
2391 * @param pszDesc Pointer to description string. This must not be
2392 * freed.
2393 * @thread EMT.
2394 */
2395 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2396
2397 /**
2398 * Deregisters and frees a MMIO2 region.
2399 *
2400 * Any physical (and virtual) access handlers registered for the region must
2401 * be deregistered before calling this function.
2402 *
2403 * @returns VBox status code.
2404 * @param pDevIns The device instance.
2405 * @param iRegion The region number used during registration.
2406 * @thread EMT.
2407 */
2408 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2409
2410 /**
2411 * Maps a MMIO2 region into the physical memory space.
2412 *
2413 * A MMIO2 range may overlap with base memory if a lot of RAM
2414 * is configured for the VM, in which case we'll drop the base
2415 * memory pages. Presently we will make no attempt to preserve
2416 * anything that happens to be present in the base memory that
2417 * is replaced, this is of course incorrectly but it's too much
2418 * effort.
2419 *
2420 * @returns VBox status code.
2421 * @param pDevIns The device instance.
2422 * @param iRegion The region number used during registration.
2423 * @param GCPhys The physical address to map it at.
2424 * @thread EMT.
2425 */
2426 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2427
2428 /**
2429 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2430 *
2431 * @returns VBox status code.
2432 * @param pDevIns The device instance.
2433 * @param iRegion The region number used during registration.
2434 * @param GCPhys The physical address it's currently mapped at.
2435 * @thread EMT.
2436 */
2437 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2438
2439 /**
2440 * Maps a portion of an MMIO2 region into the hypervisor region.
2441 *
2442 * Callers of this API must never deregister the MMIO2 region before the
2443 * VM is powered off.
2444 *
2445 * @return VBox status code.
2446 * @param pDevIns The device owning the MMIO2 memory.
2447 * @param iRegion The region.
2448 * @param off The offset into the region. Will be rounded down
2449 * to closest page boundary.
2450 * @param cb The number of bytes to map. Will be rounded up
2451 * to the closest page boundary.
2452 * @param pszDesc Mapping description.
2453 * @param pRCPtr Where to store the RC address.
2454 */
2455 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2456 const char *pszDesc, PRTRCPTR pRCPtr));
2457
2458 /**
2459 * Maps a portion of an MMIO2 region into kernel space (host).
2460 *
2461 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2462 * or the VM is terminated.
2463 *
2464 * @return VBox status code.
2465 * @param pDevIns The device owning the MMIO2 memory.
2466 * @param iRegion The region.
2467 * @param off The offset into the region. Must be page
2468 * aligned.
2469 * @param cb The number of bytes to map. Must be page
2470 * aligned.
2471 * @param pszDesc Mapping description.
2472 * @param pR0Ptr Where to store the R0 address.
2473 */
2474 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2475 const char *pszDesc, PRTR0PTR pR0Ptr));
2476
2477 /**
2478 * Register a ROM (BIOS) region.
2479 *
2480 * It goes without saying that this is read-only memory. The memory region must be
2481 * in unassigned memory. I.e. from the top of the address space or on the PC in
2482 * the 0xa0000-0xfffff range.
2483 *
2484 * @returns VBox status.
2485 * @param pDevIns The device instance owning the ROM region.
2486 * @param GCPhysStart First physical address in the range.
2487 * Must be page aligned!
2488 * @param cbRange The size of the range (in bytes).
2489 * Must be page aligned!
2490 * @param pvBinary Pointer to the binary data backing the ROM image.
2491 * @param cbBinary The size of the binary pointer. This must
2492 * be equal or smaller than @a cbRange.
2493 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2494 * @param pszDesc Pointer to description string. This must not be freed.
2495 *
2496 * @remark There is no way to remove the rom, automatically on device cleanup or
2497 * manually from the device yet. At present I doubt we need such features...
2498 */
2499 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2500 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2501
2502 /**
2503 * Changes the protection of shadowed ROM mapping.
2504 *
2505 * This is intented for use by the system BIOS, chipset or device in question to
2506 * change the protection of shadowed ROM code after init and on reset.
2507 *
2508 * @param pDevIns The device instance.
2509 * @param GCPhysStart Where the mapping starts.
2510 * @param cbRange The size of the mapping.
2511 * @param enmProt The new protection type.
2512 */
2513 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2514
2515 /**
2516 * Register a save state data unit.
2517 *
2518 * @returns VBox status.
2519 * @param pDevIns The device instance.
2520 * @param pszName Data unit name.
2521 * @param uInstance The instance identifier of the data unit.
2522 * This must together with the name be unique.
2523 * @param uVersion Data layout version number.
2524 * @param cbGuess The approximate amount of data in the unit.
2525 * Only for progress indicators.
2526 * @param pszBefore Name of data unit which we should be put in
2527 * front of. Optional (NULL).
2528 *
2529 * @param pfnLivePrep Prepare live save callback, optional.
2530 * @param pfnLiveExec Execute live save callback, optional.
2531 * @param pfnLiveVote Vote live save callback, optional.
2532 *
2533 * @param pfnSavePrep Prepare save callback, optional.
2534 * @param pfnSaveExec Execute save callback, optional.
2535 * @param pfnSaveDone Done save callback, optional.
2536 *
2537 * @param pfnLoadPrep Prepare load callback, optional.
2538 * @param pfnLoadExec Execute load callback, optional.
2539 * @param pfnLoadDone Done load callback, optional.
2540 * @remarks Caller enters the device critical section prior to invoking the
2541 * registered callback methods.
2542 */
2543 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2544 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2545 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2546 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2547
2548 /**
2549 * Creates a timer.
2550 *
2551 * @returns VBox status.
2552 * @param pDevIns The device instance.
2553 * @param enmClock The clock to use on this timer.
2554 * @param pfnCallback Callback function.
2555 * @param pvUser User argument for the callback.
2556 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2557 * @param pszDesc Pointer to description string which must stay around
2558 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2559 * @param ppTimer Where to store the timer on success.
2560 * @remarks Caller enters the device critical section prior to invoking the
2561 * callback.
2562 */
2563 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2564
2565 /**
2566 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2567 *
2568 * @returns pTime.
2569 * @param pDevIns The device instance.
2570 * @param pTime Where to store the time.
2571 */
2572 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2573
2574 /**
2575 * Read physical memory.
2576 *
2577 * @returns VINF_SUCCESS (for now).
2578 * @param pDevIns The device instance.
2579 * @param GCPhys Physical address start reading from.
2580 * @param pvBuf Where to put the read bits.
2581 * @param cbRead How many bytes to read.
2582 * @thread Any thread, but the call may involve the emulation thread.
2583 */
2584 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2585
2586 /**
2587 * Write to physical memory.
2588 *
2589 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2590 * @param pDevIns The device instance.
2591 * @param GCPhys Physical address to write to.
2592 * @param pvBuf What to write.
2593 * @param cbWrite How many bytes to write.
2594 * @thread Any thread, but the call may involve the emulation thread.
2595 */
2596 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2597
2598 /**
2599 * Requests the mapping of a guest page into ring-3.
2600 *
2601 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2602 * release it.
2603 *
2604 * This API will assume your intention is to write to the page, and will
2605 * therefore replace shared and zero pages. If you do not intend to modify the
2606 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2607 *
2608 * @returns VBox status code.
2609 * @retval VINF_SUCCESS on success.
2610 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2611 * backing or if the page has any active access handlers. The caller
2612 * must fall back on using PGMR3PhysWriteExternal.
2613 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2614 *
2615 * @param pVM The VM handle.
2616 * @param GCPhys The guest physical address of the page that
2617 * should be mapped.
2618 * @param fFlags Flags reserved for future use, MBZ.
2619 * @param ppv Where to store the address corresponding to
2620 * GCPhys.
2621 * @param pLock Where to store the lock information that
2622 * pfnPhysReleasePageMappingLock needs.
2623 *
2624 * @remark Avoid calling this API from within critical sections (other than the
2625 * PGM one) because of the deadlock risk when we have to delegating the
2626 * task to an EMT.
2627 * @thread Any.
2628 */
2629 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2630
2631 /**
2632 * Requests the mapping of a guest page into ring-3, external threads.
2633 *
2634 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2635 * release it.
2636 *
2637 * @returns VBox status code.
2638 * @retval VINF_SUCCESS on success.
2639 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2640 * backing or if the page as an active ALL access handler. The caller
2641 * must fall back on using PGMPhysRead.
2642 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2643 *
2644 * @param pDevIns The device instance.
2645 * @param GCPhys The guest physical address of the page that
2646 * should be mapped.
2647 * @param fFlags Flags reserved for future use, MBZ.
2648 * @param ppv Where to store the address corresponding to
2649 * GCPhys.
2650 * @param pLock Where to store the lock information that
2651 * pfnPhysReleasePageMappingLock needs.
2652 *
2653 * @remark Avoid calling this API from within critical sections.
2654 * @thread Any.
2655 */
2656 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2657
2658 /**
2659 * Release the mapping of a guest page.
2660 *
2661 * This is the counter part of pfnPhysGCPhys2CCPtr and
2662 * pfnPhysGCPhys2CCPtrReadOnly.
2663 *
2664 * @param pDevIns The device instance.
2665 * @param pLock The lock structure initialized by the mapping
2666 * function.
2667 */
2668 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2669
2670 /**
2671 * Read guest physical memory by virtual address.
2672 *
2673 * @param pDevIns The device instance.
2674 * @param pvDst Where to put the read bits.
2675 * @param GCVirtSrc Guest virtual address to start reading from.
2676 * @param cb How many bytes to read.
2677 * @thread The emulation thread.
2678 */
2679 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2680
2681 /**
2682 * Write to guest physical memory by virtual address.
2683 *
2684 * @param pDevIns The device instance.
2685 * @param GCVirtDst Guest virtual address to write to.
2686 * @param pvSrc What to write.
2687 * @param cb How many bytes to write.
2688 * @thread The emulation thread.
2689 */
2690 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2691
2692 /**
2693 * Convert a guest virtual address to a guest physical address.
2694 *
2695 * @returns VBox status code.
2696 * @param pDevIns The device instance.
2697 * @param GCPtr Guest virtual address.
2698 * @param pGCPhys Where to store the GC physical address
2699 * corresponding to GCPtr.
2700 * @thread The emulation thread.
2701 * @remark Careful with page boundaries.
2702 */
2703 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2704
2705 /**
2706 * Allocate memory which is associated with current VM instance
2707 * and automatically freed on it's destruction.
2708 *
2709 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2710 * @param pDevIns The device instance.
2711 * @param cb Number of bytes to allocate.
2712 */
2713 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2714
2715 /**
2716 * Allocate memory which is associated with current VM instance
2717 * and automatically freed on it's destruction. The memory is ZEROed.
2718 *
2719 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2720 * @param pDevIns The device instance.
2721 * @param cb Number of bytes to allocate.
2722 */
2723 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2724
2725 /**
2726 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2727 *
2728 * @param pDevIns The device instance.
2729 * @param pv Pointer to the memory to free.
2730 */
2731 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2732
2733 /**
2734 * Gets the VM state.
2735 *
2736 * @returns VM state.
2737 * @param pDevIns The device instance.
2738 * @thread Any thread (just keep in mind that it's volatile info).
2739 */
2740 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2741
2742 /**
2743 * Checks if the VM was teleported and hasn't been fully resumed yet.
2744 *
2745 * @returns true / false.
2746 * @param pDevIns The device instance.
2747 * @thread Any thread.
2748 */
2749 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2750
2751 /**
2752 * Set the VM error message
2753 *
2754 * @returns rc.
2755 * @param pDevIns The device instance.
2756 * @param rc VBox status code.
2757 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2758 * @param pszFormat Error message format string.
2759 * @param ... Error message arguments.
2760 */
2761 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2762
2763 /**
2764 * Set the VM error message
2765 *
2766 * @returns rc.
2767 * @param pDevIns The device instance.
2768 * @param rc VBox status code.
2769 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2770 * @param pszFormat Error message format string.
2771 * @param va Error message arguments.
2772 */
2773 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2774
2775 /**
2776 * Set the VM runtime error message
2777 *
2778 * @returns VBox status code.
2779 * @param pDevIns The device instance.
2780 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2781 * @param pszErrorId Error ID string.
2782 * @param pszFormat Error message format string.
2783 * @param ... Error message arguments.
2784 */
2785 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2786
2787 /**
2788 * Set the VM runtime error message
2789 *
2790 * @returns VBox status code.
2791 * @param pDevIns The device instance.
2792 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2793 * @param pszErrorId Error ID string.
2794 * @param pszFormat Error message format string.
2795 * @param va Error message arguments.
2796 */
2797 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2798
2799 /**
2800 * Stops the VM and enters the debugger to look at the guest state.
2801 *
2802 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2803 * invoking this function directly.
2804 *
2805 * @returns VBox status code which must be passed up to the VMM.
2806 * @param pDevIns The device instance.
2807 * @param pszFile Filename of the assertion location.
2808 * @param iLine The linenumber of the assertion location.
2809 * @param pszFunction Function of the assertion location.
2810 * @param pszFormat Message. (optional)
2811 * @param args Message parameters.
2812 */
2813 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2814
2815 /**
2816 * Register a info handler with DBGF,
2817 *
2818 * @returns VBox status code.
2819 * @param pDevIns The device instance.
2820 * @param pszName The identifier of the info.
2821 * @param pszDesc The description of the info and any arguments
2822 * the handler may take.
2823 * @param pfnHandler The handler function to be called to display the
2824 * info.
2825 */
2826 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2827
2828 /**
2829 * Registers a set of registers for a device.
2830 *
2831 * The @a pvUser argument of the getter and setter callbacks will be
2832 * @a pDevIns. The register names will be prefixed by the device name followed
2833 * immediately by the instance number.
2834 *
2835 * @returns VBox status code.
2836 * @param pDevIns The device instance.
2837 * @param paRegisters The register descriptors.
2838 *
2839 * @remarks The device critical section is NOT entered prior to working the
2840 * callbacks registered via this helper!
2841 */
2842 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2843
2844 /**
2845 * Gets the trace buffer handle.
2846 *
2847 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2848 * really inteded for direct usage, thus no inline wrapper function.
2849 *
2850 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2851 * @param pDevIns The device instance.
2852 */
2853 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2854
2855 /**
2856 * Registers a statistics sample if statistics are enabled.
2857 *
2858 * @param pDevIns Device instance of the DMA.
2859 * @param pvSample Pointer to the sample.
2860 * @param enmType Sample type. This indicates what pvSample is
2861 * pointing at.
2862 * @param pszName Sample name. The name is on this form
2863 * "/<component>/<sample>". Further nesting is
2864 * possible.
2865 * @param enmUnit Sample unit.
2866 * @param pszDesc Sample description.
2867 */
2868 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2869
2870 /**
2871 * Same as pfnSTAMRegister except that the name is specified in a
2872 * RTStrPrintf like fashion.
2873 *
2874 * @returns VBox status.
2875 * @param pDevIns Device instance of the DMA.
2876 * @param pvSample Pointer to the sample.
2877 * @param enmType Sample type. This indicates what pvSample is
2878 * pointing at.
2879 * @param enmVisibility Visibility type specifying whether unused
2880 * statistics should be visible or not.
2881 * @param enmUnit Sample unit.
2882 * @param pszDesc Sample description.
2883 * @param pszName The sample name format string.
2884 * @param ... Arguments to the format string.
2885 */
2886 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2887 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2888
2889 /**
2890 * Same as pfnSTAMRegister except that the name is specified in a
2891 * RTStrPrintfV like fashion.
2892 *
2893 * @returns VBox status.
2894 * @param pDevIns Device instance of the DMA.
2895 * @param pvSample Pointer to the sample.
2896 * @param enmType Sample type. This indicates what pvSample is
2897 * pointing at.
2898 * @param enmVisibility Visibility type specifying whether unused
2899 * statistics should be visible or not.
2900 * @param enmUnit Sample unit.
2901 * @param pszDesc Sample description.
2902 * @param pszName The sample name format string.
2903 * @param args Arguments to the format string.
2904 */
2905 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2906 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2907
2908 /**
2909 * Registers the device with the default PCI bus.
2910 *
2911 * @returns VBox status code.
2912 * @param pDevIns The device instance.
2913 * @param pPciDev The PCI device structure.
2914 * Any PCI enabled device must keep this in it's instance data!
2915 * Fill in the PCI data config before registration, please.
2916 * @remark This is the simple interface, a Ex interface will be created if
2917 * more features are needed later.
2918 */
2919 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2920
2921 /**
2922 * Initialize MSI support in a PCI device.
2923 *
2924 * @returns VBox status code.
2925 * @param pDevIns The device instance.
2926 * @param pMsiReg MSI registartion structure.
2927 */
2928 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2929
2930 /**
2931 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2932 *
2933 * @returns VBox status code.
2934 * @param pDevIns The device instance.
2935 * @param iRegion The region number.
2936 * @param cbRegion Size of the region.
2937 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2938 * @param pfnCallback Callback for doing the mapping.
2939 * @remarks The callback will be invoked holding the PDM lock. The device lock
2940 * is NOT take because that is very likely be a lock order violation.
2941 */
2942 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2943 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2944
2945 /**
2946 * Register PCI configuration space read/write callbacks.
2947 *
2948 * @param pDevIns The device instance.
2949 * @param pPciDev The PCI device structure.
2950 * If NULL the default PCI device for this device instance is used.
2951 * @param pfnRead Pointer to the user defined PCI config read function.
2952 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2953 * PCI config read function. This way, user can decide when (and if)
2954 * to call default PCI config read function. Can be NULL.
2955 * @param pfnWrite Pointer to the user defined PCI config write function.
2956 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2957 * PCI config write function. This way, user can decide when (and if)
2958 * to call default PCI config write function. Can be NULL.
2959 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2960 * is NOT take because that is very likely be a lock order violation.
2961 * @thread EMT
2962 */
2963 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2964 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2965
2966 /**
2967 * Bus master physical memory read.
2968 *
2969 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2970 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2971 * @param pDevIns The device instance.
2972 * @param GCPhys Physical address start reading from.
2973 * @param pvBuf Where to put the read bits.
2974 * @param cbRead How many bytes to read.
2975 * @thread Any thread, but the call may involve the emulation thread.
2976 */
2977 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2978
2979 /**
2980 * Bus master physical memory write.
2981 *
2982 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2983 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2984 * @param pDevIns The device instance.
2985 * @param GCPhys Physical address to write to.
2986 * @param pvBuf What to write.
2987 * @param cbWrite How many bytes to write.
2988 * @thread Any thread, but the call may involve the emulation thread.
2989 */
2990 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2991
2992 /**
2993 * Set the IRQ for a PCI device.
2994 *
2995 * @param pDevIns The device instance.
2996 * @param iIrq IRQ number to set.
2997 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2998 * @thread Any thread, but will involve the emulation thread.
2999 */
3000 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3001
3002 /**
3003 * Set the IRQ for a PCI device, but don't wait for EMT to process
3004 * the request when not called from EMT.
3005 *
3006 * @param pDevIns The device instance.
3007 * @param iIrq IRQ number to set.
3008 * @param iLevel IRQ level.
3009 * @thread Any thread, but will involve the emulation thread.
3010 */
3011 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3012
3013 /**
3014 * Set ISA IRQ for a device.
3015 *
3016 * @param pDevIns The device instance.
3017 * @param iIrq IRQ number to set.
3018 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3019 * @thread Any thread, but will involve the emulation thread.
3020 */
3021 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3022
3023 /**
3024 * Set the ISA IRQ for a device, but don't wait for EMT to process
3025 * the request when not called from EMT.
3026 *
3027 * @param pDevIns The device instance.
3028 * @param iIrq IRQ number to set.
3029 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3030 * @thread Any thread, but will involve the emulation thread.
3031 */
3032 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3033
3034 /**
3035 * Attaches a driver (chain) to the device.
3036 *
3037 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3038 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3039 *
3040 * @returns VBox status code.
3041 * @param pDevIns The device instance.
3042 * @param iLun The logical unit to attach.
3043 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3044 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3045 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3046 * for the live of the device instance.
3047 */
3048 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3049 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3050
3051 /**
3052 * Create a queue.
3053 *
3054 * @returns VBox status code.
3055 * @param pDevIns The device instance.
3056 * @param cbItem The size of a queue item.
3057 * @param cItems The number of items in the queue.
3058 * @param cMilliesInterval The number of milliseconds between polling the queue.
3059 * If 0 then the emulation thread will be notified whenever an item arrives.
3060 * @param pfnCallback The consumer function.
3061 * @param fRZEnabled Set if the queue should work in RC and R0.
3062 * @param pszName The queue base name. The instance number will be
3063 * appended automatically.
3064 * @param ppQueue Where to store the queue handle on success.
3065 * @thread The emulation thread.
3066 * @remarks The device critical section will NOT be entered before calling the
3067 * callback. No locks will be held, but for now it's safe to assume
3068 * that only one EMT will do queue callbacks at any one time.
3069 */
3070 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3071 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3072
3073 /**
3074 * Initializes a PDM critical section.
3075 *
3076 * The PDM critical sections are derived from the IPRT critical sections, but
3077 * works in RC and R0 as well.
3078 *
3079 * @returns VBox status code.
3080 * @param pDevIns The device instance.
3081 * @param pCritSect Pointer to the critical section.
3082 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3083 * @param pszNameFmt Format string for naming the critical section.
3084 * For statistics and lock validation.
3085 * @param va Arguments for the format string.
3086 */
3087 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3088 const char *pszNameFmt, va_list va));
3089
3090 /**
3091 * Gets the NOP critical section.
3092 *
3093 * @returns The ring-3 address of the NOP critical section.
3094 * @param pDevIns The device instance.
3095 */
3096 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3097
3098 /**
3099 * Gets the NOP critical section.
3100 *
3101 * @returns The ring-0 address of the NOP critical section.
3102 * @param pDevIns The device instance.
3103 */
3104 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3105
3106 /**
3107 * Gets the NOP critical section.
3108 *
3109 * @returns The raw-mode context address of the NOP critical section.
3110 * @param pDevIns The device instance.
3111 */
3112 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3113
3114 /**
3115 * Changes the device level critical section from the automatically created
3116 * default to one desired by the device constructor.
3117 *
3118 * @returns VBox status code.
3119 * @param pDevIns The device instance.
3120 * @param pCritSect The critical section to use. NULL is not
3121 * valid, instead use the NOP critical
3122 * section.
3123 */
3124 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3125
3126 /**
3127 * Creates a PDM thread.
3128 *
3129 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3130 * resuming, and destroying the thread as the VM state changes.
3131 *
3132 * @returns VBox status code.
3133 * @param pDevIns The device instance.
3134 * @param ppThread Where to store the thread 'handle'.
3135 * @param pvUser The user argument to the thread function.
3136 * @param pfnThread The thread function.
3137 * @param pfnWakeup The wakup callback. This is called on the EMT
3138 * thread when a state change is pending.
3139 * @param cbStack See RTThreadCreate.
3140 * @param enmType See RTThreadCreate.
3141 * @param pszName See RTThreadCreate.
3142 * @remarks The device critical section will NOT be entered prior to invoking
3143 * the function pointers.
3144 */
3145 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3146 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3147
3148 /**
3149 * Set up asynchronous handling of a suspend, reset or power off notification.
3150 *
3151 * This shall only be called when getting the notification. It must be called
3152 * for each one.
3153 *
3154 * @returns VBox status code.
3155 * @param pDevIns The device instance.
3156 * @param pfnAsyncNotify The callback.
3157 * @thread EMT(0)
3158 * @remarks The caller will enter the device critical section prior to invoking
3159 * the callback.
3160 */
3161 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3162
3163 /**
3164 * Notify EMT(0) that the device has completed the asynchronous notification
3165 * handling.
3166 *
3167 * This can be called at any time, spurious calls will simply be ignored.
3168 *
3169 * @param pDevIns The device instance.
3170 * @thread Any
3171 */
3172 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3173
3174 /**
3175 * Register the RTC device.
3176 *
3177 * @returns VBox status code.
3178 * @param pDevIns The device instance.
3179 * @param pRtcReg Pointer to a RTC registration structure.
3180 * @param ppRtcHlp Where to store the pointer to the helper
3181 * functions.
3182 */
3183 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3184
3185 /**
3186 * Register the PCI Bus.
3187 *
3188 * @returns VBox status code.
3189 * @param pDevIns The device instance.
3190 * @param pPciBusReg Pointer to PCI bus registration structure.
3191 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3192 * helpers.
3193 */
3194 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3195
3196 /**
3197 * Register the PIC device.
3198 *
3199 * @returns VBox status code.
3200 * @param pDevIns The device instance.
3201 * @param pPicReg Pointer to a PIC registration structure.
3202 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3203 * helpers.
3204 */
3205 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3206
3207 /**
3208 * Register the APIC device.
3209 *
3210 * @returns VBox status code.
3211 * @param pDevIns The device instance.
3212 * @param pApicReg Pointer to a APIC registration structure.
3213 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3214 */
3215 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3216
3217 /**
3218 * Register the I/O APIC device.
3219 *
3220 * @returns VBox status code.
3221 * @param pDevIns The device instance.
3222 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3223 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3224 * helpers.
3225 */
3226 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3227
3228 /**
3229 * Register the HPET device.
3230 *
3231 * @returns VBox status code.
3232 * @param pDevIns The device instance.
3233 * @param pHpetReg Pointer to a HPET registration structure.
3234 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3235 * helpers.
3236 */
3237 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3238
3239 /**
3240 * Register a raw PCI device.
3241 *
3242 * @returns VBox status code.
3243 * @param pDevIns The device instance.
3244 * @param pHpetReg Pointer to a raw PCI registration structure.
3245 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3246 * device helpers.
3247 */
3248 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3249
3250 /**
3251 * Register the DMA device.
3252 *
3253 * @returns VBox status code.
3254 * @param pDevIns The device instance.
3255 * @param pDmacReg Pointer to a DMAC registration structure.
3256 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3257 */
3258 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3259
3260 /**
3261 * Register transfer function for DMA channel.
3262 *
3263 * @returns VBox status code.
3264 * @param pDevIns The device instance.
3265 * @param uChannel Channel number.
3266 * @param pfnTransferHandler Device specific transfer callback function.
3267 * @param pvUser User pointer to pass to the callback.
3268 * @thread EMT
3269 */
3270 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3271
3272 /**
3273 * Read memory.
3274 *
3275 * @returns VBox status code.
3276 * @param pDevIns The device instance.
3277 * @param uChannel Channel number.
3278 * @param pvBuffer Pointer to target buffer.
3279 * @param off DMA position.
3280 * @param cbBlock Block size.
3281 * @param pcbRead Where to store the number of bytes which was
3282 * read. optional.
3283 * @thread EMT
3284 */
3285 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3286
3287 /**
3288 * Write memory.
3289 *
3290 * @returns VBox status code.
3291 * @param pDevIns The device instance.
3292 * @param uChannel Channel number.
3293 * @param pvBuffer Memory to write.
3294 * @param off DMA position.
3295 * @param cbBlock Block size.
3296 * @param pcbWritten Where to store the number of bytes which was
3297 * written. optional.
3298 * @thread EMT
3299 */
3300 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3301
3302 /**
3303 * Set the DREQ line.
3304 *
3305 * @returns VBox status code.
3306 * @param pDevIns Device instance.
3307 * @param uChannel Channel number.
3308 * @param uLevel Level of the line.
3309 * @thread EMT
3310 */
3311 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3312
3313 /**
3314 * Get channel mode.
3315 *
3316 * @returns Channel mode. See specs.
3317 * @param pDevIns The device instance.
3318 * @param uChannel Channel number.
3319 * @thread EMT
3320 */
3321 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3322
3323 /**
3324 * Schedule DMA execution.
3325 *
3326 * @param pDevIns The device instance.
3327 * @thread Any thread.
3328 */
3329 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3330
3331 /**
3332 * Write CMOS value and update the checksum(s).
3333 *
3334 * @returns VBox status code.
3335 * @param pDevIns The device instance.
3336 * @param iReg The CMOS register index.
3337 * @param u8Value The CMOS register value.
3338 * @thread EMT
3339 */
3340 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3341
3342 /**
3343 * Read CMOS value.
3344 *
3345 * @returns VBox status code.
3346 * @param pDevIns The device instance.
3347 * @param iReg The CMOS register index.
3348 * @param pu8Value Where to store the CMOS register value.
3349 * @thread EMT
3350 */
3351 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3352
3353 /**
3354 * Assert that the current thread is the emulation thread.
3355 *
3356 * @returns True if correct.
3357 * @returns False if wrong.
3358 * @param pDevIns The device instance.
3359 * @param pszFile Filename of the assertion location.
3360 * @param iLine The linenumber of the assertion location.
3361 * @param pszFunction Function of the assertion location.
3362 */
3363 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3364
3365 /**
3366 * Assert that the current thread is NOT the emulation thread.
3367 *
3368 * @returns True if correct.
3369 * @returns False if wrong.
3370 * @param pDevIns The device instance.
3371 * @param pszFile Filename of the assertion location.
3372 * @param iLine The linenumber of the assertion location.
3373 * @param pszFunction Function of the assertion location.
3374 */
3375 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3376
3377 /**
3378 * Resolves the symbol for a raw-mode context interface.
3379 *
3380 * @returns VBox status code.
3381 * @param pDevIns The device instance.
3382 * @param pvInterface The interface structure.
3383 * @param cbInterface The size of the interface structure.
3384 * @param pszSymPrefix What to prefix the symbols in the list with
3385 * before resolving them. This must start with
3386 * 'dev' and contain the driver name.
3387 * @param pszSymList List of symbols corresponding to the interface.
3388 * There is generally a there is generally a define
3389 * holding this list associated with the interface
3390 * definition (INTERFACE_SYM_LIST). For more
3391 * details see PDMR3LdrGetInterfaceSymbols.
3392 * @thread EMT
3393 */
3394 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3395 const char *pszSymPrefix, const char *pszSymList));
3396
3397 /**
3398 * Resolves the symbol for a ring-0 context interface.
3399 *
3400 * @returns VBox status code.
3401 * @param pDevIns The device instance.
3402 * @param pvInterface The interface structure.
3403 * @param cbInterface The size of the interface structure.
3404 * @param pszSymPrefix What to prefix the symbols in the list with
3405 * before resolving them. This must start with
3406 * 'dev' and contain the driver name.
3407 * @param pszSymList List of symbols corresponding to the interface.
3408 * There is generally a there is generally a define
3409 * holding this list associated with the interface
3410 * definition (INTERFACE_SYM_LIST). For more
3411 * details see PDMR3LdrGetInterfaceSymbols.
3412 * @thread EMT
3413 */
3414 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3415 const char *pszSymPrefix, const char *pszSymList));
3416
3417 /**
3418 * Call the ring-0 request handler routine of the device.
3419 *
3420 * For this to work, the device must be ring-0 enabled and export a request
3421 * handler function. The name of the function must be the device name in
3422 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3423 * 'ReqHandler'. The device name will be captialized. It shall take the
3424 * exact same arguments as this function and be declared using
3425 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3426 *
3427 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3428 * or two as the handler address will be resolved on each invocation. This
3429 * is the reason for the EMT only restriction as well.
3430 *
3431 * @returns VBox status code.
3432 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3433 * handler function.
3434 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3435 *
3436 * @param pDevIns The device instance.
3437 * @param uOperation The operation to perform.
3438 * @param u64Arg 64-bit integer argument.
3439 * @thread EMT
3440 */
3441 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3442
3443 /** Space reserved for future members.
3444 * @{ */
3445 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3446 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3447 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3448 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3449 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3450 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3451 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3452 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3453 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3454 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3455 /** @} */
3456
3457
3458 /** API available to trusted devices only.
3459 *
3460 * These APIs are providing unrestricted access to the guest and the VM,
3461 * or they are interacting intimately with PDM.
3462 *
3463 * @{
3464 */
3465
3466 /**
3467 * Gets the user mode VM handle. Restricted API.
3468 *
3469 * @returns User mode VM Handle.
3470 * @param pDevIns The device instance.
3471 */
3472 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3473
3474 /**
3475 * Gets the global VM handle. Restricted API.
3476 *
3477 * @returns VM Handle.
3478 * @param pDevIns The device instance.
3479 */
3480 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3481
3482 /**
3483 * Gets the VMCPU handle. Restricted API.
3484 *
3485 * @returns VMCPU Handle.
3486 * @param pDevIns The device instance.
3487 */
3488 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3489
3490 /**
3491 * Registers the VMM device heap
3492 *
3493 * @returns VBox status code.
3494 * @param pDevIns The device instance.
3495 * @param GCPhys The physical address.
3496 * @param pvHeap Ring 3 heap pointer.
3497 * @param cbSize Size of the heap.
3498 * @thread EMT.
3499 */
3500 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3501
3502 /**
3503 * Unregisters the VMM device heap
3504 *
3505 * @returns VBox status code.
3506 * @param pDevIns The device instance.
3507 * @param GCPhys The physical address.
3508 * @thread EMT.
3509 */
3510 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3511
3512 /**
3513 * Resets the VM.
3514 *
3515 * @returns The appropriate VBox status code to pass around on reset.
3516 * @param pDevIns The device instance.
3517 * @thread The emulation thread.
3518 */
3519 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3520
3521 /**
3522 * Suspends the VM.
3523 *
3524 * @returns The appropriate VBox status code to pass around on suspend.
3525 * @param pDevIns The device instance.
3526 * @thread The emulation thread.
3527 */
3528 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3529
3530 /**
3531 * Suspends, saves and powers off the VM.
3532 *
3533 * @returns The appropriate VBox status code to pass around.
3534 * @param pDevIns The device instance.
3535 * @thread An emulation thread.
3536 */
3537 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3538
3539 /**
3540 * Power off the VM.
3541 *
3542 * @returns The appropriate VBox status code to pass around on power off.
3543 * @param pDevIns The device instance.
3544 * @thread The emulation thread.
3545 */
3546 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3547
3548 /**
3549 * Checks if the Gate A20 is enabled or not.
3550 *
3551 * @returns true if A20 is enabled.
3552 * @returns false if A20 is disabled.
3553 * @param pDevIns The device instance.
3554 * @thread The emulation thread.
3555 */
3556 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3557
3558 /**
3559 * Enables or disables the Gate A20.
3560 *
3561 * @param pDevIns The device instance.
3562 * @param fEnable Set this flag to enable the Gate A20; clear it
3563 * to disable.
3564 * @thread The emulation thread.
3565 */
3566 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3567
3568 /**
3569 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3570 * thread.
3571 *
3572 * @param pDevIns The device instance.
3573 * @param iLeaf The CPUID leaf to get.
3574 * @param pEax Where to store the EAX value.
3575 * @param pEbx Where to store the EBX value.
3576 * @param pEcx Where to store the ECX value.
3577 * @param pEdx Where to store the EDX value.
3578 * @thread EMT.
3579 */
3580 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3581
3582 /**
3583 * Get the current virtual clock time in a VM. The clock frequency must be
3584 * queried separately.
3585 *
3586 * @returns Current clock time.
3587 * @param pDevIns The device instance.
3588 */
3589 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3590
3591 /**
3592 * Get the frequency of the virtual clock.
3593 *
3594 * @returns The clock frequency (not variable at run-time).
3595 * @param pDevIns The device instance.
3596 */
3597 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3598
3599 /**
3600 * Get the current virtual clock time in a VM, in nanoseconds.
3601 *
3602 * @returns Current clock time (in ns).
3603 * @param pDevIns The device instance.
3604 */
3605 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3606
3607 /**
3608 * Gets the support driver session.
3609 *
3610 * This is intended for working with the semaphore API.
3611 *
3612 * @returns Support driver session handle.
3613 * @param pDrvIns The driver instance.
3614 */
3615 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3616
3617 /** @} */
3618
3619 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3620 uint32_t u32TheEnd;
3621} PDMDEVHLPR3;
3622#endif /* !IN_RING3 */
3623/** Pointer to the R3 PDM Device API. */
3624typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3625/** Pointer to the R3 PDM Device API, const variant. */
3626typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3627
3628/** Current PDMDEVHLPR3 version number. */
3629#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 12, 0)
3630
3631
3632/**
3633 * PDM Device API - RC Variant.
3634 */
3635typedef struct PDMDEVHLPRC
3636{
3637 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3638 uint32_t u32Version;
3639
3640 /**
3641 * Bus master physical memory read.
3642 *
3643 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3644 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3645 * @param pDevIns The device instance.
3646 * @param GCPhys Physical address start reading from.
3647 * @param pvBuf Where to put the read bits.
3648 * @param cbRead How many bytes to read.
3649 * @thread Any thread, but the call may involve the emulation thread.
3650 */
3651 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3652
3653 /**
3654 * Bus master physical memory write.
3655 *
3656 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3657 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3658 * @param pDevIns The device instance.
3659 * @param GCPhys Physical address to write to.
3660 * @param pvBuf What to write.
3661 * @param cbWrite How many bytes to write.
3662 * @thread Any thread, but the call may involve the emulation thread.
3663 */
3664 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3665
3666 /**
3667 * Set the IRQ for a PCI device.
3668 *
3669 * @param pDevIns Device instance.
3670 * @param iIrq IRQ number to set.
3671 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3672 * @thread Any thread, but will involve the emulation thread.
3673 */
3674 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3675
3676 /**
3677 * Set ISA IRQ for a device.
3678 *
3679 * @param pDevIns Device instance.
3680 * @param iIrq IRQ number to set.
3681 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3682 * @thread Any thread, but will involve the emulation thread.
3683 */
3684 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3685
3686 /**
3687 * Read physical memory.
3688 *
3689 * @returns VINF_SUCCESS (for now).
3690 * @param pDevIns Device instance.
3691 * @param GCPhys Physical address start reading from.
3692 * @param pvBuf Where to put the read bits.
3693 * @param cbRead How many bytes to read.
3694 */
3695 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3696
3697 /**
3698 * Write to physical memory.
3699 *
3700 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3701 * @param pDevIns Device instance.
3702 * @param GCPhys Physical address to write to.
3703 * @param pvBuf What to write.
3704 * @param cbWrite How many bytes to write.
3705 */
3706 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3707
3708 /**
3709 * Checks if the Gate A20 is enabled or not.
3710 *
3711 * @returns true if A20 is enabled.
3712 * @returns false if A20 is disabled.
3713 * @param pDevIns Device instance.
3714 * @thread The emulation thread.
3715 */
3716 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3717
3718 /**
3719 * Gets the VM state.
3720 *
3721 * @returns VM state.
3722 * @param pDevIns The device instance.
3723 * @thread Any thread (just keep in mind that it's volatile info).
3724 */
3725 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3726
3727 /**
3728 * Set the VM error message
3729 *
3730 * @returns rc.
3731 * @param pDrvIns Driver instance.
3732 * @param rc VBox status code.
3733 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3734 * @param pszFormat Error message format string.
3735 * @param ... Error message arguments.
3736 */
3737 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3738
3739 /**
3740 * Set the VM error message
3741 *
3742 * @returns rc.
3743 * @param pDrvIns Driver instance.
3744 * @param rc VBox status code.
3745 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3746 * @param pszFormat Error message format string.
3747 * @param va Error message arguments.
3748 */
3749 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3750
3751 /**
3752 * Set the VM runtime error message
3753 *
3754 * @returns VBox status code.
3755 * @param pDevIns Device instance.
3756 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3757 * @param pszErrorId Error ID string.
3758 * @param pszFormat Error message format string.
3759 * @param ... Error message arguments.
3760 */
3761 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3762
3763 /**
3764 * Set the VM runtime error message
3765 *
3766 * @returns VBox status code.
3767 * @param pDevIns Device instance.
3768 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3769 * @param pszErrorId Error ID string.
3770 * @param pszFormat Error message format string.
3771 * @param va Error message arguments.
3772 */
3773 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3774
3775 /**
3776 * Set parameters for pending MMIO patch operation
3777 *
3778 * @returns VBox status code.
3779 * @param pDevIns Device instance.
3780 * @param GCPhys MMIO physical address
3781 * @param pCachedData GC pointer to cached data
3782 */
3783 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3784
3785 /**
3786 * Gets the VM handle. Restricted API.
3787 *
3788 * @returns VM Handle.
3789 * @param pDevIns Device instance.
3790 */
3791 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3792
3793 /**
3794 * Gets the VMCPU handle. Restricted API.
3795 *
3796 * @returns VMCPU Handle.
3797 * @param pDevIns The device instance.
3798 */
3799 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3800
3801 /**
3802 * Get the current virtual clock time in a VM. The clock frequency must be
3803 * queried separately.
3804 *
3805 * @returns Current clock time.
3806 * @param pDevIns The device instance.
3807 */
3808 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3809
3810 /**
3811 * Get the frequency of the virtual clock.
3812 *
3813 * @returns The clock frequency (not variable at run-time).
3814 * @param pDevIns The device instance.
3815 */
3816 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3817
3818 /**
3819 * Get the current virtual clock time in a VM, in nanoseconds.
3820 *
3821 * @returns Current clock time (in ns).
3822 * @param pDevIns The device instance.
3823 */
3824 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3825
3826 /**
3827 * Gets the trace buffer handle.
3828 *
3829 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3830 * really inteded for direct usage, thus no inline wrapper function.
3831 *
3832 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3833 * @param pDevIns The device instance.
3834 */
3835 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3836
3837 /** Just a safety precaution. */
3838 uint32_t u32TheEnd;
3839} PDMDEVHLPRC;
3840/** Pointer PDM Device RC API. */
3841typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3842/** Pointer PDM Device RC API. */
3843typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3844
3845/** Current PDMDEVHLP version number. */
3846#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 1)
3847
3848
3849/**
3850 * PDM Device API - R0 Variant.
3851 */
3852typedef struct PDMDEVHLPR0
3853{
3854 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3855 uint32_t u32Version;
3856
3857 /**
3858 * Bus master physical memory read.
3859 *
3860 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3861 * VERR_EM_MEMORY.
3862 * @param pDevIns The device instance.
3863 * @param GCPhys Physical address start reading from.
3864 * @param pvBuf Where to put the read bits.
3865 * @param cbRead How many bytes to read.
3866 * @thread Any thread, but the call may involve the emulation thread.
3867 */
3868 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3869
3870 /**
3871 * Bus master physical memory write.
3872 *
3873 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3874 * VERR_EM_MEMORY.
3875 * @param pDevIns The device instance.
3876 * @param GCPhys Physical address to write to.
3877 * @param pvBuf What to write.
3878 * @param cbWrite How many bytes to write.
3879 * @thread Any thread, but the call may involve the emulation thread.
3880 */
3881 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3882
3883 /**
3884 * Set the IRQ for a PCI device.
3885 *
3886 * @param pDevIns Device instance.
3887 * @param iIrq IRQ number to set.
3888 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3889 * @thread Any thread, but will involve the emulation thread.
3890 */
3891 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3892
3893 /**
3894 * Set ISA IRQ for a device.
3895 *
3896 * @param pDevIns Device instance.
3897 * @param iIrq IRQ number to set.
3898 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3899 * @thread Any thread, but will involve the emulation thread.
3900 */
3901 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3902
3903 /**
3904 * Read physical memory.
3905 *
3906 * @returns VINF_SUCCESS (for now).
3907 * @param pDevIns Device instance.
3908 * @param GCPhys Physical address start reading from.
3909 * @param pvBuf Where to put the read bits.
3910 * @param cbRead How many bytes to read.
3911 */
3912 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3913
3914 /**
3915 * Write to physical memory.
3916 *
3917 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3918 * @param pDevIns Device instance.
3919 * @param GCPhys Physical address to write to.
3920 * @param pvBuf What to write.
3921 * @param cbWrite How many bytes to write.
3922 */
3923 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3924
3925 /**
3926 * Checks if the Gate A20 is enabled or not.
3927 *
3928 * @returns true if A20 is enabled.
3929 * @returns false if A20 is disabled.
3930 * @param pDevIns Device instance.
3931 * @thread The emulation thread.
3932 */
3933 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3934
3935 /**
3936 * Gets the VM state.
3937 *
3938 * @returns VM state.
3939 * @param pDevIns The device instance.
3940 * @thread Any thread (just keep in mind that it's volatile info).
3941 */
3942 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3943
3944 /**
3945 * Set the VM error message
3946 *
3947 * @returns rc.
3948 * @param pDrvIns Driver instance.
3949 * @param rc VBox status code.
3950 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3951 * @param pszFormat Error message format string.
3952 * @param ... Error message arguments.
3953 */
3954 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3955
3956 /**
3957 * Set the VM error message
3958 *
3959 * @returns rc.
3960 * @param pDrvIns Driver instance.
3961 * @param rc VBox status code.
3962 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3963 * @param pszFormat Error message format string.
3964 * @param va Error message arguments.
3965 */
3966 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3967
3968 /**
3969 * Set the VM runtime error message
3970 *
3971 * @returns VBox status code.
3972 * @param pDevIns Device instance.
3973 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3974 * @param pszErrorId Error ID string.
3975 * @param pszFormat Error message format string.
3976 * @param ... Error message arguments.
3977 */
3978 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3979
3980 /**
3981 * Set the VM runtime error message
3982 *
3983 * @returns VBox status code.
3984 * @param pDevIns Device instance.
3985 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3986 * @param pszErrorId Error ID string.
3987 * @param pszFormat Error message format string.
3988 * @param va Error message arguments.
3989 */
3990 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3991
3992 /**
3993 * Set parameters for pending MMIO patch operation
3994 *
3995 * @returns rc.
3996 * @param pDevIns Device instance.
3997 * @param GCPhys MMIO physical address
3998 * @param pCachedData GC pointer to cached data
3999 */
4000 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4001
4002 /**
4003 * Gets the VM handle. Restricted API.
4004 *
4005 * @returns VM Handle.
4006 * @param pDevIns Device instance.
4007 */
4008 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4009
4010 /**
4011 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4012 *
4013 * @returns true = yes, false = no
4014 * @param pDevIns Device instance.
4015 */
4016 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4017
4018 /**
4019 * Gets the VMCPU handle. Restricted API.
4020 *
4021 * @returns VMCPU Handle.
4022 * @param pDevIns The device instance.
4023 */
4024 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4025
4026 /**
4027 * Get the current virtual clock time in a VM. The clock frequency must be
4028 * queried separately.
4029 *
4030 * @returns Current clock time.
4031 * @param pDevIns The device instance.
4032 */
4033 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4034
4035 /**
4036 * Get the frequency of the virtual clock.
4037 *
4038 * @returns The clock frequency (not variable at run-time).
4039 * @param pDevIns The device instance.
4040 */
4041 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4042
4043 /**
4044 * Get the current virtual clock time in a VM, in nanoseconds.
4045 *
4046 * @returns Current clock time (in ns).
4047 * @param pDevIns The device instance.
4048 */
4049 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4050
4051 /**
4052 * Gets the trace buffer handle.
4053 *
4054 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4055 * really inteded for direct usage, thus no inline wrapper function.
4056 *
4057 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4058 * @param pDevIns The device instance.
4059 */
4060 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4061
4062 /** Just a safety precaution. */
4063 uint32_t u32TheEnd;
4064} PDMDEVHLPR0;
4065/** Pointer PDM Device R0 API. */
4066typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4067/** Pointer PDM Device GC API. */
4068typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4069
4070/** Current PDMDEVHLP version number. */
4071#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 1)
4072
4073
4074
4075/**
4076 * PDM Device Instance.
4077 */
4078typedef struct PDMDEVINS
4079{
4080 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4081 uint32_t u32Version;
4082 /** Device instance number. */
4083 uint32_t iInstance;
4084
4085 /** Pointer the GC PDM Device API. */
4086 PCPDMDEVHLPRC pHlpRC;
4087 /** Pointer to device instance data. */
4088 RTRCPTR pvInstanceDataRC;
4089 /** The critical section for the device, see pCritSectXR3. */
4090 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4091 /** Alignment padding. */
4092 RTRCPTR pAlignmentRC;
4093
4094 /** Pointer the R0 PDM Device API. */
4095 PCPDMDEVHLPR0 pHlpR0;
4096 /** Pointer to device instance data (R0). */
4097 RTR0PTR pvInstanceDataR0;
4098 /** The critical section for the device, see pCritSectXR3. */
4099 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4100
4101 /** Pointer the HC PDM Device API. */
4102 PCPDMDEVHLPR3 pHlpR3;
4103 /** Pointer to device instance data. */
4104 RTR3PTR pvInstanceDataR3;
4105 /** The critical section for the device.
4106 *
4107 * TM and IOM will enter this critical section before calling into the device
4108 * code. PDM will when doing power on, power off, reset, suspend and resume
4109 * notifications. SSM will currently not, but this will be changed later on.
4110 *
4111 * The device gets a critical section automatically assigned to it before
4112 * the constructor is called. If the constructor wishes to use a different
4113 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4114 * very early on.
4115 */
4116 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4117
4118 /** Pointer to device registration structure. */
4119 R3PTRTYPE(PCPDMDEVREG) pReg;
4120 /** Configuration handle. */
4121 R3PTRTYPE(PCFGMNODE) pCfg;
4122
4123 /** The base interface of the device.
4124 *
4125 * The device constructor initializes this if it has any
4126 * device level interfaces to export. To obtain this interface
4127 * call PDMR3QueryDevice(). */
4128 PDMIBASE IBase;
4129
4130 /** Tracing indicator. */
4131 uint32_t fTracing;
4132 /** The tracing ID of this device. */
4133 uint32_t idTracing;
4134#if HC_ARCH_BITS == 32
4135 /** Align the internal data more naturally. */
4136 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4137#endif
4138
4139 /** Internal data. */
4140 union
4141 {
4142#ifdef PDMDEVINSINT_DECLARED
4143 PDMDEVINSINT s;
4144#endif
4145 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4146 } Internal;
4147
4148 /** Device instance data. The size of this area is defined
4149 * in the PDMDEVREG::cbInstanceData field. */
4150 char achInstanceData[8];
4151} PDMDEVINS;
4152
4153/** Current PDMDEVINS version number. */
4154#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4155
4156/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4157#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4158
4159/**
4160 * Checks the structure versions of the device instance and device helpers,
4161 * returning if they are incompatible.
4162 *
4163 * This is for use in the constructor.
4164 *
4165 * @param pDevIns The device instance pointer.
4166 */
4167#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4168 do \
4169 { \
4170 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4171 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4172 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4173 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4174 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4175 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4176 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4177 } while (0)
4178
4179/**
4180 * Quietly checks the structure versions of the device instance and device
4181 * helpers, returning if they are incompatible.
4182 *
4183 * This is for use in the destructor.
4184 *
4185 * @param pDevIns The device instance pointer.
4186 */
4187#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4188 do \
4189 { \
4190 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4191 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4192 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4193 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4194 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4195 } while (0)
4196
4197/**
4198 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4199 * constructor - returns on failure.
4200 *
4201 * This should be invoked after having initialized the instance data
4202 * sufficiently for the correct operation of the destructor. The destructor is
4203 * always called!
4204 *
4205 * @param pDevIns Pointer to the PDM device instance.
4206 * @param pszValidValues Patterns describing the valid value names. See
4207 * RTStrSimplePatternMultiMatch for details on the
4208 * pattern syntax.
4209 * @param pszValidNodes Patterns describing the valid node (key) names.
4210 * Pass empty string if no valid nodes.
4211 */
4212#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4213 do \
4214 { \
4215 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4216 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4217 if (RT_FAILURE(rcValCfg)) \
4218 return rcValCfg; \
4219 } while (0)
4220
4221/** @def PDMDEV_ASSERT_EMT
4222 * Assert that the current thread is the emulation thread.
4223 */
4224#ifdef VBOX_STRICT
4225# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4226#else
4227# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4228#endif
4229
4230/** @def PDMDEV_ASSERT_OTHER
4231 * Assert that the current thread is NOT the emulation thread.
4232 */
4233#ifdef VBOX_STRICT
4234# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4235#else
4236# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4237#endif
4238
4239/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4240 * Assert that the current thread is owner of the VM lock.
4241 */
4242#ifdef VBOX_STRICT
4243# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4244#else
4245# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4246#endif
4247
4248/** @def PDMDEV_SET_ERROR
4249 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4250 */
4251#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4252 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4253
4254/** @def PDMDEV_SET_RUNTIME_ERROR
4255 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4256 */
4257#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4258 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4259
4260/** @def PDMDEVINS_2_RCPTR
4261 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4262 */
4263#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4264
4265/** @def PDMDEVINS_2_R3PTR
4266 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4267 */
4268#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4269
4270/** @def PDMDEVINS_2_R0PTR
4271 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4272 */
4273#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4274
4275
4276#ifdef IN_RING3
4277
4278/**
4279 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4280 */
4281DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4282 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4283 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4284{
4285 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4286}
4287
4288/**
4289 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4290 */
4291DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4292 const char *pszOut, const char *pszIn, const char *pszOutStr,
4293 const char *pszInStr, const char *pszDesc)
4294{
4295 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4296}
4297
4298/**
4299 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4300 */
4301DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4302 const char *pszOut, const char *pszIn, const char *pszOutStr,
4303 const char *pszInStr, const char *pszDesc)
4304{
4305 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4306}
4307
4308/**
4309 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4310 */
4311DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4312{
4313 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4314}
4315
4316/**
4317 * Register a Memory Mapped I/O (MMIO) region.
4318 *
4319 * These callbacks are of course for the ring-3 context (R3). Register HC
4320 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4321 * must be a R3 handler for every RC and R0 handler!
4322 *
4323 * @returns VBox status.
4324 * @param pDevIns The device instance to register the MMIO with.
4325 * @param GCPhysStart First physical address in the range.
4326 * @param cbRange The size of the range (in bytes).
4327 * @param pvUser User argument.
4328 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4329 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4330 * @param pfnRead Pointer to function which is gonna handle Read operations.
4331 * @param pszDesc Pointer to description string. This must not be freed.
4332 */
4333DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4334 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4335{
4336 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4337 fFlags, pszDesc);
4338}
4339
4340/**
4341 * Register a Memory Mapped I/O (MMIO) region for GC.
4342 *
4343 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4344 * (R3) handlers before guest context handlers! There must be a R3 handler for
4345 * every RC handler!
4346 *
4347 * @returns VBox status.
4348 * @param pDevIns The device instance to register the MMIO with.
4349 * @param GCPhysStart First physical address in the range.
4350 * @param cbRange The size of the range (in bytes).
4351 * @param pvUser User argument.
4352 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4353 * @param pszRead Name of the RC function which is gonna handle Read operations.
4354 */
4355DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4356 const char *pszWrite, const char *pszRead)
4357{
4358 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4359}
4360
4361/**
4362 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4363 */
4364DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4365 const char *pszWrite, const char *pszRead)
4366{
4367 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4368}
4369
4370/**
4371 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4372 */
4373DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4374 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4375 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4376{
4377 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4378 fFlags, pszDesc);
4379}
4380
4381/**
4382 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4383 */
4384DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4385 const char *pszWrite, const char *pszRead, const char *pszFill)
4386{
4387 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4388}
4389
4390/**
4391 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4392 */
4393DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4394 const char *pszWrite, const char *pszRead, const char *pszFill)
4395{
4396 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4397}
4398
4399/**
4400 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4401 */
4402DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4403{
4404 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4405}
4406
4407/**
4408 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4409 */
4410DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4411{
4412 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4413}
4414
4415/**
4416 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4417 */
4418DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4419{
4420 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4421}
4422
4423/**
4424 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4425 */
4426DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4427{
4428 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4429}
4430
4431/**
4432 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4433 */
4434DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4435{
4436 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4437}
4438
4439/**
4440 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4441 */
4442DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4443 const char *pszDesc, PRTRCPTR pRCPtr)
4444{
4445 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4446}
4447
4448/**
4449 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4450 */
4451DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4452 const char *pszDesc, PRTR0PTR pR0Ptr)
4453{
4454 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4455}
4456
4457/**
4458 * @copydoc PDMDEVHLPR3::pfnROMRegister
4459 */
4460DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4461 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4462{
4463 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4464}
4465
4466/**
4467 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4468 */
4469DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4470{
4471 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4472}
4473
4474/**
4475 * Register a save state data unit.
4476 *
4477 * @returns VBox status.
4478 * @param pDevIns The device instance.
4479 * @param uVersion Data layout version number.
4480 * @param cbGuess The approximate amount of data in the unit.
4481 * Only for progress indicators.
4482 * @param pfnSaveExec Execute save callback, optional.
4483 * @param pfnLoadExec Execute load callback, optional.
4484 */
4485DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4486 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4487{
4488 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4489 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4490 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4491 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4492}
4493
4494/**
4495 * Register a save state data unit with a live save callback as well.
4496 *
4497 * @returns VBox status.
4498 * @param pDevIns The device instance.
4499 * @param uVersion Data layout version number.
4500 * @param cbGuess The approximate amount of data in the unit.
4501 * Only for progress indicators.
4502 * @param pfnLiveExec Execute live callback, optional.
4503 * @param pfnSaveExec Execute save callback, optional.
4504 * @param pfnLoadExec Execute load callback, optional.
4505 */
4506DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4507 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4508{
4509 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4510 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4511 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4512 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4513}
4514
4515/**
4516 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4517 */
4518DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4519 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4520 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4521 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4522{
4523 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4524 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4525 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4526 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4527}
4528
4529/**
4530 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4531 */
4532DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4533 const char *pszDesc, PPTMTIMERR3 ppTimer)
4534{
4535 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4536}
4537
4538/**
4539 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4540 */
4541DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4542{
4543 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4544}
4545
4546#endif /* IN_RING3 */
4547
4548/**
4549 * @copydoc PDMDEVHLPR3::pfnPhysRead
4550 */
4551DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4552{
4553 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4554}
4555
4556/**
4557 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4558 */
4559DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4560{
4561 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4562}
4563
4564#ifdef IN_RING3
4565
4566/**
4567 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4568 */
4569DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4570{
4571 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4572}
4573
4574/**
4575 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4576 */
4577DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4578{
4579 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4580}
4581
4582/**
4583 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4584 */
4585DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4586{
4587 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4588}
4589
4590/**
4591 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4592 */
4593DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4594{
4595 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4596}
4597
4598/**
4599 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4600 */
4601DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4602{
4603 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4604}
4605
4606/**
4607 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4608 */
4609DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4610{
4611 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4612}
4613
4614/**
4615 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4616 */
4617DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4618{
4619 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4620}
4621
4622/**
4623 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4624 */
4625DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4626{
4627 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4628}
4629
4630/**
4631 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4632 */
4633DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4634{
4635 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4636}
4637#endif /* IN_RING3 */
4638
4639/**
4640 * @copydoc PDMDEVHLPR3::pfnVMState
4641 */
4642DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4643{
4644 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4645}
4646
4647#ifdef IN_RING3
4648/**
4649 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4650 */
4651DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4652{
4653 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4654}
4655#endif /* IN_RING3 */
4656
4657/**
4658 * @copydoc PDMDEVHLPR3::pfnVMSetError
4659 */
4660DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4661{
4662 va_list va;
4663 va_start(va, pszFormat);
4664 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4665 va_end(va);
4666 return rc;
4667}
4668
4669/**
4670 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4671 */
4672DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4673{
4674 va_list va;
4675 int rc;
4676 va_start(va, pszFormat);
4677 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4678 va_end(va);
4679 return rc;
4680}
4681
4682/**
4683 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4684 *
4685 * @returns VBox status code which must be passed up to the VMM. This will be
4686 * VINF_SUCCESS in non-strict builds.
4687 * @param pDevIns The device instance.
4688 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4689 * @param pszFormat Message. (optional)
4690 * @param ... Message parameters.
4691 */
4692DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4693{
4694#ifdef VBOX_STRICT
4695# ifdef IN_RING3
4696 int rc;
4697 va_list args;
4698 va_start(args, pszFormat);
4699 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4700 va_end(args);
4701 return rc;
4702# else
4703 NOREF(pDevIns);
4704 NOREF(pszFile);
4705 NOREF(iLine);
4706 NOREF(pszFunction);
4707 NOREF(pszFormat);
4708 return VINF_EM_DBG_STOP;
4709# endif
4710#else
4711 NOREF(pDevIns);
4712 NOREF(pszFile);
4713 NOREF(iLine);
4714 NOREF(pszFunction);
4715 NOREF(pszFormat);
4716 return VINF_SUCCESS;
4717#endif
4718}
4719
4720#ifdef IN_RING3
4721
4722/**
4723 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4724 */
4725DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4726{
4727 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4728}
4729
4730/**
4731 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4732 */
4733DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4734{
4735 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4736}
4737
4738/**
4739 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4740 */
4741DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4742{
4743 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4744}
4745
4746/**
4747 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4748 */
4749DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4750 const char *pszDesc, const char *pszName, ...)
4751{
4752 va_list va;
4753 va_start(va, pszName);
4754 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4755 va_end(va);
4756}
4757
4758/**
4759 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4760 */
4761DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4762{
4763 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4764}
4765
4766/**
4767 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4768 */
4769DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4770{
4771 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4772}
4773
4774/**
4775 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4776 */
4777DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4778{
4779 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4780}
4781
4782/**
4783 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4784 */
4785DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4786 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4787{
4788 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4789}
4790
4791#endif /* IN_RING3 */
4792
4793/**
4794 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4795 */
4796DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4797{
4798 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4799}
4800
4801/**
4802 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4803 */
4804DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4805{
4806 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4807}
4808
4809/**
4810 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4811 */
4812DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4813{
4814 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4815}
4816
4817/**
4818 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4819 */
4820DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4821{
4822 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4823}
4824
4825/**
4826 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4827 */
4828DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4829{
4830 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4831}
4832
4833/**
4834 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4835 */
4836DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4837{
4838 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4839}
4840
4841#ifdef IN_RING3
4842
4843/**
4844 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4845 */
4846DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4847{
4848 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4849}
4850
4851/**
4852 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4853 */
4854DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4855 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4856{
4857 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4858}
4859
4860/**
4861 * Initializes a PDM critical section.
4862 *
4863 * The PDM critical sections are derived from the IPRT critical sections, but
4864 * works in RC and R0 as well.
4865 *
4866 * @returns VBox status code.
4867 * @param pDevIns The device instance.
4868 * @param pCritSect Pointer to the critical section.
4869 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4870 * @param pszNameFmt Format string for naming the critical section.
4871 * For statistics and lock validation.
4872 * @param ... Arguments for the format string.
4873 */
4874DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4875{
4876 int rc;
4877 va_list va;
4878 va_start(va, pszNameFmt);
4879 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4880 va_end(va);
4881 return rc;
4882}
4883
4884/**
4885 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4886 */
4887DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4888{
4889 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4890}
4891
4892/**
4893 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4894 */
4895DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4896{
4897 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4898}
4899
4900/**
4901 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4902 */
4903DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4904{
4905 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4906}
4907
4908/**
4909 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4910 */
4911DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4912{
4913 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4914}
4915
4916/**
4917 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4918 */
4919DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4920 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4921{
4922 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4923}
4924
4925/**
4926 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4927 */
4928DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4929{
4930 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4931}
4932
4933/**
4934 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4935 */
4936DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4937{
4938 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4939}
4940
4941/**
4942 * @copydoc PDMDEVHLPR3::pfnA20Set
4943 */
4944DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4945{
4946 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4947}
4948
4949/**
4950 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4951 */
4952DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4953{
4954 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4955}
4956
4957/**
4958 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4959 */
4960DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4961{
4962 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4963}
4964
4965/**
4966 * @copydoc PDMDEVHLPR3::pfnPICRegister
4967 */
4968DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4969{
4970 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4971}
4972
4973/**
4974 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4975 */
4976DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4977{
4978 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4979}
4980
4981/**
4982 * @copydoc PDMDEVHLPR3::pfn
4983 */
4984DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4985{
4986 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4987}
4988
4989/**
4990 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4991 */
4992DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4993{
4994 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4995}
4996
4997/**
4998 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4999 */
5000DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5001{
5002 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5003}
5004
5005/**
5006 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5007 */
5008DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5009{
5010 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5011}
5012
5013/**
5014 * @copydoc PDMDEVHLPR3::pfnDMARegister
5015 */
5016DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5017{
5018 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5019}
5020
5021/**
5022 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5023 */
5024DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5025{
5026 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5027}
5028
5029/**
5030 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5031 */
5032DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5033{
5034 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5035}
5036
5037/**
5038 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5039 */
5040DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5041{
5042 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5043}
5044
5045/**
5046 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5047 */
5048DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5049{
5050 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5051}
5052
5053/**
5054 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5055 */
5056DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5057{
5058 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5059}
5060
5061/**
5062 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5063 */
5064DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5065{
5066 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5067}
5068
5069/**
5070 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5071 */
5072DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5073{
5074 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5075}
5076
5077/**
5078 * @copydoc PDMDEVHLP::pfnCallR0
5079 */
5080DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5081{
5082 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5083}
5084
5085/**
5086 * @copydoc PDMDEVHLPR3::pfnGetUVM
5087 */
5088DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5089{
5090 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5091}
5092
5093#endif /* IN_RING3 */
5094
5095/**
5096 * @copydoc PDMDEVHLPR3::pfnGetVM
5097 */
5098DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5099{
5100 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5101}
5102
5103/**
5104 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5105 */
5106DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5107{
5108 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5109}
5110
5111/**
5112 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5113 */
5114DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5115{
5116 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5117}
5118
5119/**
5120 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5121 */
5122DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5123{
5124 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5125}
5126
5127/**
5128 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5129 */
5130DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5131{
5132 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5133}
5134
5135#ifdef IN_RING3
5136
5137/**
5138 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5139 */
5140DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5141{
5142 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5143}
5144
5145/**
5146 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5147 */
5148DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5149{
5150 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5151}
5152
5153/**
5154 * @copydoc PDMDEVHLPR3::pfnVMReset
5155 */
5156DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5157{
5158 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5159}
5160
5161/**
5162 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5163 */
5164DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5165{
5166 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5167}
5168
5169/**
5170 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5171 */
5172DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5173{
5174 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5175}
5176
5177/**
5178 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5179 */
5180DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5181{
5182 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5183}
5184
5185#endif /* IN_RING3 */
5186
5187/**
5188 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5189 */
5190DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5191{
5192 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5193}
5194
5195#ifdef IN_RING3
5196
5197/**
5198 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5199 */
5200DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5201{
5202 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5203}
5204
5205/**
5206 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5207 */
5208DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5209{
5210 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5211}
5212
5213#endif /* IN_RING3 */
5214#ifdef IN_RING0
5215
5216/**
5217 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5218 */
5219DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5220{
5221 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5222}
5223
5224#endif /* IN_RING0 */
5225
5226
5227
5228
5229/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5230typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5231
5232/**
5233 * Callbacks for VBoxDeviceRegister().
5234 */
5235typedef struct PDMDEVREGCB
5236{
5237 /** Interface version.
5238 * This is set to PDM_DEVREG_CB_VERSION. */
5239 uint32_t u32Version;
5240
5241 /**
5242 * Registers a device with the current VM instance.
5243 *
5244 * @returns VBox status code.
5245 * @param pCallbacks Pointer to the callback table.
5246 * @param pReg Pointer to the device registration record.
5247 * This data must be permanent and readonly.
5248 */
5249 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5250} PDMDEVREGCB;
5251
5252/** Current version of the PDMDEVREGCB structure. */
5253#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5254
5255
5256/**
5257 * The VBoxDevicesRegister callback function.
5258 *
5259 * PDM will invoke this function after loading a device module and letting
5260 * the module decide which devices to register and how to handle conflicts.
5261 *
5262 * @returns VBox status code.
5263 * @param pCallbacks Pointer to the callback table.
5264 * @param u32Version VBox version number.
5265 */
5266typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5267
5268/** @} */
5269
5270RT_C_DECLS_END
5271
5272#endif
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