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source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 49441

Last change on this file since 49441 was 49441, checked in by vboxsync, 11 years ago

PDMAPICHLPR0/RC: Drop pfnChangeFeature.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDrvIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is only called when the VMR3PowerOff call is made on a running VM. This
164 * means that there is no notification if the VM was suspended before being
165 * powered off. There will also be no callback when hot plugging devices.
166 *
167 * @param pDevIns The device instance data.
168 * @thread EMT(0)
169 *
170 * @remarks Caller enters the device critical section.
171 */
172typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
173/** Pointer to a FNPDMDEVPOWEROFF() function. */
174typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
175
176/**
177 * Attach command.
178 *
179 * This is called to let the device attach to a driver for a specified LUN
180 * at runtime. This is not called during VM construction, the device
181 * constructor have to attach to all the available drivers.
182 *
183 * This is like plugging in the keyboard or mouse after turning on the PC.
184 *
185 * @returns VBox status code.
186 * @param pDevIns The device instance.
187 * @param iLUN The logical unit which is being detached.
188 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
189 *
190 * @remarks Caller enters the device critical section.
191 */
192typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
193/** Pointer to a FNPDMDEVATTACH() function. */
194typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
195
196/**
197 * Detach notification.
198 *
199 * This is called when a driver is detaching itself from a LUN of the device.
200 * The device should adjust it's state to reflect this.
201 *
202 * This is like unplugging the network cable to use it for the laptop or
203 * something while the PC is still running.
204 *
205 * @param pDevIns The device instance.
206 * @param iLUN The logical unit which is being detached.
207 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
208 *
209 * @remarks Caller enters the device critical section.
210 */
211typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
212/** Pointer to a FNPDMDEVDETACH() function. */
213typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
214
215/**
216 * Query the base interface of a logical unit.
217 *
218 * @returns VBOX status code.
219 * @param pDevIns The device instance.
220 * @param iLUN The logicial unit to query.
221 * @param ppBase Where to store the pointer to the base interface of the LUN.
222 *
223 * @remarks The device critical section is not entered.
224 */
225typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
226/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
227typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
228
229/**
230 * Init complete notification.
231 * This can be done to do communication with other devices and other
232 * initialization which requires everything to be in place.
233 *
234 * @returns VBOX status code.
235 * @param pDevIns The device instance.
236 *
237 * @remarks Caller enters the device critical section.
238 */
239typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
240/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
241typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
242
243
244/**
245 * The context of a pfnMemSetup call.
246 */
247typedef enum PDMDEVMEMSETUPCTX
248{
249 /** Invalid zero value. */
250 PDMDEVMEMSETUPCTX_INVALID = 0,
251 /** After construction. */
252 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
253 /** After reset. */
254 PDMDEVMEMSETUPCTX_AFTER_RESET,
255 /** Type size hack. */
256 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
257} PDMDEVMEMSETUPCTX;
258
259
260/**
261 * PDM Device Registration Structure.
262 *
263 * This structure is used when registering a device from VBoxInitDevices() in HC
264 * Ring-3. PDM will continue use till the VM is terminated.
265 */
266typedef struct PDMDEVREG
267{
268 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
269 uint32_t u32Version;
270 /** Device name. */
271 char szName[32];
272 /** Name of the raw-mode context module (no path).
273 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
274 char szRCMod[32];
275 /** Name of the ring-0 module (no path).
276 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
277 char szR0Mod[32];
278 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
279 * remain unchanged from registration till VM destruction. */
280 const char *pszDescription;
281
282 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
283 uint32_t fFlags;
284 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
285 uint32_t fClass;
286 /** Maximum number of instances (per VM). */
287 uint32_t cMaxInstances;
288 /** Size of the instance data. */
289 uint32_t cbInstance;
290
291 /** Construct instance - required. */
292 PFNPDMDEVCONSTRUCT pfnConstruct;
293 /** Destruct instance - optional.
294 * Critical section NOT entered (will be destroyed). */
295 PFNPDMDEVDESTRUCT pfnDestruct;
296 /** Relocation command - optional.
297 * Critical section NOT entered. */
298 PFNPDMDEVRELOCATE pfnRelocate;
299
300 /**
301 * Memory setup callback.
302 *
303 * @param pDevIns The device instance data.
304 * @param enmCtx Indicates the context of the call.
305 * @remarks The critical section is entered prior to calling this method.
306 */
307 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
308
309 /** Power on notification - optional.
310 * Critical section is entered. */
311 PFNPDMDEVPOWERON pfnPowerOn;
312 /** Reset notification - optional.
313 * Critical section is entered. */
314 PFNPDMDEVRESET pfnReset;
315 /** Suspend notification - optional.
316 * Critical section is entered. */
317 PFNPDMDEVSUSPEND pfnSuspend;
318 /** Resume notification - optional.
319 * Critical section is entered. */
320 PFNPDMDEVRESUME pfnResume;
321 /** Attach command - optional.
322 * Critical section is entered. */
323 PFNPDMDEVATTACH pfnAttach;
324 /** Detach notification - optional.
325 * Critical section is entered. */
326 PFNPDMDEVDETACH pfnDetach;
327 /** Query a LUN base interface - optional.
328 * Critical section is NOT entered. */
329 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
330 /** Init complete notification - optional.
331 * Critical section is entered. */
332 PFNPDMDEVINITCOMPLETE pfnInitComplete;
333 /** Power off notification - optional.
334 * Critical section is entered. */
335 PFNPDMDEVPOWEROFF pfnPowerOff;
336 /** @todo */
337 PFNRT pfnSoftReset;
338 /** Initialization safty marker. */
339 uint32_t u32VersionEnd;
340} PDMDEVREG;
341/** Pointer to a PDM Device Structure. */
342typedef PDMDEVREG *PPDMDEVREG;
343/** Const pointer to a PDM Device Structure. */
344typedef PDMDEVREG const *PCPDMDEVREG;
345
346/** Current DEVREG version number. */
347#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
348
349/** PDM Device Flags.
350 * @{ */
351/** This flag is used to indicate that the device has a RC component. */
352#define PDM_DEVREG_FLAGS_RC 0x00000001
353/** This flag is used to indicate that the device has a R0 component. */
354#define PDM_DEVREG_FLAGS_R0 0x00000002
355
356/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
357 * The bit count for the current host. */
358#if HC_ARCH_BITS == 32
359# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
360#elif HC_ARCH_BITS == 64
361# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
362#else
363# error Unsupported HC_ARCH_BITS value.
364#endif
365/** The host bit count mask. */
366#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
367
368/** The device support only 32-bit guests. */
369#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
370/** The device support only 64-bit guests. */
371#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
372/** The device support both 32-bit & 64-bit guests. */
373#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
374/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
375 * The guest bit count for the current compilation. */
376#if GC_ARCH_BITS == 32
377# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
378#elif GC_ARCH_BITS == 64
379# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
380#else
381# error Unsupported GC_ARCH_BITS value.
382#endif
383/** The guest bit count mask. */
384#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
385
386/** A convenience. */
387#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
388
389/** Indicates that the devices support PAE36 on a 32-bit guest. */
390#define PDM_DEVREG_FLAGS_PAE36 0x00001000
391
392/** Indicates that the device needs to be notified before the drivers when suspending. */
393#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
394
395/** Indicates that the device needs to be notified before the drivers when powering off. */
396#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
397
398/** Indicates that the device needs to be notified before the drivers when resetting. */
399#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
400/** @} */
401
402
403/** PDM Device Classes.
404 * The order is important, lower bit earlier instantiation.
405 * @{ */
406/** Architecture device. */
407#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
408/** Architecture BIOS device. */
409#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
410/** PCI bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
412/** ISA bus brigde. */
413#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
414/** Input device (mouse, keyboard, joystick, HID, ...). */
415#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
416/** Interrupt controller (PIC). */
417#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
418/** Interval controoler (PIT). */
419#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
420/** RTC/CMOS. */
421#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
422/** DMA controller. */
423#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
424/** VMM Device. */
425#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
426/** Graphics device, like VGA. */
427#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
428/** Storage controller device. */
429#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
430/** Network interface controller. */
431#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
432/** Audio. */
433#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
434/** USB HIC. */
435#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
436/** ACPI. */
437#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
438/** Serial controller device. */
439#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
440/** Parallel controller device */
441#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
442/** Host PCI pass-through device */
443#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
444/** Misc devices (always last). */
445#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
446/** @} */
447
448
449/** @name IRQ Level for use with the *SetIrq APIs.
450 * @{
451 */
452/** Assert the IRQ (can assume value 1). */
453#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
454/** Deassert the IRQ (can assume value 0). */
455#define PDM_IRQ_LEVEL_LOW 0
456/** flip-flop - deassert and then assert the IRQ again immediately. */
457#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
458/** @} */
459
460/**
461 * Registration record for MSI.
462 */
463typedef struct PDMMSIREG
464{
465 /** Number of MSI interrupt vectors, 0 if MSI not supported */
466 uint16_t cMsiVectors;
467 /** Offset of MSI capability */
468 uint8_t iMsiCapOffset;
469 /** Offset of next capability to MSI */
470 uint8_t iMsiNextOffset;
471 /** If we support 64-bit MSI addressing */
472 bool fMsi64bit;
473
474 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
475 uint16_t cMsixVectors;
476 /** Offset of MSI-X capability */
477 uint8_t iMsixCapOffset;
478 /** Offset of next capability to MSI-X */
479 uint8_t iMsixNextOffset;
480 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
481 uint8_t iMsixBar;
482} PDMMSIREG;
483typedef PDMMSIREG *PPDMMSIREG;
484
485/**
486 * PCI Bus registration structure.
487 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
488 */
489typedef struct PDMPCIBUSREG
490{
491 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
492 uint32_t u32Version;
493
494 /**
495 * Registers the device with the default PCI bus.
496 *
497 * @returns VBox status code.
498 * @param pDevIns Device instance of the PCI Bus.
499 * @param pPciDev The PCI device structure.
500 * Any PCI enabled device must keep this in it's instance data!
501 * Fill in the PCI data config before registration, please.
502 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
503 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
504 * If negative, the pci bus device will assign one.
505 * @remarks Caller enters the PDM critical section.
506 */
507 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
508
509 /**
510 * Initialize MSI support in a PCI device.
511 *
512 * @returns VBox status code.
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev The PCI device structure.
515 * @param pMsiReg MSI registration structure
516 * @remarks Caller enters the PDM critical section.
517 */
518 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
519
520 /**
521 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
522 *
523 * @returns VBox status code.
524 * @param pDevIns Device instance of the PCI Bus.
525 * @param pPciDev The PCI device structure.
526 * @param iRegion The region number.
527 * @param cbRegion Size of the region.
528 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
529 * @param pfnCallback Callback for doing the mapping.
530 * @remarks Caller enters the PDM critical section.
531 */
532 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
533
534 /**
535 * Register PCI configuration space read/write callbacks.
536 *
537 * @param pDevIns Device instance of the PCI Bus.
538 * @param pPciDev The PCI device structure.
539 * @param pfnRead Pointer to the user defined PCI config read function.
540 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
541 * PCI config read function. This way, user can decide when (and if)
542 * to call default PCI config read function. Can be NULL.
543 * @param pfnWrite Pointer to the user defined PCI config write function.
544 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
545 * PCI config write function. This way, user can decide when (and if)
546 * to call default PCI config write function. Can be NULL.
547 * @remarks Caller enters the PDM critical section.
548 * @thread EMT
549 */
550 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
551 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
552
553 /**
554 * Set the IRQ for a PCI device.
555 *
556 * @param pDevIns Device instance of the PCI Bus.
557 * @param pPciDev The PCI device structure.
558 * @param iIrq IRQ number to set.
559 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
560 * @param uTagSrc The IRQ tag and source (for tracing).
561 * @remarks Caller enters the PDM critical section.
562 */
563 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
564
565 /**
566 * Called to perform the job of the bios.
567 * This is only called for the first PCI Bus - it is expected to
568 * service all the PCI buses.
569 *
570 * @returns VBox status.
571 * @param pDevIns Device instance of the first bus.
572 * @remarks Caller enters the PDM critical section.
573 */
574 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
575
576 /** The name of the SetIrq RC entry point. */
577 const char *pszSetIrqRC;
578
579 /** The name of the SetIrq R0 entry point. */
580 const char *pszSetIrqR0;
581
582} PDMPCIBUSREG;
583/** Pointer to a PCI bus registration structure. */
584typedef PDMPCIBUSREG *PPDMPCIBUSREG;
585
586/** Current PDMPCIBUSREG version number. */
587#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
588
589/**
590 * PCI Bus RC helpers.
591 */
592typedef struct PDMPCIHLPRC
593{
594 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
595 uint32_t u32Version;
596
597 /**
598 * Set an ISA IRQ.
599 *
600 * @param pDevIns PCI device instance.
601 * @param iIrq IRQ number to set.
602 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
603 * @param uTagSrc The IRQ tag and source (for tracing).
604 * @thread EMT only.
605 */
606 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
607
608 /**
609 * Set an I/O-APIC IRQ.
610 *
611 * @param pDevIns PCI device instance.
612 * @param iIrq IRQ number to set.
613 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
614 * @param uTagSrc The IRQ tag and source (for tracing).
615 * @thread EMT only.
616 */
617 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
618
619 /**
620 * Send an MSI.
621 *
622 * @param pDevIns PCI device instance.
623 * @param GCPhys Physical address MSI request was written.
624 * @param uValue Value written.
625 * @param uTagSrc The IRQ tag and source (for tracing).
626 * @thread EMT only.
627 */
628 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
629
630
631 /**
632 * Acquires the PDM lock.
633 *
634 * @returns VINF_SUCCESS on success.
635 * @returns rc if we failed to acquire the lock.
636 * @param pDevIns The PCI device instance.
637 * @param rc What to return if we fail to acquire the lock.
638 */
639 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
640
641 /**
642 * Releases the PDM lock.
643 *
644 * @param pDevIns The PCI device instance.
645 */
646 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
647
648 /** Just a safety precaution. */
649 uint32_t u32TheEnd;
650} PDMPCIHLPRC;
651/** Pointer to PCI helpers. */
652typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
653/** Pointer to const PCI helpers. */
654typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
655
656/** Current PDMPCIHLPRC version number. */
657#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
658
659
660/**
661 * PCI Bus R0 helpers.
662 */
663typedef struct PDMPCIHLPR0
664{
665 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
666 uint32_t u32Version;
667
668 /**
669 * Set an ISA IRQ.
670 *
671 * @param pDevIns PCI device instance.
672 * @param iIrq IRQ number to set.
673 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
674 * @param uTagSrc The IRQ tag and source (for tracing).
675 * @thread EMT only.
676 */
677 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
678
679 /**
680 * Set an I/O-APIC IRQ.
681 *
682 * @param pDevIns PCI device instance.
683 * @param iIrq IRQ number to set.
684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
685 * @param uTagSrc The IRQ tag and source (for tracing).
686 * @thread EMT only.
687 */
688 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
689
690 /**
691 * Send an MSI.
692 *
693 * @param pDevIns PCI device instance.
694 * @param GCPhys Physical address MSI request was written.
695 * @param uValue Value written.
696 * @param uTagSrc The IRQ tag and source (for tracing).
697 * @thread EMT only.
698 */
699 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
700
701
702 /**
703 * Acquires the PDM lock.
704 *
705 * @returns VINF_SUCCESS on success.
706 * @returns rc if we failed to acquire the lock.
707 * @param pDevIns The PCI device instance.
708 * @param rc What to return if we fail to acquire the lock.
709 */
710 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
711
712 /**
713 * Releases the PDM lock.
714 *
715 * @param pDevIns The PCI device instance.
716 */
717 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
718
719 /** Just a safety precaution. */
720 uint32_t u32TheEnd;
721} PDMPCIHLPR0;
722/** Pointer to PCI helpers. */
723typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
724/** Pointer to const PCI helpers. */
725typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
726
727/** Current PDMPCIHLPR0 version number. */
728#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
729
730/**
731 * PCI device helpers.
732 */
733typedef struct PDMPCIHLPR3
734{
735 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
736 uint32_t u32Version;
737
738 /**
739 * Set an ISA IRQ.
740 *
741 * @param pDevIns The PCI device instance.
742 * @param iIrq IRQ number to set.
743 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
744 * @param uTagSrc The IRQ tag and source (for tracing).
745 */
746 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
747
748 /**
749 * Set an I/O-APIC IRQ.
750 *
751 * @param pDevIns The PCI device instance.
752 * @param iIrq IRQ number to set.
753 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
754 * @param uTagSrc The IRQ tag and source (for tracing).
755 */
756 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
757
758 /**
759 * Send an MSI.
760 *
761 * @param pDevIns PCI device instance.
762 * @param GCPhys Physical address MSI request was written.
763 * @param uValue Value written.
764 * @param uTagSrc The IRQ tag and source (for tracing).
765 */
766 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
767
768 /**
769 * Checks if the given address is an MMIO2 base address or not.
770 *
771 * @returns true/false accordingly.
772 * @param pDevIns The PCI device instance.
773 * @param pOwner The owner of the memory, optional.
774 * @param GCPhys The address to check.
775 */
776 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
777
778 /**
779 * Gets the address of the RC PCI Bus helpers.
780 *
781 * This should be called at both construction and relocation time
782 * to obtain the correct address of the RC helpers.
783 *
784 * @returns RC pointer to the PCI Bus helpers.
785 * @param pDevIns Device instance of the PCI Bus.
786 * @thread EMT only.
787 */
788 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
789
790 /**
791 * Gets the address of the R0 PCI Bus helpers.
792 *
793 * This should be called at both construction and relocation time
794 * to obtain the correct address of the R0 helpers.
795 *
796 * @returns R0 pointer to the PCI Bus helpers.
797 * @param pDevIns Device instance of the PCI Bus.
798 * @thread EMT only.
799 */
800 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
801
802 /**
803 * Acquires the PDM lock.
804 *
805 * @returns VINF_SUCCESS on success.
806 * @returns Fatal error on failure.
807 * @param pDevIns The PCI device instance.
808 * @param rc Dummy for making the interface identical to the RC and R0 versions.
809 */
810 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
811
812 /**
813 * Releases the PDM lock.
814 *
815 * @param pDevIns The PCI device instance.
816 */
817 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
818
819 /** Just a safety precaution. */
820 uint32_t u32TheEnd;
821} PDMPCIHLPR3;
822/** Pointer to PCI helpers. */
823typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
824/** Pointer to const PCI helpers. */
825typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
826
827/** Current PDMPCIHLPR3 version number. */
828#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
829
830
831/**
832 * Programmable Interrupt Controller registration structure.
833 */
834typedef struct PDMPICREG
835{
836 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
837 uint32_t u32Version;
838
839 /**
840 * Set the an IRQ.
841 *
842 * @param pDevIns Device instance of the PIC.
843 * @param iIrq IRQ number to set.
844 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
845 * @param uTagSrc The IRQ tag and source (for tracing).
846 * @remarks Caller enters the PDM critical section.
847 */
848 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
849
850 /**
851 * Get a pending interrupt.
852 *
853 * @returns Pending interrupt number.
854 * @param pDevIns Device instance of the PIC.
855 * @param puTagSrc Where to return the IRQ tag and source.
856 * @remarks Caller enters the PDM critical section.
857 */
858 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
859
860 /** The name of the RC SetIrq entry point. */
861 const char *pszSetIrqRC;
862 /** The name of the RC GetInterrupt entry point. */
863 const char *pszGetInterruptRC;
864
865 /** The name of the R0 SetIrq entry point. */
866 const char *pszSetIrqR0;
867 /** The name of the R0 GetInterrupt entry point. */
868 const char *pszGetInterruptR0;
869} PDMPICREG;
870/** Pointer to a PIC registration structure. */
871typedef PDMPICREG *PPDMPICREG;
872
873/** Current PDMPICREG version number. */
874#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
875
876/**
877 * PIC RC helpers.
878 */
879typedef struct PDMPICHLPRC
880{
881 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
882 uint32_t u32Version;
883
884 /**
885 * Set the interrupt force action flag.
886 *
887 * @param pDevIns Device instance of the PIC.
888 */
889 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
890
891 /**
892 * Clear the interrupt force action flag.
893 *
894 * @param pDevIns Device instance of the PIC.
895 */
896 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
897
898 /**
899 * Acquires the PDM lock.
900 *
901 * @returns VINF_SUCCESS on success.
902 * @returns rc if we failed to acquire the lock.
903 * @param pDevIns The PIC device instance.
904 * @param rc What to return if we fail to acquire the lock.
905 */
906 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
907
908 /**
909 * Releases the PDM lock.
910 *
911 * @param pDevIns The PIC device instance.
912 */
913 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPRC;
918
919/** Pointer to PIC RC helpers. */
920typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
921/** Pointer to const PIC RC helpers. */
922typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
923
924/** Current PDMPICHLPRC version number. */
925#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
926
927
928/**
929 * PIC R0 helpers.
930 */
931typedef struct PDMPICHLPR0
932{
933 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
934 uint32_t u32Version;
935
936 /**
937 * Set the interrupt force action flag.
938 *
939 * @param pDevIns Device instance of the PIC.
940 */
941 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
942
943 /**
944 * Clear the interrupt force action flag.
945 *
946 * @param pDevIns Device instance of the PIC.
947 */
948 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
949
950 /**
951 * Acquires the PDM lock.
952 *
953 * @returns VINF_SUCCESS on success.
954 * @returns rc if we failed to acquire the lock.
955 * @param pDevIns The PIC device instance.
956 * @param rc What to return if we fail to acquire the lock.
957 */
958 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
959
960 /**
961 * Releases the PDM lock.
962 *
963 * @param pDevIns The PCI device instance.
964 */
965 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
966
967 /** Just a safety precaution. */
968 uint32_t u32TheEnd;
969} PDMPICHLPR0;
970
971/** Pointer to PIC R0 helpers. */
972typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
973/** Pointer to const PIC R0 helpers. */
974typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
975
976/** Current PDMPICHLPR0 version number. */
977#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
978
979/**
980 * PIC R3 helpers.
981 */
982typedef struct PDMPICHLPR3
983{
984 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
985 uint32_t u32Version;
986
987 /**
988 * Set the interrupt force action flag.
989 *
990 * @param pDevIns Device instance of the PIC.
991 */
992 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
993
994 /**
995 * Clear the interrupt force action flag.
996 *
997 * @param pDevIns Device instance of the PIC.
998 */
999 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1000
1001 /**
1002 * Acquires the PDM lock.
1003 *
1004 * @returns VINF_SUCCESS on success.
1005 * @returns Fatal error on failure.
1006 * @param pDevIns The PIC device instance.
1007 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1008 */
1009 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1010
1011 /**
1012 * Releases the PDM lock.
1013 *
1014 * @param pDevIns The PIC device instance.
1015 */
1016 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1017
1018 /**
1019 * Gets the address of the RC PIC helpers.
1020 *
1021 * This should be called at both construction and relocation time
1022 * to obtain the correct address of the RC helpers.
1023 *
1024 * @returns RC pointer to the PIC helpers.
1025 * @param pDevIns Device instance of the PIC.
1026 */
1027 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1028
1029 /**
1030 * Gets the address of the R0 PIC helpers.
1031 *
1032 * This should be called at both construction and relocation time
1033 * to obtain the correct address of the R0 helpers.
1034 *
1035 * @returns R0 pointer to the PIC helpers.
1036 * @param pDevIns Device instance of the PIC.
1037 */
1038 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1039
1040 /** Just a safety precaution. */
1041 uint32_t u32TheEnd;
1042} PDMPICHLPR3;
1043
1044/** Pointer to PIC R3 helpers. */
1045typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1046/** Pointer to const PIC R3 helpers. */
1047typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1048
1049/** Current PDMPICHLPR3 version number. */
1050#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1051
1052
1053
1054/**
1055 * Advanced Programmable Interrupt Controller registration structure.
1056 */
1057typedef struct PDMAPICREG
1058{
1059 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1060 uint32_t u32Version;
1061
1062 /**
1063 * Get a pending interrupt.
1064 *
1065 * @returns Pending interrupt number.
1066 * @param pDevIns Device instance of the APIC.
1067 * @param idCpu The VCPU Id.
1068 * @param puTagSrc Where to return the tag source.
1069 * @remarks Caller enters the PDM critical section
1070 */
1071 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1072
1073 /**
1074 * Check if the APIC has a pending interrupt/if a TPR change would active one
1075 *
1076 * @returns Pending interrupt yes/no
1077 * @param pDevIns Device instance of the APIC.
1078 * @param idCpu The VCPU Id.
1079 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1080 * (optional, can be NULL).
1081 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1082 * prior to calling this method.
1083 */
1084 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t *pu8PendingIrq));
1085
1086 /**
1087 * Set the APIC base.
1088 *
1089 * @param pDevIns Device instance of the APIC.
1090 * @param idCpu The VCPU Id.
1091 * @param u64Base The new base.
1092 * @remarks Caller enters the PDM critical section.
1093 */
1094 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1095
1096 /**
1097 * Get the APIC base.
1098 *
1099 * @returns Current base.
1100 * @param pDevIns Device instance of the APIC.
1101 * @param idCpu The VCPU Id.
1102 * @remarks Caller enters the PDM critical section.
1103 */
1104 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1105
1106 /**
1107 * Set the TPR (task priority register).
1108 *
1109 * @param pDevIns Device instance of the APIC.
1110 * @param idCpu The VCPU id.
1111 * @param u8TPR The new TPR.
1112 * @remarks Caller enters the PDM critical section.
1113 */
1114 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1115
1116 /**
1117 * Get the TPR (task priority register).
1118 *
1119 * @returns The current TPR.
1120 * @param pDevIns Device instance of the APIC.
1121 * @param idCpu VCPU id
1122 * @remarks Caller enters the PDM critical section.
1123 */
1124 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1125
1126 /**
1127 * Write to a MSR in APIC range.
1128 *
1129 * @returns VBox status code.
1130 * @param pDevIns Device instance of the APIC.
1131 * @param idCpu Target CPU.
1132 * @param u32Reg The MSR begin written to.
1133 * @param u64Value The value to write.
1134 *
1135 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1136 * calling this method.
1137 */
1138 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1139
1140 /**
1141 * Read from a MSR in APIC range.
1142 *
1143 * @returns VBox status code.
1144 * @param pDevIns Device instance of the APIC.
1145 * @param idCpu Target CPU.
1146 * @param u32Reg MSR to read.
1147 * @param pu64Value Where to return the read value.
1148 *
1149 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1150 * calling this method.
1151 */
1152 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1153
1154 /**
1155 * Private interface between the IOAPIC and APIC.
1156 *
1157 * This is a low-level, APIC/IOAPIC implementation specific interface which
1158 * is registered with PDM only because it makes life so much simpler right
1159 * now (GC bits). This is a bad bad hack! The correct way of doing this
1160 * would involve some way of querying GC interfaces and relocating them.
1161 * Perhaps doing some kind of device init in GC...
1162 *
1163 * @returns status code.
1164 * @param pDevIns Device instance of the APIC.
1165 * @param u8Dest See APIC implementation.
1166 * @param u8DestMode See APIC implementation.
1167 * @param u8DeliveryMode See APIC implementation.
1168 * @param iVector See APIC implementation.
1169 * @param u8Polarity See APIC implementation.
1170 * @param u8TriggerMode See APIC implementation.
1171 * @param uTagSrc The IRQ tag and source (for tracing).
1172 * @remarks Caller enters the PDM critical section
1173 */
1174 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1175 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1176
1177 /**
1178 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1179 *
1180 * Used for virtual wire mode when interrupts from the PIC are passed through
1181 * LAPIC.
1182 *
1183 * @returns status code.
1184 * @param pDevIns Device instance of the APIC.
1185 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1186 * @param u8Level The level.
1187 * @param uTagSrc The IRQ tag and source (for tracing).
1188 * @remarks Caller enters the PDM critical section
1189 */
1190 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1191
1192 /** The name of the RC GetInterrupt entry point. */
1193 const char *pszGetInterruptRC;
1194 /** The name of the RC HasPendingIrq entry point. */
1195 const char *pszHasPendingIrqRC;
1196 /** The name of the RC SetBase entry point. */
1197 const char *pszSetBaseRC;
1198 /** The name of the RC GetBase entry point. */
1199 const char *pszGetBaseRC;
1200 /** The name of the RC SetTPR entry point. */
1201 const char *pszSetTPRRC;
1202 /** The name of the RC GetTPR entry point. */
1203 const char *pszGetTPRRC;
1204 /** The name of the RC WriteMSR entry point. */
1205 const char *pszWriteMSRRC;
1206 /** The name of the RC ReadMSR entry point. */
1207 const char *pszReadMSRRC;
1208 /** The name of the RC BusDeliver entry point. */
1209 const char *pszBusDeliverRC;
1210 /** The name of the RC LocalInterrupt entry point. */
1211 const char *pszLocalInterruptRC;
1212
1213 /** The name of the R0 GetInterrupt entry point. */
1214 const char *pszGetInterruptR0;
1215 /** The name of the R0 HasPendingIrq entry point. */
1216 const char *pszHasPendingIrqR0;
1217 /** The name of the R0 SetBase entry point. */
1218 const char *pszSetBaseR0;
1219 /** The name of the R0 GetBase entry point. */
1220 const char *pszGetBaseR0;
1221 /** The name of the R0 SetTPR entry point. */
1222 const char *pszSetTPRR0;
1223 /** The name of the R0 GetTPR entry point. */
1224 const char *pszGetTPRR0;
1225 /** The name of the R0 WriteMSR entry point. */
1226 const char *pszWriteMSRR0;
1227 /** The name of the R0 ReadMSR entry point. */
1228 const char *pszReadMSRR0;
1229 /** The name of the R0 BusDeliver entry point. */
1230 const char *pszBusDeliverR0;
1231 /** The name of the R0 LocalInterrupt entry point. */
1232 const char *pszLocalInterruptR0;
1233
1234} PDMAPICREG;
1235/** Pointer to an APIC registration structure. */
1236typedef PDMAPICREG *PPDMAPICREG;
1237
1238/** Current PDMAPICREG version number. */
1239#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1240
1241
1242/**
1243 * APIC version argument for pfnChangeFeature.
1244 */
1245typedef enum PDMAPICVERSION
1246{
1247 /** Invalid 0 entry. */
1248 PDMAPICVERSION_INVALID = 0,
1249 /** No APIC. */
1250 PDMAPICVERSION_NONE,
1251 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1252 PDMAPICVERSION_APIC,
1253 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1254 PDMAPICVERSION_X2APIC,
1255 /** The usual 32-bit paranoia. */
1256 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1257} PDMAPICVERSION;
1258
1259/**
1260 * APIC irq argument for SetInterruptFF.
1261 */
1262typedef enum PDMAPICIRQ
1263{
1264 /** Invalid 0 entry. */
1265 PDMAPICIRQ_INVALID = 0,
1266 /** Normal hardware interrupt. */
1267 PDMAPICIRQ_HARDWARE,
1268 /** NMI. */
1269 PDMAPICIRQ_NMI,
1270 /** SMI. */
1271 PDMAPICIRQ_SMI,
1272 /** ExtINT (HW interrupt via PIC). */
1273 PDMAPICIRQ_EXTINT,
1274 /** The usual 32-bit paranoia. */
1275 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1276} PDMAPICIRQ;
1277
1278
1279/**
1280 * APIC RC helpers.
1281 */
1282typedef struct PDMAPICHLPRC
1283{
1284 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1285 uint32_t u32Version;
1286
1287 /**
1288 * Set the interrupt force action flag.
1289 *
1290 * @param pDevIns Device instance of the APIC.
1291 * @param enmType IRQ type.
1292 * @param idCpu Virtual CPU to set flag upon.
1293 */
1294 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1295
1296 /**
1297 * Clear the interrupt force action flag.
1298 *
1299 * @param pDevIns Device instance of the APIC.
1300 * @param enmType IRQ type.
1301 * @param idCpu Virtual CPU to clear flag upon.
1302 */
1303 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1304
1305 /**
1306 * Calculates an IRQ tag for a timer, IPI or similar event.
1307 *
1308 * @returns The IRQ tag.
1309 * @param pDevIns Device instance of the APIC.
1310 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1311 */
1312 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1313
1314 /**
1315 * Acquires the PDM lock.
1316 *
1317 * @returns VINF_SUCCESS on success.
1318 * @returns rc if we failed to acquire the lock.
1319 * @param pDevIns The APIC device instance.
1320 * @param rc What to return if we fail to acquire the lock.
1321 */
1322 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1323
1324 /**
1325 * Releases the PDM lock.
1326 *
1327 * @param pDevIns The APIC device instance.
1328 */
1329 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1330
1331 /**
1332 * Get the virtual CPU id corresponding to the current EMT.
1333 *
1334 * @param pDevIns The APIC device instance.
1335 */
1336 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1337
1338 /** Just a safety precaution. */
1339 uint32_t u32TheEnd;
1340} PDMAPICHLPRC;
1341/** Pointer to APIC GC helpers. */
1342typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1343/** Pointer to const APIC helpers. */
1344typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1345
1346/** Current PDMAPICHLPRC version number. */
1347#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 3, 0)
1348
1349
1350/**
1351 * APIC R0 helpers.
1352 */
1353typedef struct PDMAPICHLPR0
1354{
1355 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1356 uint32_t u32Version;
1357
1358 /**
1359 * Set the interrupt force action flag.
1360 *
1361 * @param pDevIns Device instance of the APIC.
1362 * @param enmType IRQ type.
1363 * @param idCpu Virtual CPU to set flag upon.
1364 */
1365 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1366
1367 /**
1368 * Clear the interrupt force action flag.
1369 *
1370 * @param pDevIns Device instance of the APIC.
1371 * @param enmType IRQ type.
1372 * @param idCpu Virtual CPU to clear flag upon.
1373 */
1374 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1375
1376 /**
1377 * Calculates an IRQ tag for a timer, IPI or similar event.
1378 *
1379 * @returns The IRQ tag.
1380 * @param pDevIns Device instance of the APIC.
1381 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1382 */
1383 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1384
1385 /**
1386 * Acquires the PDM lock.
1387 *
1388 * @returns VINF_SUCCESS on success.
1389 * @returns rc if we failed to acquire the lock.
1390 * @param pDevIns The APIC device instance.
1391 * @param rc What to return if we fail to acquire the lock.
1392 */
1393 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1394
1395 /**
1396 * Releases the PDM lock.
1397 *
1398 * @param pDevIns The APIC device instance.
1399 */
1400 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1401
1402 /**
1403 * Get the virtual CPU id corresponding to the current EMT.
1404 *
1405 * @param pDevIns The APIC device instance.
1406 */
1407 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1408
1409 /** Just a safety precaution. */
1410 uint32_t u32TheEnd;
1411} PDMAPICHLPR0;
1412/** Pointer to APIC GC helpers. */
1413typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1414/** Pointer to const APIC helpers. */
1415typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1416
1417/** Current PDMAPICHLPR0 version number. */
1418#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 3, 0)
1419
1420/**
1421 * APIC R3 helpers.
1422 */
1423typedef struct PDMAPICHLPR3
1424{
1425 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1426 uint32_t u32Version;
1427
1428 /**
1429 * Set the interrupt force action flag.
1430 *
1431 * @param pDevIns Device instance of the APIC.
1432 * @param enmType IRQ type.
1433 * @param idCpu Virtual CPU to set flag upon.
1434 */
1435 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1436
1437 /**
1438 * Clear the interrupt force action flag.
1439 *
1440 * @param pDevIns Device instance of the APIC.
1441 * @param enmType IRQ type.
1442 * @param idCpu Virtual CPU to clear flag upon.
1443 */
1444 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1445
1446 /**
1447 * Calculates an IRQ tag for a timer, IPI or similar event.
1448 *
1449 * @returns The IRQ tag.
1450 * @param pDevIns Device instance of the APIC.
1451 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1452 */
1453 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1454
1455 /**
1456 * Modifies APIC-related bits in the CPUID feature mask.
1457 *
1458 * @param pDevIns Device instance of the APIC.
1459 * @param enmVersion Supported APIC version.
1460 */
1461 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1462
1463 /**
1464 * Get the virtual CPU id corresponding to the current EMT.
1465 *
1466 * @param pDevIns The APIC device instance.
1467 */
1468 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1469
1470 /**
1471 * Sends SIPI to given virtual CPU.
1472 *
1473 * @param pDevIns The APIC device instance.
1474 * @param idCpu Virtual CPU to perform SIPI on
1475 * @param iVector SIPI vector
1476 */
1477 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1478
1479 /**
1480 * Sends init IPI to given virtual CPU, should result in reset and
1481 * halting till SIPI.
1482 *
1483 * @param pDevIns The APIC device instance.
1484 * @param idCpu Virtual CPU to perform SIPI on
1485 */
1486 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1487
1488 /**
1489 * Gets the address of the RC APIC helpers.
1490 *
1491 * This should be called at both construction and relocation time
1492 * to obtain the correct address of the RC helpers.
1493 *
1494 * @returns GC pointer to the APIC helpers.
1495 * @param pDevIns Device instance of the APIC.
1496 */
1497 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1498
1499 /**
1500 * Gets the address of the R0 APIC helpers.
1501 *
1502 * This should be called at both construction and relocation time
1503 * to obtain the correct address of the R0 helpers.
1504 *
1505 * @returns R0 pointer to the APIC helpers.
1506 * @param pDevIns Device instance of the APIC.
1507 */
1508 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1509
1510 /**
1511 * Get the critical section used to synchronize the PICs, PCI and stuff.
1512 *
1513 * @returns Ring-3 pointer to the critical section.
1514 * @param pDevIns The APIC device instance.
1515 */
1516 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1517
1518 /**
1519 * Get the critical section used to synchronize the PICs, PCI and stuff.
1520 *
1521 * @returns Raw-mode context pointer to the critical section.
1522 * @param pDevIns The APIC device instance.
1523 */
1524 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1525
1526 /**
1527 * Get the critical section used to synchronize the PICs, PCI and stuff.
1528 *
1529 * @returns Ring-0 pointer to the critical section.
1530 * @param pDevIns The APIC device instance.
1531 */
1532 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1533
1534 /** Just a safety precaution. */
1535 uint32_t u32TheEnd;
1536} PDMAPICHLPR3;
1537/** Pointer to APIC helpers. */
1538typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1539/** Pointer to const APIC helpers. */
1540typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1541
1542/** Current PDMAPICHLP version number. */
1543#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1544
1545
1546/**
1547 * I/O APIC registration structure.
1548 */
1549typedef struct PDMIOAPICREG
1550{
1551 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1552 uint32_t u32Version;
1553
1554 /**
1555 * Set the an IRQ.
1556 *
1557 * @param pDevIns Device instance of the I/O APIC.
1558 * @param iIrq IRQ number to set.
1559 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1560 * @param uTagSrc The IRQ tag and source (for tracing).
1561 * @remarks Caller enters the PDM critical section
1562 */
1563 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1564
1565 /** The name of the RC SetIrq entry point. */
1566 const char *pszSetIrqRC;
1567
1568 /** The name of the R0 SetIrq entry point. */
1569 const char *pszSetIrqR0;
1570
1571 /**
1572 * Send a MSI.
1573 *
1574 * @param pDevIns Device instance of the I/O APIC.
1575 * @param GCPhys Request address.
1576 * @param uValue Request value.
1577 * @param uTagSrc The IRQ tag and source (for tracing).
1578 * @remarks Caller enters the PDM critical section
1579 */
1580 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1581
1582 /** The name of the RC SendMsi entry point. */
1583 const char *pszSendMsiRC;
1584
1585 /** The name of the R0 SendMsi entry point. */
1586 const char *pszSendMsiR0;
1587} PDMIOAPICREG;
1588/** Pointer to an APIC registration structure. */
1589typedef PDMIOAPICREG *PPDMIOAPICREG;
1590
1591/** Current PDMAPICREG version number. */
1592#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1593
1594
1595/**
1596 * IOAPIC RC helpers.
1597 */
1598typedef struct PDMIOAPICHLPRC
1599{
1600 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1601 uint32_t u32Version;
1602
1603 /**
1604 * Private interface between the IOAPIC and APIC.
1605 *
1606 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1607 *
1608 * @returns status code.
1609 * @param pDevIns Device instance of the IOAPIC.
1610 * @param u8Dest See APIC implementation.
1611 * @param u8DestMode See APIC implementation.
1612 * @param u8DeliveryMode See APIC implementation.
1613 * @param iVector See APIC implementation.
1614 * @param u8Polarity See APIC implementation.
1615 * @param u8TriggerMode See APIC implementation.
1616 * @param uTagSrc The IRQ tag and source (for tracing).
1617 */
1618 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1619 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1620
1621 /**
1622 * Acquires the PDM lock.
1623 *
1624 * @returns VINF_SUCCESS on success.
1625 * @returns rc if we failed to acquire the lock.
1626 * @param pDevIns The IOAPIC device instance.
1627 * @param rc What to return if we fail to acquire the lock.
1628 */
1629 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1630
1631 /**
1632 * Releases the PDM lock.
1633 *
1634 * @param pDevIns The IOAPIC device instance.
1635 */
1636 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1637
1638 /** Just a safety precaution. */
1639 uint32_t u32TheEnd;
1640} PDMIOAPICHLPRC;
1641/** Pointer to IOAPIC RC helpers. */
1642typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1643/** Pointer to const IOAPIC helpers. */
1644typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1645
1646/** Current PDMIOAPICHLPRC version number. */
1647#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1648
1649
1650/**
1651 * IOAPIC R0 helpers.
1652 */
1653typedef struct PDMIOAPICHLPR0
1654{
1655 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1656 uint32_t u32Version;
1657
1658 /**
1659 * Private interface between the IOAPIC and APIC.
1660 *
1661 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1662 *
1663 * @returns status code.
1664 * @param pDevIns Device instance of the IOAPIC.
1665 * @param u8Dest See APIC implementation.
1666 * @param u8DestMode See APIC implementation.
1667 * @param u8DeliveryMode See APIC implementation.
1668 * @param iVector See APIC implementation.
1669 * @param u8Polarity See APIC implementation.
1670 * @param u8TriggerMode See APIC implementation.
1671 * @param uTagSrc The IRQ tag and source (for tracing).
1672 */
1673 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1674 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1675
1676 /**
1677 * Acquires the PDM lock.
1678 *
1679 * @returns VINF_SUCCESS on success.
1680 * @returns rc if we failed to acquire the lock.
1681 * @param pDevIns The IOAPIC device instance.
1682 * @param rc What to return if we fail to acquire the lock.
1683 */
1684 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1685
1686 /**
1687 * Releases the PDM lock.
1688 *
1689 * @param pDevIns The IOAPIC device instance.
1690 */
1691 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1692
1693 /** Just a safety precaution. */
1694 uint32_t u32TheEnd;
1695} PDMIOAPICHLPR0;
1696/** Pointer to IOAPIC R0 helpers. */
1697typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1698/** Pointer to const IOAPIC helpers. */
1699typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1700
1701/** Current PDMIOAPICHLPR0 version number. */
1702#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1703
1704/**
1705 * IOAPIC R3 helpers.
1706 */
1707typedef struct PDMIOAPICHLPR3
1708{
1709 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1710 uint32_t u32Version;
1711
1712 /**
1713 * Private interface between the IOAPIC and APIC.
1714 *
1715 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1716 *
1717 * @returns status code
1718 * @param pDevIns Device instance of the IOAPIC.
1719 * @param u8Dest See APIC implementation.
1720 * @param u8DestMode See APIC implementation.
1721 * @param u8DeliveryMode See APIC implementation.
1722 * @param iVector See APIC implementation.
1723 * @param u8Polarity See APIC implementation.
1724 * @param u8TriggerMode See APIC implementation.
1725 * @param uTagSrc The IRQ tag and source (for tracing).
1726 */
1727 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1728 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1729
1730 /**
1731 * Acquires the PDM lock.
1732 *
1733 * @returns VINF_SUCCESS on success.
1734 * @returns Fatal error on failure.
1735 * @param pDevIns The IOAPIC device instance.
1736 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1737 */
1738 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1739
1740 /**
1741 * Releases the PDM lock.
1742 *
1743 * @param pDevIns The IOAPIC device instance.
1744 */
1745 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1746
1747 /**
1748 * Gets the address of the RC IOAPIC helpers.
1749 *
1750 * This should be called at both construction and relocation time
1751 * to obtain the correct address of the RC helpers.
1752 *
1753 * @returns RC pointer to the IOAPIC helpers.
1754 * @param pDevIns Device instance of the IOAPIC.
1755 */
1756 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1757
1758 /**
1759 * Gets the address of the R0 IOAPIC helpers.
1760 *
1761 * This should be called at both construction and relocation time
1762 * to obtain the correct address of the R0 helpers.
1763 *
1764 * @returns R0 pointer to the IOAPIC helpers.
1765 * @param pDevIns Device instance of the IOAPIC.
1766 */
1767 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1768
1769 /** Just a safety precaution. */
1770 uint32_t u32TheEnd;
1771} PDMIOAPICHLPR3;
1772/** Pointer to IOAPIC R3 helpers. */
1773typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1774/** Pointer to const IOAPIC helpers. */
1775typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1776
1777/** Current PDMIOAPICHLPR3 version number. */
1778#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1779
1780
1781/**
1782 * HPET registration structure.
1783 */
1784typedef struct PDMHPETREG
1785{
1786 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1787 uint32_t u32Version;
1788
1789} PDMHPETREG;
1790/** Pointer to an HPET registration structure. */
1791typedef PDMHPETREG *PPDMHPETREG;
1792
1793/** Current PDMHPETREG version number. */
1794#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1795
1796/**
1797 * HPET RC helpers.
1798 *
1799 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1800 * at some later point.
1801 */
1802typedef struct PDMHPETHLPRC
1803{
1804 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1805 uint32_t u32Version;
1806
1807 /** Just a safety precaution. */
1808 uint32_t u32TheEnd;
1809} PDMHPETHLPRC;
1810
1811/** Pointer to HPET RC helpers. */
1812typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1813/** Pointer to const HPET RC helpers. */
1814typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1815
1816/** Current PDMHPETHLPRC version number. */
1817#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1818
1819
1820/**
1821 * HPET R0 helpers.
1822 *
1823 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1824 * at some later point.
1825 */
1826typedef struct PDMHPETHLPR0
1827{
1828 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1829 uint32_t u32Version;
1830
1831 /** Just a safety precaution. */
1832 uint32_t u32TheEnd;
1833} PDMHPETHLPR0;
1834
1835/** Pointer to HPET R0 helpers. */
1836typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1837/** Pointer to const HPET R0 helpers. */
1838typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1839
1840/** Current PDMHPETHLPR0 version number. */
1841#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1842
1843/**
1844 * HPET R3 helpers.
1845 */
1846typedef struct PDMHPETHLPR3
1847{
1848 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1849 uint32_t u32Version;
1850
1851 /**
1852 * Gets the address of the RC HPET helpers.
1853 *
1854 * This should be called at both construction and relocation time
1855 * to obtain the correct address of the RC helpers.
1856 *
1857 * @returns RC pointer to the HPET helpers.
1858 * @param pDevIns Device instance of the HPET.
1859 */
1860 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1861
1862 /**
1863 * Gets the address of the R0 HPET helpers.
1864 *
1865 * This should be called at both construction and relocation time
1866 * to obtain the correct address of the R0 helpers.
1867 *
1868 * @returns R0 pointer to the HPET helpers.
1869 * @param pDevIns Device instance of the HPET.
1870 */
1871 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1872
1873 /**
1874 * Set legacy mode on PIT and RTC.
1875 *
1876 * @returns VINF_SUCCESS on success.
1877 * @returns rc if we failed to set legacy mode.
1878 * @param pDevIns Device instance of the HPET.
1879 * @param fActivated Whether legacy mode is activated or deactivated.
1880 */
1881 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1882
1883
1884 /**
1885 * Set IRQ, bypassing ISA bus override rules.
1886 *
1887 * @returns VINF_SUCCESS on success.
1888 * @returns rc if we failed to set legacy mode.
1889 * @param pDevIns Device instance of the HPET.
1890 * @param fActivate Activate or deactivate legacy mode.
1891 */
1892 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1893
1894 /** Just a safety precaution. */
1895 uint32_t u32TheEnd;
1896} PDMHPETHLPR3;
1897
1898/** Pointer to HPET R3 helpers. */
1899typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1900/** Pointer to const HPET R3 helpers. */
1901typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1902
1903/** Current PDMHPETHLPR3 version number. */
1904#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1905
1906
1907/**
1908 * Raw PCI device registration structure.
1909 */
1910typedef struct PDMPCIRAWREG
1911{
1912 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1913 uint32_t u32Version;
1914 /** Just a safety precaution. */
1915 uint32_t u32TheEnd;
1916} PDMPCIRAWREG;
1917/** Pointer to a raw PCI registration structure. */
1918typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1919
1920/** Current PDMPCIRAWREG version number. */
1921#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1922
1923/**
1924 * Raw PCI device raw-mode context helpers.
1925 */
1926typedef struct PDMPCIRAWHLPRC
1927{
1928 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1929 uint32_t u32Version;
1930 /** Just a safety precaution. */
1931 uint32_t u32TheEnd;
1932} PDMPCIRAWHLPRC;
1933/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1934typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1935/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1936typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1937
1938/** Current PDMPCIRAWHLPRC version number. */
1939#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1940
1941/**
1942 * Raw PCI device ring-0 context helpers.
1943 */
1944typedef struct PDMPCIRAWHLPR0
1945{
1946 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1947 uint32_t u32Version;
1948 /** Just a safety precaution. */
1949 uint32_t u32TheEnd;
1950} PDMPCIRAWHLPR0;
1951/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1952typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1953/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1954typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1955
1956/** Current PDMPCIRAWHLPR0 version number. */
1957#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1958
1959
1960/**
1961 * Raw PCI device ring-3 context helpers.
1962 */
1963typedef struct PDMPCIRAWHLPR3
1964{
1965 /** Undefined structure version and magic number. */
1966 uint32_t u32Version;
1967
1968 /**
1969 * Gets the address of the RC raw PCI device helpers.
1970 *
1971 * This should be called at both construction and relocation time to obtain
1972 * the correct address of the RC helpers.
1973 *
1974 * @returns RC pointer to the raw PCI device helpers.
1975 * @param pDevIns Device instance of the raw PCI device.
1976 */
1977 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1978
1979 /**
1980 * Gets the address of the R0 raw PCI device helpers.
1981 *
1982 * This should be called at both construction and relocation time to obtain
1983 * the correct address of the R0 helpers.
1984 *
1985 * @returns R0 pointer to the raw PCI device helpers.
1986 * @param pDevIns Device instance of the raw PCI device.
1987 */
1988 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1989
1990 /** Just a safety precaution. */
1991 uint32_t u32TheEnd;
1992} PDMPCIRAWHLPR3;
1993/** Pointer to raw PCI R3 helpers. */
1994typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
1995/** Pointer to const raw PCI R3 helpers. */
1996typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
1997
1998/** Current PDMPCIRAWHLPR3 version number. */
1999#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2000
2001
2002#ifdef IN_RING3
2003
2004/**
2005 * DMA Transfer Handler.
2006 *
2007 * @returns Number of bytes transferred.
2008 * @param pDevIns Device instance of the DMA.
2009 * @param pvUser User pointer.
2010 * @param uChannel Channel number.
2011 * @param off DMA position.
2012 * @param cb Block size.
2013 * @remarks The device lock is not taken, however, the DMA device lock is held.
2014 */
2015typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2016/** Pointer to a FNDMATRANSFERHANDLER(). */
2017typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2018
2019/**
2020 * DMA Controller registration structure.
2021 */
2022typedef struct PDMDMAREG
2023{
2024 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2025 uint32_t u32Version;
2026
2027 /**
2028 * Execute pending transfers.
2029 *
2030 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2031 * @param pDevIns Device instance of the DMAC.
2032 * @remarks No locks held, called on EMT(0) as a form of serialization.
2033 */
2034 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2035
2036 /**
2037 * Register transfer function for DMA channel.
2038 *
2039 * @param pDevIns Device instance of the DMAC.
2040 * @param uChannel Channel number.
2041 * @param pfnTransferHandler Device specific transfer function.
2042 * @param pvUSer User pointer to be passed to the callback.
2043 * @remarks No locks held, called on an EMT.
2044 */
2045 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2046
2047 /**
2048 * Read memory
2049 *
2050 * @returns Number of bytes read.
2051 * @param pDevIns Device instance of the DMAC.
2052 * @param pvBuffer Pointer to target buffer.
2053 * @param off DMA position.
2054 * @param cbBlock Block size.
2055 * @remarks No locks held, called on an EMT.
2056 */
2057 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2058
2059 /**
2060 * Write memory
2061 *
2062 * @returns Number of bytes written.
2063 * @param pDevIns Device instance of the DMAC.
2064 * @param pvBuffer Memory to write.
2065 * @param off DMA position.
2066 * @param cbBlock Block size.
2067 * @remarks No locks held, called on an EMT.
2068 */
2069 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2070
2071 /**
2072 * Set the DREQ line.
2073 *
2074 * @param pDevIns Device instance of the DMAC.
2075 * @param uChannel Channel number.
2076 * @param uLevel Level of the line.
2077 * @remarks No locks held, called on an EMT.
2078 */
2079 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2080
2081 /**
2082 * Get channel mode
2083 *
2084 * @returns Channel mode.
2085 * @param pDevIns Device instance of the DMAC.
2086 * @param uChannel Channel number.
2087 * @remarks No locks held, called on an EMT.
2088 */
2089 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2090
2091} PDMDMACREG;
2092/** Pointer to a DMAC registration structure. */
2093typedef PDMDMACREG *PPDMDMACREG;
2094
2095/** Current PDMDMACREG version number. */
2096#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2097
2098
2099/**
2100 * DMA Controller device helpers.
2101 */
2102typedef struct PDMDMACHLP
2103{
2104 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2105 uint32_t u32Version;
2106
2107 /* to-be-defined */
2108
2109} PDMDMACHLP;
2110/** Pointer to DMAC helpers. */
2111typedef PDMDMACHLP *PPDMDMACHLP;
2112/** Pointer to const DMAC helpers. */
2113typedef const PDMDMACHLP *PCPDMDMACHLP;
2114
2115/** Current PDMDMACHLP version number. */
2116#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2117
2118#endif /* IN_RING3 */
2119
2120
2121
2122/**
2123 * RTC registration structure.
2124 */
2125typedef struct PDMRTCREG
2126{
2127 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2128 uint32_t u32Version;
2129 uint32_t u32Alignment; /**< structure size alignment. */
2130
2131 /**
2132 * Write to a CMOS register and update the checksum if necessary.
2133 *
2134 * @returns VBox status code.
2135 * @param pDevIns Device instance of the RTC.
2136 * @param iReg The CMOS register index.
2137 * @param u8Value The CMOS register value.
2138 * @remarks Caller enters the device critical section.
2139 */
2140 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2141
2142 /**
2143 * Read a CMOS register.
2144 *
2145 * @returns VBox status code.
2146 * @param pDevIns Device instance of the RTC.
2147 * @param iReg The CMOS register index.
2148 * @param pu8Value Where to store the CMOS register value.
2149 * @remarks Caller enters the device critical section.
2150 */
2151 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2152
2153} PDMRTCREG;
2154/** Pointer to a RTC registration structure. */
2155typedef PDMRTCREG *PPDMRTCREG;
2156/** Pointer to a const RTC registration structure. */
2157typedef const PDMRTCREG *PCPDMRTCREG;
2158
2159/** Current PDMRTCREG version number. */
2160#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2161
2162
2163/**
2164 * RTC device helpers.
2165 */
2166typedef struct PDMRTCHLP
2167{
2168 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2169 uint32_t u32Version;
2170
2171 /* to-be-defined */
2172
2173} PDMRTCHLP;
2174/** Pointer to RTC helpers. */
2175typedef PDMRTCHLP *PPDMRTCHLP;
2176/** Pointer to const RTC helpers. */
2177typedef const PDMRTCHLP *PCPDMRTCHLP;
2178
2179/** Current PDMRTCHLP version number. */
2180#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2181
2182
2183
2184#ifdef IN_RING3
2185
2186/**
2187 * PDM Device API.
2188 */
2189typedef struct PDMDEVHLPR3
2190{
2191 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2192 uint32_t u32Version;
2193
2194 /**
2195 * Register a number of I/O ports with a device.
2196 *
2197 * These callbacks are of course for the host context (HC).
2198 * Register HC handlers before guest context (GC) handlers! There must be a
2199 * HC handler for every GC handler!
2200 *
2201 * @returns VBox status.
2202 * @param pDevIns The device instance to register the ports with.
2203 * @param Port First port number in the range.
2204 * @param cPorts Number of ports to register.
2205 * @param pvUser User argument.
2206 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2207 * @param pfnIn Pointer to function which is gonna handle IN operations.
2208 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2209 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2210 * @param pszDesc Pointer to description string. This must not be freed.
2211 * @remarks Caller enters the device critical section prior to invoking the
2212 * registered callback methods.
2213 */
2214 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2215 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2216 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2217
2218 /**
2219 * Register a number of I/O ports with a device for RC.
2220 *
2221 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2222 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2223 * for every RC handler!
2224 *
2225 * @returns VBox status.
2226 * @param pDevIns The device instance to register the ports with
2227 * and which RC module to resolve the names
2228 * against.
2229 * @param Port First port number in the range.
2230 * @param cPorts Number of ports to register.
2231 * @param pvUser User argument.
2232 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2233 * @param pszIn Name of the RC function which is gonna handle IN operations.
2234 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2235 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2236 * @param pszDesc Pointer to description string. This must not be freed.
2237 * @remarks Caller enters the device critical section prior to invoking the
2238 * registered callback methods.
2239 */
2240 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2241 const char *pszOut, const char *pszIn,
2242 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2243
2244 /**
2245 * Register a number of I/O ports with a device.
2246 *
2247 * These callbacks are of course for the ring-0 host context (R0).
2248 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2249 *
2250 * @returns VBox status.
2251 * @param pDevIns The device instance to register the ports with.
2252 * @param Port First port number in the range.
2253 * @param cPorts Number of ports to register.
2254 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2255 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2256 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2257 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2258 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2259 * @param pszDesc Pointer to description string. This must not be freed.
2260 * @remarks Caller enters the device critical section prior to invoking the
2261 * registered callback methods.
2262 */
2263 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2264 const char *pszOut, const char *pszIn,
2265 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2266
2267 /**
2268 * Deregister I/O ports.
2269 *
2270 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2271 *
2272 * @returns VBox status.
2273 * @param pDevIns The device instance owning the ports.
2274 * @param Port First port number in the range.
2275 * @param cPorts Number of ports to deregister.
2276 */
2277 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2278
2279 /**
2280 * Register a Memory Mapped I/O (MMIO) region.
2281 *
2282 * These callbacks are of course for the ring-3 context (R3). Register HC
2283 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2284 * must be a R3 handler for every RC and R0 handler!
2285 *
2286 * @returns VBox status.
2287 * @param pDevIns The device instance to register the MMIO with.
2288 * @param GCPhysStart First physical address in the range.
2289 * @param cbRange The size of the range (in bytes).
2290 * @param pvUser User argument.
2291 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2292 * @param pfnRead Pointer to function which is gonna handle Read operations.
2293 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2294 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2295 * @param pszDesc Pointer to description string. This must not be freed.
2296 * @remarks Caller enters the device critical section prior to invoking the
2297 * registered callback methods.
2298 */
2299 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2300 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2301 uint32_t fFlags, const char *pszDesc));
2302
2303 /**
2304 * Register a Memory Mapped I/O (MMIO) region for GC.
2305 *
2306 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2307 * (R3) handlers before guest context handlers! There must be a R3 handler for
2308 * every RC handler!
2309 *
2310 * @returns VBox status.
2311 * @param pDevIns The device instance to register the MMIO with.
2312 * @param GCPhysStart First physical address in the range.
2313 * @param cbRange The size of the range (in bytes).
2314 * @param pvUser User argument.
2315 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2316 * @param pszRead Name of the RC function which is gonna handle Read operations.
2317 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2318 * @remarks Caller enters the device critical section prior to invoking the
2319 * registered callback methods.
2320 */
2321 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2322 const char *pszWrite, const char *pszRead, const char *pszFill));
2323
2324 /**
2325 * Register a Memory Mapped I/O (MMIO) region for R0.
2326 *
2327 * These callbacks are for the ring-0 host context (R0). Register ring-3
2328 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2329 * every R0 handler!
2330 *
2331 * @returns VBox status.
2332 * @param pDevIns The device instance to register the MMIO with.
2333 * @param GCPhysStart First physical address in the range.
2334 * @param cbRange The size of the range (in bytes).
2335 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2336 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2337 * @param pszRead Name of the RC function which is gonna handle Read operations.
2338 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2339 * @param pszDesc Obsolete. NULL is fine.
2340 * @remarks Caller enters the device critical section prior to invoking the
2341 * registered callback methods.
2342 */
2343 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2344 const char *pszWrite, const char *pszRead, const char *pszFill));
2345
2346 /**
2347 * Deregister a Memory Mapped I/O (MMIO) region.
2348 *
2349 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2350 *
2351 * @returns VBox status.
2352 * @param pDevIns The device instance owning the MMIO region(s).
2353 * @param GCPhysStart First physical address in the range.
2354 * @param cbRange The size of the range (in bytes).
2355 */
2356 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2357
2358 /**
2359 * Allocate and register a MMIO2 region.
2360 *
2361 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2362 * RAM associated with a device. It is also non-shared memory with a
2363 * permanent ring-3 mapping and page backing (presently).
2364 *
2365 * @returns VBox status.
2366 * @param pDevIns The device instance.
2367 * @param iRegion The region number. Use the PCI region number as
2368 * this must be known to the PCI bus device too. If
2369 * it's not associated with the PCI device, then
2370 * any number up to UINT8_MAX is fine.
2371 * @param cb The size (in bytes) of the region.
2372 * @param fFlags Reserved for future use, must be zero.
2373 * @param ppv Where to store the address of the ring-3 mapping
2374 * of the memory.
2375 * @param pszDesc Pointer to description string. This must not be
2376 * freed.
2377 * @thread EMT.
2378 */
2379 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2380
2381 /**
2382 * Deregisters and frees a MMIO2 region.
2383 *
2384 * Any physical (and virtual) access handlers registered for the region must
2385 * be deregistered before calling this function.
2386 *
2387 * @returns VBox status code.
2388 * @param pDevIns The device instance.
2389 * @param iRegion The region number used during registration.
2390 * @thread EMT.
2391 */
2392 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2393
2394 /**
2395 * Maps a MMIO2 region into the physical memory space.
2396 *
2397 * A MMIO2 range may overlap with base memory if a lot of RAM
2398 * is configured for the VM, in which case we'll drop the base
2399 * memory pages. Presently we will make no attempt to preserve
2400 * anything that happens to be present in the base memory that
2401 * is replaced, this is of course incorrectly but it's too much
2402 * effort.
2403 *
2404 * @returns VBox status code.
2405 * @param pDevIns The device instance.
2406 * @param iRegion The region number used during registration.
2407 * @param GCPhys The physical address to map it at.
2408 * @thread EMT.
2409 */
2410 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2411
2412 /**
2413 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2414 *
2415 * @returns VBox status code.
2416 * @param pDevIns The device instance.
2417 * @param iRegion The region number used during registration.
2418 * @param GCPhys The physical address it's currently mapped at.
2419 * @thread EMT.
2420 */
2421 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2422
2423 /**
2424 * Maps a portion of an MMIO2 region into the hypervisor region.
2425 *
2426 * Callers of this API must never deregister the MMIO2 region before the
2427 * VM is powered off.
2428 *
2429 * @return VBox status code.
2430 * @param pDevIns The device owning the MMIO2 memory.
2431 * @param iRegion The region.
2432 * @param off The offset into the region. Will be rounded down
2433 * to closest page boundary.
2434 * @param cb The number of bytes to map. Will be rounded up
2435 * to the closest page boundary.
2436 * @param pszDesc Mapping description.
2437 * @param pRCPtr Where to store the RC address.
2438 */
2439 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2440 const char *pszDesc, PRTRCPTR pRCPtr));
2441
2442 /**
2443 * Maps a portion of an MMIO2 region into kernel space (host).
2444 *
2445 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2446 * or the VM is terminated.
2447 *
2448 * @return VBox status code.
2449 * @param pDevIns The device owning the MMIO2 memory.
2450 * @param iRegion The region.
2451 * @param off The offset into the region. Must be page
2452 * aligned.
2453 * @param cb The number of bytes to map. Must be page
2454 * aligned.
2455 * @param pszDesc Mapping description.
2456 * @param pR0Ptr Where to store the R0 address.
2457 */
2458 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2459 const char *pszDesc, PRTR0PTR pR0Ptr));
2460
2461 /**
2462 * Register a ROM (BIOS) region.
2463 *
2464 * It goes without saying that this is read-only memory. The memory region must be
2465 * in unassigned memory. I.e. from the top of the address space or on the PC in
2466 * the 0xa0000-0xfffff range.
2467 *
2468 * @returns VBox status.
2469 * @param pDevIns The device instance owning the ROM region.
2470 * @param GCPhysStart First physical address in the range.
2471 * Must be page aligned!
2472 * @param cbRange The size of the range (in bytes).
2473 * Must be page aligned!
2474 * @param pvBinary Pointer to the binary data backing the ROM image.
2475 * @param cbBinary The size of the binary pointer. This must
2476 * be equal or smaller than @a cbRange.
2477 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2478 * @param pszDesc Pointer to description string. This must not be freed.
2479 *
2480 * @remark There is no way to remove the rom, automatically on device cleanup or
2481 * manually from the device yet. At present I doubt we need such features...
2482 */
2483 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2484 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2485
2486 /**
2487 * Changes the protection of shadowed ROM mapping.
2488 *
2489 * This is intented for use by the system BIOS, chipset or device in question to
2490 * change the protection of shadowed ROM code after init and on reset.
2491 *
2492 * @param pDevIns The device instance.
2493 * @param GCPhysStart Where the mapping starts.
2494 * @param cbRange The size of the mapping.
2495 * @param enmProt The new protection type.
2496 */
2497 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2498
2499 /**
2500 * Register a save state data unit.
2501 *
2502 * @returns VBox status.
2503 * @param pDevIns The device instance.
2504 * @param pszName Data unit name.
2505 * @param uInstance The instance identifier of the data unit.
2506 * This must together with the name be unique.
2507 * @param uVersion Data layout version number.
2508 * @param cbGuess The approximate amount of data in the unit.
2509 * Only for progress indicators.
2510 * @param pszBefore Name of data unit which we should be put in
2511 * front of. Optional (NULL).
2512 *
2513 * @param pfnLivePrep Prepare live save callback, optional.
2514 * @param pfnLiveExec Execute live save callback, optional.
2515 * @param pfnLiveVote Vote live save callback, optional.
2516 *
2517 * @param pfnSavePrep Prepare save callback, optional.
2518 * @param pfnSaveExec Execute save callback, optional.
2519 * @param pfnSaveDone Done save callback, optional.
2520 *
2521 * @param pfnLoadPrep Prepare load callback, optional.
2522 * @param pfnLoadExec Execute load callback, optional.
2523 * @param pfnLoadDone Done load callback, optional.
2524 * @remarks Caller enters the device critical section prior to invoking the
2525 * registered callback methods.
2526 */
2527 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2528 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2529 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2530 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2531
2532 /**
2533 * Creates a timer.
2534 *
2535 * @returns VBox status.
2536 * @param pDevIns The device instance.
2537 * @param enmClock The clock to use on this timer.
2538 * @param pfnCallback Callback function.
2539 * @param pvUser User argument for the callback.
2540 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2541 * @param pszDesc Pointer to description string which must stay around
2542 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2543 * @param ppTimer Where to store the timer on success.
2544 * @remarks Caller enters the device critical section prior to invoking the
2545 * callback.
2546 */
2547 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2548
2549 /**
2550 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2551 *
2552 * @returns pTime.
2553 * @param pDevIns The device instance.
2554 * @param pTime Where to store the time.
2555 */
2556 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2557
2558 /**
2559 * Read physical memory.
2560 *
2561 * @returns VINF_SUCCESS (for now).
2562 * @param pDevIns The device instance.
2563 * @param GCPhys Physical address start reading from.
2564 * @param pvBuf Where to put the read bits.
2565 * @param cbRead How many bytes to read.
2566 * @thread Any thread, but the call may involve the emulation thread.
2567 */
2568 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2569
2570 /**
2571 * Write to physical memory.
2572 *
2573 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2574 * @param pDevIns The device instance.
2575 * @param GCPhys Physical address to write to.
2576 * @param pvBuf What to write.
2577 * @param cbWrite How many bytes to write.
2578 * @thread Any thread, but the call may involve the emulation thread.
2579 */
2580 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2581
2582 /**
2583 * Requests the mapping of a guest page into ring-3.
2584 *
2585 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2586 * release it.
2587 *
2588 * This API will assume your intention is to write to the page, and will
2589 * therefore replace shared and zero pages. If you do not intend to modify the
2590 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2591 *
2592 * @returns VBox status code.
2593 * @retval VINF_SUCCESS on success.
2594 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2595 * backing or if the page has any active access handlers. The caller
2596 * must fall back on using PGMR3PhysWriteExternal.
2597 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2598 *
2599 * @param pVM The VM handle.
2600 * @param GCPhys The guest physical address of the page that
2601 * should be mapped.
2602 * @param fFlags Flags reserved for future use, MBZ.
2603 * @param ppv Where to store the address corresponding to
2604 * GCPhys.
2605 * @param pLock Where to store the lock information that
2606 * pfnPhysReleasePageMappingLock needs.
2607 *
2608 * @remark Avoid calling this API from within critical sections (other than the
2609 * PGM one) because of the deadlock risk when we have to delegating the
2610 * task to an EMT.
2611 * @thread Any.
2612 */
2613 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2614
2615 /**
2616 * Requests the mapping of a guest page into ring-3, external threads.
2617 *
2618 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2619 * release it.
2620 *
2621 * @returns VBox status code.
2622 * @retval VINF_SUCCESS on success.
2623 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2624 * backing or if the page as an active ALL access handler. The caller
2625 * must fall back on using PGMPhysRead.
2626 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2627 *
2628 * @param pDevIns The device instance.
2629 * @param GCPhys The guest physical address of the page that
2630 * should be mapped.
2631 * @param fFlags Flags reserved for future use, MBZ.
2632 * @param ppv Where to store the address corresponding to
2633 * GCPhys.
2634 * @param pLock Where to store the lock information that
2635 * pfnPhysReleasePageMappingLock needs.
2636 *
2637 * @remark Avoid calling this API from within critical sections.
2638 * @thread Any.
2639 */
2640 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2641
2642 /**
2643 * Release the mapping of a guest page.
2644 *
2645 * This is the counter part of pfnPhysGCPhys2CCPtr and
2646 * pfnPhysGCPhys2CCPtrReadOnly.
2647 *
2648 * @param pDevIns The device instance.
2649 * @param pLock The lock structure initialized by the mapping
2650 * function.
2651 */
2652 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2653
2654 /**
2655 * Read guest physical memory by virtual address.
2656 *
2657 * @param pDevIns The device instance.
2658 * @param pvDst Where to put the read bits.
2659 * @param GCVirtSrc Guest virtual address to start reading from.
2660 * @param cb How many bytes to read.
2661 * @thread The emulation thread.
2662 */
2663 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2664
2665 /**
2666 * Write to guest physical memory by virtual address.
2667 *
2668 * @param pDevIns The device instance.
2669 * @param GCVirtDst Guest virtual address to write to.
2670 * @param pvSrc What to write.
2671 * @param cb How many bytes to write.
2672 * @thread The emulation thread.
2673 */
2674 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2675
2676 /**
2677 * Convert a guest virtual address to a guest physical address.
2678 *
2679 * @returns VBox status code.
2680 * @param pDevIns The device instance.
2681 * @param GCPtr Guest virtual address.
2682 * @param pGCPhys Where to store the GC physical address
2683 * corresponding to GCPtr.
2684 * @thread The emulation thread.
2685 * @remark Careful with page boundaries.
2686 */
2687 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2688
2689 /**
2690 * Allocate memory which is associated with current VM instance
2691 * and automatically freed on it's destruction.
2692 *
2693 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2694 * @param pDevIns The device instance.
2695 * @param cb Number of bytes to allocate.
2696 */
2697 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2698
2699 /**
2700 * Allocate memory which is associated with current VM instance
2701 * and automatically freed on it's destruction. The memory is ZEROed.
2702 *
2703 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2704 * @param pDevIns The device instance.
2705 * @param cb Number of bytes to allocate.
2706 */
2707 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2708
2709 /**
2710 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2711 *
2712 * @param pDevIns The device instance.
2713 * @param pv Pointer to the memory to free.
2714 */
2715 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2716
2717 /**
2718 * Gets the VM state.
2719 *
2720 * @returns VM state.
2721 * @param pDevIns The device instance.
2722 * @thread Any thread (just keep in mind that it's volatile info).
2723 */
2724 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2725
2726 /**
2727 * Checks if the VM was teleported and hasn't been fully resumed yet.
2728 *
2729 * @returns true / false.
2730 * @param pDevIns The device instance.
2731 * @thread Any thread.
2732 */
2733 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2734
2735 /**
2736 * Set the VM error message
2737 *
2738 * @returns rc.
2739 * @param pDevIns The device instance.
2740 * @param rc VBox status code.
2741 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2742 * @param pszFormat Error message format string.
2743 * @param ... Error message arguments.
2744 */
2745 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2746
2747 /**
2748 * Set the VM error message
2749 *
2750 * @returns rc.
2751 * @param pDevIns The device instance.
2752 * @param rc VBox status code.
2753 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2754 * @param pszFormat Error message format string.
2755 * @param va Error message arguments.
2756 */
2757 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2758
2759 /**
2760 * Set the VM runtime error message
2761 *
2762 * @returns VBox status code.
2763 * @param pDevIns The device instance.
2764 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2765 * @param pszErrorId Error ID string.
2766 * @param pszFormat Error message format string.
2767 * @param ... Error message arguments.
2768 */
2769 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2770
2771 /**
2772 * Set the VM runtime error message
2773 *
2774 * @returns VBox status code.
2775 * @param pDevIns The device instance.
2776 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2777 * @param pszErrorId Error ID string.
2778 * @param pszFormat Error message format string.
2779 * @param va Error message arguments.
2780 */
2781 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2782
2783 /**
2784 * Stops the VM and enters the debugger to look at the guest state.
2785 *
2786 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2787 * invoking this function directly.
2788 *
2789 * @returns VBox status code which must be passed up to the VMM.
2790 * @param pDevIns The device instance.
2791 * @param pszFile Filename of the assertion location.
2792 * @param iLine The linenumber of the assertion location.
2793 * @param pszFunction Function of the assertion location.
2794 * @param pszFormat Message. (optional)
2795 * @param args Message parameters.
2796 */
2797 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2798
2799 /**
2800 * Register a info handler with DBGF,
2801 *
2802 * @returns VBox status code.
2803 * @param pDevIns The device instance.
2804 * @param pszName The identifier of the info.
2805 * @param pszDesc The description of the info and any arguments
2806 * the handler may take.
2807 * @param pfnHandler The handler function to be called to display the
2808 * info.
2809 */
2810 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2811
2812 /**
2813 * Registers a set of registers for a device.
2814 *
2815 * The @a pvUser argument of the getter and setter callbacks will be
2816 * @a pDevIns. The register names will be prefixed by the device name followed
2817 * immediately by the instance number.
2818 *
2819 * @returns VBox status code.
2820 * @param pDevIns The device instance.
2821 * @param paRegisters The register descriptors.
2822 *
2823 * @remarks The device critical section is NOT entered prior to working the
2824 * callbacks registered via this helper!
2825 */
2826 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2827
2828 /**
2829 * Gets the trace buffer handle.
2830 *
2831 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2832 * really inteded for direct usage, thus no inline wrapper function.
2833 *
2834 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2835 * @param pDevIns The device instance.
2836 */
2837 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2838
2839 /**
2840 * Registers a statistics sample if statistics are enabled.
2841 *
2842 * @param pDevIns Device instance of the DMA.
2843 * @param pvSample Pointer to the sample.
2844 * @param enmType Sample type. This indicates what pvSample is
2845 * pointing at.
2846 * @param pszName Sample name. The name is on this form
2847 * "/<component>/<sample>". Further nesting is
2848 * possible.
2849 * @param enmUnit Sample unit.
2850 * @param pszDesc Sample description.
2851 */
2852 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2853
2854 /**
2855 * Same as pfnSTAMRegister except that the name is specified in a
2856 * RTStrPrintf like fashion.
2857 *
2858 * @returns VBox status.
2859 * @param pDevIns Device instance of the DMA.
2860 * @param pvSample Pointer to the sample.
2861 * @param enmType Sample type. This indicates what pvSample is
2862 * pointing at.
2863 * @param enmVisibility Visibility type specifying whether unused
2864 * statistics should be visible or not.
2865 * @param enmUnit Sample unit.
2866 * @param pszDesc Sample description.
2867 * @param pszName The sample name format string.
2868 * @param ... Arguments to the format string.
2869 */
2870 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2871 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2872
2873 /**
2874 * Same as pfnSTAMRegister except that the name is specified in a
2875 * RTStrPrintfV like fashion.
2876 *
2877 * @returns VBox status.
2878 * @param pDevIns Device instance of the DMA.
2879 * @param pvSample Pointer to the sample.
2880 * @param enmType Sample type. This indicates what pvSample is
2881 * pointing at.
2882 * @param enmVisibility Visibility type specifying whether unused
2883 * statistics should be visible or not.
2884 * @param enmUnit Sample unit.
2885 * @param pszDesc Sample description.
2886 * @param pszName The sample name format string.
2887 * @param args Arguments to the format string.
2888 */
2889 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2890 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2891
2892 /**
2893 * Registers the device with the default PCI bus.
2894 *
2895 * @returns VBox status code.
2896 * @param pDevIns The device instance.
2897 * @param pPciDev The PCI device structure.
2898 * Any PCI enabled device must keep this in it's instance data!
2899 * Fill in the PCI data config before registration, please.
2900 * @remark This is the simple interface, a Ex interface will be created if
2901 * more features are needed later.
2902 */
2903 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2904
2905 /**
2906 * Initialize MSI support in a PCI device.
2907 *
2908 * @returns VBox status code.
2909 * @param pDevIns The device instance.
2910 * @param pMsiReg MSI registartion structure.
2911 */
2912 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2913
2914 /**
2915 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2916 *
2917 * @returns VBox status code.
2918 * @param pDevIns The device instance.
2919 * @param iRegion The region number.
2920 * @param cbRegion Size of the region.
2921 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2922 * @param pfnCallback Callback for doing the mapping.
2923 * @remarks The callback will be invoked holding the PDM lock. The device lock
2924 * is NOT take because that is very likely be a lock order violation.
2925 */
2926 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2927 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2928
2929 /**
2930 * Register PCI configuration space read/write callbacks.
2931 *
2932 * @param pDevIns The device instance.
2933 * @param pPciDev The PCI device structure.
2934 * If NULL the default PCI device for this device instance is used.
2935 * @param pfnRead Pointer to the user defined PCI config read function.
2936 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2937 * PCI config read function. This way, user can decide when (and if)
2938 * to call default PCI config read function. Can be NULL.
2939 * @param pfnWrite Pointer to the user defined PCI config write function.
2940 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2941 * PCI config write function. This way, user can decide when (and if)
2942 * to call default PCI config write function. Can be NULL.
2943 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2944 * is NOT take because that is very likely be a lock order violation.
2945 * @thread EMT
2946 */
2947 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2948 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2949
2950 /**
2951 * Bus master physical memory read.
2952 *
2953 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2954 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2955 * @param pDevIns The device instance.
2956 * @param GCPhys Physical address start reading from.
2957 * @param pvBuf Where to put the read bits.
2958 * @param cbRead How many bytes to read.
2959 * @thread Any thread, but the call may involve the emulation thread.
2960 */
2961 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2962
2963 /**
2964 * Bus master physical memory write.
2965 *
2966 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2967 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2968 * @param pDevIns The device instance.
2969 * @param GCPhys Physical address to write to.
2970 * @param pvBuf What to write.
2971 * @param cbWrite How many bytes to write.
2972 * @thread Any thread, but the call may involve the emulation thread.
2973 */
2974 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2975
2976 /**
2977 * Set the IRQ for a PCI device.
2978 *
2979 * @param pDevIns The device instance.
2980 * @param iIrq IRQ number to set.
2981 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2982 * @thread Any thread, but will involve the emulation thread.
2983 */
2984 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2985
2986 /**
2987 * Set the IRQ for a PCI device, but don't wait for EMT to process
2988 * the request when not called from EMT.
2989 *
2990 * @param pDevIns The device instance.
2991 * @param iIrq IRQ number to set.
2992 * @param iLevel IRQ level.
2993 * @thread Any thread, but will involve the emulation thread.
2994 */
2995 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2996
2997 /**
2998 * Set ISA IRQ for a device.
2999 *
3000 * @param pDevIns The device instance.
3001 * @param iIrq IRQ number to set.
3002 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3003 * @thread Any thread, but will involve the emulation thread.
3004 */
3005 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3006
3007 /**
3008 * Set the ISA IRQ for a device, but don't wait for EMT to process
3009 * the request when not called from EMT.
3010 *
3011 * @param pDevIns The device instance.
3012 * @param iIrq IRQ number to set.
3013 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3014 * @thread Any thread, but will involve the emulation thread.
3015 */
3016 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3017
3018 /**
3019 * Attaches a driver (chain) to the device.
3020 *
3021 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3022 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3023 *
3024 * @returns VBox status code.
3025 * @param pDevIns The device instance.
3026 * @param iLun The logical unit to attach.
3027 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3028 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3029 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3030 * for the live of the device instance.
3031 */
3032 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3033 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3034
3035 /**
3036 * Create a queue.
3037 *
3038 * @returns VBox status code.
3039 * @param pDevIns The device instance.
3040 * @param cbItem The size of a queue item.
3041 * @param cItems The number of items in the queue.
3042 * @param cMilliesInterval The number of milliseconds between polling the queue.
3043 * If 0 then the emulation thread will be notified whenever an item arrives.
3044 * @param pfnCallback The consumer function.
3045 * @param fRZEnabled Set if the queue should work in RC and R0.
3046 * @param pszName The queue base name. The instance number will be
3047 * appended automatically.
3048 * @param ppQueue Where to store the queue handle on success.
3049 * @thread The emulation thread.
3050 * @remarks The device critical section will NOT be entered before calling the
3051 * callback. No locks will be held, but for now it's safe to assume
3052 * that only one EMT will do queue callbacks at any one time.
3053 */
3054 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3055 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3056
3057 /**
3058 * Initializes a PDM critical section.
3059 *
3060 * The PDM critical sections are derived from the IPRT critical sections, but
3061 * works in RC and R0 as well.
3062 *
3063 * @returns VBox status code.
3064 * @param pDevIns The device instance.
3065 * @param pCritSect Pointer to the critical section.
3066 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3067 * @param pszNameFmt Format string for naming the critical section.
3068 * For statistics and lock validation.
3069 * @param va Arguments for the format string.
3070 */
3071 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3072 const char *pszNameFmt, va_list va));
3073
3074 /**
3075 * Gets the NOP critical section.
3076 *
3077 * @returns The ring-3 address of the NOP critical section.
3078 * @param pDevIns The device instance.
3079 */
3080 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3081
3082 /**
3083 * Gets the NOP critical section.
3084 *
3085 * @returns The ring-0 address of the NOP critical section.
3086 * @param pDevIns The device instance.
3087 */
3088 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3089
3090 /**
3091 * Gets the NOP critical section.
3092 *
3093 * @returns The raw-mode context address of the NOP critical section.
3094 * @param pDevIns The device instance.
3095 */
3096 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3097
3098 /**
3099 * Changes the device level critical section from the automatically created
3100 * default to one desired by the device constructor.
3101 *
3102 * @returns VBox status code.
3103 * @param pDevIns The device instance.
3104 * @param pCritSect The critical section to use. NULL is not
3105 * valid, instead use the NOP critical
3106 * section.
3107 */
3108 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3109
3110 /**
3111 * Creates a PDM thread.
3112 *
3113 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3114 * resuming, and destroying the thread as the VM state changes.
3115 *
3116 * @returns VBox status code.
3117 * @param pDevIns The device instance.
3118 * @param ppThread Where to store the thread 'handle'.
3119 * @param pvUser The user argument to the thread function.
3120 * @param pfnThread The thread function.
3121 * @param pfnWakeup The wakup callback. This is called on the EMT
3122 * thread when a state change is pending.
3123 * @param cbStack See RTThreadCreate.
3124 * @param enmType See RTThreadCreate.
3125 * @param pszName See RTThreadCreate.
3126 * @remarks The device critical section will NOT be entered prior to invoking
3127 * the function pointers.
3128 */
3129 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3130 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3131
3132 /**
3133 * Set up asynchronous handling of a suspend, reset or power off notification.
3134 *
3135 * This shall only be called when getting the notification. It must be called
3136 * for each one.
3137 *
3138 * @returns VBox status code.
3139 * @param pDevIns The device instance.
3140 * @param pfnAsyncNotify The callback.
3141 * @thread EMT(0)
3142 * @remarks The caller will enter the device critical section prior to invoking
3143 * the callback.
3144 */
3145 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3146
3147 /**
3148 * Notify EMT(0) that the device has completed the asynchronous notification
3149 * handling.
3150 *
3151 * This can be called at any time, spurious calls will simply be ignored.
3152 *
3153 * @param pDevIns The device instance.
3154 * @thread Any
3155 */
3156 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3157
3158 /**
3159 * Register the RTC device.
3160 *
3161 * @returns VBox status code.
3162 * @param pDevIns The device instance.
3163 * @param pRtcReg Pointer to a RTC registration structure.
3164 * @param ppRtcHlp Where to store the pointer to the helper
3165 * functions.
3166 */
3167 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3168
3169 /**
3170 * Register the PCI Bus.
3171 *
3172 * @returns VBox status code.
3173 * @param pDevIns The device instance.
3174 * @param pPciBusReg Pointer to PCI bus registration structure.
3175 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3176 * helpers.
3177 */
3178 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3179
3180 /**
3181 * Register the PIC device.
3182 *
3183 * @returns VBox status code.
3184 * @param pDevIns The device instance.
3185 * @param pPicReg Pointer to a PIC registration structure.
3186 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3187 * helpers.
3188 */
3189 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3190
3191 /**
3192 * Register the APIC device.
3193 *
3194 * @returns VBox status code.
3195 * @param pDevIns The device instance.
3196 * @param pApicReg Pointer to a APIC registration structure.
3197 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3198 */
3199 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3200
3201 /**
3202 * Register the I/O APIC device.
3203 *
3204 * @returns VBox status code.
3205 * @param pDevIns The device instance.
3206 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3207 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3208 * helpers.
3209 */
3210 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3211
3212 /**
3213 * Register the HPET device.
3214 *
3215 * @returns VBox status code.
3216 * @param pDevIns The device instance.
3217 * @param pHpetReg Pointer to a HPET registration structure.
3218 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3219 * helpers.
3220 */
3221 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3222
3223 /**
3224 * Register a raw PCI device.
3225 *
3226 * @returns VBox status code.
3227 * @param pDevIns The device instance.
3228 * @param pHpetReg Pointer to a raw PCI registration structure.
3229 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3230 * device helpers.
3231 */
3232 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3233
3234 /**
3235 * Register the DMA device.
3236 *
3237 * @returns VBox status code.
3238 * @param pDevIns The device instance.
3239 * @param pDmacReg Pointer to a DMAC registration structure.
3240 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3241 */
3242 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3243
3244 /**
3245 * Register transfer function for DMA channel.
3246 *
3247 * @returns VBox status code.
3248 * @param pDevIns The device instance.
3249 * @param uChannel Channel number.
3250 * @param pfnTransferHandler Device specific transfer callback function.
3251 * @param pvUser User pointer to pass to the callback.
3252 * @thread EMT
3253 */
3254 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3255
3256 /**
3257 * Read memory.
3258 *
3259 * @returns VBox status code.
3260 * @param pDevIns The device instance.
3261 * @param uChannel Channel number.
3262 * @param pvBuffer Pointer to target buffer.
3263 * @param off DMA position.
3264 * @param cbBlock Block size.
3265 * @param pcbRead Where to store the number of bytes which was
3266 * read. optional.
3267 * @thread EMT
3268 */
3269 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3270
3271 /**
3272 * Write memory.
3273 *
3274 * @returns VBox status code.
3275 * @param pDevIns The device instance.
3276 * @param uChannel Channel number.
3277 * @param pvBuffer Memory to write.
3278 * @param off DMA position.
3279 * @param cbBlock Block size.
3280 * @param pcbWritten Where to store the number of bytes which was
3281 * written. optional.
3282 * @thread EMT
3283 */
3284 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3285
3286 /**
3287 * Set the DREQ line.
3288 *
3289 * @returns VBox status code.
3290 * @param pDevIns Device instance.
3291 * @param uChannel Channel number.
3292 * @param uLevel Level of the line.
3293 * @thread EMT
3294 */
3295 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3296
3297 /**
3298 * Get channel mode.
3299 *
3300 * @returns Channel mode. See specs.
3301 * @param pDevIns The device instance.
3302 * @param uChannel Channel number.
3303 * @thread EMT
3304 */
3305 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3306
3307 /**
3308 * Schedule DMA execution.
3309 *
3310 * @param pDevIns The device instance.
3311 * @thread Any thread.
3312 */
3313 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3314
3315 /**
3316 * Write CMOS value and update the checksum(s).
3317 *
3318 * @returns VBox status code.
3319 * @param pDevIns The device instance.
3320 * @param iReg The CMOS register index.
3321 * @param u8Value The CMOS register value.
3322 * @thread EMT
3323 */
3324 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3325
3326 /**
3327 * Read CMOS value.
3328 *
3329 * @returns VBox status code.
3330 * @param pDevIns The device instance.
3331 * @param iReg The CMOS register index.
3332 * @param pu8Value Where to store the CMOS register value.
3333 * @thread EMT
3334 */
3335 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3336
3337 /**
3338 * Assert that the current thread is the emulation thread.
3339 *
3340 * @returns True if correct.
3341 * @returns False if wrong.
3342 * @param pDevIns The device instance.
3343 * @param pszFile Filename of the assertion location.
3344 * @param iLine The linenumber of the assertion location.
3345 * @param pszFunction Function of the assertion location.
3346 */
3347 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3348
3349 /**
3350 * Assert that the current thread is NOT the emulation thread.
3351 *
3352 * @returns True if correct.
3353 * @returns False if wrong.
3354 * @param pDevIns The device instance.
3355 * @param pszFile Filename of the assertion location.
3356 * @param iLine The linenumber of the assertion location.
3357 * @param pszFunction Function of the assertion location.
3358 */
3359 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3360
3361 /**
3362 * Resolves the symbol for a raw-mode context interface.
3363 *
3364 * @returns VBox status code.
3365 * @param pDevIns The device instance.
3366 * @param pvInterface The interface structure.
3367 * @param cbInterface The size of the interface structure.
3368 * @param pszSymPrefix What to prefix the symbols in the list with
3369 * before resolving them. This must start with
3370 * 'dev' and contain the driver name.
3371 * @param pszSymList List of symbols corresponding to the interface.
3372 * There is generally a there is generally a define
3373 * holding this list associated with the interface
3374 * definition (INTERFACE_SYM_LIST). For more
3375 * details see PDMR3LdrGetInterfaceSymbols.
3376 * @thread EMT
3377 */
3378 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3379 const char *pszSymPrefix, const char *pszSymList));
3380
3381 /**
3382 * Resolves the symbol for a ring-0 context interface.
3383 *
3384 * @returns VBox status code.
3385 * @param pDevIns The device instance.
3386 * @param pvInterface The interface structure.
3387 * @param cbInterface The size of the interface structure.
3388 * @param pszSymPrefix What to prefix the symbols in the list with
3389 * before resolving them. This must start with
3390 * 'dev' and contain the driver name.
3391 * @param pszSymList List of symbols corresponding to the interface.
3392 * There is generally a there is generally a define
3393 * holding this list associated with the interface
3394 * definition (INTERFACE_SYM_LIST). For more
3395 * details see PDMR3LdrGetInterfaceSymbols.
3396 * @thread EMT
3397 */
3398 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3399 const char *pszSymPrefix, const char *pszSymList));
3400
3401 /**
3402 * Call the ring-0 request handler routine of the device.
3403 *
3404 * For this to work, the device must be ring-0 enabled and export a request
3405 * handler function. The name of the function must be the device name in
3406 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3407 * 'ReqHandler'. The device name will be captialized. It shall take the
3408 * exact same arguments as this function and be declared using
3409 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3410 *
3411 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3412 * or two as the handler address will be resolved on each invocation. This
3413 * is the reason for the EMT only restriction as well.
3414 *
3415 * @returns VBox status code.
3416 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3417 * handler function.
3418 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3419 *
3420 * @param pDevIns The device instance.
3421 * @param uOperation The operation to perform.
3422 * @param u64Arg 64-bit integer argument.
3423 * @thread EMT
3424 */
3425 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3426
3427 /**
3428 * Gets the reason for the most recent VM suspend.
3429 *
3430 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3431 * suspend has been made or if the pDevIns is invalid.
3432 * @param pDevIns The device instance.
3433 */
3434 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3435
3436 /**
3437 * Gets the reason for the most recent VM resume.
3438 *
3439 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3440 * resume has been made or if the pDevIns is invalid.
3441 * @param pDevIns The device instance.
3442 */
3443 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3444
3445
3446 /** Space reserved for future members.
3447 * @{ */
3448 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3449 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3450 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3451 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3452 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3453 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3454 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3455 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3456 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3457 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3458 /** @} */
3459
3460
3461 /** API available to trusted devices only.
3462 *
3463 * These APIs are providing unrestricted access to the guest and the VM,
3464 * or they are interacting intimately with PDM.
3465 *
3466 * @{
3467 */
3468
3469 /**
3470 * Gets the user mode VM handle. Restricted API.
3471 *
3472 * @returns User mode VM Handle.
3473 * @param pDevIns The device instance.
3474 */
3475 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3476
3477 /**
3478 * Gets the global VM handle. Restricted API.
3479 *
3480 * @returns VM Handle.
3481 * @param pDevIns The device instance.
3482 */
3483 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3484
3485 /**
3486 * Gets the VMCPU handle. Restricted API.
3487 *
3488 * @returns VMCPU Handle.
3489 * @param pDevIns The device instance.
3490 */
3491 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3492
3493 /**
3494 * Registers the VMM device heap
3495 *
3496 * @returns VBox status code.
3497 * @param pDevIns The device instance.
3498 * @param GCPhys The physical address.
3499 * @param pvHeap Ring 3 heap pointer.
3500 * @param cbSize Size of the heap.
3501 * @thread EMT.
3502 */
3503 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3504
3505 /**
3506 * Unregisters the VMM device heap
3507 *
3508 * @returns VBox status code.
3509 * @param pDevIns The device instance.
3510 * @param GCPhys The physical address.
3511 * @thread EMT.
3512 */
3513 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3514
3515 /**
3516 * Resets the VM.
3517 *
3518 * @returns The appropriate VBox status code to pass around on reset.
3519 * @param pDevIns The device instance.
3520 * @thread The emulation thread.
3521 */
3522 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3523
3524 /**
3525 * Suspends the VM.
3526 *
3527 * @returns The appropriate VBox status code to pass around on suspend.
3528 * @param pDevIns The device instance.
3529 * @thread The emulation thread.
3530 */
3531 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3532
3533 /**
3534 * Suspends, saves and powers off the VM.
3535 *
3536 * @returns The appropriate VBox status code to pass around.
3537 * @param pDevIns The device instance.
3538 * @thread An emulation thread.
3539 */
3540 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3541
3542 /**
3543 * Power off the VM.
3544 *
3545 * @returns The appropriate VBox status code to pass around on power off.
3546 * @param pDevIns The device instance.
3547 * @thread The emulation thread.
3548 */
3549 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3550
3551 /**
3552 * Checks if the Gate A20 is enabled or not.
3553 *
3554 * @returns true if A20 is enabled.
3555 * @returns false if A20 is disabled.
3556 * @param pDevIns The device instance.
3557 * @thread The emulation thread.
3558 */
3559 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3560
3561 /**
3562 * Enables or disables the Gate A20.
3563 *
3564 * @param pDevIns The device instance.
3565 * @param fEnable Set this flag to enable the Gate A20; clear it
3566 * to disable.
3567 * @thread The emulation thread.
3568 */
3569 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3570
3571 /**
3572 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3573 * thread.
3574 *
3575 * @param pDevIns The device instance.
3576 * @param iLeaf The CPUID leaf to get.
3577 * @param pEax Where to store the EAX value.
3578 * @param pEbx Where to store the EBX value.
3579 * @param pEcx Where to store the ECX value.
3580 * @param pEdx Where to store the EDX value.
3581 * @thread EMT.
3582 */
3583 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3584
3585 /**
3586 * Get the current virtual clock time in a VM. The clock frequency must be
3587 * queried separately.
3588 *
3589 * @returns Current clock time.
3590 * @param pDevIns The device instance.
3591 */
3592 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3593
3594 /**
3595 * Get the frequency of the virtual clock.
3596 *
3597 * @returns The clock frequency (not variable at run-time).
3598 * @param pDevIns The device instance.
3599 */
3600 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3601
3602 /**
3603 * Get the current virtual clock time in a VM, in nanoseconds.
3604 *
3605 * @returns Current clock time (in ns).
3606 * @param pDevIns The device instance.
3607 */
3608 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3609
3610 /**
3611 * Gets the support driver session.
3612 *
3613 * This is intended for working with the semaphore API.
3614 *
3615 * @returns Support driver session handle.
3616 * @param pDrvIns The driver instance.
3617 */
3618 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3619
3620 /** @} */
3621
3622 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3623 uint32_t u32TheEnd;
3624} PDMDEVHLPR3;
3625#endif /* !IN_RING3 */
3626/** Pointer to the R3 PDM Device API. */
3627typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3628/** Pointer to the R3 PDM Device API, const variant. */
3629typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3630
3631/** Current PDMDEVHLPR3 version number. */
3632#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 12, 1)
3633
3634
3635/**
3636 * PDM Device API - RC Variant.
3637 */
3638typedef struct PDMDEVHLPRC
3639{
3640 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3641 uint32_t u32Version;
3642
3643 /**
3644 * Bus master physical memory read.
3645 *
3646 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3647 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3648 * @param pDevIns The device instance.
3649 * @param GCPhys Physical address start reading from.
3650 * @param pvBuf Where to put the read bits.
3651 * @param cbRead How many bytes to read.
3652 * @thread Any thread, but the call may involve the emulation thread.
3653 */
3654 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3655
3656 /**
3657 * Bus master physical memory write.
3658 *
3659 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3660 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3661 * @param pDevIns The device instance.
3662 * @param GCPhys Physical address to write to.
3663 * @param pvBuf What to write.
3664 * @param cbWrite How many bytes to write.
3665 * @thread Any thread, but the call may involve the emulation thread.
3666 */
3667 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3668
3669 /**
3670 * Set the IRQ for a PCI device.
3671 *
3672 * @param pDevIns Device instance.
3673 * @param iIrq IRQ number to set.
3674 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3675 * @thread Any thread, but will involve the emulation thread.
3676 */
3677 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3678
3679 /**
3680 * Set ISA IRQ for a device.
3681 *
3682 * @param pDevIns Device instance.
3683 * @param iIrq IRQ number to set.
3684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3685 * @thread Any thread, but will involve the emulation thread.
3686 */
3687 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3688
3689 /**
3690 * Read physical memory.
3691 *
3692 * @returns VINF_SUCCESS (for now).
3693 * @param pDevIns Device instance.
3694 * @param GCPhys Physical address start reading from.
3695 * @param pvBuf Where to put the read bits.
3696 * @param cbRead How many bytes to read.
3697 */
3698 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3699
3700 /**
3701 * Write to physical memory.
3702 *
3703 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3704 * @param pDevIns Device instance.
3705 * @param GCPhys Physical address to write to.
3706 * @param pvBuf What to write.
3707 * @param cbWrite How many bytes to write.
3708 */
3709 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3710
3711 /**
3712 * Checks if the Gate A20 is enabled or not.
3713 *
3714 * @returns true if A20 is enabled.
3715 * @returns false if A20 is disabled.
3716 * @param pDevIns Device instance.
3717 * @thread The emulation thread.
3718 */
3719 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3720
3721 /**
3722 * Gets the VM state.
3723 *
3724 * @returns VM state.
3725 * @param pDevIns The device instance.
3726 * @thread Any thread (just keep in mind that it's volatile info).
3727 */
3728 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3729
3730 /**
3731 * Set the VM error message
3732 *
3733 * @returns rc.
3734 * @param pDrvIns Driver instance.
3735 * @param rc VBox status code.
3736 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3737 * @param pszFormat Error message format string.
3738 * @param ... Error message arguments.
3739 */
3740 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3741
3742 /**
3743 * Set the VM error message
3744 *
3745 * @returns rc.
3746 * @param pDrvIns Driver instance.
3747 * @param rc VBox status code.
3748 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3749 * @param pszFormat Error message format string.
3750 * @param va Error message arguments.
3751 */
3752 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3753
3754 /**
3755 * Set the VM runtime error message
3756 *
3757 * @returns VBox status code.
3758 * @param pDevIns Device instance.
3759 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3760 * @param pszErrorId Error ID string.
3761 * @param pszFormat Error message format string.
3762 * @param ... Error message arguments.
3763 */
3764 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3765
3766 /**
3767 * Set the VM runtime error message
3768 *
3769 * @returns VBox status code.
3770 * @param pDevIns Device instance.
3771 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3772 * @param pszErrorId Error ID string.
3773 * @param pszFormat Error message format string.
3774 * @param va Error message arguments.
3775 */
3776 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3777
3778 /**
3779 * Set parameters for pending MMIO patch operation
3780 *
3781 * @returns VBox status code.
3782 * @param pDevIns Device instance.
3783 * @param GCPhys MMIO physical address
3784 * @param pCachedData GC pointer to cached data
3785 */
3786 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3787
3788 /**
3789 * Gets the VM handle. Restricted API.
3790 *
3791 * @returns VM Handle.
3792 * @param pDevIns Device instance.
3793 */
3794 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3795
3796 /**
3797 * Gets the VMCPU handle. Restricted API.
3798 *
3799 * @returns VMCPU Handle.
3800 * @param pDevIns The device instance.
3801 */
3802 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3803
3804 /**
3805 * Get the current virtual clock time in a VM. The clock frequency must be
3806 * queried separately.
3807 *
3808 * @returns Current clock time.
3809 * @param pDevIns The device instance.
3810 */
3811 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3812
3813 /**
3814 * Get the frequency of the virtual clock.
3815 *
3816 * @returns The clock frequency (not variable at run-time).
3817 * @param pDevIns The device instance.
3818 */
3819 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3820
3821 /**
3822 * Get the current virtual clock time in a VM, in nanoseconds.
3823 *
3824 * @returns Current clock time (in ns).
3825 * @param pDevIns The device instance.
3826 */
3827 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3828
3829 /**
3830 * Gets the trace buffer handle.
3831 *
3832 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3833 * really inteded for direct usage, thus no inline wrapper function.
3834 *
3835 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3836 * @param pDevIns The device instance.
3837 */
3838 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3839
3840 /** Just a safety precaution. */
3841 uint32_t u32TheEnd;
3842} PDMDEVHLPRC;
3843/** Pointer PDM Device RC API. */
3844typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3845/** Pointer PDM Device RC API. */
3846typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3847
3848/** Current PDMDEVHLP version number. */
3849#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 1)
3850
3851
3852/**
3853 * PDM Device API - R0 Variant.
3854 */
3855typedef struct PDMDEVHLPR0
3856{
3857 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3858 uint32_t u32Version;
3859
3860 /**
3861 * Bus master physical memory read.
3862 *
3863 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3864 * VERR_EM_MEMORY.
3865 * @param pDevIns The device instance.
3866 * @param GCPhys Physical address start reading from.
3867 * @param pvBuf Where to put the read bits.
3868 * @param cbRead How many bytes to read.
3869 * @thread Any thread, but the call may involve the emulation thread.
3870 */
3871 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3872
3873 /**
3874 * Bus master physical memory write.
3875 *
3876 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3877 * VERR_EM_MEMORY.
3878 * @param pDevIns The device instance.
3879 * @param GCPhys Physical address to write to.
3880 * @param pvBuf What to write.
3881 * @param cbWrite How many bytes to write.
3882 * @thread Any thread, but the call may involve the emulation thread.
3883 */
3884 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3885
3886 /**
3887 * Set the IRQ for a PCI device.
3888 *
3889 * @param pDevIns Device instance.
3890 * @param iIrq IRQ number to set.
3891 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3892 * @thread Any thread, but will involve the emulation thread.
3893 */
3894 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3895
3896 /**
3897 * Set ISA IRQ for a device.
3898 *
3899 * @param pDevIns Device instance.
3900 * @param iIrq IRQ number to set.
3901 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3902 * @thread Any thread, but will involve the emulation thread.
3903 */
3904 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3905
3906 /**
3907 * Read physical memory.
3908 *
3909 * @returns VINF_SUCCESS (for now).
3910 * @param pDevIns Device instance.
3911 * @param GCPhys Physical address start reading from.
3912 * @param pvBuf Where to put the read bits.
3913 * @param cbRead How many bytes to read.
3914 */
3915 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3916
3917 /**
3918 * Write to physical memory.
3919 *
3920 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3921 * @param pDevIns Device instance.
3922 * @param GCPhys Physical address to write to.
3923 * @param pvBuf What to write.
3924 * @param cbWrite How many bytes to write.
3925 */
3926 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3927
3928 /**
3929 * Checks if the Gate A20 is enabled or not.
3930 *
3931 * @returns true if A20 is enabled.
3932 * @returns false if A20 is disabled.
3933 * @param pDevIns Device instance.
3934 * @thread The emulation thread.
3935 */
3936 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3937
3938 /**
3939 * Gets the VM state.
3940 *
3941 * @returns VM state.
3942 * @param pDevIns The device instance.
3943 * @thread Any thread (just keep in mind that it's volatile info).
3944 */
3945 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3946
3947 /**
3948 * Set the VM error message
3949 *
3950 * @returns rc.
3951 * @param pDrvIns Driver instance.
3952 * @param rc VBox status code.
3953 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3954 * @param pszFormat Error message format string.
3955 * @param ... Error message arguments.
3956 */
3957 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3958
3959 /**
3960 * Set the VM error message
3961 *
3962 * @returns rc.
3963 * @param pDrvIns Driver instance.
3964 * @param rc VBox status code.
3965 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3966 * @param pszFormat Error message format string.
3967 * @param va Error message arguments.
3968 */
3969 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3970
3971 /**
3972 * Set the VM runtime error message
3973 *
3974 * @returns VBox status code.
3975 * @param pDevIns Device instance.
3976 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3977 * @param pszErrorId Error ID string.
3978 * @param pszFormat Error message format string.
3979 * @param ... Error message arguments.
3980 */
3981 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3982
3983 /**
3984 * Set the VM runtime error message
3985 *
3986 * @returns VBox status code.
3987 * @param pDevIns Device instance.
3988 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3989 * @param pszErrorId Error ID string.
3990 * @param pszFormat Error message format string.
3991 * @param va Error message arguments.
3992 */
3993 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3994
3995 /**
3996 * Set parameters for pending MMIO patch operation
3997 *
3998 * @returns rc.
3999 * @param pDevIns Device instance.
4000 * @param GCPhys MMIO physical address
4001 * @param pCachedData GC pointer to cached data
4002 */
4003 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4004
4005 /**
4006 * Gets the VM handle. Restricted API.
4007 *
4008 * @returns VM Handle.
4009 * @param pDevIns Device instance.
4010 */
4011 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4012
4013 /**
4014 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4015 *
4016 * @returns true = yes, false = no
4017 * @param pDevIns Device instance.
4018 */
4019 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4020
4021 /**
4022 * Gets the VMCPU handle. Restricted API.
4023 *
4024 * @returns VMCPU Handle.
4025 * @param pDevIns The device instance.
4026 */
4027 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4028
4029 /**
4030 * Get the current virtual clock time in a VM. The clock frequency must be
4031 * queried separately.
4032 *
4033 * @returns Current clock time.
4034 * @param pDevIns The device instance.
4035 */
4036 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4037
4038 /**
4039 * Get the frequency of the virtual clock.
4040 *
4041 * @returns The clock frequency (not variable at run-time).
4042 * @param pDevIns The device instance.
4043 */
4044 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4045
4046 /**
4047 * Get the current virtual clock time in a VM, in nanoseconds.
4048 *
4049 * @returns Current clock time (in ns).
4050 * @param pDevIns The device instance.
4051 */
4052 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4053
4054 /**
4055 * Gets the trace buffer handle.
4056 *
4057 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4058 * really inteded for direct usage, thus no inline wrapper function.
4059 *
4060 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4061 * @param pDevIns The device instance.
4062 */
4063 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4064
4065 /** Just a safety precaution. */
4066 uint32_t u32TheEnd;
4067} PDMDEVHLPR0;
4068/** Pointer PDM Device R0 API. */
4069typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4070/** Pointer PDM Device GC API. */
4071typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4072
4073/** Current PDMDEVHLP version number. */
4074#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 1)
4075
4076
4077
4078/**
4079 * PDM Device Instance.
4080 */
4081typedef struct PDMDEVINS
4082{
4083 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4084 uint32_t u32Version;
4085 /** Device instance number. */
4086 uint32_t iInstance;
4087
4088 /** Pointer the GC PDM Device API. */
4089 PCPDMDEVHLPRC pHlpRC;
4090 /** Pointer to device instance data. */
4091 RTRCPTR pvInstanceDataRC;
4092 /** The critical section for the device, see pCritSectXR3. */
4093 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4094 /** Alignment padding. */
4095 RTRCPTR pAlignmentRC;
4096
4097 /** Pointer the R0 PDM Device API. */
4098 PCPDMDEVHLPR0 pHlpR0;
4099 /** Pointer to device instance data (R0). */
4100 RTR0PTR pvInstanceDataR0;
4101 /** The critical section for the device, see pCritSectXR3. */
4102 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4103
4104 /** Pointer the HC PDM Device API. */
4105 PCPDMDEVHLPR3 pHlpR3;
4106 /** Pointer to device instance data. */
4107 RTR3PTR pvInstanceDataR3;
4108 /** The critical section for the device.
4109 *
4110 * TM and IOM will enter this critical section before calling into the device
4111 * code. PDM will when doing power on, power off, reset, suspend and resume
4112 * notifications. SSM will currently not, but this will be changed later on.
4113 *
4114 * The device gets a critical section automatically assigned to it before
4115 * the constructor is called. If the constructor wishes to use a different
4116 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4117 * very early on.
4118 */
4119 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4120
4121 /** Pointer to device registration structure. */
4122 R3PTRTYPE(PCPDMDEVREG) pReg;
4123 /** Configuration handle. */
4124 R3PTRTYPE(PCFGMNODE) pCfg;
4125
4126 /** The base interface of the device.
4127 *
4128 * The device constructor initializes this if it has any
4129 * device level interfaces to export. To obtain this interface
4130 * call PDMR3QueryDevice(). */
4131 PDMIBASE IBase;
4132
4133 /** Tracing indicator. */
4134 uint32_t fTracing;
4135 /** The tracing ID of this device. */
4136 uint32_t idTracing;
4137#if HC_ARCH_BITS == 32
4138 /** Align the internal data more naturally. */
4139 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4140#endif
4141
4142 /** Internal data. */
4143 union
4144 {
4145#ifdef PDMDEVINSINT_DECLARED
4146 PDMDEVINSINT s;
4147#endif
4148 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4149 } Internal;
4150
4151 /** Device instance data. The size of this area is defined
4152 * in the PDMDEVREG::cbInstanceData field. */
4153 char achInstanceData[8];
4154} PDMDEVINS;
4155
4156/** Current PDMDEVINS version number. */
4157#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4158
4159/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4160#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4161
4162/**
4163 * Checks the structure versions of the device instance and device helpers,
4164 * returning if they are incompatible.
4165 *
4166 * This is for use in the constructor.
4167 *
4168 * @param pDevIns The device instance pointer.
4169 */
4170#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4171 do \
4172 { \
4173 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4174 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4175 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4176 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4177 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4178 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4179 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4180 } while (0)
4181
4182/**
4183 * Quietly checks the structure versions of the device instance and device
4184 * helpers, returning if they are incompatible.
4185 *
4186 * This is for use in the destructor.
4187 *
4188 * @param pDevIns The device instance pointer.
4189 */
4190#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4191 do \
4192 { \
4193 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4194 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4195 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4196 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4197 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4198 } while (0)
4199
4200/**
4201 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4202 * constructor - returns on failure.
4203 *
4204 * This should be invoked after having initialized the instance data
4205 * sufficiently for the correct operation of the destructor. The destructor is
4206 * always called!
4207 *
4208 * @param pDevIns Pointer to the PDM device instance.
4209 * @param pszValidValues Patterns describing the valid value names. See
4210 * RTStrSimplePatternMultiMatch for details on the
4211 * pattern syntax.
4212 * @param pszValidNodes Patterns describing the valid node (key) names.
4213 * Pass empty string if no valid nodes.
4214 */
4215#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4216 do \
4217 { \
4218 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4219 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4220 if (RT_FAILURE(rcValCfg)) \
4221 return rcValCfg; \
4222 } while (0)
4223
4224/** @def PDMDEV_ASSERT_EMT
4225 * Assert that the current thread is the emulation thread.
4226 */
4227#ifdef VBOX_STRICT
4228# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4229#else
4230# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4231#endif
4232
4233/** @def PDMDEV_ASSERT_OTHER
4234 * Assert that the current thread is NOT the emulation thread.
4235 */
4236#ifdef VBOX_STRICT
4237# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4238#else
4239# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4240#endif
4241
4242/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4243 * Assert that the current thread is owner of the VM lock.
4244 */
4245#ifdef VBOX_STRICT
4246# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4247#else
4248# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4249#endif
4250
4251/** @def PDMDEV_SET_ERROR
4252 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4253 */
4254#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4255 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4256
4257/** @def PDMDEV_SET_RUNTIME_ERROR
4258 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4259 */
4260#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4261 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4262
4263/** @def PDMDEVINS_2_RCPTR
4264 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4265 */
4266#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4267
4268/** @def PDMDEVINS_2_R3PTR
4269 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4270 */
4271#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4272
4273/** @def PDMDEVINS_2_R0PTR
4274 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4275 */
4276#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4277
4278
4279#ifdef IN_RING3
4280
4281/**
4282 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4283 */
4284DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4285 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4286 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4287{
4288 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4289}
4290
4291/**
4292 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4293 */
4294DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4295 const char *pszOut, const char *pszIn, const char *pszOutStr,
4296 const char *pszInStr, const char *pszDesc)
4297{
4298 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4299}
4300
4301/**
4302 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4303 */
4304DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4305 const char *pszOut, const char *pszIn, const char *pszOutStr,
4306 const char *pszInStr, const char *pszDesc)
4307{
4308 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4309}
4310
4311/**
4312 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4313 */
4314DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4315{
4316 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4317}
4318
4319/**
4320 * Register a Memory Mapped I/O (MMIO) region.
4321 *
4322 * These callbacks are of course for the ring-3 context (R3). Register HC
4323 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4324 * must be a R3 handler for every RC and R0 handler!
4325 *
4326 * @returns VBox status.
4327 * @param pDevIns The device instance to register the MMIO with.
4328 * @param GCPhysStart First physical address in the range.
4329 * @param cbRange The size of the range (in bytes).
4330 * @param pvUser User argument.
4331 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4332 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4333 * @param pfnRead Pointer to function which is gonna handle Read operations.
4334 * @param pszDesc Pointer to description string. This must not be freed.
4335 */
4336DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4337 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4338{
4339 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4340 fFlags, pszDesc);
4341}
4342
4343/**
4344 * Register a Memory Mapped I/O (MMIO) region for GC.
4345 *
4346 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4347 * (R3) handlers before guest context handlers! There must be a R3 handler for
4348 * every RC handler!
4349 *
4350 * @returns VBox status.
4351 * @param pDevIns The device instance to register the MMIO with.
4352 * @param GCPhysStart First physical address in the range.
4353 * @param cbRange The size of the range (in bytes).
4354 * @param pvUser User argument.
4355 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4356 * @param pszRead Name of the RC function which is gonna handle Read operations.
4357 */
4358DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4359 const char *pszWrite, const char *pszRead)
4360{
4361 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4362}
4363
4364/**
4365 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4366 */
4367DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4368 const char *pszWrite, const char *pszRead)
4369{
4370 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4371}
4372
4373/**
4374 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4375 */
4376DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4377 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4378 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4379{
4380 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4381 fFlags, pszDesc);
4382}
4383
4384/**
4385 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4386 */
4387DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4388 const char *pszWrite, const char *pszRead, const char *pszFill)
4389{
4390 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4391}
4392
4393/**
4394 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4395 */
4396DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4397 const char *pszWrite, const char *pszRead, const char *pszFill)
4398{
4399 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4400}
4401
4402/**
4403 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4404 */
4405DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4406{
4407 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4408}
4409
4410/**
4411 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4412 */
4413DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4414{
4415 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4416}
4417
4418/**
4419 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4420 */
4421DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4422{
4423 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4424}
4425
4426/**
4427 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4428 */
4429DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4430{
4431 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4432}
4433
4434/**
4435 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4436 */
4437DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4438{
4439 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4440}
4441
4442/**
4443 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4444 */
4445DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4446 const char *pszDesc, PRTRCPTR pRCPtr)
4447{
4448 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4449}
4450
4451/**
4452 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4453 */
4454DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4455 const char *pszDesc, PRTR0PTR pR0Ptr)
4456{
4457 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4458}
4459
4460/**
4461 * @copydoc PDMDEVHLPR3::pfnROMRegister
4462 */
4463DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4464 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4465{
4466 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4467}
4468
4469/**
4470 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4471 */
4472DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4473{
4474 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4475}
4476
4477/**
4478 * Register a save state data unit.
4479 *
4480 * @returns VBox status.
4481 * @param pDevIns The device instance.
4482 * @param uVersion Data layout version number.
4483 * @param cbGuess The approximate amount of data in the unit.
4484 * Only for progress indicators.
4485 * @param pfnSaveExec Execute save callback, optional.
4486 * @param pfnLoadExec Execute load callback, optional.
4487 */
4488DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4489 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4490{
4491 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4492 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4493 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4494 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4495}
4496
4497/**
4498 * Register a save state data unit with a live save callback as well.
4499 *
4500 * @returns VBox status.
4501 * @param pDevIns The device instance.
4502 * @param uVersion Data layout version number.
4503 * @param cbGuess The approximate amount of data in the unit.
4504 * Only for progress indicators.
4505 * @param pfnLiveExec Execute live callback, optional.
4506 * @param pfnSaveExec Execute save callback, optional.
4507 * @param pfnLoadExec Execute load callback, optional.
4508 */
4509DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4510 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4511{
4512 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4513 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4514 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4515 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4516}
4517
4518/**
4519 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4520 */
4521DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4522 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4523 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4524 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4525{
4526 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4527 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4528 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4529 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4530}
4531
4532/**
4533 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4534 */
4535DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4536 const char *pszDesc, PPTMTIMERR3 ppTimer)
4537{
4538 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4539}
4540
4541/**
4542 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4543 */
4544DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4545{
4546 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4547}
4548
4549#endif /* IN_RING3 */
4550
4551/**
4552 * @copydoc PDMDEVHLPR3::pfnPhysRead
4553 */
4554DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4555{
4556 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4557}
4558
4559/**
4560 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4561 */
4562DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4563{
4564 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4565}
4566
4567#ifdef IN_RING3
4568
4569/**
4570 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4571 */
4572DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4573{
4574 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4575}
4576
4577/**
4578 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4579 */
4580DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4581{
4582 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4583}
4584
4585/**
4586 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4587 */
4588DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4589{
4590 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4591}
4592
4593/**
4594 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4595 */
4596DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4597{
4598 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4599}
4600
4601/**
4602 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4603 */
4604DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4605{
4606 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4607}
4608
4609/**
4610 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4611 */
4612DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4613{
4614 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4615}
4616
4617/**
4618 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4619 */
4620DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4621{
4622 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4623}
4624
4625/**
4626 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4627 */
4628DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4629{
4630 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4631}
4632
4633/**
4634 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4635 */
4636DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4637{
4638 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4639}
4640#endif /* IN_RING3 */
4641
4642/**
4643 * @copydoc PDMDEVHLPR3::pfnVMState
4644 */
4645DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4646{
4647 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4648}
4649
4650#ifdef IN_RING3
4651/**
4652 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4653 */
4654DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4655{
4656 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4657}
4658#endif /* IN_RING3 */
4659
4660/**
4661 * @copydoc PDMDEVHLPR3::pfnVMSetError
4662 */
4663DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4664{
4665 va_list va;
4666 va_start(va, pszFormat);
4667 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4668 va_end(va);
4669 return rc;
4670}
4671
4672/**
4673 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4674 */
4675DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4676{
4677 va_list va;
4678 int rc;
4679 va_start(va, pszFormat);
4680 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4681 va_end(va);
4682 return rc;
4683}
4684
4685/**
4686 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4687 *
4688 * @returns VBox status code which must be passed up to the VMM. This will be
4689 * VINF_SUCCESS in non-strict builds.
4690 * @param pDevIns The device instance.
4691 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4692 * @param pszFormat Message. (optional)
4693 * @param ... Message parameters.
4694 */
4695DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4696{
4697#ifdef VBOX_STRICT
4698# ifdef IN_RING3
4699 int rc;
4700 va_list args;
4701 va_start(args, pszFormat);
4702 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4703 va_end(args);
4704 return rc;
4705# else
4706 NOREF(pDevIns);
4707 NOREF(pszFile);
4708 NOREF(iLine);
4709 NOREF(pszFunction);
4710 NOREF(pszFormat);
4711 return VINF_EM_DBG_STOP;
4712# endif
4713#else
4714 NOREF(pDevIns);
4715 NOREF(pszFile);
4716 NOREF(iLine);
4717 NOREF(pszFunction);
4718 NOREF(pszFormat);
4719 return VINF_SUCCESS;
4720#endif
4721}
4722
4723#ifdef IN_RING3
4724
4725/**
4726 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4727 */
4728DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4729{
4730 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4731}
4732
4733/**
4734 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4735 */
4736DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4737{
4738 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4739}
4740
4741/**
4742 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4743 */
4744DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4745{
4746 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4747}
4748
4749/**
4750 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4751 */
4752DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4753 const char *pszDesc, const char *pszName, ...)
4754{
4755 va_list va;
4756 va_start(va, pszName);
4757 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4758 va_end(va);
4759}
4760
4761/**
4762 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4763 */
4764DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4765{
4766 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4767}
4768
4769/**
4770 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4771 */
4772DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4773{
4774 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4775}
4776
4777/**
4778 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4779 */
4780DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4781{
4782 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4783}
4784
4785/**
4786 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4787 */
4788DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4789 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4790{
4791 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4792}
4793
4794#endif /* IN_RING3 */
4795
4796/**
4797 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4798 */
4799DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4800{
4801 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4802}
4803
4804/**
4805 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4806 */
4807DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4808{
4809 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4810}
4811
4812/**
4813 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4814 */
4815DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4816{
4817 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4818}
4819
4820/**
4821 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4822 */
4823DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4824{
4825 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4826}
4827
4828/**
4829 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4830 */
4831DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4832{
4833 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4834}
4835
4836/**
4837 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4838 */
4839DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4840{
4841 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4842}
4843
4844#ifdef IN_RING3
4845
4846/**
4847 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4848 */
4849DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4850{
4851 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4852}
4853
4854/**
4855 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4856 */
4857DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4858 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4859{
4860 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4861}
4862
4863/**
4864 * Initializes a PDM critical section.
4865 *
4866 * The PDM critical sections are derived from the IPRT critical sections, but
4867 * works in RC and R0 as well.
4868 *
4869 * @returns VBox status code.
4870 * @param pDevIns The device instance.
4871 * @param pCritSect Pointer to the critical section.
4872 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4873 * @param pszNameFmt Format string for naming the critical section.
4874 * For statistics and lock validation.
4875 * @param ... Arguments for the format string.
4876 */
4877DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4878{
4879 int rc;
4880 va_list va;
4881 va_start(va, pszNameFmt);
4882 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4883 va_end(va);
4884 return rc;
4885}
4886
4887/**
4888 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4889 */
4890DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4891{
4892 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4893}
4894
4895/**
4896 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4897 */
4898DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4899{
4900 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4901}
4902
4903/**
4904 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4905 */
4906DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4907{
4908 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4909}
4910
4911/**
4912 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4913 */
4914DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4915{
4916 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4917}
4918
4919/**
4920 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4921 */
4922DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4923 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4924{
4925 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4926}
4927
4928/**
4929 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4930 */
4931DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4932{
4933 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4934}
4935
4936/**
4937 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4938 */
4939DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4940{
4941 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4942}
4943
4944/**
4945 * @copydoc PDMDEVHLPR3::pfnA20Set
4946 */
4947DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4948{
4949 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4950}
4951
4952/**
4953 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4954 */
4955DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4956{
4957 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4958}
4959
4960/**
4961 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4962 */
4963DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4964{
4965 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4966}
4967
4968/**
4969 * @copydoc PDMDEVHLPR3::pfnPICRegister
4970 */
4971DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4972{
4973 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4974}
4975
4976/**
4977 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4978 */
4979DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4980{
4981 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4982}
4983
4984/**
4985 * @copydoc PDMDEVHLPR3::pfn
4986 */
4987DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4988{
4989 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4990}
4991
4992/**
4993 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4994 */
4995DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4996{
4997 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4998}
4999
5000/**
5001 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5002 */
5003DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5004{
5005 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5006}
5007
5008/**
5009 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5010 */
5011DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5012{
5013 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5014}
5015
5016/**
5017 * @copydoc PDMDEVHLPR3::pfnDMARegister
5018 */
5019DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5020{
5021 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5022}
5023
5024/**
5025 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5026 */
5027DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5028{
5029 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5030}
5031
5032/**
5033 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5034 */
5035DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5036{
5037 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5038}
5039
5040/**
5041 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5042 */
5043DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5044{
5045 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5046}
5047
5048/**
5049 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5050 */
5051DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5052{
5053 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5054}
5055
5056/**
5057 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5058 */
5059DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5060{
5061 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5062}
5063
5064/**
5065 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5066 */
5067DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5068{
5069 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5070}
5071
5072/**
5073 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5074 */
5075DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5076{
5077 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5078}
5079
5080/**
5081 * @copydoc PDMDEVHLP::pfnCallR0
5082 */
5083DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5084{
5085 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5086}
5087
5088/**
5089 * @copydoc PDMDEVHLP::pfnVMGetSuspendReason
5090 */
5091DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5092{
5093 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5094}
5095
5096/**
5097 * @copydoc PDMDEVHLP::pfnVMGetResumeReason
5098 */
5099DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5100{
5101 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5102}
5103
5104/**
5105 * @copydoc PDMDEVHLPR3::pfnGetUVM
5106 */
5107DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5108{
5109 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5110}
5111
5112#endif /* IN_RING3 */
5113
5114/**
5115 * @copydoc PDMDEVHLPR3::pfnGetVM
5116 */
5117DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5118{
5119 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5120}
5121
5122/**
5123 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5124 */
5125DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5126{
5127 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5128}
5129
5130/**
5131 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5132 */
5133DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5134{
5135 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5136}
5137
5138/**
5139 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5140 */
5141DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5142{
5143 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5144}
5145
5146/**
5147 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5148 */
5149DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5150{
5151 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5152}
5153
5154#ifdef IN_RING3
5155
5156/**
5157 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5158 */
5159DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5160{
5161 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5162}
5163
5164/**
5165 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5166 */
5167DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5168{
5169 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5170}
5171
5172/**
5173 * @copydoc PDMDEVHLPR3::pfnVMReset
5174 */
5175DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5176{
5177 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5178}
5179
5180/**
5181 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5182 */
5183DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5184{
5185 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5186}
5187
5188/**
5189 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5190 */
5191DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5192{
5193 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5194}
5195
5196/**
5197 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5198 */
5199DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5200{
5201 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5202}
5203
5204#endif /* IN_RING3 */
5205
5206/**
5207 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5208 */
5209DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5210{
5211 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5212}
5213
5214#ifdef IN_RING3
5215
5216/**
5217 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5218 */
5219DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5220{
5221 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5222}
5223
5224/**
5225 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5226 */
5227DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5228{
5229 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5230}
5231
5232#endif /* IN_RING3 */
5233#ifdef IN_RING0
5234
5235/**
5236 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5237 */
5238DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5239{
5240 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5241}
5242
5243#endif /* IN_RING0 */
5244
5245
5246
5247
5248/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5249typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5250
5251/**
5252 * Callbacks for VBoxDeviceRegister().
5253 */
5254typedef struct PDMDEVREGCB
5255{
5256 /** Interface version.
5257 * This is set to PDM_DEVREG_CB_VERSION. */
5258 uint32_t u32Version;
5259
5260 /**
5261 * Registers a device with the current VM instance.
5262 *
5263 * @returns VBox status code.
5264 * @param pCallbacks Pointer to the callback table.
5265 * @param pReg Pointer to the device registration record.
5266 * This data must be permanent and readonly.
5267 */
5268 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5269} PDMDEVREGCB;
5270
5271/** Current version of the PDMDEVREGCB structure. */
5272#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5273
5274
5275/**
5276 * The VBoxDevicesRegister callback function.
5277 *
5278 * PDM will invoke this function after loading a device module and letting
5279 * the module decide which devices to register and how to handle conflicts.
5280 *
5281 * @returns VBox status code.
5282 * @param pCallbacks Pointer to the callback table.
5283 * @param u32Version VBox version number.
5284 */
5285typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5286
5287/** @} */
5288
5289RT_C_DECLS_END
5290
5291#endif
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