VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 60188

Last change on this file since 60188 was 59348, checked in by vboxsync, 9 years ago

Audio: Implemented dynamic fallback support to NULL audio backends for HDA, AC'97 and SB16 emulation; also did some preparations for audio hotplugging support.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 204.1 KB
Line 
1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDevIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Suspend notification.
137 *
138 * @returns VBox status.
139 * @param pDevIns The device instance data.
140 * @thread EMT(0)
141 *
142 * @remarks Caller enters the device critical section.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVSUSPEND() function. */
146typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
147
148/**
149 * Resume notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 *
154 * @remarks Caller enters the device critical section.
155 */
156typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
157/** Pointer to a FNPDMDEVRESUME() function. */
158typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
159
160/**
161 * Power Off notification.
162 *
163 * This is always called when VMR3PowerOff is called.
164 * There will be no callback when hot plugging devices.
165 *
166 * @param pDevIns The device instance data.
167 * @thread EMT(0)
168 *
169 * @remarks Caller enters the device critical section.
170 */
171typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
172/** Pointer to a FNPDMDEVPOWEROFF() function. */
173typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
174
175/**
176 * Attach command.
177 *
178 * This is called to let the device attach to a driver for a specified LUN
179 * at runtime. This is not called during VM construction, the device
180 * constructor has to attach to all the available drivers.
181 *
182 * This is like plugging in the keyboard or mouse after turning on the PC.
183 *
184 * @returns VBox status code.
185 * @param pDevIns The device instance.
186 * @param iLUN The logical unit which is being attached.
187 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
188 *
189 * @remarks Caller enters the device critical section.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust its state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 *
208 * @remarks Caller enters the device critical section.
209 */
210typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
211/** Pointer to a FNPDMDEVDETACH() function. */
212typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
213
214/**
215 * Query the base interface of a logical unit.
216 *
217 * @returns VBOX status code.
218 * @param pDevIns The device instance.
219 * @param iLUN The logicial unit to query.
220 * @param ppBase Where to store the pointer to the base interface of the LUN.
221 *
222 * @remarks The device critical section is not entered.
223 */
224typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
225/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
226typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
227
228/**
229 * Init complete notification.
230 * This can be done to do communication with other devices and other
231 * initialization which requires everything to be in place.
232 *
233 * @returns VBOX status code.
234 * @param pDevIns The device instance.
235 *
236 * @remarks Caller enters the device critical section.
237 */
238typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
239/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
240typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
241
242
243/**
244 * The context of a pfnMemSetup call.
245 */
246typedef enum PDMDEVMEMSETUPCTX
247{
248 /** Invalid zero value. */
249 PDMDEVMEMSETUPCTX_INVALID = 0,
250 /** After construction. */
251 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
252 /** After reset. */
253 PDMDEVMEMSETUPCTX_AFTER_RESET,
254 /** Type size hack. */
255 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
256} PDMDEVMEMSETUPCTX;
257
258
259/**
260 * PDM Device Registration Structure.
261 *
262 * This structure is used when registering a device from VBoxInitDevices() in HC
263 * Ring-3. PDM will continue use till the VM is terminated.
264 */
265typedef struct PDMDEVREG
266{
267 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
268 uint32_t u32Version;
269 /** Device name. */
270 char szName[32];
271 /** Name of the raw-mode context module (no path).
272 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
273 char szRCMod[32];
274 /** Name of the ring-0 module (no path).
275 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
276 char szR0Mod[32];
277 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
278 * remain unchanged from registration till VM destruction. */
279 const char *pszDescription;
280
281 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
282 uint32_t fFlags;
283 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
284 uint32_t fClass;
285 /** Maximum number of instances (per VM). */
286 uint32_t cMaxInstances;
287 /** Size of the instance data. */
288 uint32_t cbInstance;
289
290 /** Construct instance - required. */
291 PFNPDMDEVCONSTRUCT pfnConstruct;
292 /** Destruct instance - optional.
293 * Critical section NOT entered (will be destroyed). */
294 PFNPDMDEVDESTRUCT pfnDestruct;
295 /** Relocation command - optional.
296 * Critical section NOT entered. */
297 PFNPDMDEVRELOCATE pfnRelocate;
298
299 /**
300 * Memory setup callback.
301 *
302 * @param pDevIns The device instance data.
303 * @param enmCtx Indicates the context of the call.
304 * @remarks The critical section is entered prior to calling this method.
305 */
306 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
307
308 /** Power on notification - optional.
309 * Critical section is entered. */
310 PFNPDMDEVPOWERON pfnPowerOn;
311 /** Reset notification - optional.
312 * Critical section is entered. */
313 PFNPDMDEVRESET pfnReset;
314 /** Suspend notification - optional.
315 * Critical section is entered. */
316 PFNPDMDEVSUSPEND pfnSuspend;
317 /** Resume notification - optional.
318 * Critical section is entered. */
319 PFNPDMDEVRESUME pfnResume;
320 /** Attach command - optional.
321 * Critical section is entered. */
322 PFNPDMDEVATTACH pfnAttach;
323 /** Detach notification - optional.
324 * Critical section is entered. */
325 PFNPDMDEVDETACH pfnDetach;
326 /** Query a LUN base interface - optional.
327 * Critical section is NOT entered. */
328 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
329 /** Init complete notification - optional.
330 * Critical section is entered. */
331 PFNPDMDEVINITCOMPLETE pfnInitComplete;
332 /** Power off notification - optional.
333 * Critical section is entered. */
334 PFNPDMDEVPOWEROFF pfnPowerOff;
335 /** @todo */
336 PFNRT pfnSoftReset;
337 /** Initialization safty marker. */
338 uint32_t u32VersionEnd;
339} PDMDEVREG;
340/** Pointer to a PDM Device Structure. */
341typedef PDMDEVREG *PPDMDEVREG;
342/** Const pointer to a PDM Device Structure. */
343typedef PDMDEVREG const *PCPDMDEVREG;
344
345/** Current DEVREG version number. */
346#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 0)
347
348/** PDM Device Flags.
349 * @{ */
350/** This flag is used to indicate that the device has a RC component. */
351#define PDM_DEVREG_FLAGS_RC 0x00000001
352/** This flag is used to indicate that the device has a R0 component. */
353#define PDM_DEVREG_FLAGS_R0 0x00000002
354
355/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
356 * The bit count for the current host. */
357#if HC_ARCH_BITS == 32
358# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
359#elif HC_ARCH_BITS == 64
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
361#else
362# error Unsupported HC_ARCH_BITS value.
363#endif
364/** The host bit count mask. */
365#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
366
367/** The device support only 32-bit guests. */
368#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
369/** The device support only 64-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
371/** The device support both 32-bit & 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
373/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
374 * The guest bit count for the current compilation. */
375#if GC_ARCH_BITS == 32
376# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
377#elif GC_ARCH_BITS == 64
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
379#else
380# error Unsupported GC_ARCH_BITS value.
381#endif
382/** The guest bit count mask. */
383#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
384
385/** A convenience. */
386#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
387
388/** Indicates that the devices support PAE36 on a 32-bit guest. */
389#define PDM_DEVREG_FLAGS_PAE36 0x00001000
390
391/** Indicates that the device needs to be notified before the drivers when suspending. */
392#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
393
394/** Indicates that the device needs to be notified before the drivers when powering off. */
395#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
396
397/** Indicates that the device needs to be notified before the drivers when resetting. */
398#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
399/** @} */
400
401
402/** PDM Device Classes.
403 * The order is important, lower bit earlier instantiation.
404 * @{ */
405/** Architecture device. */
406#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
407/** Architecture BIOS device. */
408#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
409/** PCI bus brigde. */
410#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
411/** ISA bus brigde. */
412#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
413/** Input device (mouse, keyboard, joystick, HID, ...). */
414#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
415/** Interrupt controller (PIC). */
416#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
417/** Interval controoler (PIT). */
418#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
419/** RTC/CMOS. */
420#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
421/** DMA controller. */
422#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
423/** VMM Device. */
424#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
425/** Graphics device, like VGA. */
426#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
427/** Storage controller device. */
428#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
429/** Network interface controller. */
430#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
431/** Audio. */
432#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
433/** USB HIC. */
434#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
435/** ACPI. */
436#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
437/** Serial controller device. */
438#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
439/** Parallel controller device */
440#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
441/** Host PCI pass-through device */
442#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
443/** Misc devices (always last). */
444#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
445/** @} */
446
447
448/** @name IRQ Level for use with the *SetIrq APIs.
449 * @{
450 */
451/** Assert the IRQ (can assume value 1). */
452#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
453/** Deassert the IRQ (can assume value 0). */
454#define PDM_IRQ_LEVEL_LOW 0
455/** flip-flop - deassert and then assert the IRQ again immediately. */
456#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
457/** @} */
458
459/**
460 * Registration record for MSI.
461 */
462typedef struct PDMMSIREG
463{
464 /** Number of MSI interrupt vectors, 0 if MSI not supported */
465 uint16_t cMsiVectors;
466 /** Offset of MSI capability */
467 uint8_t iMsiCapOffset;
468 /** Offset of next capability to MSI */
469 uint8_t iMsiNextOffset;
470 /** If we support 64-bit MSI addressing */
471 bool fMsi64bit;
472
473 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
474 uint16_t cMsixVectors;
475 /** Offset of MSI-X capability */
476 uint8_t iMsixCapOffset;
477 /** Offset of next capability to MSI-X */
478 uint8_t iMsixNextOffset;
479 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
480 uint8_t iMsixBar;
481} PDMMSIREG;
482typedef PDMMSIREG *PPDMMSIREG;
483
484/**
485 * PCI Bus registration structure.
486 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
487 */
488typedef struct PDMPCIBUSREG
489{
490 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
491 uint32_t u32Version;
492
493 /**
494 * Registers the device with the default PCI bus.
495 *
496 * @returns VBox status code.
497 * @param pDevIns Device instance of the PCI Bus.
498 * @param pPciDev The PCI device structure.
499 * Any PCI enabled device must keep this in it's instance data!
500 * Fill in the PCI data config before registration, please.
501 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
502 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
503 * If negative, the pci bus device will assign one.
504 * @remarks Caller enters the PDM critical section.
505 */
506 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
507
508 /**
509 * Initialize MSI support in a PCI device.
510 *
511 * @returns VBox status code.
512 * @param pDevIns Device instance of the PCI Bus.
513 * @param pPciDev The PCI device structure.
514 * @param pMsiReg MSI registration structure
515 * @remarks Caller enters the PDM critical section.
516 */
517 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
518
519 /**
520 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
521 *
522 * @returns VBox status code.
523 * @param pDevIns Device instance of the PCI Bus.
524 * @param pPciDev The PCI device structure.
525 * @param iRegion The region number.
526 * @param cbRegion Size of the region.
527 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
528 * @param pfnCallback Callback for doing the mapping.
529 * @remarks Caller enters the PDM critical section.
530 */
531 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
532
533 /**
534 * Register PCI configuration space read/write callbacks.
535 *
536 * @param pDevIns Device instance of the PCI Bus.
537 * @param pPciDev The PCI device structure.
538 * @param pfnRead Pointer to the user defined PCI config read function.
539 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
540 * PCI config read function. This way, user can decide when (and if)
541 * to call default PCI config read function. Can be NULL.
542 * @param pfnWrite Pointer to the user defined PCI config write function.
543 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
544 * PCI config write function. This way, user can decide when (and if)
545 * to call default PCI config write function. Can be NULL.
546 * @remarks Caller enters the PDM critical section.
547 * @thread EMT
548 */
549 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
550 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
551
552 /**
553 * Set the IRQ for a PCI device.
554 *
555 * @param pDevIns Device instance of the PCI Bus.
556 * @param pPciDev The PCI device structure.
557 * @param iIrq IRQ number to set.
558 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
559 * @param uTagSrc The IRQ tag and source (for tracing).
560 * @remarks Caller enters the PDM critical section.
561 */
562 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
563
564 /**
565 * Called to perform the job of the bios.
566 * This is only called for the first PCI Bus - it is expected to
567 * service all the PCI buses.
568 *
569 * @returns VBox status.
570 * @param pDevIns Device instance of the first bus.
571 * @remarks Caller enters the PDM critical section.
572 */
573 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
574
575 /** The name of the SetIrq RC entry point. */
576 const char *pszSetIrqRC;
577
578 /** The name of the SetIrq R0 entry point. */
579 const char *pszSetIrqR0;
580
581} PDMPCIBUSREG;
582/** Pointer to a PCI bus registration structure. */
583typedef PDMPCIBUSREG *PPDMPCIBUSREG;
584
585/** Current PDMPCIBUSREG version number. */
586#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
587
588/**
589 * PCI Bus RC helpers.
590 */
591typedef struct PDMPCIHLPRC
592{
593 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
594 uint32_t u32Version;
595
596 /**
597 * Set an ISA IRQ.
598 *
599 * @param pDevIns PCI device instance.
600 * @param iIrq IRQ number to set.
601 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
602 * @param uTagSrc The IRQ tag and source (for tracing).
603 * @thread EMT only.
604 */
605 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
606
607 /**
608 * Set an I/O-APIC IRQ.
609 *
610 * @param pDevIns PCI device instance.
611 * @param iIrq IRQ number to set.
612 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
613 * @param uTagSrc The IRQ tag and source (for tracing).
614 * @thread EMT only.
615 */
616 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
617
618 /**
619 * Send an MSI.
620 *
621 * @param pDevIns PCI device instance.
622 * @param GCPhys Physical address MSI request was written.
623 * @param uValue Value written.
624 * @param uTagSrc The IRQ tag and source (for tracing).
625 * @thread EMT only.
626 */
627 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
628
629
630 /**
631 * Acquires the PDM lock.
632 *
633 * @returns VINF_SUCCESS on success.
634 * @returns rc if we failed to acquire the lock.
635 * @param pDevIns The PCI device instance.
636 * @param rc What to return if we fail to acquire the lock.
637 */
638 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
639
640 /**
641 * Releases the PDM lock.
642 *
643 * @param pDevIns The PCI device instance.
644 */
645 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
646
647 /** Just a safety precaution. */
648 uint32_t u32TheEnd;
649} PDMPCIHLPRC;
650/** Pointer to PCI helpers. */
651typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
652/** Pointer to const PCI helpers. */
653typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
654
655/** Current PDMPCIHLPRC version number. */
656#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
657
658
659/**
660 * PCI Bus R0 helpers.
661 */
662typedef struct PDMPCIHLPR0
663{
664 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
665 uint32_t u32Version;
666
667 /**
668 * Set an ISA IRQ.
669 *
670 * @param pDevIns PCI device instance.
671 * @param iIrq IRQ number to set.
672 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
673 * @param uTagSrc The IRQ tag and source (for tracing).
674 * @thread EMT only.
675 */
676 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
677
678 /**
679 * Set an I/O-APIC IRQ.
680 *
681 * @param pDevIns PCI device instance.
682 * @param iIrq IRQ number to set.
683 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
684 * @param uTagSrc The IRQ tag and source (for tracing).
685 * @thread EMT only.
686 */
687 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
688
689 /**
690 * Send an MSI.
691 *
692 * @param pDevIns PCI device instance.
693 * @param GCPhys Physical address MSI request was written.
694 * @param uValue Value written.
695 * @param uTagSrc The IRQ tag and source (for tracing).
696 * @thread EMT only.
697 */
698 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
699
700
701 /**
702 * Acquires the PDM lock.
703 *
704 * @returns VINF_SUCCESS on success.
705 * @returns rc if we failed to acquire the lock.
706 * @param pDevIns The PCI device instance.
707 * @param rc What to return if we fail to acquire the lock.
708 */
709 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
710
711 /**
712 * Releases the PDM lock.
713 *
714 * @param pDevIns The PCI device instance.
715 */
716 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
717
718 /** Just a safety precaution. */
719 uint32_t u32TheEnd;
720} PDMPCIHLPR0;
721/** Pointer to PCI helpers. */
722typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
723/** Pointer to const PCI helpers. */
724typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
725
726/** Current PDMPCIHLPR0 version number. */
727#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
728
729/**
730 * PCI device helpers.
731 */
732typedef struct PDMPCIHLPR3
733{
734 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
735 uint32_t u32Version;
736
737 /**
738 * Set an ISA IRQ.
739 *
740 * @param pDevIns The PCI device instance.
741 * @param iIrq IRQ number to set.
742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
743 * @param uTagSrc The IRQ tag and source (for tracing).
744 */
745 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
746
747 /**
748 * Set an I/O-APIC IRQ.
749 *
750 * @param pDevIns The PCI device instance.
751 * @param iIrq IRQ number to set.
752 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
753 * @param uTagSrc The IRQ tag and source (for tracing).
754 */
755 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
756
757 /**
758 * Send an MSI.
759 *
760 * @param pDevIns PCI device instance.
761 * @param GCPhys Physical address MSI request was written.
762 * @param uValue Value written.
763 * @param uTagSrc The IRQ tag and source (for tracing).
764 */
765 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
766
767 /**
768 * Checks if the given address is an MMIO2 base address or not.
769 *
770 * @returns true/false accordingly.
771 * @param pDevIns The PCI device instance.
772 * @param pOwner The owner of the memory, optional.
773 * @param GCPhys The address to check.
774 */
775 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
776
777 /**
778 * Gets the address of the RC PCI Bus helpers.
779 *
780 * This should be called at both construction and relocation time
781 * to obtain the correct address of the RC helpers.
782 *
783 * @returns RC pointer to the PCI Bus helpers.
784 * @param pDevIns Device instance of the PCI Bus.
785 * @thread EMT only.
786 */
787 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
788
789 /**
790 * Gets the address of the R0 PCI Bus helpers.
791 *
792 * This should be called at both construction and relocation time
793 * to obtain the correct address of the R0 helpers.
794 *
795 * @returns R0 pointer to the PCI Bus helpers.
796 * @param pDevIns Device instance of the PCI Bus.
797 * @thread EMT only.
798 */
799 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
800
801 /**
802 * Acquires the PDM lock.
803 *
804 * @returns VINF_SUCCESS on success.
805 * @returns Fatal error on failure.
806 * @param pDevIns The PCI device instance.
807 * @param rc Dummy for making the interface identical to the RC and R0 versions.
808 */
809 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
810
811 /**
812 * Releases the PDM lock.
813 *
814 * @param pDevIns The PCI device instance.
815 */
816 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
817
818 /** Just a safety precaution. */
819 uint32_t u32TheEnd;
820} PDMPCIHLPR3;
821/** Pointer to PCI helpers. */
822typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
823/** Pointer to const PCI helpers. */
824typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
825
826/** Current PDMPCIHLPR3 version number. */
827#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
828
829
830/**
831 * Programmable Interrupt Controller registration structure.
832 */
833typedef struct PDMPICREG
834{
835 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
836 uint32_t u32Version;
837
838 /**
839 * Set the an IRQ.
840 *
841 * @param pDevIns Device instance of the PIC.
842 * @param iIrq IRQ number to set.
843 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
844 * @param uTagSrc The IRQ tag and source (for tracing).
845 * @remarks Caller enters the PDM critical section.
846 */
847 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
848
849 /**
850 * Get a pending interrupt.
851 *
852 * @returns Pending interrupt number.
853 * @param pDevIns Device instance of the PIC.
854 * @param puTagSrc Where to return the IRQ tag and source.
855 * @remarks Caller enters the PDM critical section.
856 */
857 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
858
859 /** The name of the RC SetIrq entry point. */
860 const char *pszSetIrqRC;
861 /** The name of the RC GetInterrupt entry point. */
862 const char *pszGetInterruptRC;
863
864 /** The name of the R0 SetIrq entry point. */
865 const char *pszSetIrqR0;
866 /** The name of the R0 GetInterrupt entry point. */
867 const char *pszGetInterruptR0;
868} PDMPICREG;
869/** Pointer to a PIC registration structure. */
870typedef PDMPICREG *PPDMPICREG;
871
872/** Current PDMPICREG version number. */
873#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
874
875/**
876 * PIC RC helpers.
877 */
878typedef struct PDMPICHLPRC
879{
880 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
881 uint32_t u32Version;
882
883 /**
884 * Set the interrupt force action flag.
885 *
886 * @param pDevIns Device instance of the PIC.
887 */
888 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
889
890 /**
891 * Clear the interrupt force action flag.
892 *
893 * @param pDevIns Device instance of the PIC.
894 */
895 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
896
897 /**
898 * Acquires the PDM lock.
899 *
900 * @returns VINF_SUCCESS on success.
901 * @returns rc if we failed to acquire the lock.
902 * @param pDevIns The PIC device instance.
903 * @param rc What to return if we fail to acquire the lock.
904 */
905 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
906
907 /**
908 * Releases the PDM lock.
909 *
910 * @param pDevIns The PIC device instance.
911 */
912 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
913
914 /** Just a safety precaution. */
915 uint32_t u32TheEnd;
916} PDMPICHLPRC;
917
918/** Pointer to PIC RC helpers. */
919typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
920/** Pointer to const PIC RC helpers. */
921typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
922
923/** Current PDMPICHLPRC version number. */
924#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
925
926
927/**
928 * PIC R0 helpers.
929 */
930typedef struct PDMPICHLPR0
931{
932 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
933 uint32_t u32Version;
934
935 /**
936 * Set the interrupt force action flag.
937 *
938 * @param pDevIns Device instance of the PIC.
939 */
940 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
941
942 /**
943 * Clear the interrupt force action flag.
944 *
945 * @param pDevIns Device instance of the PIC.
946 */
947 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
948
949 /**
950 * Acquires the PDM lock.
951 *
952 * @returns VINF_SUCCESS on success.
953 * @returns rc if we failed to acquire the lock.
954 * @param pDevIns The PIC device instance.
955 * @param rc What to return if we fail to acquire the lock.
956 */
957 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
958
959 /**
960 * Releases the PDM lock.
961 *
962 * @param pDevIns The PCI device instance.
963 */
964 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
965
966 /** Just a safety precaution. */
967 uint32_t u32TheEnd;
968} PDMPICHLPR0;
969
970/** Pointer to PIC R0 helpers. */
971typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
972/** Pointer to const PIC R0 helpers. */
973typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
974
975/** Current PDMPICHLPR0 version number. */
976#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
977
978/**
979 * PIC R3 helpers.
980 */
981typedef struct PDMPICHLPR3
982{
983 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
984 uint32_t u32Version;
985
986 /**
987 * Set the interrupt force action flag.
988 *
989 * @param pDevIns Device instance of the PIC.
990 */
991 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
992
993 /**
994 * Clear the interrupt force action flag.
995 *
996 * @param pDevIns Device instance of the PIC.
997 */
998 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
999
1000 /**
1001 * Acquires the PDM lock.
1002 *
1003 * @returns VINF_SUCCESS on success.
1004 * @returns Fatal error on failure.
1005 * @param pDevIns The PIC device instance.
1006 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1007 */
1008 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1009
1010 /**
1011 * Releases the PDM lock.
1012 *
1013 * @param pDevIns The PIC device instance.
1014 */
1015 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1016
1017 /**
1018 * Gets the address of the RC PIC helpers.
1019 *
1020 * This should be called at both construction and relocation time
1021 * to obtain the correct address of the RC helpers.
1022 *
1023 * @returns RC pointer to the PIC helpers.
1024 * @param pDevIns Device instance of the PIC.
1025 */
1026 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1027
1028 /**
1029 * Gets the address of the R0 PIC helpers.
1030 *
1031 * This should be called at both construction and relocation time
1032 * to obtain the correct address of the R0 helpers.
1033 *
1034 * @returns R0 pointer to the PIC helpers.
1035 * @param pDevIns Device instance of the PIC.
1036 */
1037 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1038
1039 /** Just a safety precaution. */
1040 uint32_t u32TheEnd;
1041} PDMPICHLPR3;
1042
1043/** Pointer to PIC R3 helpers. */
1044typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1045/** Pointer to const PIC R3 helpers. */
1046typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1047
1048/** Current PDMPICHLPR3 version number. */
1049#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1050
1051
1052
1053/**
1054 * Advanced Programmable Interrupt Controller registration structure.
1055 */
1056typedef struct PDMAPICREG
1057{
1058 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1059 uint32_t u32Version;
1060
1061 /**
1062 * Get a pending interrupt.
1063 *
1064 * @returns Pending interrupt number.
1065 * @param pDevIns Device instance of the APIC.
1066 * @param idCpu The VCPU Id.
1067 * @param puTagSrc Where to return the tag source.
1068 * @remarks Caller enters the PDM critical section
1069 */
1070 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1071
1072 /**
1073 * Check if the APIC has a pending interrupt/if a TPR change would active one
1074 *
1075 * @returns Pending interrupt yes/no
1076 * @param pDevIns Device instance of the APIC.
1077 * @param idCpu The VCPU Id.
1078 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1079 * (optional, can be NULL).
1080 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1081 * prior to calling this method.
1082 */
1083 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t *pu8PendingIrq));
1084
1085 /**
1086 * Set the APIC base.
1087 *
1088 * @param pDevIns Device instance of the APIC.
1089 * @param idCpu The VCPU Id.
1090 * @param u64Base The new base.
1091 * @remarks Caller enters the PDM critical section.
1092 */
1093 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1094
1095 /**
1096 * Get the APIC base.
1097 *
1098 * @returns Current base.
1099 * @param pDevIns Device instance of the APIC.
1100 * @param idCpu The VCPU Id.
1101 * @remarks Caller enters the PDM critical section.
1102 */
1103 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1104
1105 /**
1106 * Set the TPR (task priority register).
1107 *
1108 * @param pDevIns Device instance of the APIC.
1109 * @param idCpu The VCPU id.
1110 * @param u8TPR The new TPR.
1111 * @remarks Caller enters the PDM critical section.
1112 */
1113 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1114
1115 /**
1116 * Get the TPR (task priority register).
1117 *
1118 * @returns The current TPR.
1119 * @param pDevIns Device instance of the APIC.
1120 * @param idCpu VCPU id
1121 * @remarks Caller enters the PDM critical section.
1122 */
1123 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1124
1125 /**
1126 * Write to a MSR in APIC range.
1127 *
1128 * @returns VBox status code.
1129 * @param pDevIns Device instance of the APIC.
1130 * @param idCpu Target CPU.
1131 * @param u32Reg The MSR begin written to.
1132 * @param u64Value The value to write.
1133 *
1134 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1135 * calling this method.
1136 */
1137 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1138
1139 /**
1140 * Read from a MSR in APIC range.
1141 *
1142 * @returns VBox status code.
1143 * @param pDevIns Device instance of the APIC.
1144 * @param idCpu Target CPU.
1145 * @param u32Reg MSR to read.
1146 * @param pu64Value Where to return the read value.
1147 *
1148 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1149 * calling this method.
1150 */
1151 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1152
1153 /**
1154 * Private interface between the IOAPIC and APIC.
1155 *
1156 * This is a low-level, APIC/IOAPIC implementation specific interface which
1157 * is registered with PDM only because it makes life so much simpler right
1158 * now (GC bits). This is a bad bad hack! The correct way of doing this
1159 * would involve some way of querying GC interfaces and relocating them.
1160 * Perhaps doing some kind of device init in GC...
1161 *
1162 * @returns status code.
1163 * @param pDevIns Device instance of the APIC.
1164 * @param u8Dest See APIC implementation.
1165 * @param u8DestMode See APIC implementation.
1166 * @param u8DeliveryMode See APIC implementation.
1167 * @param iVector See APIC implementation.
1168 * @param u8Polarity See APIC implementation.
1169 * @param u8TriggerMode See APIC implementation.
1170 * @param uTagSrc The IRQ tag and source (for tracing).
1171 * @remarks Caller enters the PDM critical section
1172 */
1173 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1174 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1175
1176 /**
1177 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1178 *
1179 * Used for virtual wire mode when interrupts from the PIC are passed through
1180 * LAPIC.
1181 *
1182 * @returns status code.
1183 * @param pDevIns Device instance of the APIC.
1184 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1185 * @param u8Level The level.
1186 * @param uTagSrc The IRQ tag and source (for tracing).
1187 * @remarks Caller enters the PDM critical section
1188 */
1189 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1190
1191 /**
1192 * Get the APIC timer frequency (in Hz).
1193 *
1194 * @returns The frequency of the APIC timer.
1195 * @param pDevIns Device instance of the APIC.
1196 */
1197 DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3, (PPDMDEVINS pDevIns));
1198
1199 /** The name of the RC GetInterrupt entry point. */
1200 const char *pszGetInterruptRC;
1201 /** The name of the RC HasPendingIrq entry point. */
1202 const char *pszHasPendingIrqRC;
1203 /** The name of the RC SetBase entry point. */
1204 const char *pszSetBaseRC;
1205 /** The name of the RC GetBase entry point. */
1206 const char *pszGetBaseRC;
1207 /** The name of the RC SetTPR entry point. */
1208 const char *pszSetTPRRC;
1209 /** The name of the RC GetTPR entry point. */
1210 const char *pszGetTPRRC;
1211 /** The name of the RC WriteMSR entry point. */
1212 const char *pszWriteMSRRC;
1213 /** The name of the RC ReadMSR entry point. */
1214 const char *pszReadMSRRC;
1215 /** The name of the RC BusDeliver entry point. */
1216 const char *pszBusDeliverRC;
1217 /** The name of the RC LocalInterrupt entry point. */
1218 const char *pszLocalInterruptRC;
1219 /** The name of the RC GetTimerFreq entry point. */
1220 const char *pszGetTimerFreqRC;
1221
1222 /** The name of the R0 GetInterrupt entry point. */
1223 const char *pszGetInterruptR0;
1224 /** The name of the R0 HasPendingIrq entry point. */
1225 const char *pszHasPendingIrqR0;
1226 /** The name of the R0 SetBase entry point. */
1227 const char *pszSetBaseR0;
1228 /** The name of the R0 GetBase entry point. */
1229 const char *pszGetBaseR0;
1230 /** The name of the R0 SetTPR entry point. */
1231 const char *pszSetTPRR0;
1232 /** The name of the R0 GetTPR entry point. */
1233 const char *pszGetTPRR0;
1234 /** The name of the R0 WriteMSR entry point. */
1235 const char *pszWriteMSRR0;
1236 /** The name of the R0 ReadMSR entry point. */
1237 const char *pszReadMSRR0;
1238 /** The name of the R0 BusDeliver entry point. */
1239 const char *pszBusDeliverR0;
1240 /** The name of the R0 LocalInterrupt entry point. */
1241 const char *pszLocalInterruptR0;
1242 /** The name of the R0 GetTimerFreq entry point. */
1243 const char *pszGetTimerFreqR0;
1244} PDMAPICREG;
1245/** Pointer to an APIC registration structure. */
1246typedef PDMAPICREG *PPDMAPICREG;
1247
1248/** Current PDMAPICREG version number. */
1249#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1250
1251
1252/**
1253 * APIC version argument for pfnChangeFeature.
1254 */
1255typedef enum PDMAPICVERSION
1256{
1257 /** Invalid 0 entry. */
1258 PDMAPICVERSION_INVALID = 0,
1259 /** No APIC. */
1260 PDMAPICVERSION_NONE,
1261 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1262 PDMAPICVERSION_APIC,
1263 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1264 PDMAPICVERSION_X2APIC,
1265 /** The usual 32-bit paranoia. */
1266 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1267} PDMAPICVERSION;
1268
1269/**
1270 * APIC irq argument for SetInterruptFF.
1271 */
1272typedef enum PDMAPICIRQ
1273{
1274 /** Invalid 0 entry. */
1275 PDMAPICIRQ_INVALID = 0,
1276 /** Normal hardware interrupt. */
1277 PDMAPICIRQ_HARDWARE,
1278 /** NMI. */
1279 PDMAPICIRQ_NMI,
1280 /** SMI. */
1281 PDMAPICIRQ_SMI,
1282 /** ExtINT (HW interrupt via PIC). */
1283 PDMAPICIRQ_EXTINT,
1284 /** The usual 32-bit paranoia. */
1285 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1286} PDMAPICIRQ;
1287
1288
1289/**
1290 * APIC RC helpers.
1291 */
1292typedef struct PDMAPICHLPRC
1293{
1294 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1295 uint32_t u32Version;
1296
1297 /**
1298 * Set the interrupt force action flag.
1299 *
1300 * @param pDevIns Device instance of the APIC.
1301 * @param enmType IRQ type.
1302 * @param idCpu Virtual CPU to set flag upon.
1303 */
1304 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1305
1306 /**
1307 * Clear the interrupt force action flag.
1308 *
1309 * @param pDevIns Device instance of the APIC.
1310 * @param enmType IRQ type.
1311 * @param idCpu Virtual CPU to clear flag upon.
1312 */
1313 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1314
1315 /**
1316 * Calculates an IRQ tag for a timer, IPI or similar event.
1317 *
1318 * @returns The IRQ tag.
1319 * @param pDevIns Device instance of the APIC.
1320 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1321 */
1322 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1323
1324 /**
1325 * Modifies APIC-related bits in the CPUID feature mask.
1326 *
1327 * @param pDevIns Device instance of the APIC.
1328 * @param enmVersion Supported APIC version.
1329 */
1330 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1331
1332 /**
1333 * Acquires the PDM lock.
1334 *
1335 * @returns VINF_SUCCESS on success.
1336 * @returns rc if we failed to acquire the lock.
1337 * @param pDevIns The APIC device instance.
1338 * @param rc What to return if we fail to acquire the lock.
1339 */
1340 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1341
1342 /**
1343 * Releases the PDM lock.
1344 *
1345 * @param pDevIns The APIC device instance.
1346 */
1347 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1348
1349 /**
1350 * Get the virtual CPU id corresponding to the current EMT.
1351 *
1352 * @param pDevIns The APIC device instance.
1353 */
1354 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1355
1356 /** Just a safety precaution. */
1357 uint32_t u32TheEnd;
1358} PDMAPICHLPRC;
1359/** Pointer to APIC GC helpers. */
1360typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1361/** Pointer to const APIC helpers. */
1362typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1363
1364/** Current PDMAPICHLPRC version number. */
1365#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1366
1367
1368/**
1369 * APIC R0 helpers.
1370 */
1371typedef struct PDMAPICHLPR0
1372{
1373 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1374 uint32_t u32Version;
1375
1376 /**
1377 * Set the interrupt force action flag.
1378 *
1379 * @param pDevIns Device instance of the APIC.
1380 * @param enmType IRQ type.
1381 * @param idCpu Virtual CPU to set flag upon.
1382 */
1383 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1384
1385 /**
1386 * Clear the interrupt force action flag.
1387 *
1388 * @param pDevIns Device instance of the APIC.
1389 * @param enmType IRQ type.
1390 * @param idCpu Virtual CPU to clear flag upon.
1391 */
1392 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1393
1394 /**
1395 * Calculates an IRQ tag for a timer, IPI or similar event.
1396 *
1397 * @returns The IRQ tag.
1398 * @param pDevIns Device instance of the APIC.
1399 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1400 */
1401 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1402
1403 /**
1404 * Modifies APIC-related bits in the CPUID feature mask.
1405 *
1406 * @param pDevIns Device instance of the APIC.
1407 * @param enmVersion Supported APIC version.
1408 */
1409 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1410
1411 /**
1412 * Acquires the PDM lock.
1413 *
1414 * @returns VINF_SUCCESS on success.
1415 * @returns rc if we failed to acquire the lock.
1416 * @param pDevIns The APIC device instance.
1417 * @param rc What to return if we fail to acquire the lock.
1418 */
1419 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1420
1421 /**
1422 * Releases the PDM lock.
1423 *
1424 * @param pDevIns The APIC device instance.
1425 */
1426 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1427
1428 /**
1429 * Get the virtual CPU id corresponding to the current EMT.
1430 *
1431 * @param pDevIns The APIC device instance.
1432 */
1433 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1434
1435 /** Just a safety precaution. */
1436 uint32_t u32TheEnd;
1437} PDMAPICHLPR0;
1438/** Pointer to APIC GC helpers. */
1439typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1440/** Pointer to const APIC helpers. */
1441typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1442
1443/** Current PDMAPICHLPR0 version number. */
1444#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1445
1446/**
1447 * APIC R3 helpers.
1448 */
1449typedef struct PDMAPICHLPR3
1450{
1451 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1452 uint32_t u32Version;
1453
1454 /**
1455 * Set the interrupt force action flag.
1456 *
1457 * @param pDevIns Device instance of the APIC.
1458 * @param enmType IRQ type.
1459 * @param idCpu Virtual CPU to set flag upon.
1460 */
1461 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1462
1463 /**
1464 * Clear the interrupt force action flag.
1465 *
1466 * @param pDevIns Device instance of the APIC.
1467 * @param enmType IRQ type.
1468 * @param idCpu Virtual CPU to clear flag upon.
1469 */
1470 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1471
1472 /**
1473 * Calculates an IRQ tag for a timer, IPI or similar event.
1474 *
1475 * @returns The IRQ tag.
1476 * @param pDevIns Device instance of the APIC.
1477 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1478 */
1479 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1480
1481 /**
1482 * Modifies APIC-related bits in the CPUID feature mask.
1483 *
1484 * @param pDevIns Device instance of the APIC.
1485 * @param enmVersion Supported APIC version.
1486 */
1487 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1488
1489 /**
1490 * Get the virtual CPU id corresponding to the current EMT.
1491 *
1492 * @param pDevIns The APIC device instance.
1493 */
1494 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1495
1496 /**
1497 * Sends SIPI to given virtual CPU.
1498 *
1499 * @param pDevIns The APIC device instance.
1500 * @param idCpu Virtual CPU to perform SIPI on
1501 * @param uVector SIPI vector
1502 */
1503 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1504
1505 /**
1506 * Sends init IPI to given virtual CPU, should result in reset and
1507 * halting till SIPI.
1508 *
1509 * @param pDevIns The APIC device instance.
1510 * @param idCpu Virtual CPU to perform SIPI on
1511 */
1512 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1513
1514 /**
1515 * Gets the address of the RC APIC helpers.
1516 *
1517 * This should be called at both construction and relocation time
1518 * to obtain the correct address of the RC helpers.
1519 *
1520 * @returns GC pointer to the APIC helpers.
1521 * @param pDevIns Device instance of the APIC.
1522 */
1523 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1524
1525 /**
1526 * Gets the address of the R0 APIC helpers.
1527 *
1528 * This should be called at both construction and relocation time
1529 * to obtain the correct address of the R0 helpers.
1530 *
1531 * @returns R0 pointer to the APIC helpers.
1532 * @param pDevIns Device instance of the APIC.
1533 */
1534 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1535
1536 /**
1537 * Get the critical section used to synchronize the PICs, PCI and stuff.
1538 *
1539 * @returns Ring-3 pointer to the critical section.
1540 * @param pDevIns The APIC device instance.
1541 */
1542 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1543
1544 /**
1545 * Get the critical section used to synchronize the PICs, PCI and stuff.
1546 *
1547 * @returns Raw-mode context pointer to the critical section.
1548 * @param pDevIns The APIC device instance.
1549 */
1550 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1551
1552 /**
1553 * Get the critical section used to synchronize the PICs, PCI and stuff.
1554 *
1555 * @returns Ring-0 pointer to the critical section.
1556 * @param pDevIns The APIC device instance.
1557 */
1558 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1559
1560 /** Just a safety precaution. */
1561 uint32_t u32TheEnd;
1562} PDMAPICHLPR3;
1563/** Pointer to APIC helpers. */
1564typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1565/** Pointer to const APIC helpers. */
1566typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1567
1568/** Current PDMAPICHLP version number. */
1569#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1570
1571
1572/**
1573 * I/O APIC registration structure.
1574 */
1575typedef struct PDMIOAPICREG
1576{
1577 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1578 uint32_t u32Version;
1579
1580 /**
1581 * Set the an IRQ.
1582 *
1583 * @param pDevIns Device instance of the I/O APIC.
1584 * @param iIrq IRQ number to set.
1585 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1586 * @param uTagSrc The IRQ tag and source (for tracing).
1587 * @remarks Caller enters the PDM critical section
1588 */
1589 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1590
1591 /** The name of the RC SetIrq entry point. */
1592 const char *pszSetIrqRC;
1593
1594 /** The name of the R0 SetIrq entry point. */
1595 const char *pszSetIrqR0;
1596
1597 /**
1598 * Send a MSI.
1599 *
1600 * @param pDevIns Device instance of the I/O APIC.
1601 * @param GCPhys Request address.
1602 * @param uValue Request value.
1603 * @param uTagSrc The IRQ tag and source (for tracing).
1604 * @remarks Caller enters the PDM critical section
1605 */
1606 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1607
1608 /** The name of the RC SendMsi entry point. */
1609 const char *pszSendMsiRC;
1610
1611 /** The name of the R0 SendMsi entry point. */
1612 const char *pszSendMsiR0;
1613} PDMIOAPICREG;
1614/** Pointer to an APIC registration structure. */
1615typedef PDMIOAPICREG *PPDMIOAPICREG;
1616
1617/** Current PDMAPICREG version number. */
1618#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1619
1620
1621/**
1622 * IOAPIC RC helpers.
1623 */
1624typedef struct PDMIOAPICHLPRC
1625{
1626 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1627 uint32_t u32Version;
1628
1629 /**
1630 * Private interface between the IOAPIC and APIC.
1631 *
1632 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1633 *
1634 * @returns status code.
1635 * @param pDevIns Device instance of the IOAPIC.
1636 * @param u8Dest See APIC implementation.
1637 * @param u8DestMode See APIC implementation.
1638 * @param u8DeliveryMode See APIC implementation.
1639 * @param iVector See APIC implementation.
1640 * @param u8Polarity See APIC implementation.
1641 * @param u8TriggerMode See APIC implementation.
1642 * @param uTagSrc The IRQ tag and source (for tracing).
1643 */
1644 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1645 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1646
1647 /**
1648 * Acquires the PDM lock.
1649 *
1650 * @returns VINF_SUCCESS on success.
1651 * @returns rc if we failed to acquire the lock.
1652 * @param pDevIns The IOAPIC device instance.
1653 * @param rc What to return if we fail to acquire the lock.
1654 */
1655 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1656
1657 /**
1658 * Releases the PDM lock.
1659 *
1660 * @param pDevIns The IOAPIC device instance.
1661 */
1662 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1663
1664 /** Just a safety precaution. */
1665 uint32_t u32TheEnd;
1666} PDMIOAPICHLPRC;
1667/** Pointer to IOAPIC RC helpers. */
1668typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1669/** Pointer to const IOAPIC helpers. */
1670typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1671
1672/** Current PDMIOAPICHLPRC version number. */
1673#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1674
1675
1676/**
1677 * IOAPIC R0 helpers.
1678 */
1679typedef struct PDMIOAPICHLPR0
1680{
1681 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1682 uint32_t u32Version;
1683
1684 /**
1685 * Private interface between the IOAPIC and APIC.
1686 *
1687 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1688 *
1689 * @returns status code.
1690 * @param pDevIns Device instance of the IOAPIC.
1691 * @param u8Dest See APIC implementation.
1692 * @param u8DestMode See APIC implementation.
1693 * @param u8DeliveryMode See APIC implementation.
1694 * @param iVector See APIC implementation.
1695 * @param u8Polarity See APIC implementation.
1696 * @param u8TriggerMode See APIC implementation.
1697 * @param uTagSrc The IRQ tag and source (for tracing).
1698 */
1699 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1700 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1701
1702 /**
1703 * Acquires the PDM lock.
1704 *
1705 * @returns VINF_SUCCESS on success.
1706 * @returns rc if we failed to acquire the lock.
1707 * @param pDevIns The IOAPIC device instance.
1708 * @param rc What to return if we fail to acquire the lock.
1709 */
1710 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1711
1712 /**
1713 * Releases the PDM lock.
1714 *
1715 * @param pDevIns The IOAPIC device instance.
1716 */
1717 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1718
1719 /** Just a safety precaution. */
1720 uint32_t u32TheEnd;
1721} PDMIOAPICHLPR0;
1722/** Pointer to IOAPIC R0 helpers. */
1723typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1724/** Pointer to const IOAPIC helpers. */
1725typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1726
1727/** Current PDMIOAPICHLPR0 version number. */
1728#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1729
1730/**
1731 * IOAPIC R3 helpers.
1732 */
1733typedef struct PDMIOAPICHLPR3
1734{
1735 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1736 uint32_t u32Version;
1737
1738 /**
1739 * Private interface between the IOAPIC and APIC.
1740 *
1741 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1742 *
1743 * @returns status code
1744 * @param pDevIns Device instance of the IOAPIC.
1745 * @param u8Dest See APIC implementation.
1746 * @param u8DestMode See APIC implementation.
1747 * @param u8DeliveryMode See APIC implementation.
1748 * @param iVector See APIC implementation.
1749 * @param u8Polarity See APIC implementation.
1750 * @param u8TriggerMode See APIC implementation.
1751 * @param uTagSrc The IRQ tag and source (for tracing).
1752 */
1753 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1754 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1755
1756 /**
1757 * Acquires the PDM lock.
1758 *
1759 * @returns VINF_SUCCESS on success.
1760 * @returns Fatal error on failure.
1761 * @param pDevIns The IOAPIC device instance.
1762 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1763 */
1764 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1765
1766 /**
1767 * Releases the PDM lock.
1768 *
1769 * @param pDevIns The IOAPIC device instance.
1770 */
1771 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1772
1773 /**
1774 * Gets the address of the RC IOAPIC helpers.
1775 *
1776 * This should be called at both construction and relocation time
1777 * to obtain the correct address of the RC helpers.
1778 *
1779 * @returns RC pointer to the IOAPIC helpers.
1780 * @param pDevIns Device instance of the IOAPIC.
1781 */
1782 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1783
1784 /**
1785 * Gets the address of the R0 IOAPIC helpers.
1786 *
1787 * This should be called at both construction and relocation time
1788 * to obtain the correct address of the R0 helpers.
1789 *
1790 * @returns R0 pointer to the IOAPIC helpers.
1791 * @param pDevIns Device instance of the IOAPIC.
1792 */
1793 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1794
1795 /** Just a safety precaution. */
1796 uint32_t u32TheEnd;
1797} PDMIOAPICHLPR3;
1798/** Pointer to IOAPIC R3 helpers. */
1799typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1800/** Pointer to const IOAPIC helpers. */
1801typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1802
1803/** Current PDMIOAPICHLPR3 version number. */
1804#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1805
1806
1807/**
1808 * HPET registration structure.
1809 */
1810typedef struct PDMHPETREG
1811{
1812 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1813 uint32_t u32Version;
1814
1815} PDMHPETREG;
1816/** Pointer to an HPET registration structure. */
1817typedef PDMHPETREG *PPDMHPETREG;
1818
1819/** Current PDMHPETREG version number. */
1820#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1821
1822/**
1823 * HPET RC helpers.
1824 *
1825 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1826 * at some later point.
1827 */
1828typedef struct PDMHPETHLPRC
1829{
1830 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1831 uint32_t u32Version;
1832
1833 /** Just a safety precaution. */
1834 uint32_t u32TheEnd;
1835} PDMHPETHLPRC;
1836
1837/** Pointer to HPET RC helpers. */
1838typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1839/** Pointer to const HPET RC helpers. */
1840typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1841
1842/** Current PDMHPETHLPRC version number. */
1843#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1844
1845
1846/**
1847 * HPET R0 helpers.
1848 *
1849 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1850 * at some later point.
1851 */
1852typedef struct PDMHPETHLPR0
1853{
1854 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1855 uint32_t u32Version;
1856
1857 /** Just a safety precaution. */
1858 uint32_t u32TheEnd;
1859} PDMHPETHLPR0;
1860
1861/** Pointer to HPET R0 helpers. */
1862typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1863/** Pointer to const HPET R0 helpers. */
1864typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1865
1866/** Current PDMHPETHLPR0 version number. */
1867#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1868
1869/**
1870 * HPET R3 helpers.
1871 */
1872typedef struct PDMHPETHLPR3
1873{
1874 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1875 uint32_t u32Version;
1876
1877 /**
1878 * Gets the address of the RC HPET helpers.
1879 *
1880 * This should be called at both construction and relocation time
1881 * to obtain the correct address of the RC helpers.
1882 *
1883 * @returns RC pointer to the HPET helpers.
1884 * @param pDevIns Device instance of the HPET.
1885 */
1886 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1887
1888 /**
1889 * Gets the address of the R0 HPET helpers.
1890 *
1891 * This should be called at both construction and relocation time
1892 * to obtain the correct address of the R0 helpers.
1893 *
1894 * @returns R0 pointer to the HPET helpers.
1895 * @param pDevIns Device instance of the HPET.
1896 */
1897 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1898
1899 /**
1900 * Set legacy mode on PIT and RTC.
1901 *
1902 * @returns VINF_SUCCESS on success.
1903 * @returns rc if we failed to set legacy mode.
1904 * @param pDevIns Device instance of the HPET.
1905 * @param fActivated Whether legacy mode is activated or deactivated.
1906 */
1907 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1908
1909
1910 /**
1911 * Set IRQ, bypassing ISA bus override rules.
1912 *
1913 * @returns VINF_SUCCESS on success.
1914 * @returns rc if we failed to set legacy mode.
1915 * @param pDevIns Device instance of the HPET.
1916 * @param iIrq IRQ number to set.
1917 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1918 */
1919 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1920
1921 /** Just a safety precaution. */
1922 uint32_t u32TheEnd;
1923} PDMHPETHLPR3;
1924
1925/** Pointer to HPET R3 helpers. */
1926typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1927/** Pointer to const HPET R3 helpers. */
1928typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1929
1930/** Current PDMHPETHLPR3 version number. */
1931#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1932
1933
1934/**
1935 * Raw PCI device registration structure.
1936 */
1937typedef struct PDMPCIRAWREG
1938{
1939 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1940 uint32_t u32Version;
1941 /** Just a safety precaution. */
1942 uint32_t u32TheEnd;
1943} PDMPCIRAWREG;
1944/** Pointer to a raw PCI registration structure. */
1945typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1946
1947/** Current PDMPCIRAWREG version number. */
1948#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1949
1950/**
1951 * Raw PCI device raw-mode context helpers.
1952 */
1953typedef struct PDMPCIRAWHLPRC
1954{
1955 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1956 uint32_t u32Version;
1957 /** Just a safety precaution. */
1958 uint32_t u32TheEnd;
1959} PDMPCIRAWHLPRC;
1960/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1961typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1962/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1963typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1964
1965/** Current PDMPCIRAWHLPRC version number. */
1966#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1967
1968/**
1969 * Raw PCI device ring-0 context helpers.
1970 */
1971typedef struct PDMPCIRAWHLPR0
1972{
1973 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1974 uint32_t u32Version;
1975 /** Just a safety precaution. */
1976 uint32_t u32TheEnd;
1977} PDMPCIRAWHLPR0;
1978/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1979typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1980/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1981typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1982
1983/** Current PDMPCIRAWHLPR0 version number. */
1984#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1985
1986
1987/**
1988 * Raw PCI device ring-3 context helpers.
1989 */
1990typedef struct PDMPCIRAWHLPR3
1991{
1992 /** Undefined structure version and magic number. */
1993 uint32_t u32Version;
1994
1995 /**
1996 * Gets the address of the RC raw PCI device helpers.
1997 *
1998 * This should be called at both construction and relocation time to obtain
1999 * the correct address of the RC helpers.
2000 *
2001 * @returns RC pointer to the raw PCI device helpers.
2002 * @param pDevIns Device instance of the raw PCI device.
2003 */
2004 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2005
2006 /**
2007 * Gets the address of the R0 raw PCI device helpers.
2008 *
2009 * This should be called at both construction and relocation time to obtain
2010 * the correct address of the R0 helpers.
2011 *
2012 * @returns R0 pointer to the raw PCI device helpers.
2013 * @param pDevIns Device instance of the raw PCI device.
2014 */
2015 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2016
2017 /** Just a safety precaution. */
2018 uint32_t u32TheEnd;
2019} PDMPCIRAWHLPR3;
2020/** Pointer to raw PCI R3 helpers. */
2021typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2022/** Pointer to const raw PCI R3 helpers. */
2023typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2024
2025/** Current PDMPCIRAWHLPR3 version number. */
2026#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2027
2028
2029#ifdef IN_RING3
2030
2031/**
2032 * DMA Transfer Handler.
2033 *
2034 * @returns Number of bytes transferred.
2035 * @param pDevIns Device instance of the DMA.
2036 * @param pvUser User pointer.
2037 * @param uChannel Channel number.
2038 * @param off DMA position.
2039 * @param cb Block size.
2040 * @remarks The device lock is not taken, however, the DMA device lock is held.
2041 */
2042typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2043/** Pointer to a FNDMATRANSFERHANDLER(). */
2044typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2045
2046/**
2047 * DMA Controller registration structure.
2048 */
2049typedef struct PDMDMAREG
2050{
2051 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2052 uint32_t u32Version;
2053
2054 /**
2055 * Execute pending transfers.
2056 *
2057 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2058 * @param pDevIns Device instance of the DMAC.
2059 * @remarks No locks held, called on EMT(0) as a form of serialization.
2060 */
2061 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2062
2063 /**
2064 * Register transfer function for DMA channel.
2065 *
2066 * @param pDevIns Device instance of the DMAC.
2067 * @param uChannel Channel number.
2068 * @param pfnTransferHandler Device specific transfer function.
2069 * @param pvUSer User pointer to be passed to the callback.
2070 * @remarks No locks held, called on an EMT.
2071 */
2072 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2073
2074 /**
2075 * Read memory
2076 *
2077 * @returns Number of bytes read.
2078 * @param pDevIns Device instance of the DMAC.
2079 * @param pvBuffer Pointer to target buffer.
2080 * @param off DMA position.
2081 * @param cbBlock Block size.
2082 * @remarks No locks held, called on an EMT.
2083 */
2084 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2085
2086 /**
2087 * Write memory
2088 *
2089 * @returns Number of bytes written.
2090 * @param pDevIns Device instance of the DMAC.
2091 * @param pvBuffer Memory to write.
2092 * @param off DMA position.
2093 * @param cbBlock Block size.
2094 * @remarks No locks held, called on an EMT.
2095 */
2096 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2097
2098 /**
2099 * Set the DREQ line.
2100 *
2101 * @param pDevIns Device instance of the DMAC.
2102 * @param uChannel Channel number.
2103 * @param uLevel Level of the line.
2104 * @remarks No locks held, called on an EMT.
2105 */
2106 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2107
2108 /**
2109 * Get channel mode
2110 *
2111 * @returns Channel mode.
2112 * @param pDevIns Device instance of the DMAC.
2113 * @param uChannel Channel number.
2114 * @remarks No locks held, called on an EMT.
2115 */
2116 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2117
2118} PDMDMACREG;
2119/** Pointer to a DMAC registration structure. */
2120typedef PDMDMACREG *PPDMDMACREG;
2121
2122/** Current PDMDMACREG version number. */
2123#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2124
2125
2126/**
2127 * DMA Controller device helpers.
2128 */
2129typedef struct PDMDMACHLP
2130{
2131 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2132 uint32_t u32Version;
2133
2134 /* to-be-defined */
2135
2136} PDMDMACHLP;
2137/** Pointer to DMAC helpers. */
2138typedef PDMDMACHLP *PPDMDMACHLP;
2139/** Pointer to const DMAC helpers. */
2140typedef const PDMDMACHLP *PCPDMDMACHLP;
2141
2142/** Current PDMDMACHLP version number. */
2143#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2144
2145#endif /* IN_RING3 */
2146
2147
2148
2149/**
2150 * RTC registration structure.
2151 */
2152typedef struct PDMRTCREG
2153{
2154 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2155 uint32_t u32Version;
2156 uint32_t u32Alignment; /**< structure size alignment. */
2157
2158 /**
2159 * Write to a CMOS register and update the checksum if necessary.
2160 *
2161 * @returns VBox status code.
2162 * @param pDevIns Device instance of the RTC.
2163 * @param iReg The CMOS register index.
2164 * @param u8Value The CMOS register value.
2165 * @remarks Caller enters the device critical section.
2166 */
2167 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2168
2169 /**
2170 * Read a CMOS register.
2171 *
2172 * @returns VBox status code.
2173 * @param pDevIns Device instance of the RTC.
2174 * @param iReg The CMOS register index.
2175 * @param pu8Value Where to store the CMOS register value.
2176 * @remarks Caller enters the device critical section.
2177 */
2178 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2179
2180} PDMRTCREG;
2181/** Pointer to a RTC registration structure. */
2182typedef PDMRTCREG *PPDMRTCREG;
2183/** Pointer to a const RTC registration structure. */
2184typedef const PDMRTCREG *PCPDMRTCREG;
2185
2186/** Current PDMRTCREG version number. */
2187#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2188
2189
2190/**
2191 * RTC device helpers.
2192 */
2193typedef struct PDMRTCHLP
2194{
2195 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2196 uint32_t u32Version;
2197
2198 /* to-be-defined */
2199
2200} PDMRTCHLP;
2201/** Pointer to RTC helpers. */
2202typedef PDMRTCHLP *PPDMRTCHLP;
2203/** Pointer to const RTC helpers. */
2204typedef const PDMRTCHLP *PCPDMRTCHLP;
2205
2206/** Current PDMRTCHLP version number. */
2207#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2208
2209
2210
2211#ifdef IN_RING3
2212
2213/**
2214 * PDM Device API.
2215 */
2216typedef struct PDMDEVHLPR3
2217{
2218 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2219 uint32_t u32Version;
2220
2221 /**
2222 * Register a number of I/O ports with a device.
2223 *
2224 * These callbacks are of course for the host context (HC).
2225 * Register HC handlers before guest context (GC) handlers! There must be a
2226 * HC handler for every GC handler!
2227 *
2228 * @returns VBox status.
2229 * @param pDevIns The device instance to register the ports with.
2230 * @param Port First port number in the range.
2231 * @param cPorts Number of ports to register.
2232 * @param pvUser User argument.
2233 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2234 * @param pfnIn Pointer to function which is gonna handle IN operations.
2235 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2236 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2237 * @param pszDesc Pointer to description string. This must not be freed.
2238 * @remarks Caller enters the device critical section prior to invoking the
2239 * registered callback methods.
2240 */
2241 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2242 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2243 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2244
2245 /**
2246 * Register a number of I/O ports with a device for RC.
2247 *
2248 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2249 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2250 * for every RC handler!
2251 *
2252 * @returns VBox status.
2253 * @param pDevIns The device instance to register the ports with
2254 * and which RC module to resolve the names
2255 * against.
2256 * @param Port First port number in the range.
2257 * @param cPorts Number of ports to register.
2258 * @param pvUser User argument.
2259 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2260 * @param pszIn Name of the RC function which is gonna handle IN operations.
2261 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2262 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2263 * @param pszDesc Pointer to description string. This must not be freed.
2264 * @remarks Caller enters the device critical section prior to invoking the
2265 * registered callback methods.
2266 */
2267 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2268 const char *pszOut, const char *pszIn,
2269 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2270
2271 /**
2272 * Register a number of I/O ports with a device.
2273 *
2274 * These callbacks are of course for the ring-0 host context (R0).
2275 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2276 *
2277 * @returns VBox status.
2278 * @param pDevIns The device instance to register the ports with.
2279 * @param Port First port number in the range.
2280 * @param cPorts Number of ports to register.
2281 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2282 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2283 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2284 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2285 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2286 * @param pszDesc Pointer to description string. This must not be freed.
2287 * @remarks Caller enters the device critical section prior to invoking the
2288 * registered callback methods.
2289 */
2290 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2291 const char *pszOut, const char *pszIn,
2292 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2293
2294 /**
2295 * Deregister I/O ports.
2296 *
2297 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2298 *
2299 * @returns VBox status.
2300 * @param pDevIns The device instance owning the ports.
2301 * @param Port First port number in the range.
2302 * @param cPorts Number of ports to deregister.
2303 */
2304 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2305
2306 /**
2307 * Register a Memory Mapped I/O (MMIO) region.
2308 *
2309 * These callbacks are of course for the ring-3 context (R3). Register HC
2310 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2311 * must be a R3 handler for every RC and R0 handler!
2312 *
2313 * @returns VBox status.
2314 * @param pDevIns The device instance to register the MMIO with.
2315 * @param GCPhysStart First physical address in the range.
2316 * @param cbRange The size of the range (in bytes).
2317 * @param pvUser User argument.
2318 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2319 * @param pfnRead Pointer to function which is gonna handle Read operations.
2320 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2321 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2322 * @param pszDesc Pointer to description string. This must not be freed.
2323 * @remarks Caller enters the device critical section prior to invoking the
2324 * registered callback methods.
2325 */
2326 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2327 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2328 uint32_t fFlags, const char *pszDesc));
2329
2330 /**
2331 * Register a Memory Mapped I/O (MMIO) region for RC.
2332 *
2333 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2334 * (R3) handlers before guest context handlers! There must be a R3 handler for
2335 * every RC handler!
2336 *
2337 * @returns VBox status.
2338 * @param pDevIns The device instance to register the MMIO with.
2339 * @param GCPhysStart First physical address in the range.
2340 * @param cbRange The size of the range (in bytes).
2341 * @param pvUser User argument.
2342 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2343 * @param pszRead Name of the RC function which is gonna handle Read operations.
2344 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2345 * @remarks Caller enters the device critical section prior to invoking the
2346 * registered callback methods.
2347 */
2348 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2349 const char *pszWrite, const char *pszRead, const char *pszFill));
2350
2351 /**
2352 * Register a Memory Mapped I/O (MMIO) region for R0.
2353 *
2354 * These callbacks are for the ring-0 host context (R0). Register ring-3
2355 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2356 * every R0 handler!
2357 *
2358 * @returns VBox status.
2359 * @param pDevIns The device instance to register the MMIO with.
2360 * @param GCPhysStart First physical address in the range.
2361 * @param cbRange The size of the range (in bytes).
2362 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2363 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2364 * @param pszRead Name of the RC function which is gonna handle Read operations.
2365 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2366 * @remarks Caller enters the device critical section prior to invoking the
2367 * registered callback methods.
2368 */
2369 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2370 const char *pszWrite, const char *pszRead, const char *pszFill));
2371
2372 /**
2373 * Deregister a Memory Mapped I/O (MMIO) region.
2374 *
2375 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2376 *
2377 * @returns VBox status.
2378 * @param pDevIns The device instance owning the MMIO region(s).
2379 * @param GCPhysStart First physical address in the range.
2380 * @param cbRange The size of the range (in bytes).
2381 */
2382 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2383
2384 /**
2385 * Allocate and register a MMIO2 region.
2386 *
2387 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2388 * RAM associated with a device. It is also non-shared memory with a
2389 * permanent ring-3 mapping and page backing (presently).
2390 *
2391 * @returns VBox status.
2392 * @param pDevIns The device instance.
2393 * @param iRegion The region number. Use the PCI region number as
2394 * this must be known to the PCI bus device too. If
2395 * it's not associated with the PCI device, then
2396 * any number up to UINT8_MAX is fine.
2397 * @param cb The size (in bytes) of the region.
2398 * @param fFlags Reserved for future use, must be zero.
2399 * @param ppv Where to store the address of the ring-3 mapping
2400 * of the memory.
2401 * @param pszDesc Pointer to description string. This must not be
2402 * freed.
2403 * @thread EMT.
2404 */
2405 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2406
2407 /**
2408 * Deregisters and frees a MMIO2 region.
2409 *
2410 * Any physical (and virtual) access handlers registered for the region must
2411 * be deregistered before calling this function.
2412 *
2413 * @returns VBox status code.
2414 * @param pDevIns The device instance.
2415 * @param iRegion The region number used during registration.
2416 * @thread EMT.
2417 */
2418 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2419
2420 /**
2421 * Maps a MMIO2 region into the physical memory space.
2422 *
2423 * A MMIO2 range may overlap with base memory if a lot of RAM
2424 * is configured for the VM, in which case we'll drop the base
2425 * memory pages. Presently we will make no attempt to preserve
2426 * anything that happens to be present in the base memory that
2427 * is replaced, this is of course incorrect but it's too much
2428 * effort.
2429 *
2430 * @returns VBox status code.
2431 * @param pDevIns The device instance.
2432 * @param iRegion The region number used during registration.
2433 * @param GCPhys The physical address to map it at.
2434 * @thread EMT.
2435 */
2436 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2437
2438 /**
2439 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2440 *
2441 * @returns VBox status code.
2442 * @param pDevIns The device instance.
2443 * @param iRegion The region number used during registration.
2444 * @param GCPhys The physical address it's currently mapped at.
2445 * @thread EMT.
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2448
2449 /**
2450 * Maps a portion of an MMIO2 region into the hypervisor region.
2451 *
2452 * Callers of this API must never deregister the MMIO2 region before the
2453 * VM is powered off.
2454 *
2455 * @return VBox status code.
2456 * @param pDevIns The device owning the MMIO2 memory.
2457 * @param iRegion The region.
2458 * @param off The offset into the region. Will be rounded down
2459 * to closest page boundary.
2460 * @param cb The number of bytes to map. Will be rounded up
2461 * to the closest page boundary.
2462 * @param pszDesc Mapping description.
2463 * @param pRCPtr Where to store the RC address.
2464 */
2465 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2466 const char *pszDesc, PRTRCPTR pRCPtr));
2467
2468 /**
2469 * Maps a portion of an MMIO2 region into kernel space (host).
2470 *
2471 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2472 * or the VM is terminated.
2473 *
2474 * @return VBox status code.
2475 * @param pDevIns The device owning the MMIO2 memory.
2476 * @param iRegion The region.
2477 * @param off The offset into the region. Must be page
2478 * aligned.
2479 * @param cb The number of bytes to map. Must be page
2480 * aligned.
2481 * @param pszDesc Mapping description.
2482 * @param pR0Ptr Where to store the R0 address.
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2485 const char *pszDesc, PRTR0PTR pR0Ptr));
2486
2487 /**
2488 * Register a ROM (BIOS) region.
2489 *
2490 * It goes without saying that this is read-only memory. The memory region must be
2491 * in unassigned memory. I.e. from the top of the address space or on the PC in
2492 * the 0xa0000-0xfffff range.
2493 *
2494 * @returns VBox status.
2495 * @param pDevIns The device instance owning the ROM region.
2496 * @param GCPhysStart First physical address in the range.
2497 * Must be page aligned!
2498 * @param cbRange The size of the range (in bytes).
2499 * Must be page aligned!
2500 * @param pvBinary Pointer to the binary data backing the ROM image.
2501 * @param cbBinary The size of the binary pointer. This must
2502 * be equal or smaller than @a cbRange.
2503 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2504 * @param pszDesc Pointer to description string. This must not be freed.
2505 *
2506 * @remark There is no way to remove the rom, automatically on device cleanup or
2507 * manually from the device yet. At present I doubt we need such features...
2508 */
2509 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2510 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2511
2512 /**
2513 * Changes the protection of shadowed ROM mapping.
2514 *
2515 * This is intented for use by the system BIOS, chipset or device in question to
2516 * change the protection of shadowed ROM code after init and on reset.
2517 *
2518 * @param pDevIns The device instance.
2519 * @param GCPhysStart Where the mapping starts.
2520 * @param cbRange The size of the mapping.
2521 * @param enmProt The new protection type.
2522 */
2523 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2524
2525 /**
2526 * Register a save state data unit.
2527 *
2528 * @returns VBox status.
2529 * @param pDevIns The device instance.
2530 * @param uVersion Data layout version number.
2531 * @param cbGuess The approximate amount of data in the unit.
2532 * Only for progress indicators.
2533 * @param pszBefore Name of data unit which we should be put in
2534 * front of. Optional (NULL).
2535 *
2536 * @param pfnLivePrep Prepare live save callback, optional.
2537 * @param pfnLiveExec Execute live save callback, optional.
2538 * @param pfnLiveVote Vote live save callback, optional.
2539 *
2540 * @param pfnSavePrep Prepare save callback, optional.
2541 * @param pfnSaveExec Execute save callback, optional.
2542 * @param pfnSaveDone Done save callback, optional.
2543 *
2544 * @param pfnLoadPrep Prepare load callback, optional.
2545 * @param pfnLoadExec Execute load callback, optional.
2546 * @param pfnLoadDone Done load callback, optional.
2547 * @remarks Caller enters the device critical section prior to invoking the
2548 * registered callback methods.
2549 */
2550 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2551 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2552 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2553 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2554
2555 /**
2556 * Creates a timer.
2557 *
2558 * @returns VBox status.
2559 * @param pDevIns The device instance.
2560 * @param enmClock The clock to use on this timer.
2561 * @param pfnCallback Callback function.
2562 * @param pvUser User argument for the callback.
2563 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2564 * @param pszDesc Pointer to description string which must stay around
2565 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2566 * @param ppTimer Where to store the timer on success.
2567 * @remarks Caller enters the device critical section prior to invoking the
2568 * callback.
2569 */
2570 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback,
2571 void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2572
2573 /**
2574 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2575 *
2576 * @returns pTime.
2577 * @param pDevIns The device instance.
2578 * @param pTime Where to store the time.
2579 */
2580 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2581
2582 /**
2583 * Read physical memory.
2584 *
2585 * @returns VINF_SUCCESS (for now).
2586 * @param pDevIns The device instance.
2587 * @param GCPhys Physical address start reading from.
2588 * @param pvBuf Where to put the read bits.
2589 * @param cbRead How many bytes to read.
2590 * @thread Any thread, but the call may involve the emulation thread.
2591 */
2592 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2593
2594 /**
2595 * Write to physical memory.
2596 *
2597 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2598 * @param pDevIns The device instance.
2599 * @param GCPhys Physical address to write to.
2600 * @param pvBuf What to write.
2601 * @param cbWrite How many bytes to write.
2602 * @thread Any thread, but the call may involve the emulation thread.
2603 */
2604 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2605
2606 /**
2607 * Requests the mapping of a guest page into ring-3.
2608 *
2609 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2610 * release it.
2611 *
2612 * This API will assume your intention is to write to the page, and will
2613 * therefore replace shared and zero pages. If you do not intend to modify the
2614 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2615 *
2616 * @returns VBox status code.
2617 * @retval VINF_SUCCESS on success.
2618 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2619 * backing or if the page has any active access handlers. The caller
2620 * must fall back on using PGMR3PhysWriteExternal.
2621 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2622 *
2623 * @param pDevIns The device instance.
2624 * @param GCPhys The guest physical address of the page that
2625 * should be mapped.
2626 * @param fFlags Flags reserved for future use, MBZ.
2627 * @param ppv Where to store the address corresponding to
2628 * GCPhys.
2629 * @param pLock Where to store the lock information that
2630 * pfnPhysReleasePageMappingLock needs.
2631 *
2632 * @remark Avoid calling this API from within critical sections (other than the
2633 * PGM one) because of the deadlock risk when we have to delegating the
2634 * task to an EMT.
2635 * @thread Any.
2636 */
2637 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv,
2638 PPGMPAGEMAPLOCK pLock));
2639
2640 /**
2641 * Requests the mapping of a guest page into ring-3, external threads.
2642 *
2643 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2644 * release it.
2645 *
2646 * @returns VBox status code.
2647 * @retval VINF_SUCCESS on success.
2648 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2649 * backing or if the page as an active ALL access handler. The caller
2650 * must fall back on using PGMPhysRead.
2651 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2652 *
2653 * @param pDevIns The device instance.
2654 * @param GCPhys The guest physical address of the page that
2655 * should be mapped.
2656 * @param fFlags Flags reserved for future use, MBZ.
2657 * @param ppv Where to store the address corresponding to
2658 * GCPhys.
2659 * @param pLock Where to store the lock information that
2660 * pfnPhysReleasePageMappingLock needs.
2661 *
2662 * @remark Avoid calling this API from within critical sections.
2663 * @thread Any.
2664 */
2665 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags,
2666 void const **ppv, PPGMPAGEMAPLOCK pLock));
2667
2668 /**
2669 * Release the mapping of a guest page.
2670 *
2671 * This is the counter part of pfnPhysGCPhys2CCPtr and
2672 * pfnPhysGCPhys2CCPtrReadOnly.
2673 *
2674 * @param pDevIns The device instance.
2675 * @param pLock The lock structure initialized by the mapping
2676 * function.
2677 */
2678 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2679
2680 /**
2681 * Read guest physical memory by virtual address.
2682 *
2683 * @param pDevIns The device instance.
2684 * @param pvDst Where to put the read bits.
2685 * @param GCVirtSrc Guest virtual address to start reading from.
2686 * @param cb How many bytes to read.
2687 * @thread The emulation thread.
2688 */
2689 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2690
2691 /**
2692 * Write to guest physical memory by virtual address.
2693 *
2694 * @param pDevIns The device instance.
2695 * @param GCVirtDst Guest virtual address to write to.
2696 * @param pvSrc What to write.
2697 * @param cb How many bytes to write.
2698 * @thread The emulation thread.
2699 */
2700 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2701
2702 /**
2703 * Convert a guest virtual address to a guest physical address.
2704 *
2705 * @returns VBox status code.
2706 * @param pDevIns The device instance.
2707 * @param GCPtr Guest virtual address.
2708 * @param pGCPhys Where to store the GC physical address
2709 * corresponding to GCPtr.
2710 * @thread The emulation thread.
2711 * @remark Careful with page boundaries.
2712 */
2713 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2714
2715 /**
2716 * Allocate memory which is associated with current VM instance
2717 * and automatically freed on it's destruction.
2718 *
2719 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2720 * @param pDevIns The device instance.
2721 * @param cb Number of bytes to allocate.
2722 */
2723 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2724
2725 /**
2726 * Allocate memory which is associated with current VM instance
2727 * and automatically freed on it's destruction. The memory is ZEROed.
2728 *
2729 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2730 * @param pDevIns The device instance.
2731 * @param cb Number of bytes to allocate.
2732 */
2733 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2734
2735 /**
2736 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2737 *
2738 * @param pDevIns The device instance.
2739 * @param pv Pointer to the memory to free.
2740 */
2741 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2742
2743 /**
2744 * Gets the VM state.
2745 *
2746 * @returns VM state.
2747 * @param pDevIns The device instance.
2748 * @thread Any thread (just keep in mind that it's volatile info).
2749 */
2750 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2751
2752 /**
2753 * Checks if the VM was teleported and hasn't been fully resumed yet.
2754 *
2755 * @returns true / false.
2756 * @param pDevIns The device instance.
2757 * @thread Any thread.
2758 */
2759 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2760
2761 /**
2762 * Set the VM error message
2763 *
2764 * @returns rc.
2765 * @param pDevIns The device instance.
2766 * @param rc VBox status code.
2767 * @param SRC_POS Use RT_SRC_POS.
2768 * @param pszFormat Error message format string.
2769 * @param ... Error message arguments.
2770 */
2771 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2772 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
2773
2774 /**
2775 * Set the VM error message
2776 *
2777 * @returns rc.
2778 * @param pDevIns The device instance.
2779 * @param rc VBox status code.
2780 * @param SRC_POS Use RT_SRC_POS.
2781 * @param pszFormat Error message format string.
2782 * @param va Error message arguments.
2783 */
2784 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2785 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2786
2787 /**
2788 * Set the VM runtime error message
2789 *
2790 * @returns VBox status code.
2791 * @param pDevIns The device instance.
2792 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2793 * @param pszErrorId Error ID string.
2794 * @param pszFormat Error message format string.
2795 * @param ... Error message arguments.
2796 */
2797 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2798 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
2799
2800 /**
2801 * Set the VM runtime error message
2802 *
2803 * @returns VBox status code.
2804 * @param pDevIns The device instance.
2805 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2806 * @param pszErrorId Error ID string.
2807 * @param pszFormat Error message format string.
2808 * @param va Error message arguments.
2809 */
2810 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2811 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
2812
2813 /**
2814 * Stops the VM and enters the debugger to look at the guest state.
2815 *
2816 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2817 * invoking this function directly.
2818 *
2819 * @returns VBox status code which must be passed up to the VMM.
2820 * @param pDevIns The device instance.
2821 * @param pszFile Filename of the assertion location.
2822 * @param iLine The linenumber of the assertion location.
2823 * @param pszFunction Function of the assertion location.
2824 * @param pszFormat Message. (optional)
2825 * @param args Message parameters.
2826 */
2827 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction,
2828 const char *pszFormat, va_list args) RT_IPRT_FORMAT_ATTR(5, 0));
2829
2830 /**
2831 * Register a info handler with DBGF,
2832 *
2833 * @returns VBox status code.
2834 * @param pDevIns The device instance.
2835 * @param pszName The identifier of the info.
2836 * @param pszDesc The description of the info and any arguments
2837 * the handler may take.
2838 * @param pfnHandler The handler function to be called to display the
2839 * info.
2840 */
2841 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2842
2843 /**
2844 * Registers a set of registers for a device.
2845 *
2846 * The @a pvUser argument of the getter and setter callbacks will be
2847 * @a pDevIns. The register names will be prefixed by the device name followed
2848 * immediately by the instance number.
2849 *
2850 * @returns VBox status code.
2851 * @param pDevIns The device instance.
2852 * @param paRegisters The register descriptors.
2853 *
2854 * @remarks The device critical section is NOT entered prior to working the
2855 * callbacks registered via this helper!
2856 */
2857 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2858
2859 /**
2860 * Gets the trace buffer handle.
2861 *
2862 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2863 * really inteded for direct usage, thus no inline wrapper function.
2864 *
2865 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2866 * @param pDevIns The device instance.
2867 */
2868 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2869
2870 /**
2871 * Registers a statistics sample if statistics are enabled.
2872 *
2873 * @param pDevIns Device instance of the DMA.
2874 * @param pvSample Pointer to the sample.
2875 * @param enmType Sample type. This indicates what pvSample is
2876 * pointing at.
2877 * @param pszName Sample name. The name is on this form
2878 * "/<component>/<sample>". Further nesting is
2879 * possible.
2880 * @param enmUnit Sample unit.
2881 * @param pszDesc Sample description.
2882 */
2883 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2884
2885 /**
2886 * Same as pfnSTAMRegister except that the name is specified in a
2887 * RTStrPrintf like fashion.
2888 *
2889 * @returns VBox status.
2890 * @param pDevIns Device instance of the DMA.
2891 * @param pvSample Pointer to the sample.
2892 * @param enmType Sample type. This indicates what pvSample is
2893 * pointing at.
2894 * @param enmVisibility Visibility type specifying whether unused
2895 * statistics should be visible or not.
2896 * @param enmUnit Sample unit.
2897 * @param pszDesc Sample description.
2898 * @param pszName The sample name format string.
2899 * @param ... Arguments to the format string.
2900 */
2901 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2902 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2903 const char *pszName, ...) RT_IPRT_FORMAT_ATTR(7, 8));
2904
2905 /**
2906 * Same as pfnSTAMRegister except that the name is specified in a
2907 * RTStrPrintfV like fashion.
2908 *
2909 * @returns VBox status.
2910 * @param pDevIns Device instance of the DMA.
2911 * @param pvSample Pointer to the sample.
2912 * @param enmType Sample type. This indicates what pvSample is
2913 * pointing at.
2914 * @param enmVisibility Visibility type specifying whether unused
2915 * statistics should be visible or not.
2916 * @param enmUnit Sample unit.
2917 * @param pszDesc Sample description.
2918 * @param pszName The sample name format string.
2919 * @param args Arguments to the format string.
2920 */
2921 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2922 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2923 const char *pszName, va_list args) RT_IPRT_FORMAT_ATTR(7, 0));
2924
2925 /**
2926 * Registers the device with the default PCI bus.
2927 *
2928 * @returns VBox status code.
2929 * @param pDevIns The device instance.
2930 * @param pPciDev The PCI device structure.
2931 * Any PCI enabled device must keep this in it's instance data!
2932 * Fill in the PCI data config before registration, please.
2933 * @remark This is the simple interface, a Ex interface will be created if
2934 * more features are needed later.
2935 */
2936 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2937
2938 /**
2939 * Initialize MSI support in a PCI device.
2940 *
2941 * @returns VBox status code.
2942 * @param pDevIns The device instance.
2943 * @param pMsiReg MSI registartion structure.
2944 */
2945 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2946
2947 /**
2948 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2949 *
2950 * @returns VBox status code.
2951 * @param pDevIns The device instance.
2952 * @param iRegion The region number.
2953 * @param cbRegion Size of the region.
2954 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2955 * @param pfnCallback Callback for doing the mapping.
2956 * @remarks The callback will be invoked holding the PDM lock. The device lock
2957 * is NOT take because that is very likely be a lock order violation.
2958 */
2959 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2960 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2961
2962 /**
2963 * Register PCI configuration space read/write callbacks.
2964 *
2965 * @param pDevIns The device instance.
2966 * @param pPciDev The PCI device structure.
2967 * If NULL the default PCI device for this device instance is used.
2968 * @param pfnRead Pointer to the user defined PCI config read function.
2969 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2970 * PCI config read function. This way, user can decide when (and if)
2971 * to call default PCI config read function. Can be NULL.
2972 * @param pfnWrite Pointer to the user defined PCI config write function.
2973 * @param ppfnWriteOld Pointer to function pointer which will receive
2974 * the old (default) PCI config write function.
2975 * This way, user can decide when (and if) to call
2976 * default PCI config write function. Can be NULL.
2977 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2978 * is NOT take because that is very likely be a lock order violation.
2979 * @thread EMT
2980 */
2981 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2982 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2983
2984 /**
2985 * Bus master physical memory read.
2986 *
2987 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2988 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2989 * @param pDevIns The device instance.
2990 * @param GCPhys Physical address start reading from.
2991 * @param pvBuf Where to put the read bits.
2992 * @param cbRead How many bytes to read.
2993 * @thread Any thread, but the call may involve the emulation thread.
2994 */
2995 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2996
2997 /**
2998 * Bus master physical memory write.
2999 *
3000 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3001 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3002 * @param pDevIns The device instance.
3003 * @param GCPhys Physical address to write to.
3004 * @param pvBuf What to write.
3005 * @param cbWrite How many bytes to write.
3006 * @thread Any thread, but the call may involve the emulation thread.
3007 */
3008 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3009
3010 /**
3011 * Set the IRQ for a PCI device.
3012 *
3013 * @param pDevIns The device instance.
3014 * @param iIrq IRQ number to set.
3015 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3016 * @thread Any thread, but will involve the emulation thread.
3017 */
3018 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3019
3020 /**
3021 * Set the IRQ for a PCI device, but don't wait for EMT to process
3022 * the request when not called from EMT.
3023 *
3024 * @param pDevIns The device instance.
3025 * @param iIrq IRQ number to set.
3026 * @param iLevel IRQ level.
3027 * @thread Any thread, but will involve the emulation thread.
3028 */
3029 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3030
3031 /**
3032 * Set ISA IRQ for a device.
3033 *
3034 * @param pDevIns The device instance.
3035 * @param iIrq IRQ number to set.
3036 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3037 * @thread Any thread, but will involve the emulation thread.
3038 */
3039 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3040
3041 /**
3042 * Set the ISA IRQ for a device, but don't wait for EMT to process
3043 * the request when not called from EMT.
3044 *
3045 * @param pDevIns The device instance.
3046 * @param iIrq IRQ number to set.
3047 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3048 * @thread Any thread, but will involve the emulation thread.
3049 */
3050 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3051
3052 /**
3053 * Attaches a driver (chain) to the device.
3054 *
3055 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3056 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3057 *
3058 * @returns VBox status code.
3059 * @param pDevIns The device instance.
3060 * @param iLun The logical unit to attach.
3061 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3062 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3063 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3064 * for the live of the device instance.
3065 */
3066 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3067 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3068
3069 /**
3070 * Detaches an attached driver (chain) from the device again.
3071 *
3072 * @returns VBox status code.
3073 * @param pDevIns The device instance.
3074 * @param pDrvIns The driver instance to detach.
3075 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3076 */
3077 DECLR3CALLBACKMEMBER(int, pfnDriverDetach,(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags));
3078
3079 /**
3080 * Create a queue.
3081 *
3082 * @returns VBox status code.
3083 * @param pDevIns The device instance.
3084 * @param cbItem The size of a queue item.
3085 * @param cItems The number of items in the queue.
3086 * @param cMilliesInterval The number of milliseconds between polling the queue.
3087 * If 0 then the emulation thread will be notified whenever an item arrives.
3088 * @param pfnCallback The consumer function.
3089 * @param fRZEnabled Set if the queue should work in RC and R0.
3090 * @param pszName The queue base name. The instance number will be
3091 * appended automatically.
3092 * @param ppQueue Where to store the queue handle on success.
3093 * @thread The emulation thread.
3094 * @remarks The device critical section will NOT be entered before calling the
3095 * callback. No locks will be held, but for now it's safe to assume
3096 * that only one EMT will do queue callbacks at any one time.
3097 */
3098 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3099 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3100
3101 /**
3102 * Initializes a PDM critical section.
3103 *
3104 * The PDM critical sections are derived from the IPRT critical sections, but
3105 * works in RC and R0 as well.
3106 *
3107 * @returns VBox status code.
3108 * @param pDevIns The device instance.
3109 * @param pCritSect Pointer to the critical section.
3110 * @param SRC_POS Use RT_SRC_POS.
3111 * @param pszNameFmt Format string for naming the critical section.
3112 * For statistics and lock validation.
3113 * @param va Arguments for the format string.
3114 */
3115 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3116 const char *pszNameFmt, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3117
3118 /**
3119 * Gets the NOP critical section.
3120 *
3121 * @returns The ring-3 address of the NOP critical section.
3122 * @param pDevIns The device instance.
3123 */
3124 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3125
3126 /**
3127 * Gets the NOP critical section.
3128 *
3129 * @returns The ring-0 address of the NOP critical section.
3130 * @param pDevIns The device instance.
3131 */
3132 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3133
3134 /**
3135 * Gets the NOP critical section.
3136 *
3137 * @returns The raw-mode context address of the NOP critical section.
3138 * @param pDevIns The device instance.
3139 */
3140 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3141
3142 /**
3143 * Changes the device level critical section from the automatically created
3144 * default to one desired by the device constructor.
3145 *
3146 * @returns VBox status code.
3147 * @param pDevIns The device instance.
3148 * @param pCritSect The critical section to use. NULL is not
3149 * valid, instead use the NOP critical
3150 * section.
3151 */
3152 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3153
3154 /**
3155 * Creates a PDM thread.
3156 *
3157 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3158 * resuming, and destroying the thread as the VM state changes.
3159 *
3160 * @returns VBox status code.
3161 * @param pDevIns The device instance.
3162 * @param ppThread Where to store the thread 'handle'.
3163 * @param pvUser The user argument to the thread function.
3164 * @param pfnThread The thread function.
3165 * @param pfnWakeup The wakup callback. This is called on the EMT
3166 * thread when a state change is pending.
3167 * @param cbStack See RTThreadCreate.
3168 * @param enmType See RTThreadCreate.
3169 * @param pszName See RTThreadCreate.
3170 * @remarks The device critical section will NOT be entered prior to invoking
3171 * the function pointers.
3172 */
3173 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3174 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3175
3176 /**
3177 * Set up asynchronous handling of a suspend, reset or power off notification.
3178 *
3179 * This shall only be called when getting the notification. It must be called
3180 * for each one.
3181 *
3182 * @returns VBox status code.
3183 * @param pDevIns The device instance.
3184 * @param pfnAsyncNotify The callback.
3185 * @thread EMT(0)
3186 * @remarks The caller will enter the device critical section prior to invoking
3187 * the callback.
3188 */
3189 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3190
3191 /**
3192 * Notify EMT(0) that the device has completed the asynchronous notification
3193 * handling.
3194 *
3195 * This can be called at any time, spurious calls will simply be ignored.
3196 *
3197 * @param pDevIns The device instance.
3198 * @thread Any
3199 */
3200 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3201
3202 /**
3203 * Register the RTC device.
3204 *
3205 * @returns VBox status code.
3206 * @param pDevIns The device instance.
3207 * @param pRtcReg Pointer to a RTC registration structure.
3208 * @param ppRtcHlp Where to store the pointer to the helper
3209 * functions.
3210 */
3211 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3212
3213 /**
3214 * Register the PCI Bus.
3215 *
3216 * @returns VBox status code.
3217 * @param pDevIns The device instance.
3218 * @param pPciBusReg Pointer to PCI bus registration structure.
3219 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3220 * helpers.
3221 */
3222 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3223
3224 /**
3225 * Register the PIC device.
3226 *
3227 * @returns VBox status code.
3228 * @param pDevIns The device instance.
3229 * @param pPicReg Pointer to a PIC registration structure.
3230 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3231 * helpers.
3232 */
3233 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3234
3235 /**
3236 * Register the APIC device.
3237 *
3238 * @returns VBox status code.
3239 * @param pDevIns The device instance.
3240 * @param pApicReg Pointer to a APIC registration structure.
3241 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3242 */
3243 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3244
3245 /**
3246 * Register the I/O APIC device.
3247 *
3248 * @returns VBox status code.
3249 * @param pDevIns The device instance.
3250 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3251 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3252 * helpers.
3253 */
3254 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3255
3256 /**
3257 * Register the HPET device.
3258 *
3259 * @returns VBox status code.
3260 * @param pDevIns The device instance.
3261 * @param pHpetReg Pointer to a HPET registration structure.
3262 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3263 * helpers.
3264 */
3265 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3266
3267 /**
3268 * Register a raw PCI device.
3269 *
3270 * @returns VBox status code.
3271 * @param pDevIns The device instance.
3272 * @param pPciRawReg Pointer to a raw PCI registration structure.
3273 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3274 * device helpers.
3275 */
3276 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3277
3278 /**
3279 * Register the DMA device.
3280 *
3281 * @returns VBox status code.
3282 * @param pDevIns The device instance.
3283 * @param pDmacReg Pointer to a DMAC registration structure.
3284 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3285 */
3286 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3287
3288 /**
3289 * Register transfer function for DMA channel.
3290 *
3291 * @returns VBox status code.
3292 * @param pDevIns The device instance.
3293 * @param uChannel Channel number.
3294 * @param pfnTransferHandler Device specific transfer callback function.
3295 * @param pvUser User pointer to pass to the callback.
3296 * @thread EMT
3297 */
3298 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3299
3300 /**
3301 * Read memory.
3302 *
3303 * @returns VBox status code.
3304 * @param pDevIns The device instance.
3305 * @param uChannel Channel number.
3306 * @param pvBuffer Pointer to target buffer.
3307 * @param off DMA position.
3308 * @param cbBlock Block size.
3309 * @param pcbRead Where to store the number of bytes which was
3310 * read. optional.
3311 * @thread EMT
3312 */
3313 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3314
3315 /**
3316 * Write memory.
3317 *
3318 * @returns VBox status code.
3319 * @param pDevIns The device instance.
3320 * @param uChannel Channel number.
3321 * @param pvBuffer Memory to write.
3322 * @param off DMA position.
3323 * @param cbBlock Block size.
3324 * @param pcbWritten Where to store the number of bytes which was
3325 * written. optional.
3326 * @thread EMT
3327 */
3328 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3329
3330 /**
3331 * Set the DREQ line.
3332 *
3333 * @returns VBox status code.
3334 * @param pDevIns Device instance.
3335 * @param uChannel Channel number.
3336 * @param uLevel Level of the line.
3337 * @thread EMT
3338 */
3339 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3340
3341 /**
3342 * Get channel mode.
3343 *
3344 * @returns Channel mode. See specs.
3345 * @param pDevIns The device instance.
3346 * @param uChannel Channel number.
3347 * @thread EMT
3348 */
3349 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3350
3351 /**
3352 * Schedule DMA execution.
3353 *
3354 * @param pDevIns The device instance.
3355 * @thread Any thread.
3356 */
3357 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3358
3359 /**
3360 * Write CMOS value and update the checksum(s).
3361 *
3362 * @returns VBox status code.
3363 * @param pDevIns The device instance.
3364 * @param iReg The CMOS register index.
3365 * @param u8Value The CMOS register value.
3366 * @thread EMT
3367 */
3368 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3369
3370 /**
3371 * Read CMOS value.
3372 *
3373 * @returns VBox status code.
3374 * @param pDevIns The device instance.
3375 * @param iReg The CMOS register index.
3376 * @param pu8Value Where to store the CMOS register value.
3377 * @thread EMT
3378 */
3379 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3380
3381 /**
3382 * Assert that the current thread is the emulation thread.
3383 *
3384 * @returns True if correct.
3385 * @returns False if wrong.
3386 * @param pDevIns The device instance.
3387 * @param pszFile Filename of the assertion location.
3388 * @param iLine The linenumber of the assertion location.
3389 * @param pszFunction Function of the assertion location.
3390 */
3391 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3392
3393 /**
3394 * Assert that the current thread is NOT the emulation thread.
3395 *
3396 * @returns True if correct.
3397 * @returns False if wrong.
3398 * @param pDevIns The device instance.
3399 * @param pszFile Filename of the assertion location.
3400 * @param iLine The linenumber of the assertion location.
3401 * @param pszFunction Function of the assertion location.
3402 */
3403 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3404
3405 /**
3406 * Resolves the symbol for a raw-mode context interface.
3407 *
3408 * @returns VBox status code.
3409 * @param pDevIns The device instance.
3410 * @param pvInterface The interface structure.
3411 * @param cbInterface The size of the interface structure.
3412 * @param pszSymPrefix What to prefix the symbols in the list with
3413 * before resolving them. This must start with
3414 * 'dev' and contain the driver name.
3415 * @param pszSymList List of symbols corresponding to the interface.
3416 * There is generally a there is generally a define
3417 * holding this list associated with the interface
3418 * definition (INTERFACE_SYM_LIST). For more
3419 * details see PDMR3LdrGetInterfaceSymbols.
3420 * @thread EMT
3421 */
3422 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3423 const char *pszSymPrefix, const char *pszSymList));
3424
3425 /**
3426 * Resolves the symbol for a ring-0 context interface.
3427 *
3428 * @returns VBox status code.
3429 * @param pDevIns The device instance.
3430 * @param pvInterface The interface structure.
3431 * @param cbInterface The size of the interface structure.
3432 * @param pszSymPrefix What to prefix the symbols in the list with
3433 * before resolving them. This must start with
3434 * 'dev' and contain the driver name.
3435 * @param pszSymList List of symbols corresponding to the interface.
3436 * There is generally a there is generally a define
3437 * holding this list associated with the interface
3438 * definition (INTERFACE_SYM_LIST). For more
3439 * details see PDMR3LdrGetInterfaceSymbols.
3440 * @thread EMT
3441 */
3442 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3443 const char *pszSymPrefix, const char *pszSymList));
3444
3445 /**
3446 * Call the ring-0 request handler routine of the device.
3447 *
3448 * For this to work, the device must be ring-0 enabled and export a request
3449 * handler function. The name of the function must be the device name in
3450 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3451 * 'ReqHandler'. The device name will be captialized. It shall take the
3452 * exact same arguments as this function and be declared using
3453 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3454 *
3455 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3456 * or two as the handler address will be resolved on each invocation. This
3457 * is the reason for the EMT only restriction as well.
3458 *
3459 * @returns VBox status code.
3460 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3461 * handler function.
3462 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3463 *
3464 * @param pDevIns The device instance.
3465 * @param uOperation The operation to perform.
3466 * @param u64Arg 64-bit integer argument.
3467 * @thread EMT
3468 */
3469 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3470
3471 /**
3472 * Gets the reason for the most recent VM suspend.
3473 *
3474 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3475 * suspend has been made or if the pDevIns is invalid.
3476 * @param pDevIns The device instance.
3477 */
3478 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3479
3480 /**
3481 * Gets the reason for the most recent VM resume.
3482 *
3483 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3484 * resume has been made or if the pDevIns is invalid.
3485 * @param pDevIns The device instance.
3486 */
3487 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3488
3489
3490 /** Space reserved for future members.
3491 * @{ */
3492 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3493 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3494 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3495 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3496 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3497 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3498 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3499 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3500 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3501 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3502 /** @} */
3503
3504
3505 /** API available to trusted devices only.
3506 *
3507 * These APIs are providing unrestricted access to the guest and the VM,
3508 * or they are interacting intimately with PDM.
3509 *
3510 * @{
3511 */
3512
3513 /**
3514 * Gets the user mode VM handle. Restricted API.
3515 *
3516 * @returns User mode VM Handle.
3517 * @param pDevIns The device instance.
3518 */
3519 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3520
3521 /**
3522 * Gets the global VM handle. Restricted API.
3523 *
3524 * @returns VM Handle.
3525 * @param pDevIns The device instance.
3526 */
3527 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3528
3529 /**
3530 * Gets the VMCPU handle. Restricted API.
3531 *
3532 * @returns VMCPU Handle.
3533 * @param pDevIns The device instance.
3534 */
3535 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3536
3537 /**
3538 * The the VM CPU ID of the current thread (restricted API).
3539 *
3540 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3541 * @param pDevIns The device instance.
3542 */
3543 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3544
3545 /**
3546 * Registers the VMM device heap
3547 *
3548 * @returns VBox status code.
3549 * @param pDevIns The device instance.
3550 * @param GCPhys The physical address.
3551 * @param pvHeap Ring 3 heap pointer.
3552 * @param cbSize Size of the heap.
3553 * @thread EMT.
3554 */
3555 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3556
3557 /**
3558 * Unregisters the VMM device heap
3559 *
3560 * @returns VBox status code.
3561 * @param pDevIns The device instance.
3562 * @param GCPhys The physical address.
3563 * @thread EMT.
3564 */
3565 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3566
3567 /**
3568 * Resets the VM.
3569 *
3570 * @returns The appropriate VBox status code to pass around on reset.
3571 * @param pDevIns The device instance.
3572 * @thread The emulation thread.
3573 */
3574 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3575
3576 /**
3577 * Suspends the VM.
3578 *
3579 * @returns The appropriate VBox status code to pass around on suspend.
3580 * @param pDevIns The device instance.
3581 * @thread The emulation thread.
3582 */
3583 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3584
3585 /**
3586 * Suspends, saves and powers off the VM.
3587 *
3588 * @returns The appropriate VBox status code to pass around.
3589 * @param pDevIns The device instance.
3590 * @thread An emulation thread.
3591 */
3592 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3593
3594 /**
3595 * Power off the VM.
3596 *
3597 * @returns The appropriate VBox status code to pass around on power off.
3598 * @param pDevIns The device instance.
3599 * @thread The emulation thread.
3600 */
3601 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3602
3603 /**
3604 * Checks if the Gate A20 is enabled or not.
3605 *
3606 * @returns true if A20 is enabled.
3607 * @returns false if A20 is disabled.
3608 * @param pDevIns The device instance.
3609 * @thread The emulation thread.
3610 */
3611 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3612
3613 /**
3614 * Enables or disables the Gate A20.
3615 *
3616 * @param pDevIns The device instance.
3617 * @param fEnable Set this flag to enable the Gate A20; clear it
3618 * to disable.
3619 * @thread The emulation thread.
3620 */
3621 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3622
3623 /**
3624 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3625 * thread.
3626 *
3627 * @param pDevIns The device instance.
3628 * @param iLeaf The CPUID leaf to get.
3629 * @param pEax Where to store the EAX value.
3630 * @param pEbx Where to store the EBX value.
3631 * @param pEcx Where to store the ECX value.
3632 * @param pEdx Where to store the EDX value.
3633 * @thread EMT.
3634 */
3635 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3636
3637 /**
3638 * Get the current virtual clock time in a VM. The clock frequency must be
3639 * queried separately.
3640 *
3641 * @returns Current clock time.
3642 * @param pDevIns The device instance.
3643 */
3644 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3645
3646 /**
3647 * Get the frequency of the virtual clock.
3648 *
3649 * @returns The clock frequency (not variable at run-time).
3650 * @param pDevIns The device instance.
3651 */
3652 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3653
3654 /**
3655 * Get the current virtual clock time in a VM, in nanoseconds.
3656 *
3657 * @returns Current clock time (in ns).
3658 * @param pDevIns The device instance.
3659 */
3660 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3661
3662 /**
3663 * Gets the support driver session.
3664 *
3665 * This is intended for working with the semaphore API.
3666 *
3667 * @returns Support driver session handle.
3668 * @param pDevIns The device instance.
3669 */
3670 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3671
3672 /** @} */
3673
3674 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3675 uint32_t u32TheEnd;
3676} PDMDEVHLPR3;
3677#endif /* !IN_RING3 */
3678/** Pointer to the R3 PDM Device API. */
3679typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3680/** Pointer to the R3 PDM Device API, const variant. */
3681typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3682
3683/** Current PDMDEVHLPR3 version number. */
3684#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 15, 1)
3685
3686
3687/**
3688 * PDM Device API - RC Variant.
3689 */
3690typedef struct PDMDEVHLPRC
3691{
3692 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3693 uint32_t u32Version;
3694
3695 /**
3696 * Bus master physical memory read.
3697 *
3698 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3699 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3700 * @param pDevIns The device instance.
3701 * @param GCPhys Physical address start reading from.
3702 * @param pvBuf Where to put the read bits.
3703 * @param cbRead How many bytes to read.
3704 * @thread Any thread, but the call may involve the emulation thread.
3705 */
3706 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3707
3708 /**
3709 * Bus master physical memory write.
3710 *
3711 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3712 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3713 * @param pDevIns The device instance.
3714 * @param GCPhys Physical address to write to.
3715 * @param pvBuf What to write.
3716 * @param cbWrite How many bytes to write.
3717 * @thread Any thread, but the call may involve the emulation thread.
3718 */
3719 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3720
3721 /**
3722 * Set the IRQ for a PCI device.
3723 *
3724 * @param pDevIns Device instance.
3725 * @param iIrq IRQ number to set.
3726 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3727 * @thread Any thread, but will involve the emulation thread.
3728 */
3729 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3730
3731 /**
3732 * Set ISA IRQ for a device.
3733 *
3734 * @param pDevIns Device instance.
3735 * @param iIrq IRQ number to set.
3736 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3737 * @thread Any thread, but will involve the emulation thread.
3738 */
3739 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3740
3741 /**
3742 * Read physical memory.
3743 *
3744 * @returns VINF_SUCCESS (for now).
3745 * @param pDevIns Device instance.
3746 * @param GCPhys Physical address start reading from.
3747 * @param pvBuf Where to put the read bits.
3748 * @param cbRead How many bytes to read.
3749 */
3750 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3751
3752 /**
3753 * Write to physical memory.
3754 *
3755 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3756 * @param pDevIns Device instance.
3757 * @param GCPhys Physical address to write to.
3758 * @param pvBuf What to write.
3759 * @param cbWrite How many bytes to write.
3760 */
3761 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3762
3763 /**
3764 * Checks if the Gate A20 is enabled or not.
3765 *
3766 * @returns true if A20 is enabled.
3767 * @returns false if A20 is disabled.
3768 * @param pDevIns Device instance.
3769 * @thread The emulation thread.
3770 */
3771 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3772
3773 /**
3774 * Gets the VM state.
3775 *
3776 * @returns VM state.
3777 * @param pDevIns The device instance.
3778 * @thread Any thread (just keep in mind that it's volatile info).
3779 */
3780 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3781
3782 /**
3783 * Set the VM error message
3784 *
3785 * @returns rc.
3786 * @param pDevIns Driver instance.
3787 * @param rc VBox status code.
3788 * @param SRC_POS Use RT_SRC_POS.
3789 * @param pszFormat Error message format string.
3790 * @param ... Error message arguments.
3791 */
3792 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3793 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
3794
3795 /**
3796 * Set the VM error message
3797 *
3798 * @returns rc.
3799 * @param pDevIns Driver instance.
3800 * @param rc VBox status code.
3801 * @param SRC_POS Use RT_SRC_POS.
3802 * @param pszFormat Error message format string.
3803 * @param va Error message arguments.
3804 */
3805 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3806 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3807
3808 /**
3809 * Set the VM runtime error message
3810 *
3811 * @returns VBox status code.
3812 * @param pDevIns Device instance.
3813 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3814 * @param pszErrorId Error ID string.
3815 * @param pszFormat Error message format string.
3816 * @param ... Error message arguments.
3817 */
3818 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3819 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
3820
3821 /**
3822 * Set the VM runtime error message
3823 *
3824 * @returns VBox status code.
3825 * @param pDevIns Device instance.
3826 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3827 * @param pszErrorId Error ID string.
3828 * @param pszFormat Error message format string.
3829 * @param va Error message arguments.
3830 */
3831 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3832 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
3833
3834 /**
3835 * Set parameters for pending MMIO patch operation
3836 *
3837 * @returns VBox status code.
3838 * @param pDevIns Device instance.
3839 * @param GCPhys MMIO physical address
3840 * @param pCachedData GC pointer to cached data
3841 */
3842 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3843
3844 /**
3845 * Gets the VM handle. Restricted API.
3846 *
3847 * @returns VM Handle.
3848 * @param pDevIns Device instance.
3849 */
3850 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3851
3852 /**
3853 * Gets the VMCPU handle. Restricted API.
3854 *
3855 * @returns VMCPU Handle.
3856 * @param pDevIns The device instance.
3857 */
3858 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3859
3860 /**
3861 * The the VM CPU ID of the current thread (restricted API).
3862 *
3863 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3864 * @param pDevIns The device instance.
3865 */
3866 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3867
3868 /**
3869 * Get the current virtual clock time in a VM. The clock frequency must be
3870 * queried separately.
3871 *
3872 * @returns Current clock time.
3873 * @param pDevIns The device instance.
3874 */
3875 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3876
3877 /**
3878 * Get the frequency of the virtual clock.
3879 *
3880 * @returns The clock frequency (not variable at run-time).
3881 * @param pDevIns The device instance.
3882 */
3883 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3884
3885 /**
3886 * Get the current virtual clock time in a VM, in nanoseconds.
3887 *
3888 * @returns Current clock time (in ns).
3889 * @param pDevIns The device instance.
3890 */
3891 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3892
3893 /**
3894 * Gets the trace buffer handle.
3895 *
3896 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3897 * really inteded for direct usage, thus no inline wrapper function.
3898 *
3899 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3900 * @param pDevIns The device instance.
3901 */
3902 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3903
3904 /** Just a safety precaution. */
3905 uint32_t u32TheEnd;
3906} PDMDEVHLPRC;
3907/** Pointer PDM Device RC API. */
3908typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3909/** Pointer PDM Device RC API. */
3910typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3911
3912/** Current PDMDEVHLP version number. */
3913#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 4, 1)
3914
3915
3916/**
3917 * PDM Device API - R0 Variant.
3918 */
3919typedef struct PDMDEVHLPR0
3920{
3921 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3922 uint32_t u32Version;
3923
3924 /**
3925 * Bus master physical memory read.
3926 *
3927 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3928 * VERR_EM_MEMORY.
3929 * @param pDevIns The device instance.
3930 * @param GCPhys Physical address start reading from.
3931 * @param pvBuf Where to put the read bits.
3932 * @param cbRead How many bytes to read.
3933 * @thread Any thread, but the call may involve the emulation thread.
3934 */
3935 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3936
3937 /**
3938 * Bus master physical memory write.
3939 *
3940 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3941 * VERR_EM_MEMORY.
3942 * @param pDevIns The device instance.
3943 * @param GCPhys Physical address to write to.
3944 * @param pvBuf What to write.
3945 * @param cbWrite How many bytes to write.
3946 * @thread Any thread, but the call may involve the emulation thread.
3947 */
3948 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3949
3950 /**
3951 * Set the IRQ for a PCI device.
3952 *
3953 * @param pDevIns Device instance.
3954 * @param iIrq IRQ number to set.
3955 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3956 * @thread Any thread, but will involve the emulation thread.
3957 */
3958 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3959
3960 /**
3961 * Set ISA IRQ for a device.
3962 *
3963 * @param pDevIns Device instance.
3964 * @param iIrq IRQ number to set.
3965 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3966 * @thread Any thread, but will involve the emulation thread.
3967 */
3968 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3969
3970 /**
3971 * Read physical memory.
3972 *
3973 * @returns VINF_SUCCESS (for now).
3974 * @param pDevIns Device instance.
3975 * @param GCPhys Physical address start reading from.
3976 * @param pvBuf Where to put the read bits.
3977 * @param cbRead How many bytes to read.
3978 */
3979 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3980
3981 /**
3982 * Write to physical memory.
3983 *
3984 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3985 * @param pDevIns Device instance.
3986 * @param GCPhys Physical address to write to.
3987 * @param pvBuf What to write.
3988 * @param cbWrite How many bytes to write.
3989 */
3990 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3991
3992 /**
3993 * Checks if the Gate A20 is enabled or not.
3994 *
3995 * @returns true if A20 is enabled.
3996 * @returns false if A20 is disabled.
3997 * @param pDevIns Device instance.
3998 * @thread The emulation thread.
3999 */
4000 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
4001
4002 /**
4003 * Gets the VM state.
4004 *
4005 * @returns VM state.
4006 * @param pDevIns The device instance.
4007 * @thread Any thread (just keep in mind that it's volatile info).
4008 */
4009 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
4010
4011 /**
4012 * Set the VM error message
4013 *
4014 * @returns rc.
4015 * @param pDevIns Driver instance.
4016 * @param rc VBox status code.
4017 * @param SRC_POS Use RT_SRC_POS.
4018 * @param pszFormat Error message format string.
4019 * @param ... Error message arguments.
4020 */
4021 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4022 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
4023
4024 /**
4025 * Set the VM error message
4026 *
4027 * @returns rc.
4028 * @param pDevIns Driver instance.
4029 * @param rc VBox status code.
4030 * @param SRC_POS Use RT_SRC_POS.
4031 * @param pszFormat Error message format string.
4032 * @param va Error message arguments.
4033 */
4034 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4035 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
4036
4037 /**
4038 * Set the VM runtime error message
4039 *
4040 * @returns VBox status code.
4041 * @param pDevIns Device instance.
4042 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4043 * @param pszErrorId Error ID string.
4044 * @param pszFormat Error message format string.
4045 * @param ... Error message arguments.
4046 */
4047 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4048 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
4049
4050 /**
4051 * Set the VM runtime error message
4052 *
4053 * @returns VBox status code.
4054 * @param pDevIns Device instance.
4055 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4056 * @param pszErrorId Error ID string.
4057 * @param pszFormat Error message format string.
4058 * @param va Error message arguments.
4059 */
4060 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4061 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
4062
4063 /**
4064 * Set parameters for pending MMIO patch operation
4065 *
4066 * @returns rc.
4067 * @param pDevIns Device instance.
4068 * @param GCPhys MMIO physical address
4069 * @param pCachedData GC pointer to cached data
4070 */
4071 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4072
4073 /**
4074 * Gets the VM handle. Restricted API.
4075 *
4076 * @returns VM Handle.
4077 * @param pDevIns Device instance.
4078 */
4079 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4080
4081 /**
4082 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4083 *
4084 * @returns true = yes, false = no
4085 * @param pDevIns Device instance.
4086 */
4087 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4088
4089 /**
4090 * Gets the VMCPU handle. Restricted API.
4091 *
4092 * @returns VMCPU Handle.
4093 * @param pDevIns The device instance.
4094 */
4095 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4096
4097 /**
4098 * The the VM CPU ID of the current thread (restricted API).
4099 *
4100 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
4101 * @param pDevIns The device instance.
4102 */
4103 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4104
4105 /**
4106 * Get the current virtual clock time in a VM. The clock frequency must be
4107 * queried separately.
4108 *
4109 * @returns Current clock time.
4110 * @param pDevIns The device instance.
4111 */
4112 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4113
4114 /**
4115 * Get the frequency of the virtual clock.
4116 *
4117 * @returns The clock frequency (not variable at run-time).
4118 * @param pDevIns The device instance.
4119 */
4120 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4121
4122 /**
4123 * Get the current virtual clock time in a VM, in nanoseconds.
4124 *
4125 * @returns Current clock time (in ns).
4126 * @param pDevIns The device instance.
4127 */
4128 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4129
4130 /**
4131 * Gets the trace buffer handle.
4132 *
4133 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4134 * really inteded for direct usage, thus no inline wrapper function.
4135 *
4136 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4137 * @param pDevIns The device instance.
4138 */
4139 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4140
4141 /** Just a safety precaution. */
4142 uint32_t u32TheEnd;
4143} PDMDEVHLPR0;
4144/** Pointer PDM Device R0 API. */
4145typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4146/** Pointer PDM Device GC API. */
4147typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4148
4149/** Current PDMDEVHLP version number. */
4150#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 4, 1)
4151
4152
4153
4154/**
4155 * PDM Device Instance.
4156 */
4157typedef struct PDMDEVINS
4158{
4159 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4160 uint32_t u32Version;
4161 /** Device instance number. */
4162 uint32_t iInstance;
4163
4164 /** Pointer the GC PDM Device API. */
4165 PCPDMDEVHLPRC pHlpRC;
4166 /** Pointer to device instance data. */
4167 RTRCPTR pvInstanceDataRC;
4168 /** The critical section for the device, see pCritSectXR3. */
4169 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4170 /** Alignment padding. */
4171 RTRCPTR pAlignmentRC;
4172
4173 /** Pointer the R0 PDM Device API. */
4174 PCPDMDEVHLPR0 pHlpR0;
4175 /** Pointer to device instance data (R0). */
4176 RTR0PTR pvInstanceDataR0;
4177 /** The critical section for the device, see pCritSectXR3. */
4178 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4179
4180 /** Pointer the HC PDM Device API. */
4181 PCPDMDEVHLPR3 pHlpR3;
4182 /** Pointer to device instance data. */
4183 RTR3PTR pvInstanceDataR3;
4184 /** The critical section for the device.
4185 *
4186 * TM and IOM will enter this critical section before calling into the device
4187 * code. PDM will when doing power on, power off, reset, suspend and resume
4188 * notifications. SSM will currently not, but this will be changed later on.
4189 *
4190 * The device gets a critical section automatically assigned to it before
4191 * the constructor is called. If the constructor wishes to use a different
4192 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4193 * very early on.
4194 */
4195 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4196
4197 /** Pointer to device registration structure. */
4198 R3PTRTYPE(PCPDMDEVREG) pReg;
4199 /** Configuration handle. */
4200 R3PTRTYPE(PCFGMNODE) pCfg;
4201
4202 /** The base interface of the device.
4203 *
4204 * The device constructor initializes this if it has any
4205 * device level interfaces to export. To obtain this interface
4206 * call PDMR3QueryDevice(). */
4207 PDMIBASE IBase;
4208
4209 /** Tracing indicator. */
4210 uint32_t fTracing;
4211 /** The tracing ID of this device. */
4212 uint32_t idTracing;
4213#if HC_ARCH_BITS == 32
4214 /** Align the internal data more naturally. */
4215 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4216#endif
4217
4218 /** Internal data. */
4219 union
4220 {
4221#ifdef PDMDEVINSINT_DECLARED
4222 PDMDEVINSINT s;
4223#endif
4224 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4225 } Internal;
4226
4227 /** Device instance data. The size of this area is defined
4228 * in the PDMDEVREG::cbInstanceData field. */
4229 char achInstanceData[8];
4230} PDMDEVINS;
4231
4232/** Current PDMDEVINS version number. */
4233#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4234
4235/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4236#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4237
4238/**
4239 * Checks the structure versions of the device instance and device helpers,
4240 * returning if they are incompatible.
4241 *
4242 * This is for use in the constructor.
4243 *
4244 * @param pDevIns The device instance pointer.
4245 */
4246#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4247 do \
4248 { \
4249 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4250 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4251 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4252 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4253 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4254 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4255 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4256 } while (0)
4257
4258/**
4259 * Quietly checks the structure versions of the device instance and device
4260 * helpers, returning if they are incompatible.
4261 *
4262 * This is for use in the destructor.
4263 *
4264 * @param pDevIns The device instance pointer.
4265 */
4266#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4267 do \
4268 { \
4269 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4270 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4271 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4272 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4273 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4274 } while (0)
4275
4276/**
4277 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4278 * constructor - returns on failure.
4279 *
4280 * This should be invoked after having initialized the instance data
4281 * sufficiently for the correct operation of the destructor. The destructor is
4282 * always called!
4283 *
4284 * @param pDevIns Pointer to the PDM device instance.
4285 * @param pszValidValues Patterns describing the valid value names. See
4286 * RTStrSimplePatternMultiMatch for details on the
4287 * pattern syntax.
4288 * @param pszValidNodes Patterns describing the valid node (key) names.
4289 * Pass empty string if no valid nodes.
4290 */
4291#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4292 do \
4293 { \
4294 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4295 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4296 if (RT_SUCCESS(rcValCfg)) \
4297 { /* likely */ } else return rcValCfg; \
4298 } while (0)
4299
4300/** @def PDMDEV_ASSERT_EMT
4301 * Assert that the current thread is the emulation thread.
4302 */
4303#ifdef VBOX_STRICT
4304# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4305#else
4306# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4307#endif
4308
4309/** @def PDMDEV_ASSERT_OTHER
4310 * Assert that the current thread is NOT the emulation thread.
4311 */
4312#ifdef VBOX_STRICT
4313# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4314#else
4315# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4316#endif
4317
4318/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4319 * Assert that the current thread is owner of the VM lock.
4320 */
4321#ifdef VBOX_STRICT
4322# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4323#else
4324# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4325#endif
4326
4327/** @def PDMDEV_SET_ERROR
4328 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4329 */
4330#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4331 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4332
4333/** @def PDMDEV_SET_RUNTIME_ERROR
4334 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4335 */
4336#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4337 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4338
4339/** @def PDMDEVINS_2_RCPTR
4340 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4341 */
4342#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4343
4344/** @def PDMDEVINS_2_R3PTR
4345 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4346 */
4347#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4348
4349/** @def PDMDEVINS_2_R0PTR
4350 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4351 */
4352#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4353
4354
4355#ifdef IN_RING3
4356
4357/**
4358 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4359 */
4360DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4361 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4362 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4363{
4364 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4365}
4366
4367/**
4368 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4369 */
4370DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4371 const char *pszOut, const char *pszIn, const char *pszOutStr,
4372 const char *pszInStr, const char *pszDesc)
4373{
4374 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4375}
4376
4377/**
4378 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4379 */
4380DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4381 const char *pszOut, const char *pszIn, const char *pszOutStr,
4382 const char *pszInStr, const char *pszDesc)
4383{
4384 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4385}
4386
4387/**
4388 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4389 */
4390DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4391{
4392 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4393}
4394
4395/**
4396 * Register a Memory Mapped I/O (MMIO) region.
4397 *
4398 * These callbacks are of course for the ring-3 context (R3). Register HC
4399 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4400 * must be a R3 handler for every RC and R0 handler!
4401 *
4402 * @returns VBox status.
4403 * @param pDevIns The device instance to register the MMIO with.
4404 * @param GCPhysStart First physical address in the range.
4405 * @param cbRange The size of the range (in bytes).
4406 * @param pvUser User argument.
4407 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4408 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4409 * @param pfnRead Pointer to function which is gonna handle Read operations.
4410 * @param pszDesc Pointer to description string. This must not be freed.
4411 */
4412DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4413 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4414{
4415 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4416 fFlags, pszDesc);
4417}
4418
4419/**
4420 * Register a Memory Mapped I/O (MMIO) region for RC.
4421 *
4422 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4423 * (R3) handlers before guest context handlers! There must be a R3 handler for
4424 * every RC handler!
4425 *
4426 * @returns VBox status.
4427 * @param pDevIns The device instance to register the MMIO with.
4428 * @param GCPhysStart First physical address in the range.
4429 * @param cbRange The size of the range (in bytes).
4430 * @param pvUser User argument.
4431 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4432 * @param pszRead Name of the RC function which is gonna handle Read operations.
4433 */
4434DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4435 const char *pszWrite, const char *pszRead)
4436{
4437 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4438}
4439
4440/**
4441 * Register a Memory Mapped I/O (MMIO) region for R0.
4442 *
4443 * These callbacks are for the ring-0 host context (R0). Register ring-3
4444 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
4445 * every R0 handler!
4446 *
4447 * @returns VBox status.
4448 * @param pDevIns The device instance to register the MMIO with.
4449 * @param GCPhysStart First physical address in the range.
4450 * @param cbRange The size of the range (in bytes).
4451 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
4452 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4453 * @param pszRead Name of the RC function which is gonna handle Read operations.
4454 * @remarks Caller enters the device critical section prior to invoking the
4455 * registered callback methods.
4456 */
4457DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4458 const char *pszWrite, const char *pszRead)
4459{
4460 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4461}
4462
4463/**
4464 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4465 */
4466DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4467 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4468 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4469{
4470 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4471 fFlags, pszDesc);
4472}
4473
4474/**
4475 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4476 */
4477DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4478 const char *pszWrite, const char *pszRead, const char *pszFill)
4479{
4480 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4481}
4482
4483/**
4484 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4485 */
4486DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4487 const char *pszWrite, const char *pszRead, const char *pszFill)
4488{
4489 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4490}
4491
4492/**
4493 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4494 */
4495DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4496{
4497 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4498}
4499
4500/**
4501 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4502 */
4503DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4504{
4505 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4506}
4507
4508/**
4509 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4510 */
4511DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4512{
4513 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4514}
4515
4516/**
4517 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4518 */
4519DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4520{
4521 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4522}
4523
4524/**
4525 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4526 */
4527DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4528{
4529 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4530}
4531
4532/**
4533 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4534 */
4535DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4536 const char *pszDesc, PRTRCPTR pRCPtr)
4537{
4538 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4539}
4540
4541/**
4542 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4543 */
4544DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4545 const char *pszDesc, PRTR0PTR pR0Ptr)
4546{
4547 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4548}
4549
4550/**
4551 * @copydoc PDMDEVHLPR3::pfnROMRegister
4552 */
4553DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4554 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4555{
4556 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4557}
4558
4559/**
4560 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4561 */
4562DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4563{
4564 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4565}
4566
4567/**
4568 * Register a save state data unit.
4569 *
4570 * @returns VBox status.
4571 * @param pDevIns The device instance.
4572 * @param uVersion Data layout version number.
4573 * @param cbGuess The approximate amount of data in the unit.
4574 * Only for progress indicators.
4575 * @param pfnSaveExec Execute save callback, optional.
4576 * @param pfnLoadExec Execute load callback, optional.
4577 */
4578DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4579 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4580{
4581 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4582 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4583 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4584 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4585}
4586
4587/**
4588 * Register a save state data unit with a live save callback as well.
4589 *
4590 * @returns VBox status.
4591 * @param pDevIns The device instance.
4592 * @param uVersion Data layout version number.
4593 * @param cbGuess The approximate amount of data in the unit.
4594 * Only for progress indicators.
4595 * @param pfnLiveExec Execute live callback, optional.
4596 * @param pfnSaveExec Execute save callback, optional.
4597 * @param pfnLoadExec Execute load callback, optional.
4598 */
4599DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4600 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4601{
4602 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4603 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4604 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4605 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4606}
4607
4608/**
4609 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4610 */
4611DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4612 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4613 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4614 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4615{
4616 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4617 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4618 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4619 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4620}
4621
4622/**
4623 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4624 */
4625DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4626 const char *pszDesc, PPTMTIMERR3 ppTimer)
4627{
4628 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4629}
4630
4631/**
4632 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4633 */
4634DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4635{
4636 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4637}
4638
4639#endif /* IN_RING3 */
4640
4641/**
4642 * @copydoc PDMDEVHLPR3::pfnPhysRead
4643 */
4644DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4645{
4646 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4647}
4648
4649/**
4650 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4651 */
4652DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4653{
4654 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4655}
4656
4657#ifdef IN_RING3
4658
4659/**
4660 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4661 */
4662DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4663{
4664 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4665}
4666
4667/**
4668 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4669 */
4670DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv,
4671 PPGMPAGEMAPLOCK pLock)
4672{
4673 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4674}
4675
4676/**
4677 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4678 */
4679DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4680{
4681 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4682}
4683
4684/**
4685 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4686 */
4687DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4688{
4689 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4690}
4691
4692/**
4693 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4694 */
4695DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4696{
4697 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4698}
4699
4700/**
4701 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4702 */
4703DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4704{
4705 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4706}
4707
4708/**
4709 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4710 */
4711DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4712{
4713 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4714}
4715
4716/**
4717 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4718 */
4719DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4720{
4721 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4722}
4723
4724/**
4725 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4726 */
4727DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4728{
4729 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4730}
4731#endif /* IN_RING3 */
4732
4733/**
4734 * @copydoc PDMDEVHLPR3::pfnVMState
4735 */
4736DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4737{
4738 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4739}
4740
4741#ifdef IN_RING3
4742/**
4743 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4744 */
4745DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4746{
4747 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4748}
4749#endif /* IN_RING3 */
4750
4751/**
4752 * @copydoc PDMDEVHLPR3::pfnVMSetError
4753 */
4754DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL,
4755 const char *pszFormat, ...)
4756{
4757 va_list va;
4758 va_start(va, pszFormat);
4759 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4760 va_end(va);
4761 return rc;
4762}
4763
4764/**
4765 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4766 */
4767DECLINLINE(int) RT_IPRT_FORMAT_ATTR(4, 5) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4768 const char *pszFormat, ...)
4769{
4770 va_list va;
4771 int rc;
4772 va_start(va, pszFormat);
4773 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4774 va_end(va);
4775 return rc;
4776}
4777
4778/**
4779 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4780 *
4781 * @returns VBox status code which must be passed up to the VMM. This will be
4782 * VINF_SUCCESS in non-strict builds.
4783 * @param pDevIns The device instance.
4784 * @param SRC_POS Use RT_SRC_POS.
4785 * @param pszFormat Message. (optional)
4786 * @param ... Message parameters.
4787 */
4788DECLINLINE(int) RT_IPRT_FORMAT_ATTR(5, 6) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4789{
4790#ifdef VBOX_STRICT
4791# ifdef IN_RING3
4792 int rc;
4793 va_list args;
4794 va_start(args, pszFormat);
4795 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4796 va_end(args);
4797 return rc;
4798# else
4799 NOREF(pDevIns);
4800 NOREF(pszFile);
4801 NOREF(iLine);
4802 NOREF(pszFunction);
4803 NOREF(pszFormat);
4804 return VINF_EM_DBG_STOP;
4805# endif
4806#else
4807 NOREF(pDevIns);
4808 NOREF(pszFile);
4809 NOREF(iLine);
4810 NOREF(pszFunction);
4811 NOREF(pszFormat);
4812 return VINF_SUCCESS;
4813#endif
4814}
4815
4816#ifdef IN_RING3
4817
4818/**
4819 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4820 */
4821DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4822{
4823 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4824}
4825
4826/**
4827 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4828 */
4829DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4830{
4831 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4832}
4833
4834/**
4835 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4836 */
4837DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4838{
4839 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4840}
4841
4842/**
4843 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4844 */
4845DECLINLINE(void) RT_IPRT_FORMAT_ATTR(7, 8) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
4846 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4847 const char *pszDesc, const char *pszName, ...)
4848{
4849 va_list va;
4850 va_start(va, pszName);
4851 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4852 va_end(va);
4853}
4854
4855/**
4856 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4857 */
4858DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4859{
4860 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4861}
4862
4863/**
4864 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4865 */
4866DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
4867 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4868{
4869 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4870}
4871
4872/**
4873 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4874 */
4875DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4876{
4877 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4878}
4879
4880/**
4881 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4882 */
4883DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4884 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4885{
4886 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4887}
4888
4889#endif /* IN_RING3 */
4890
4891/**
4892 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4893 */
4894DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4895{
4896 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4897}
4898
4899/**
4900 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4901 */
4902DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4903{
4904 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4905}
4906
4907/**
4908 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4909 */
4910DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4911{
4912 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4913}
4914
4915/**
4916 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4917 */
4918DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4919{
4920 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4921}
4922
4923/**
4924 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4925 */
4926DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4927{
4928 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4929}
4930
4931/**
4932 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4933 */
4934DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4935{
4936 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4937}
4938
4939#ifdef IN_RING3
4940
4941/**
4942 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4943 */
4944DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4945{
4946 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4947}
4948
4949/**
4950 * @copydoc PDMDEVHLPR3::pfnDriverDetach
4951 */
4952DECLINLINE(int) PDMDevHlpDriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
4953{
4954 return pDevIns->pHlpR3->pfnDriverDetach(pDevIns, pDrvIns, fFlags);
4955}
4956
4957/**
4958 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4959 */
4960DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4961 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4962{
4963 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4964}
4965
4966/**
4967 * Initializes a PDM critical section.
4968 *
4969 * The PDM critical sections are derived from the IPRT critical sections, but
4970 * works in RC and R0 as well.
4971 *
4972 * @returns VBox status code.
4973 * @param pDevIns The device instance.
4974 * @param pCritSect Pointer to the critical section.
4975 * @param SRC_POS Use RT_SRC_POS.
4976 * @param pszNameFmt Format string for naming the critical section.
4977 * For statistics and lock validation.
4978 * @param ... Arguments for the format string.
4979 */
4980DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
4981 const char *pszNameFmt, ...)
4982{
4983 int rc;
4984 va_list va;
4985 va_start(va, pszNameFmt);
4986 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4987 va_end(va);
4988 return rc;
4989}
4990
4991/**
4992 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4993 */
4994DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4995{
4996 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4997}
4998
4999/**
5000 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
5001 */
5002DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
5003{
5004 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
5005}
5006
5007/**
5008 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
5009 */
5010DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
5011{
5012 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
5013}
5014
5015/**
5016 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
5017 */
5018DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
5019{
5020 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
5021}
5022
5023/**
5024 * @copydoc PDMDEVHLPR3::pfnThreadCreate
5025 */
5026DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
5027 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
5028{
5029 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
5030}
5031
5032/**
5033 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
5034 */
5035DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
5036{
5037 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
5038}
5039
5040/**
5041 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
5042 */
5043DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
5044{
5045 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
5046}
5047
5048/**
5049 * @copydoc PDMDEVHLPR3::pfnA20Set
5050 */
5051DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
5052{
5053 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5054}
5055
5056/**
5057 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5058 */
5059DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5060{
5061 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5062}
5063
5064/**
5065 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5066 */
5067DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
5068{
5069 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
5070}
5071
5072/**
5073 * @copydoc PDMDEVHLPR3::pfnPICRegister
5074 */
5075DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5076{
5077 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5078}
5079
5080/**
5081 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5082 */
5083DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
5084{
5085 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
5086}
5087
5088/**
5089 * @copydoc PDMDEVHLPR3::pfnIOAPICRegister
5090 */
5091DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5092{
5093 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5094}
5095
5096/**
5097 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5098 */
5099DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5100{
5101 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5102}
5103
5104/**
5105 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5106 */
5107DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5108{
5109 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5110}
5111
5112/**
5113 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5114 */
5115DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5116{
5117 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5118}
5119
5120/**
5121 * @copydoc PDMDEVHLPR3::pfnDMARegister
5122 */
5123DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5124{
5125 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5126}
5127
5128/**
5129 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5130 */
5131DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5132{
5133 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5134}
5135
5136/**
5137 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5138 */
5139DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5140{
5141 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5142}
5143
5144/**
5145 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5146 */
5147DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5148{
5149 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5150}
5151
5152/**
5153 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5154 */
5155DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5156{
5157 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5158}
5159
5160/**
5161 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5162 */
5163DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5164{
5165 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5166}
5167
5168/**
5169 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5170 */
5171DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5172{
5173 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5174}
5175
5176/**
5177 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5178 */
5179DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5180{
5181 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5182}
5183
5184/**
5185 * @copydoc PDMDEVHLPR3::pfnCallR0
5186 */
5187DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5188{
5189 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5190}
5191
5192/**
5193 * @copydoc PDMDEVHLPR3::pfnVMGetSuspendReason
5194 */
5195DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5196{
5197 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5198}
5199
5200/**
5201 * @copydoc PDMDEVHLPR3::pfnVMGetResumeReason
5202 */
5203DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5204{
5205 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5206}
5207
5208/**
5209 * @copydoc PDMDEVHLPR3::pfnGetUVM
5210 */
5211DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5212{
5213 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5214}
5215
5216#endif /* IN_RING3 */
5217
5218/**
5219 * @copydoc PDMDEVHLPR3::pfnGetVM
5220 */
5221DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5222{
5223 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5224}
5225
5226/**
5227 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5228 */
5229DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5230{
5231 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5232}
5233
5234/**
5235 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5236 */
5237DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5238{
5239 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5240}
5241
5242/**
5243 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5244 */
5245DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5246{
5247 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5248}
5249
5250/**
5251 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5252 */
5253DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5254{
5255 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5256}
5257
5258/**
5259 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5260 */
5261DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5262{
5263 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5264}
5265
5266#ifdef IN_RING3
5267
5268/**
5269 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5270 */
5271DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5272{
5273 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5274}
5275
5276/**
5277 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5278 */
5279DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5280{
5281 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5282}
5283
5284/**
5285 * @copydoc PDMDEVHLPR3::pfnVMReset
5286 */
5287DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5288{
5289 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5290}
5291
5292/**
5293 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5294 */
5295DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5296{
5297 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5298}
5299
5300/**
5301 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5302 */
5303DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5304{
5305 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5306}
5307
5308/**
5309 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5310 */
5311DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5312{
5313 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5314}
5315
5316#endif /* IN_RING3 */
5317
5318/**
5319 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5320 */
5321DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5322{
5323 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5324}
5325
5326#ifdef IN_RING3
5327
5328/**
5329 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5330 */
5331DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5332{
5333 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5334}
5335
5336/**
5337 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5338 */
5339DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5340{
5341 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5342}
5343
5344#endif /* IN_RING3 */
5345#ifdef IN_RING0
5346
5347/**
5348 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5349 */
5350DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5351{
5352 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5353}
5354
5355#endif /* IN_RING0 */
5356
5357
5358
5359
5360/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5361typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5362
5363/**
5364 * Callbacks for VBoxDeviceRegister().
5365 */
5366typedef struct PDMDEVREGCB
5367{
5368 /** Interface version.
5369 * This is set to PDM_DEVREG_CB_VERSION. */
5370 uint32_t u32Version;
5371
5372 /**
5373 * Registers a device with the current VM instance.
5374 *
5375 * @returns VBox status code.
5376 * @param pCallbacks Pointer to the callback table.
5377 * @param pReg Pointer to the device registration record.
5378 * This data must be permanent and readonly.
5379 */
5380 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5381} PDMDEVREGCB;
5382
5383/** Current version of the PDMDEVREGCB structure. */
5384#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5385
5386
5387/**
5388 * The VBoxDevicesRegister callback function.
5389 *
5390 * PDM will invoke this function after loading a device module and letting
5391 * the module decide which devices to register and how to handle conflicts.
5392 *
5393 * @returns VBox status code.
5394 * @param pCallbacks Pointer to the callback table.
5395 * @param u32Version VBox version number.
5396 */
5397typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5398
5399/** @} */
5400
5401RT_C_DECLS_END
5402
5403#endif
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette