VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 60406

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDevIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Soft reset notification.
137 *
138 * This is mainly for emulating the 286 style protected mode exits, in which
139 * most devices should remain in their current state.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 * @param fFlags PDMVMRESET_F_XXX (only bits relevant to soft resets).
144 *
145 * @remarks Caller enters the device critical section.
146 */
147typedef DECLCALLBACK(void) FNPDMDEVSOFTRESET(PPDMDEVINS pDevIns, uint32_t fFlags);
148/** Pointer to a FNPDMDEVSOFTRESET() function. */
149typedef FNPDMDEVSOFTRESET *PFNPDMDEVSOFTRESET;
150
151/** @name PDMVMRESET_F_XXX - VM reset flags.
152 * These flags are used both for FNPDMDEVSOFTRESET and for hardware signalling
153 * reset via PDMDevHlpVMReset.
154 * @{ */
155/** Unknown reason. */
156#define PDMVMRESET_F_UNKNOWN UINT32_C(0x00000000)
157/** GIM triggered reset. */
158#define PDMVMRESET_F_GIM UINT32_C(0x00000001)
159/** The last source always causing hard resets. */
160#define PDMVMRESET_F_LAST_ALWAYS_HARD PDMVMRESET_F_GIM
161/** ACPI triggered reset. */
162#define PDMVMRESET_F_ACPI UINT32_C(0x0000000c)
163/** PS/2 system port A (92h) reset. */
164#define PDMVMRESET_F_PORT_A UINT32_C(0x0000000d)
165/** Keyboard reset. */
166#define PDMVMRESET_F_KBD UINT32_C(0x0000000e)
167/** Tripple fault. */
168#define PDMVMRESET_F_TRIPLE_FAULT UINT32_C(0x0000000f)
169/** Reset source mask. */
170#define PDMVMRESET_F_SRC_MASK UINT32_C(0x0000000f)
171/** @} */
172
173/**
174 * Suspend notification.
175 *
176 * @returns VBox status.
177 * @param pDevIns The device instance data.
178 * @thread EMT(0)
179 *
180 * @remarks Caller enters the device critical section.
181 */
182typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
183/** Pointer to a FNPDMDEVSUSPEND() function. */
184typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
185
186/**
187 * Resume notification.
188 *
189 * @returns VBox status.
190 * @param pDevIns The device instance data.
191 *
192 * @remarks Caller enters the device critical section.
193 */
194typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
195/** Pointer to a FNPDMDEVRESUME() function. */
196typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
197
198/**
199 * Power Off notification.
200 *
201 * This is always called when VMR3PowerOff is called.
202 * There will be no callback when hot plugging devices.
203 *
204 * @param pDevIns The device instance data.
205 * @thread EMT(0)
206 *
207 * @remarks Caller enters the device critical section.
208 */
209typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
210/** Pointer to a FNPDMDEVPOWEROFF() function. */
211typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
212
213/**
214 * Attach command.
215 *
216 * This is called to let the device attach to a driver for a specified LUN
217 * at runtime. This is not called during VM construction, the device
218 * constructor has to attach to all the available drivers.
219 *
220 * This is like plugging in the keyboard or mouse after turning on the PC.
221 *
222 * @returns VBox status code.
223 * @param pDevIns The device instance.
224 * @param iLUN The logical unit which is being attached.
225 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
226 *
227 * @remarks Caller enters the device critical section.
228 */
229typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
230/** Pointer to a FNPDMDEVATTACH() function. */
231typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
232
233/**
234 * Detach notification.
235 *
236 * This is called when a driver is detaching itself from a LUN of the device.
237 * The device should adjust its state to reflect this.
238 *
239 * This is like unplugging the network cable to use it for the laptop or
240 * something while the PC is still running.
241 *
242 * @param pDevIns The device instance.
243 * @param iLUN The logical unit which is being detached.
244 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
245 *
246 * @remarks Caller enters the device critical section.
247 */
248typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
249/** Pointer to a FNPDMDEVDETACH() function. */
250typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
251
252/**
253 * Query the base interface of a logical unit.
254 *
255 * @returns VBOX status code.
256 * @param pDevIns The device instance.
257 * @param iLUN The logicial unit to query.
258 * @param ppBase Where to store the pointer to the base interface of the LUN.
259 *
260 * @remarks The device critical section is not entered.
261 */
262typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
263/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
264typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
265
266/**
267 * Init complete notification (after ring-0 & RC init since 5.1).
268 *
269 * This can be done to do communication with other devices and other
270 * initialization which requires everything to be in place.
271 *
272 * @returns VBOX status code.
273 * @param pDevIns The device instance.
274 *
275 * @remarks Caller enters the device critical section.
276 */
277typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
278/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
279typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
280
281
282/**
283 * The context of a pfnMemSetup call.
284 */
285typedef enum PDMDEVMEMSETUPCTX
286{
287 /** Invalid zero value. */
288 PDMDEVMEMSETUPCTX_INVALID = 0,
289 /** After construction. */
290 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
291 /** After reset. */
292 PDMDEVMEMSETUPCTX_AFTER_RESET,
293 /** Type size hack. */
294 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
295} PDMDEVMEMSETUPCTX;
296
297
298/**
299 * PDM Device Registration Structure.
300 *
301 * This structure is used when registering a device from VBoxInitDevices() in HC
302 * Ring-3. PDM will continue use till the VM is terminated.
303 */
304typedef struct PDMDEVREG
305{
306 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
307 uint32_t u32Version;
308 /** Device name. */
309 char szName[32];
310 /** Name of the raw-mode context module (no path).
311 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
312 char szRCMod[32];
313 /** Name of the ring-0 module (no path).
314 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
315 char szR0Mod[32];
316 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
317 * remain unchanged from registration till VM destruction. */
318 const char *pszDescription;
319
320 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
321 uint32_t fFlags;
322 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
323 uint32_t fClass;
324 /** Maximum number of instances (per VM). */
325 uint32_t cMaxInstances;
326 /** Size of the instance data. */
327 uint32_t cbInstance;
328
329 /** Construct instance - required. */
330 PFNPDMDEVCONSTRUCT pfnConstruct;
331 /** Destruct instance - optional.
332 * Critical section NOT entered (will be destroyed). */
333 PFNPDMDEVDESTRUCT pfnDestruct;
334 /** Relocation command - optional.
335 * Critical section NOT entered. */
336 PFNPDMDEVRELOCATE pfnRelocate;
337
338 /**
339 * Memory setup callback.
340 *
341 * @param pDevIns The device instance data.
342 * @param enmCtx Indicates the context of the call.
343 * @remarks The critical section is entered prior to calling this method.
344 */
345 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
346
347 /** Power on notification - optional.
348 * Critical section is entered. */
349 PFNPDMDEVPOWERON pfnPowerOn;
350 /** Reset notification - optional.
351 * Critical section is entered. */
352 PFNPDMDEVRESET pfnReset;
353 /** Suspend notification - optional.
354 * Critical section is entered. */
355 PFNPDMDEVSUSPEND pfnSuspend;
356 /** Resume notification - optional.
357 * Critical section is entered. */
358 PFNPDMDEVRESUME pfnResume;
359 /** Attach command - optional.
360 * Critical section is entered. */
361 PFNPDMDEVATTACH pfnAttach;
362 /** Detach notification - optional.
363 * Critical section is entered. */
364 PFNPDMDEVDETACH pfnDetach;
365 /** Query a LUN base interface - optional.
366 * Critical section is NOT entered. */
367 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
368 /** Init complete notification - optional.
369 * Critical section is entered. */
370 PFNPDMDEVINITCOMPLETE pfnInitComplete;
371 /** Power off notification - optional.
372 * Critical section is entered. */
373 PFNPDMDEVPOWEROFF pfnPowerOff;
374 /** Software system reset notification - optional.
375 * Critical section is entered. */
376 PFNPDMDEVSOFTRESET pfnSoftReset;
377 /** Initialization safty marker. */
378 uint32_t u32VersionEnd;
379} PDMDEVREG;
380/** Pointer to a PDM Device Structure. */
381typedef PDMDEVREG *PPDMDEVREG;
382/** Const pointer to a PDM Device Structure. */
383typedef PDMDEVREG const *PCPDMDEVREG;
384
385/** Current DEVREG version number. */
386#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 1)
387
388/** PDM Device Flags.
389 * @{ */
390/** This flag is used to indicate that the device has a RC component. */
391#define PDM_DEVREG_FLAGS_RC 0x00000001
392/** This flag is used to indicate that the device has a R0 component. */
393#define PDM_DEVREG_FLAGS_R0 0x00000002
394
395/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
396 * The bit count for the current host. */
397#if HC_ARCH_BITS == 32
398# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
399#elif HC_ARCH_BITS == 64
400# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
401#else
402# error Unsupported HC_ARCH_BITS value.
403#endif
404/** The host bit count mask. */
405#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
406
407/** The device support only 32-bit guests. */
408#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
409/** The device support only 64-bit guests. */
410#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
411/** The device support both 32-bit & 64-bit guests. */
412#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
413/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
414 * The guest bit count for the current compilation. */
415#if GC_ARCH_BITS == 32
416# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
417#elif GC_ARCH_BITS == 64
418# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
419#else
420# error Unsupported GC_ARCH_BITS value.
421#endif
422/** The guest bit count mask. */
423#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
424
425/** A convenience. */
426#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
427
428/** Indicates that the devices support PAE36 on a 32-bit guest. */
429#define PDM_DEVREG_FLAGS_PAE36 0x00001000
430
431/** Indicates that the device needs to be notified before the drivers when suspending. */
432#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
433
434/** Indicates that the device needs to be notified before the drivers when powering off. */
435#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
436
437/** Indicates that the device needs to be notified before the drivers when resetting. */
438#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
439/** @} */
440
441
442/** PDM Device Classes.
443 * The order is important, lower bit earlier instantiation.
444 * @{ */
445/** Architecture device. */
446#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
447/** Architecture BIOS device. */
448#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
449/** PCI bus brigde. */
450#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
451/** ISA bus brigde. */
452#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
453/** Input device (mouse, keyboard, joystick, HID, ...). */
454#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
455/** Interrupt controller (PIC). */
456#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
457/** Interval controoler (PIT). */
458#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
459/** RTC/CMOS. */
460#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
461/** DMA controller. */
462#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
463/** VMM Device. */
464#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
465/** Graphics device, like VGA. */
466#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
467/** Storage controller device. */
468#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
469/** Network interface controller. */
470#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
471/** Audio. */
472#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
473/** USB HIC. */
474#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
475/** ACPI. */
476#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
477/** Serial controller device. */
478#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
479/** Parallel controller device */
480#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
481/** Host PCI pass-through device */
482#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
483/** Misc devices (always last). */
484#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
485/** @} */
486
487
488/** @name IRQ Level for use with the *SetIrq APIs.
489 * @{
490 */
491/** Assert the IRQ (can assume value 1). */
492#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
493/** Deassert the IRQ (can assume value 0). */
494#define PDM_IRQ_LEVEL_LOW 0
495/** flip-flop - deassert and then assert the IRQ again immediately. */
496#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
497/** @} */
498
499/**
500 * Registration record for MSI.
501 */
502typedef struct PDMMSIREG
503{
504 /** Number of MSI interrupt vectors, 0 if MSI not supported */
505 uint16_t cMsiVectors;
506 /** Offset of MSI capability */
507 uint8_t iMsiCapOffset;
508 /** Offset of next capability to MSI */
509 uint8_t iMsiNextOffset;
510 /** If we support 64-bit MSI addressing */
511 bool fMsi64bit;
512
513 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
514 uint16_t cMsixVectors;
515 /** Offset of MSI-X capability */
516 uint8_t iMsixCapOffset;
517 /** Offset of next capability to MSI-X */
518 uint8_t iMsixNextOffset;
519 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
520 uint8_t iMsixBar;
521} PDMMSIREG;
522typedef PDMMSIREG *PPDMMSIREG;
523
524/**
525 * PCI Bus registration structure.
526 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
527 */
528typedef struct PDMPCIBUSREG
529{
530 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
531 uint32_t u32Version;
532
533 /**
534 * Registers the device with the default PCI bus.
535 *
536 * @returns VBox status code.
537 * @param pDevIns Device instance of the PCI Bus.
538 * @param pPciDev The PCI device structure.
539 * Any PCI enabled device must keep this in it's instance data!
540 * Fill in the PCI data config before registration, please.
541 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
542 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
543 * If negative, the pci bus device will assign one.
544 * @remarks Caller enters the PDM critical section.
545 */
546 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
547
548 /**
549 * Initialize MSI support in a PCI device.
550 *
551 * @returns VBox status code.
552 * @param pDevIns Device instance of the PCI Bus.
553 * @param pPciDev The PCI device structure.
554 * @param pMsiReg MSI registration structure
555 * @remarks Caller enters the PDM critical section.
556 */
557 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
558
559 /**
560 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
561 *
562 * @returns VBox status code.
563 * @param pDevIns Device instance of the PCI Bus.
564 * @param pPciDev The PCI device structure.
565 * @param iRegion The region number.
566 * @param cbRegion Size of the region.
567 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
568 * @param pfnCallback Callback for doing the mapping.
569 * @remarks Caller enters the PDM critical section.
570 */
571 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
572
573 /**
574 * Register PCI configuration space read/write callbacks.
575 *
576 * @param pDevIns Device instance of the PCI Bus.
577 * @param pPciDev The PCI device structure.
578 * @param pfnRead Pointer to the user defined PCI config read function.
579 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
580 * PCI config read function. This way, user can decide when (and if)
581 * to call default PCI config read function. Can be NULL.
582 * @param pfnWrite Pointer to the user defined PCI config write function.
583 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
584 * PCI config write function. This way, user can decide when (and if)
585 * to call default PCI config write function. Can be NULL.
586 * @remarks Caller enters the PDM critical section.
587 * @thread EMT
588 */
589 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
590 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
591
592 /**
593 * Set the IRQ for a PCI device.
594 *
595 * @param pDevIns Device instance of the PCI Bus.
596 * @param pPciDev The PCI device structure.
597 * @param iIrq IRQ number to set.
598 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
599 * @param uTagSrc The IRQ tag and source (for tracing).
600 * @remarks Caller enters the PDM critical section.
601 */
602 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
603
604 /**
605 * Called to perform the job of the bios.
606 * This is only called for the first PCI Bus - it is expected to
607 * service all the PCI buses.
608 *
609 * @returns VBox status.
610 * @param pDevIns Device instance of the first bus.
611 * @remarks Caller enters the PDM critical section.
612 */
613 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
614
615 /** The name of the SetIrq RC entry point. */
616 const char *pszSetIrqRC;
617
618 /** The name of the SetIrq R0 entry point. */
619 const char *pszSetIrqR0;
620
621} PDMPCIBUSREG;
622/** Pointer to a PCI bus registration structure. */
623typedef PDMPCIBUSREG *PPDMPCIBUSREG;
624
625/** Current PDMPCIBUSREG version number. */
626#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
627
628/**
629 * PCI Bus RC helpers.
630 */
631typedef struct PDMPCIHLPRC
632{
633 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
634 uint32_t u32Version;
635
636 /**
637 * Set an ISA IRQ.
638 *
639 * @param pDevIns PCI device instance.
640 * @param iIrq IRQ number to set.
641 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
642 * @param uTagSrc The IRQ tag and source (for tracing).
643 * @thread EMT only.
644 */
645 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
646
647 /**
648 * Set an I/O-APIC IRQ.
649 *
650 * @param pDevIns PCI device instance.
651 * @param iIrq IRQ number to set.
652 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
653 * @param uTagSrc The IRQ tag and source (for tracing).
654 * @thread EMT only.
655 */
656 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
657
658 /**
659 * Send an MSI.
660 *
661 * @param pDevIns PCI device instance.
662 * @param GCPhys Physical address MSI request was written.
663 * @param uValue Value written.
664 * @param uTagSrc The IRQ tag and source (for tracing).
665 * @thread EMT only.
666 */
667 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
668
669
670 /**
671 * Acquires the PDM lock.
672 *
673 * @returns VINF_SUCCESS on success.
674 * @returns rc if we failed to acquire the lock.
675 * @param pDevIns The PCI device instance.
676 * @param rc What to return if we fail to acquire the lock.
677 */
678 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
679
680 /**
681 * Releases the PDM lock.
682 *
683 * @param pDevIns The PCI device instance.
684 */
685 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
686
687 /** Just a safety precaution. */
688 uint32_t u32TheEnd;
689} PDMPCIHLPRC;
690/** Pointer to PCI helpers. */
691typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
692/** Pointer to const PCI helpers. */
693typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
694
695/** Current PDMPCIHLPRC version number. */
696#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
697
698
699/**
700 * PCI Bus R0 helpers.
701 */
702typedef struct PDMPCIHLPR0
703{
704 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
705 uint32_t u32Version;
706
707 /**
708 * Set an ISA IRQ.
709 *
710 * @param pDevIns PCI device instance.
711 * @param iIrq IRQ number to set.
712 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
713 * @param uTagSrc The IRQ tag and source (for tracing).
714 * @thread EMT only.
715 */
716 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
717
718 /**
719 * Set an I/O-APIC IRQ.
720 *
721 * @param pDevIns PCI device instance.
722 * @param iIrq IRQ number to set.
723 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
724 * @param uTagSrc The IRQ tag and source (for tracing).
725 * @thread EMT only.
726 */
727 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
728
729 /**
730 * Send an MSI.
731 *
732 * @param pDevIns PCI device instance.
733 * @param GCPhys Physical address MSI request was written.
734 * @param uValue Value written.
735 * @param uTagSrc The IRQ tag and source (for tracing).
736 * @thread EMT only.
737 */
738 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
739
740
741 /**
742 * Acquires the PDM lock.
743 *
744 * @returns VINF_SUCCESS on success.
745 * @returns rc if we failed to acquire the lock.
746 * @param pDevIns The PCI device instance.
747 * @param rc What to return if we fail to acquire the lock.
748 */
749 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
750
751 /**
752 * Releases the PDM lock.
753 *
754 * @param pDevIns The PCI device instance.
755 */
756 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
757
758 /** Just a safety precaution. */
759 uint32_t u32TheEnd;
760} PDMPCIHLPR0;
761/** Pointer to PCI helpers. */
762typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
763/** Pointer to const PCI helpers. */
764typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
765
766/** Current PDMPCIHLPR0 version number. */
767#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
768
769/**
770 * PCI device helpers.
771 */
772typedef struct PDMPCIHLPR3
773{
774 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
775 uint32_t u32Version;
776
777 /**
778 * Set an ISA IRQ.
779 *
780 * @param pDevIns The PCI device instance.
781 * @param iIrq IRQ number to set.
782 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
783 * @param uTagSrc The IRQ tag and source (for tracing).
784 */
785 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
786
787 /**
788 * Set an I/O-APIC IRQ.
789 *
790 * @param pDevIns The PCI device instance.
791 * @param iIrq IRQ number to set.
792 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
793 * @param uTagSrc The IRQ tag and source (for tracing).
794 */
795 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
796
797 /**
798 * Send an MSI.
799 *
800 * @param pDevIns PCI device instance.
801 * @param GCPhys Physical address MSI request was written.
802 * @param uValue Value written.
803 * @param uTagSrc The IRQ tag and source (for tracing).
804 */
805 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
806
807 /**
808 * Checks if the given address is an MMIO2 base address or not.
809 *
810 * @returns true/false accordingly.
811 * @param pDevIns The PCI device instance.
812 * @param pOwner The owner of the memory, optional.
813 * @param GCPhys The address to check.
814 */
815 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
816
817 /**
818 * Gets the address of the RC PCI Bus helpers.
819 *
820 * This should be called at both construction and relocation time
821 * to obtain the correct address of the RC helpers.
822 *
823 * @returns RC pointer to the PCI Bus helpers.
824 * @param pDevIns Device instance of the PCI Bus.
825 * @thread EMT only.
826 */
827 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
828
829 /**
830 * Gets the address of the R0 PCI Bus helpers.
831 *
832 * This should be called at both construction and relocation time
833 * to obtain the correct address of the R0 helpers.
834 *
835 * @returns R0 pointer to the PCI Bus helpers.
836 * @param pDevIns Device instance of the PCI Bus.
837 * @thread EMT only.
838 */
839 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
840
841 /**
842 * Acquires the PDM lock.
843 *
844 * @returns VINF_SUCCESS on success.
845 * @returns Fatal error on failure.
846 * @param pDevIns The PCI device instance.
847 * @param rc Dummy for making the interface identical to the RC and R0 versions.
848 */
849 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
850
851 /**
852 * Releases the PDM lock.
853 *
854 * @param pDevIns The PCI device instance.
855 */
856 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
857
858 /** Just a safety precaution. */
859 uint32_t u32TheEnd;
860} PDMPCIHLPR3;
861/** Pointer to PCI helpers. */
862typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
863/** Pointer to const PCI helpers. */
864typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
865
866/** Current PDMPCIHLPR3 version number. */
867#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
868
869
870/**
871 * Programmable Interrupt Controller registration structure.
872 */
873typedef struct PDMPICREG
874{
875 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
876 uint32_t u32Version;
877
878 /**
879 * Set the an IRQ.
880 *
881 * @param pDevIns Device instance of the PIC.
882 * @param iIrq IRQ number to set.
883 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
884 * @param uTagSrc The IRQ tag and source (for tracing).
885 * @remarks Caller enters the PDM critical section.
886 */
887 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
888
889 /**
890 * Get a pending interrupt.
891 *
892 * @returns Pending interrupt number.
893 * @param pDevIns Device instance of the PIC.
894 * @param puTagSrc Where to return the IRQ tag and source.
895 * @remarks Caller enters the PDM critical section.
896 */
897 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
898
899 /** The name of the RC SetIrq entry point. */
900 const char *pszSetIrqRC;
901 /** The name of the RC GetInterrupt entry point. */
902 const char *pszGetInterruptRC;
903
904 /** The name of the R0 SetIrq entry point. */
905 const char *pszSetIrqR0;
906 /** The name of the R0 GetInterrupt entry point. */
907 const char *pszGetInterruptR0;
908} PDMPICREG;
909/** Pointer to a PIC registration structure. */
910typedef PDMPICREG *PPDMPICREG;
911
912/** Current PDMPICREG version number. */
913#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
914
915/**
916 * PIC RC helpers.
917 */
918typedef struct PDMPICHLPRC
919{
920 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
921 uint32_t u32Version;
922
923 /**
924 * Set the interrupt force action flag.
925 *
926 * @param pDevIns Device instance of the PIC.
927 */
928 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
929
930 /**
931 * Clear the interrupt force action flag.
932 *
933 * @param pDevIns Device instance of the PIC.
934 */
935 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
936
937 /**
938 * Acquires the PDM lock.
939 *
940 * @returns VINF_SUCCESS on success.
941 * @returns rc if we failed to acquire the lock.
942 * @param pDevIns The PIC device instance.
943 * @param rc What to return if we fail to acquire the lock.
944 */
945 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
946
947 /**
948 * Releases the PDM lock.
949 *
950 * @param pDevIns The PIC device instance.
951 */
952 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
953
954 /** Just a safety precaution. */
955 uint32_t u32TheEnd;
956} PDMPICHLPRC;
957
958/** Pointer to PIC RC helpers. */
959typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
960/** Pointer to const PIC RC helpers. */
961typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
962
963/** Current PDMPICHLPRC version number. */
964#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
965
966
967/**
968 * PIC R0 helpers.
969 */
970typedef struct PDMPICHLPR0
971{
972 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
973 uint32_t u32Version;
974
975 /**
976 * Set the interrupt force action flag.
977 *
978 * @param pDevIns Device instance of the PIC.
979 */
980 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
981
982 /**
983 * Clear the interrupt force action flag.
984 *
985 * @param pDevIns Device instance of the PIC.
986 */
987 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
988
989 /**
990 * Acquires the PDM lock.
991 *
992 * @returns VINF_SUCCESS on success.
993 * @returns rc if we failed to acquire the lock.
994 * @param pDevIns The PIC device instance.
995 * @param rc What to return if we fail to acquire the lock.
996 */
997 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
998
999 /**
1000 * Releases the PDM lock.
1001 *
1002 * @param pDevIns The PCI device instance.
1003 */
1004 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1005
1006 /** Just a safety precaution. */
1007 uint32_t u32TheEnd;
1008} PDMPICHLPR0;
1009
1010/** Pointer to PIC R0 helpers. */
1011typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
1012/** Pointer to const PIC R0 helpers. */
1013typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
1014
1015/** Current PDMPICHLPR0 version number. */
1016#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
1017
1018/**
1019 * PIC R3 helpers.
1020 */
1021typedef struct PDMPICHLPR3
1022{
1023 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
1024 uint32_t u32Version;
1025
1026 /**
1027 * Set the interrupt force action flag.
1028 *
1029 * @param pDevIns Device instance of the PIC.
1030 */
1031 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1032
1033 /**
1034 * Clear the interrupt force action flag.
1035 *
1036 * @param pDevIns Device instance of the PIC.
1037 */
1038 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1039
1040 /**
1041 * Acquires the PDM lock.
1042 *
1043 * @returns VINF_SUCCESS on success.
1044 * @returns Fatal error on failure.
1045 * @param pDevIns The PIC device instance.
1046 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1047 */
1048 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1049
1050 /**
1051 * Releases the PDM lock.
1052 *
1053 * @param pDevIns The PIC device instance.
1054 */
1055 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1056
1057 /**
1058 * Gets the address of the RC PIC helpers.
1059 *
1060 * This should be called at both construction and relocation time
1061 * to obtain the correct address of the RC helpers.
1062 *
1063 * @returns RC pointer to the PIC helpers.
1064 * @param pDevIns Device instance of the PIC.
1065 */
1066 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1067
1068 /**
1069 * Gets the address of the R0 PIC helpers.
1070 *
1071 * This should be called at both construction and relocation time
1072 * to obtain the correct address of the R0 helpers.
1073 *
1074 * @returns R0 pointer to the PIC helpers.
1075 * @param pDevIns Device instance of the PIC.
1076 */
1077 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1078
1079 /** Just a safety precaution. */
1080 uint32_t u32TheEnd;
1081} PDMPICHLPR3;
1082
1083/** Pointer to PIC R3 helpers. */
1084typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1085/** Pointer to const PIC R3 helpers. */
1086typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1087
1088/** Current PDMPICHLPR3 version number. */
1089#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1090
1091
1092
1093/**
1094 * Firmware registration structure.
1095 */
1096typedef struct PDMFWREG
1097{
1098 /** Struct version+magic number (PDM_FWREG_VERSION). */
1099 uint32_t u32Version;
1100
1101 /**
1102 * Checks whether this is a hard or soft reset.
1103 *
1104 * The current definition of soft reset is what the PC BIOS does when CMOS[0xF]
1105 * is 5, 9 or 0xA.
1106 *
1107 * @returns true if hard reset, false if soft.
1108 * @param pDevIns Device instance of the firmware.
1109 * @param fFlags PDMRESET_F_XXX passed to the PDMDevHlpVMReset API.
1110 */
1111 DECLR3CALLBACKMEMBER(bool, pfnIsHardReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
1112
1113 /** Just a safety precaution. */
1114 uint32_t u32TheEnd;
1115} PDMFWREG;
1116/** Pointer to a FW registration structure. */
1117typedef PDMFWREG *PPDMFWREG;
1118/** Pointer to a const FW registration structure. */
1119typedef PDMFWREG const *PCPDMFWREG;
1120
1121/** Current PDMFWREG version number. */
1122#define PDM_FWREG_VERSION PDM_VERSION_MAKE(0xffdd, 1, 0)
1123
1124/**
1125 * Firmware R3 helpers.
1126 */
1127typedef struct PDMFWHLPR3
1128{
1129 /** Structure version. PDM_FWHLP_VERSION defines the current version. */
1130 uint32_t u32Version;
1131
1132 /** Just a safety precaution. */
1133 uint32_t u32TheEnd;
1134} PDMFWHLPR3;
1135
1136/** Pointer to FW R3 helpers. */
1137typedef R3PTRTYPE(PDMFWHLPR3 *) PPDMFWHLPR3;
1138/** Pointer to const FW R3 helpers. */
1139typedef R3PTRTYPE(const PDMFWHLPR3 *) PCPDMFWHLPR3;
1140
1141/** Current PDMFWHLPR3 version number. */
1142#define PDM_FWHLPR3_VERSION PDM_VERSION_MAKE(0xffdb, 1, 0)
1143
1144
1145/**
1146 * Advanced Programmable Interrupt Controller registration structure.
1147 */
1148typedef struct PDMAPICREG
1149{
1150 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1151 uint32_t u32Version;
1152
1153 /**
1154 * Get a pending interrupt.
1155 *
1156 * @returns Pending interrupt number, -1 if no interrupt is
1157 * pending.
1158 * @param pDevIns Device instance of the APIC.
1159 * @param pVCpu The cross context virtual CPU structure.
1160 * @param puTagSrc Where to return the tag source (tracing purposes).
1161 * @remarks Caller enters the PDM critical section
1162 */
1163 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t *puTagSrc));
1164
1165 /**
1166 * Check if the APIC has a pending interrupt/if a TPR change would activate one.
1167 *
1168 * @returns true if an interrupt is pending, false otherwise.
1169 * @param pDevIns Device instance of the APIC.
1170 * @param pVCpu The cross context virtual CPU structure.
1171 * @param pu8PendingIrq Where to store the highest priority pending IRQ
1172 * (optional, can be NULL).
1173 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1174 * prior to calling this method.
1175 */
1176 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8PendingIrq));
1177
1178 /**
1179 * Set the APIC base.
1180 *
1181 * @param pDevIns Device instance of the APIC.
1182 * @param pVCpu The cross context virtual CPU structure.
1183 * @param u64BaseMsr The base MSR value.
1184 * @remarks Caller enters the PDM critical section (might not be the case with
1185 * the new APIC code)
1186 */
1187 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64BaseMsr));
1188
1189 /**
1190 * Get the APIC base.
1191 *
1192 * @returns Current base.
1193 * @param pDevIns Device instance of the APIC.
1194 * @param pVCpu The cross context virtual CPU structure.
1195 * @remarks Caller enters the PDM critical section.
1196 */
1197 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
1198
1199 /**
1200 * Set the TPR (task priority register).
1201 *
1202 * @param pDevIns Device instance of the APIC.
1203 * @param pVCpu The cross context virtual CPU structure.
1204 * @param u8Tpr The new TPR.
1205 * @remarks Caller enters the PDM critical section.
1206 */
1207 DECLR3CALLBACKMEMBER(void, pfnSetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
1208
1209 /**
1210 * Get the TPR (task priority register).
1211 *
1212 * @returns The current TPR.
1213 * @param pDevIns Device instance of the APIC.
1214 * @param pVCpu The cross context virtual CPU structure.
1215 * @remarks Caller enters the PDM critical section.
1216 */
1217 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
1218
1219 /**
1220 * Write to a MSR in APIC range.
1221 *
1222 * @returns Strict VBox status code.
1223 * @param pDevIns Device instance of the APIC.
1224 * @param pVCpu The cross context virtual CPU structure.
1225 * @param u32Reg The MSR begin written to.
1226 * @param u64Value The value to write.
1227 *
1228 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1229 * calling this method.
1230 */
1231 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
1232
1233 /**
1234 * Read from a MSR in APIC range.
1235 *
1236 * @returns Strict VBox status code.
1237 * @param pDevIns Device instance of the APIC.
1238 * @param pVCpu The cross context virtual CPU structure.
1239 * @param u32Reg MSR to read.
1240 * @param pu64Value Where to return the read value.
1241 *
1242 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1243 * calling this method.
1244 */
1245 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
1246
1247 /**
1248 * Private interface between the IOAPIC and APIC.
1249 *
1250 * This is a low-level, APIC/IOAPIC implementation specific interface which
1251 * is registered with PDM only because it makes life so much simpler right
1252 * now (GC bits). This is a bad bad hack! The correct way of doing this
1253 * would involve some way of querying GC interfaces and relocating them.
1254 * Perhaps doing some kind of device init in GC...
1255 *
1256 * @returns VBox status code.
1257 * @param pDevIns Device instance of the APIC.
1258 * @param uDest The destination mask.
1259 * @param uDestMode The destination mode, see XAPICDESTMODE.
1260 * @param uDeliveryMode The delivery mode, see XAPICDELIVERYMODE.
1261 * @param uVector The interrupt vector.
1262 * @param uPolarity The input pin polarity.
1263 * @param uTriggerMode The trigger mode, see XAPICTRIGGERMODE.
1264 * @param uTagSrc The IRQ tag and source (for tracing).
1265 * @remarks Caller enters the PDM critical section.
1266 */
1267 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode,
1268 uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
1269
1270 /**
1271 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1272 *
1273 * Used for virtual wire mode when interrupts from the PIC are passed through
1274 * LAPIC.
1275 *
1276 * @returns Strict VBox status code.
1277 * @param pDevIns Device instance of the APIC.
1278 * @param pVCpu The cross context virtual CPU structure.
1279 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1280 * @param u8Level The level.
1281 * @param rcRZ The return code if the operation cannot be
1282 * performed in the current context.
1283 * @remarks Caller enters the PDM critical section
1284 */
1285 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
1286 int rcRZ));
1287
1288 /**
1289 * Get the APIC timer frequency (in Hz).
1290 *
1291 * @returns The frequency of the APIC timer.
1292 * @param pDevIns Device instance of the APIC.
1293 */
1294 DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3,(PPDMDEVINS pDevIns));
1295
1296 /** The name of the RC GetInterrupt entry point. */
1297 const char *pszGetInterruptRC;
1298 /** The name of the RC HasPendingIrq entry point. */
1299 const char *pszHasPendingIrqRC;
1300 /** The name of the RC SetBaseMsr entry point. */
1301 const char *pszSetBaseMsrRC;
1302 /** The name of the RC GetBaseMsr entry point. */
1303 const char *pszGetBaseMsrRC;
1304 /** The name of the RC SetTpr entry point. */
1305 const char *pszSetTprRC;
1306 /** The name of the RC GetTpr entry point. */
1307 const char *pszGetTprRC;
1308 /** The name of the RC WriteMsr entry point. */
1309 const char *pszWriteMsrRC;
1310 /** The name of the RC ReadMsr entry point. */
1311 const char *pszReadMsrRC;
1312 /** The name of the RC BusDeliver entry point. */
1313 const char *pszBusDeliverRC;
1314 /** The name of the RC LocalInterrupt entry point. */
1315 const char *pszLocalInterruptRC;
1316 /** The name of the RC GetTimerFreq entry point. */
1317 const char *pszGetTimerFreqRC;
1318
1319 /** The name of the R0 GetInterrupt entry point. */
1320 const char *pszGetInterruptR0;
1321 /** The name of the R0 HasPendingIrq entry point. */
1322 const char *pszHasPendingIrqR0;
1323 /** The name of the R0 SetBaseMsr entry point. */
1324 const char *pszSetBaseMsrR0;
1325 /** The name of the R0 GetBaseMsr entry point. */
1326 const char *pszGetBaseMsrR0;
1327 /** The name of the R0 SetTpr entry point. */
1328 const char *pszSetTprR0;
1329 /** The name of the R0 GetTpr entry point. */
1330 const char *pszGetTprR0;
1331 /** The name of the R0 WriteMsr entry point. */
1332 const char *pszWriteMsrR0;
1333 /** The name of the R0 ReadMsr entry point. */
1334 const char *pszReadMsrR0;
1335 /** The name of the R0 BusDeliver entry point. */
1336 const char *pszBusDeliverR0;
1337 /** The name of the R0 LocalInterrupt entry point. */
1338 const char *pszLocalInterruptR0;
1339 /** The name of the R0 GetTimerFreq entry point. */
1340 const char *pszGetTimerFreqR0;
1341} PDMAPICREG;
1342/** Pointer to an APIC registration structure. */
1343typedef PDMAPICREG *PPDMAPICREG;
1344
1345/** Current PDMAPICREG version number. */
1346#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 3, 0)
1347
1348
1349/**
1350 * APIC mode argument for pfnChangeFeature.
1351 *
1352 * Also used in saved-states, don't change existing values.
1353 */
1354typedef enum PDMAPICMODE
1355{
1356 /** Invalid 0 entry. */
1357 PDMAPICMODE_INVALID = 0,
1358 /** No APIC. */
1359 PDMAPICMODE_NONE,
1360 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1361 PDMAPICMODE_APIC,
1362 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1363 PDMAPICMODE_X2APIC,
1364 /** The usual 32-bit paranoia. */
1365 PDMAPICMODE_32BIT_HACK = 0x7fffffff
1366} PDMAPICMODE;
1367
1368/**
1369 * APIC irq argument for pfnSetInterruptFF and pfnClearInterruptFF.
1370 */
1371typedef enum PDMAPICIRQ
1372{
1373 /** Invalid 0 entry. */
1374 PDMAPICIRQ_INVALID = 0,
1375 /** Normal hardware interrupt. */
1376 PDMAPICIRQ_HARDWARE,
1377 /** NMI. */
1378 PDMAPICIRQ_NMI,
1379 /** SMI. */
1380 PDMAPICIRQ_SMI,
1381 /** ExtINT (HW interrupt via PIC). */
1382 PDMAPICIRQ_EXTINT,
1383 /** The usual 32-bit paranoia. */
1384 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1385} PDMAPICIRQ;
1386
1387
1388/**
1389 * APIC RC helpers.
1390 */
1391typedef struct PDMAPICHLPRC
1392{
1393 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1394 uint32_t u32Version;
1395
1396 /**
1397 * Set the interrupt force action flag.
1398 *
1399 * @param pDevIns Device instance of the APIC.
1400 * @param enmType IRQ type.
1401 * @param idCpu Virtual CPU to set flag upon.
1402 */
1403 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1404
1405 /**
1406 * Clear the interrupt force action flag.
1407 *
1408 * @param pDevIns Device instance of the APIC.
1409 * @param enmType IRQ type.
1410 * @param idCpu Virtual CPU to clear flag upon.
1411 */
1412 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1413
1414 /**
1415 * Calculates an IRQ tag for a timer, IPI or similar event.
1416 *
1417 * @returns The IRQ tag.
1418 * @param pDevIns Device instance of the APIC.
1419 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1420 */
1421 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1422
1423 /**
1424 * Modifies APIC-related bits in the CPUID feature mask.
1425 *
1426 * @param pDevIns Device instance of the APIC.
1427 * @param enmMode Supported APIC mode.
1428 */
1429 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1430
1431 /**
1432 * Acquires the PDM lock.
1433 *
1434 * @returns VINF_SUCCESS on success.
1435 * @returns rc if we failed to acquire the lock.
1436 * @param pDevIns The APIC device instance.
1437 * @param rc What to return if we fail to acquire the lock.
1438 */
1439 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1440
1441 /**
1442 * Releases the PDM lock.
1443 *
1444 * @param pDevIns The APIC device instance.
1445 */
1446 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1447
1448 /**
1449 * Get the virtual CPU id corresponding to the current EMT.
1450 *
1451 * @param pDevIns The APIC device instance.
1452 */
1453 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1454
1455 /** Just a safety precaution. */
1456 uint32_t u32TheEnd;
1457} PDMAPICHLPRC;
1458/** Pointer to APIC GC helpers. */
1459typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1460/** Pointer to const APIC helpers. */
1461typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1462
1463/** Current PDMAPICHLPRC version number. */
1464#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1465
1466
1467/**
1468 * APIC R0 helpers.
1469 */
1470typedef struct PDMAPICHLPR0
1471{
1472 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1473 uint32_t u32Version;
1474
1475 /**
1476 * Set the interrupt force action flag.
1477 *
1478 * @param pDevIns Device instance of the APIC.
1479 * @param enmType IRQ type.
1480 * @param idCpu Virtual CPU to set flag upon.
1481 */
1482 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1483
1484 /**
1485 * Clear the interrupt force action flag.
1486 *
1487 * @param pDevIns Device instance of the APIC.
1488 * @param enmType IRQ type.
1489 * @param idCpu Virtual CPU to clear flag upon.
1490 */
1491 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1492
1493 /**
1494 * Calculates an IRQ tag for a timer, IPI or similar event.
1495 *
1496 * @returns The IRQ tag.
1497 * @param pDevIns Device instance of the APIC.
1498 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1499 */
1500 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1501
1502 /**
1503 * Modifies APIC-related bits in the CPUID feature mask.
1504 *
1505 * @param pDevIns Device instance of the APIC.
1506 * @param enmMode Supported APIC mode.
1507 */
1508 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1509
1510 /**
1511 * Acquires the PDM lock.
1512 *
1513 * @returns VINF_SUCCESS on success.
1514 * @returns rc if we failed to acquire the lock.
1515 * @param pDevIns The APIC device instance.
1516 * @param rc What to return if we fail to acquire the lock.
1517 */
1518 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1519
1520 /**
1521 * Releases the PDM lock.
1522 *
1523 * @param pDevIns The APIC device instance.
1524 */
1525 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1526
1527 /**
1528 * Get the virtual CPU id corresponding to the current EMT.
1529 *
1530 * @param pDevIns The APIC device instance.
1531 */
1532 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1533
1534 /** Just a safety precaution. */
1535 uint32_t u32TheEnd;
1536} PDMAPICHLPR0;
1537/** Pointer to APIC GC helpers. */
1538typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1539/** Pointer to const APIC helpers. */
1540typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1541
1542/** Current PDMAPICHLPR0 version number. */
1543#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1544
1545/**
1546 * APIC R3 helpers.
1547 */
1548typedef struct PDMAPICHLPR3
1549{
1550 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1551 uint32_t u32Version;
1552
1553 /**
1554 * Set the interrupt force action flag.
1555 *
1556 * @param pDevIns Device instance of the APIC.
1557 * @param enmType IRQ type.
1558 * @param idCpu Virtual CPU to set flag upon.
1559 */
1560 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1561
1562 /**
1563 * Clear the interrupt force action flag.
1564 *
1565 * @param pDevIns Device instance of the APIC.
1566 * @param enmType IRQ type.
1567 * @param idCpu Virtual CPU to clear flag upon.
1568 */
1569 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1570
1571 /**
1572 * Calculates an IRQ tag for a timer, IPI or similar event.
1573 *
1574 * @returns The IRQ tag.
1575 * @param pDevIns Device instance of the APIC.
1576 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1577 */
1578 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1579
1580 /**
1581 * Modifies APIC-related bits in the CPUID feature mask.
1582 *
1583 * @param pDevIns Device instance of the APIC.
1584 * @param enmMode Supported APIC mode.
1585 */
1586 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1587
1588 /**
1589 * Get the virtual CPU id corresponding to the current EMT.
1590 *
1591 * @param pDevIns The APIC device instance.
1592 */
1593 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1594
1595 /**
1596 * Sends Startup IPI to given virtual CPU.
1597 *
1598 * @param pDevIns The APIC device instance.
1599 * @param idCpu Virtual CPU to perform Startup IPI on.
1600 * @param uVector Startup IPI vector.
1601 */
1602 DECLR3CALLBACKMEMBER(void, pfnSendStartupIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1603
1604 /**
1605 * Sends INIT IPI to given virtual CPU, should result in reset and
1606 * halting till Startup IPI.
1607 *
1608 * @param pDevIns The APIC device instance.
1609 * @param idCpu Virtual CPU to perform INIT IPI on.
1610 */
1611 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1612
1613 /**
1614 * Gets the address of the RC APIC helpers.
1615 *
1616 * This should be called at both construction and relocation time
1617 * to obtain the correct address of the RC helpers.
1618 *
1619 * @returns GC pointer to the APIC helpers.
1620 * @param pDevIns Device instance of the APIC.
1621 */
1622 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1623
1624 /**
1625 * Gets the address of the R0 APIC helpers.
1626 *
1627 * This should be called at both construction and relocation time
1628 * to obtain the correct address of the R0 helpers.
1629 *
1630 * @returns R0 pointer to the APIC helpers.
1631 * @param pDevIns Device instance of the APIC.
1632 */
1633 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1634
1635 /**
1636 * Get the critical section used to synchronize the PICs, PCI and stuff.
1637 *
1638 * @returns Ring-3 pointer to the critical section.
1639 * @param pDevIns The APIC device instance.
1640 */
1641 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1642
1643 /**
1644 * Get the critical section used to synchronize the PICs, PCI and stuff.
1645 *
1646 * @returns Raw-mode context pointer to the critical section.
1647 * @param pDevIns The APIC device instance.
1648 */
1649 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1650
1651 /**
1652 * Get the critical section used to synchronize the PICs, PCI and stuff.
1653 *
1654 * @returns Ring-0 pointer to the critical section.
1655 * @param pDevIns The APIC device instance.
1656 */
1657 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1658
1659 /** Just a safety precaution. */
1660 uint32_t u32TheEnd;
1661} PDMAPICHLPR3;
1662/** Pointer to APIC helpers. */
1663typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1664/** Pointer to const APIC helpers. */
1665typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1666
1667/** Current PDMAPICHLP version number. */
1668#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1669
1670
1671/**
1672 * I/O APIC registration structure.
1673 */
1674typedef struct PDMIOAPICREG
1675{
1676 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1677 uint32_t u32Version;
1678
1679 /**
1680 * Set the an IRQ.
1681 *
1682 * @param pDevIns Device instance of the I/O APIC.
1683 * @param iIrq IRQ number to set.
1684 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1685 * @param uTagSrc The IRQ tag and source (for tracing).
1686 * @remarks Caller enters the PDM critical section
1687 */
1688 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1689
1690 /** The name of the RC SetIrq entry point. */
1691 const char *pszSetIrqRC;
1692
1693 /** The name of the R0 SetIrq entry point. */
1694 const char *pszSetIrqR0;
1695
1696 /**
1697 * Send a MSI.
1698 *
1699 * @param pDevIns Device instance of the I/O APIC.
1700 * @param GCPhys Request address.
1701 * @param uValue Request value.
1702 * @param uTagSrc The IRQ tag and source (for tracing).
1703 * @remarks Caller enters the PDM critical section
1704 */
1705 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1706
1707 /** The name of the RC SendMsi entry point. */
1708 const char *pszSendMsiRC;
1709
1710 /** The name of the R0 SendMsi entry point. */
1711 const char *pszSendMsiR0;
1712} PDMIOAPICREG;
1713/** Pointer to an APIC registration structure. */
1714typedef PDMIOAPICREG *PPDMIOAPICREG;
1715
1716/** Current PDMAPICREG version number. */
1717#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1718
1719
1720/**
1721 * IOAPIC RC helpers.
1722 */
1723typedef struct PDMIOAPICHLPRC
1724{
1725 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1726 uint32_t u32Version;
1727
1728 /**
1729 * Private interface between the IOAPIC and APIC.
1730 *
1731 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1732 *
1733 * @returns status code.
1734 * @param pDevIns Device instance of the IOAPIC.
1735 * @param u8Dest See APIC implementation.
1736 * @param u8DestMode See APIC implementation.
1737 * @param u8DeliveryMode See APIC implementation.
1738 * @param iVector See APIC implementation.
1739 * @param u8Polarity See APIC implementation.
1740 * @param u8TriggerMode See APIC implementation.
1741 * @param uTagSrc The IRQ tag and source (for tracing).
1742 */
1743 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1744 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1745
1746 /**
1747 * Acquires the PDM lock.
1748 *
1749 * @returns VINF_SUCCESS on success.
1750 * @returns rc if we failed to acquire the lock.
1751 * @param pDevIns The IOAPIC device instance.
1752 * @param rc What to return if we fail to acquire the lock.
1753 */
1754 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1755
1756 /**
1757 * Releases the PDM lock.
1758 *
1759 * @param pDevIns The IOAPIC device instance.
1760 */
1761 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1762
1763 /** Just a safety precaution. */
1764 uint32_t u32TheEnd;
1765} PDMIOAPICHLPRC;
1766/** Pointer to IOAPIC RC helpers. */
1767typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1768/** Pointer to const IOAPIC helpers. */
1769typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1770
1771/** Current PDMIOAPICHLPRC version number. */
1772#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1773
1774
1775/**
1776 * IOAPIC R0 helpers.
1777 */
1778typedef struct PDMIOAPICHLPR0
1779{
1780 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1781 uint32_t u32Version;
1782
1783 /**
1784 * Private interface between the IOAPIC and APIC.
1785 *
1786 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1787 *
1788 * @returns status code.
1789 * @param pDevIns Device instance of the IOAPIC.
1790 * @param u8Dest See APIC implementation.
1791 * @param u8DestMode See APIC implementation.
1792 * @param u8DeliveryMode See APIC implementation.
1793 * @param iVector See APIC implementation.
1794 * @param u8Polarity See APIC implementation.
1795 * @param u8TriggerMode See APIC implementation.
1796 * @param uTagSrc The IRQ tag and source (for tracing).
1797 */
1798 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1799 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1800
1801 /**
1802 * Acquires the PDM lock.
1803 *
1804 * @returns VINF_SUCCESS on success.
1805 * @returns rc if we failed to acquire the lock.
1806 * @param pDevIns The IOAPIC device instance.
1807 * @param rc What to return if we fail to acquire the lock.
1808 */
1809 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1810
1811 /**
1812 * Releases the PDM lock.
1813 *
1814 * @param pDevIns The IOAPIC device instance.
1815 */
1816 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1817
1818 /** Just a safety precaution. */
1819 uint32_t u32TheEnd;
1820} PDMIOAPICHLPR0;
1821/** Pointer to IOAPIC R0 helpers. */
1822typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1823/** Pointer to const IOAPIC helpers. */
1824typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1825
1826/** Current PDMIOAPICHLPR0 version number. */
1827#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1828
1829/**
1830 * IOAPIC R3 helpers.
1831 */
1832typedef struct PDMIOAPICHLPR3
1833{
1834 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1835 uint32_t u32Version;
1836
1837 /**
1838 * Private interface between the IOAPIC and APIC.
1839 *
1840 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1841 *
1842 * @returns status code
1843 * @param pDevIns Device instance of the IOAPIC.
1844 * @param u8Dest See APIC implementation.
1845 * @param u8DestMode See APIC implementation.
1846 * @param u8DeliveryMode See APIC implementation.
1847 * @param iVector See APIC implementation.
1848 * @param u8Polarity See APIC implementation.
1849 * @param u8TriggerMode See APIC implementation.
1850 * @param uTagSrc The IRQ tag and source (for tracing).
1851 */
1852 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1853 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1854
1855 /**
1856 * Acquires the PDM lock.
1857 *
1858 * @returns VINF_SUCCESS on success.
1859 * @returns Fatal error on failure.
1860 * @param pDevIns The IOAPIC device instance.
1861 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1862 */
1863 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1864
1865 /**
1866 * Releases the PDM lock.
1867 *
1868 * @param pDevIns The IOAPIC device instance.
1869 */
1870 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1871
1872 /**
1873 * Gets the address of the RC IOAPIC helpers.
1874 *
1875 * This should be called at both construction and relocation time
1876 * to obtain the correct address of the RC helpers.
1877 *
1878 * @returns RC pointer to the IOAPIC helpers.
1879 * @param pDevIns Device instance of the IOAPIC.
1880 */
1881 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1882
1883 /**
1884 * Gets the address of the R0 IOAPIC helpers.
1885 *
1886 * This should be called at both construction and relocation time
1887 * to obtain the correct address of the R0 helpers.
1888 *
1889 * @returns R0 pointer to the IOAPIC helpers.
1890 * @param pDevIns Device instance of the IOAPIC.
1891 */
1892 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1893
1894 /** Just a safety precaution. */
1895 uint32_t u32TheEnd;
1896} PDMIOAPICHLPR3;
1897/** Pointer to IOAPIC R3 helpers. */
1898typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1899/** Pointer to const IOAPIC helpers. */
1900typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1901
1902/** Current PDMIOAPICHLPR3 version number. */
1903#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1904
1905
1906/**
1907 * HPET registration structure.
1908 */
1909typedef struct PDMHPETREG
1910{
1911 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1912 uint32_t u32Version;
1913
1914} PDMHPETREG;
1915/** Pointer to an HPET registration structure. */
1916typedef PDMHPETREG *PPDMHPETREG;
1917
1918/** Current PDMHPETREG version number. */
1919#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1920
1921/**
1922 * HPET RC helpers.
1923 *
1924 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1925 * at some later point.
1926 */
1927typedef struct PDMHPETHLPRC
1928{
1929 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1930 uint32_t u32Version;
1931
1932 /** Just a safety precaution. */
1933 uint32_t u32TheEnd;
1934} PDMHPETHLPRC;
1935
1936/** Pointer to HPET RC helpers. */
1937typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1938/** Pointer to const HPET RC helpers. */
1939typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1940
1941/** Current PDMHPETHLPRC version number. */
1942#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1943
1944
1945/**
1946 * HPET R0 helpers.
1947 *
1948 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1949 * at some later point.
1950 */
1951typedef struct PDMHPETHLPR0
1952{
1953 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1954 uint32_t u32Version;
1955
1956 /** Just a safety precaution. */
1957 uint32_t u32TheEnd;
1958} PDMHPETHLPR0;
1959
1960/** Pointer to HPET R0 helpers. */
1961typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1962/** Pointer to const HPET R0 helpers. */
1963typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1964
1965/** Current PDMHPETHLPR0 version number. */
1966#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1967
1968/**
1969 * HPET R3 helpers.
1970 */
1971typedef struct PDMHPETHLPR3
1972{
1973 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1974 uint32_t u32Version;
1975
1976 /**
1977 * Gets the address of the RC HPET helpers.
1978 *
1979 * This should be called at both construction and relocation time
1980 * to obtain the correct address of the RC helpers.
1981 *
1982 * @returns RC pointer to the HPET helpers.
1983 * @param pDevIns Device instance of the HPET.
1984 */
1985 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1986
1987 /**
1988 * Gets the address of the R0 HPET helpers.
1989 *
1990 * This should be called at both construction and relocation time
1991 * to obtain the correct address of the R0 helpers.
1992 *
1993 * @returns R0 pointer to the HPET helpers.
1994 * @param pDevIns Device instance of the HPET.
1995 */
1996 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1997
1998 /**
1999 * Set legacy mode on PIT and RTC.
2000 *
2001 * @returns VINF_SUCCESS on success.
2002 * @returns rc if we failed to set legacy mode.
2003 * @param pDevIns Device instance of the HPET.
2004 * @param fActivated Whether legacy mode is activated or deactivated.
2005 */
2006 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
2007
2008
2009 /**
2010 * Set IRQ, bypassing ISA bus override rules.
2011 *
2012 * @returns VINF_SUCCESS on success.
2013 * @returns rc if we failed to set legacy mode.
2014 * @param pDevIns Device instance of the HPET.
2015 * @param iIrq IRQ number to set.
2016 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2017 */
2018 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2019
2020 /** Just a safety precaution. */
2021 uint32_t u32TheEnd;
2022} PDMHPETHLPR3;
2023
2024/** Pointer to HPET R3 helpers. */
2025typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
2026/** Pointer to const HPET R3 helpers. */
2027typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
2028
2029/** Current PDMHPETHLPR3 version number. */
2030#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
2031
2032
2033/**
2034 * Raw PCI device registration structure.
2035 */
2036typedef struct PDMPCIRAWREG
2037{
2038 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
2039 uint32_t u32Version;
2040 /** Just a safety precaution. */
2041 uint32_t u32TheEnd;
2042} PDMPCIRAWREG;
2043/** Pointer to a raw PCI registration structure. */
2044typedef PDMPCIRAWREG *PPDMPCIRAWREG;
2045
2046/** Current PDMPCIRAWREG version number. */
2047#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
2048
2049/**
2050 * Raw PCI device raw-mode context helpers.
2051 */
2052typedef struct PDMPCIRAWHLPRC
2053{
2054 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
2055 uint32_t u32Version;
2056 /** Just a safety precaution. */
2057 uint32_t u32TheEnd;
2058} PDMPCIRAWHLPRC;
2059/** Pointer to a raw PCI deviec raw-mode context helper structure. */
2060typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
2061/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
2062typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
2063
2064/** Current PDMPCIRAWHLPRC version number. */
2065#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
2066
2067/**
2068 * Raw PCI device ring-0 context helpers.
2069 */
2070typedef struct PDMPCIRAWHLPR0
2071{
2072 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
2073 uint32_t u32Version;
2074 /** Just a safety precaution. */
2075 uint32_t u32TheEnd;
2076} PDMPCIRAWHLPR0;
2077/** Pointer to a raw PCI deviec ring-0 context helper structure. */
2078typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
2079/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
2080typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
2081
2082/** Current PDMPCIRAWHLPR0 version number. */
2083#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
2084
2085
2086/**
2087 * Raw PCI device ring-3 context helpers.
2088 */
2089typedef struct PDMPCIRAWHLPR3
2090{
2091 /** Undefined structure version and magic number. */
2092 uint32_t u32Version;
2093
2094 /**
2095 * Gets the address of the RC raw PCI device helpers.
2096 *
2097 * This should be called at both construction and relocation time to obtain
2098 * the correct address of the RC helpers.
2099 *
2100 * @returns RC pointer to the raw PCI device helpers.
2101 * @param pDevIns Device instance of the raw PCI device.
2102 */
2103 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2104
2105 /**
2106 * Gets the address of the R0 raw PCI device helpers.
2107 *
2108 * This should be called at both construction and relocation time to obtain
2109 * the correct address of the R0 helpers.
2110 *
2111 * @returns R0 pointer to the raw PCI device helpers.
2112 * @param pDevIns Device instance of the raw PCI device.
2113 */
2114 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2115
2116 /** Just a safety precaution. */
2117 uint32_t u32TheEnd;
2118} PDMPCIRAWHLPR3;
2119/** Pointer to raw PCI R3 helpers. */
2120typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2121/** Pointer to const raw PCI R3 helpers. */
2122typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2123
2124/** Current PDMPCIRAWHLPR3 version number. */
2125#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2126
2127
2128#ifdef IN_RING3
2129
2130/**
2131 * DMA Transfer Handler.
2132 *
2133 * @returns Number of bytes transferred.
2134 * @param pDevIns Device instance of the DMA.
2135 * @param pvUser User pointer.
2136 * @param uChannel Channel number.
2137 * @param off DMA position.
2138 * @param cb Block size.
2139 * @remarks The device lock is not taken, however, the DMA device lock is held.
2140 */
2141typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2142/** Pointer to a FNDMATRANSFERHANDLER(). */
2143typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2144
2145/**
2146 * DMA Controller registration structure.
2147 */
2148typedef struct PDMDMAREG
2149{
2150 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2151 uint32_t u32Version;
2152
2153 /**
2154 * Execute pending transfers.
2155 *
2156 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2157 * @param pDevIns Device instance of the DMAC.
2158 * @remarks No locks held, called on EMT(0) as a form of serialization.
2159 */
2160 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2161
2162 /**
2163 * Register transfer function for DMA channel.
2164 *
2165 * @param pDevIns Device instance of the DMAC.
2166 * @param uChannel Channel number.
2167 * @param pfnTransferHandler Device specific transfer function.
2168 * @param pvUSer User pointer to be passed to the callback.
2169 * @remarks No locks held, called on an EMT.
2170 */
2171 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2172
2173 /**
2174 * Read memory
2175 *
2176 * @returns Number of bytes read.
2177 * @param pDevIns Device instance of the DMAC.
2178 * @param pvBuffer Pointer to target buffer.
2179 * @param off DMA position.
2180 * @param cbBlock Block size.
2181 * @remarks No locks held, called on an EMT.
2182 */
2183 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2184
2185 /**
2186 * Write memory
2187 *
2188 * @returns Number of bytes written.
2189 * @param pDevIns Device instance of the DMAC.
2190 * @param pvBuffer Memory to write.
2191 * @param off DMA position.
2192 * @param cbBlock Block size.
2193 * @remarks No locks held, called on an EMT.
2194 */
2195 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2196
2197 /**
2198 * Set the DREQ line.
2199 *
2200 * @param pDevIns Device instance of the DMAC.
2201 * @param uChannel Channel number.
2202 * @param uLevel Level of the line.
2203 * @remarks No locks held, called on an EMT.
2204 */
2205 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2206
2207 /**
2208 * Get channel mode
2209 *
2210 * @returns Channel mode.
2211 * @param pDevIns Device instance of the DMAC.
2212 * @param uChannel Channel number.
2213 * @remarks No locks held, called on an EMT.
2214 */
2215 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2216
2217} PDMDMACREG;
2218/** Pointer to a DMAC registration structure. */
2219typedef PDMDMACREG *PPDMDMACREG;
2220
2221/** Current PDMDMACREG version number. */
2222#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2223
2224
2225/**
2226 * DMA Controller device helpers.
2227 */
2228typedef struct PDMDMACHLP
2229{
2230 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2231 uint32_t u32Version;
2232
2233 /* to-be-defined */
2234
2235} PDMDMACHLP;
2236/** Pointer to DMAC helpers. */
2237typedef PDMDMACHLP *PPDMDMACHLP;
2238/** Pointer to const DMAC helpers. */
2239typedef const PDMDMACHLP *PCPDMDMACHLP;
2240
2241/** Current PDMDMACHLP version number. */
2242#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2243
2244#endif /* IN_RING3 */
2245
2246
2247
2248/**
2249 * RTC registration structure.
2250 */
2251typedef struct PDMRTCREG
2252{
2253 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2254 uint32_t u32Version;
2255 uint32_t u32Alignment; /**< structure size alignment. */
2256
2257 /**
2258 * Write to a CMOS register and update the checksum if necessary.
2259 *
2260 * @returns VBox status code.
2261 * @param pDevIns Device instance of the RTC.
2262 * @param iReg The CMOS register index.
2263 * @param u8Value The CMOS register value.
2264 * @remarks Caller enters the device critical section.
2265 */
2266 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2267
2268 /**
2269 * Read a CMOS register.
2270 *
2271 * @returns VBox status code.
2272 * @param pDevIns Device instance of the RTC.
2273 * @param iReg The CMOS register index.
2274 * @param pu8Value Where to store the CMOS register value.
2275 * @remarks Caller enters the device critical section.
2276 */
2277 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2278
2279} PDMRTCREG;
2280/** Pointer to a RTC registration structure. */
2281typedef PDMRTCREG *PPDMRTCREG;
2282/** Pointer to a const RTC registration structure. */
2283typedef const PDMRTCREG *PCPDMRTCREG;
2284
2285/** Current PDMRTCREG version number. */
2286#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2287
2288
2289/**
2290 * RTC device helpers.
2291 */
2292typedef struct PDMRTCHLP
2293{
2294 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2295 uint32_t u32Version;
2296
2297 /* to-be-defined */
2298
2299} PDMRTCHLP;
2300/** Pointer to RTC helpers. */
2301typedef PDMRTCHLP *PPDMRTCHLP;
2302/** Pointer to const RTC helpers. */
2303typedef const PDMRTCHLP *PCPDMRTCHLP;
2304
2305/** Current PDMRTCHLP version number. */
2306#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2307
2308
2309
2310#ifdef IN_RING3
2311
2312/**
2313 * PDM Device API.
2314 */
2315typedef struct PDMDEVHLPR3
2316{
2317 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2318 uint32_t u32Version;
2319
2320 /**
2321 * Register a number of I/O ports with a device.
2322 *
2323 * These callbacks are of course for the host context (HC).
2324 * Register HC handlers before guest context (GC) handlers! There must be a
2325 * HC handler for every GC handler!
2326 *
2327 * @returns VBox status.
2328 * @param pDevIns The device instance to register the ports with.
2329 * @param Port First port number in the range.
2330 * @param cPorts Number of ports to register.
2331 * @param pvUser User argument.
2332 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2333 * @param pfnIn Pointer to function which is gonna handle IN operations.
2334 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2335 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2336 * @param pszDesc Pointer to description string. This must not be freed.
2337 * @remarks Caller enters the device critical section prior to invoking the
2338 * registered callback methods.
2339 */
2340 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2341 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2342 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2343
2344 /**
2345 * Register a number of I/O ports with a device for RC.
2346 *
2347 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2348 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2349 * for every RC handler!
2350 *
2351 * @returns VBox status.
2352 * @param pDevIns The device instance to register the ports with
2353 * and which RC module to resolve the names
2354 * against.
2355 * @param Port First port number in the range.
2356 * @param cPorts Number of ports to register.
2357 * @param pvUser User argument.
2358 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2359 * @param pszIn Name of the RC function which is gonna handle IN operations.
2360 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2361 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2362 * @param pszDesc Pointer to description string. This must not be freed.
2363 * @remarks Caller enters the device critical section prior to invoking the
2364 * registered callback methods.
2365 */
2366 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2367 const char *pszOut, const char *pszIn,
2368 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2369
2370 /**
2371 * Register a number of I/O ports with a device.
2372 *
2373 * These callbacks are of course for the ring-0 host context (R0).
2374 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2375 *
2376 * @returns VBox status.
2377 * @param pDevIns The device instance to register the ports with.
2378 * @param Port First port number in the range.
2379 * @param cPorts Number of ports to register.
2380 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2381 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2382 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2383 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2384 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2385 * @param pszDesc Pointer to description string. This must not be freed.
2386 * @remarks Caller enters the device critical section prior to invoking the
2387 * registered callback methods.
2388 */
2389 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2390 const char *pszOut, const char *pszIn,
2391 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2392
2393 /**
2394 * Deregister I/O ports.
2395 *
2396 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2397 *
2398 * @returns VBox status.
2399 * @param pDevIns The device instance owning the ports.
2400 * @param Port First port number in the range.
2401 * @param cPorts Number of ports to deregister.
2402 */
2403 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2404
2405 /**
2406 * Register a Memory Mapped I/O (MMIO) region.
2407 *
2408 * These callbacks are of course for the ring-3 context (R3). Register HC
2409 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2410 * must be a R3 handler for every RC and R0 handler!
2411 *
2412 * @returns VBox status.
2413 * @param pDevIns The device instance to register the MMIO with.
2414 * @param GCPhysStart First physical address in the range.
2415 * @param cbRange The size of the range (in bytes).
2416 * @param pvUser User argument.
2417 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2418 * @param pfnRead Pointer to function which is gonna handle Read operations.
2419 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2420 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2421 * @param pszDesc Pointer to description string. This must not be freed.
2422 * @remarks Caller enters the device critical section prior to invoking the
2423 * registered callback methods.
2424 */
2425 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2426 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2427 uint32_t fFlags, const char *pszDesc));
2428
2429 /**
2430 * Register a Memory Mapped I/O (MMIO) region for RC.
2431 *
2432 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2433 * (R3) handlers before guest context handlers! There must be a R3 handler for
2434 * every RC handler!
2435 *
2436 * @returns VBox status.
2437 * @param pDevIns The device instance to register the MMIO with.
2438 * @param GCPhysStart First physical address in the range.
2439 * @param cbRange The size of the range (in bytes).
2440 * @param pvUser User argument.
2441 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2442 * @param pszRead Name of the RC function which is gonna handle Read operations.
2443 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2444 * @remarks Caller enters the device critical section prior to invoking the
2445 * registered callback methods.
2446 */
2447 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2448 const char *pszWrite, const char *pszRead, const char *pszFill));
2449
2450 /**
2451 * Register a Memory Mapped I/O (MMIO) region for R0.
2452 *
2453 * These callbacks are for the ring-0 host context (R0). Register ring-3
2454 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2455 * every R0 handler!
2456 *
2457 * @returns VBox status.
2458 * @param pDevIns The device instance to register the MMIO with.
2459 * @param GCPhysStart First physical address in the range.
2460 * @param cbRange The size of the range (in bytes).
2461 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2462 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2463 * @param pszRead Name of the RC function which is gonna handle Read operations.
2464 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2465 * @remarks Caller enters the device critical section prior to invoking the
2466 * registered callback methods.
2467 */
2468 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2469 const char *pszWrite, const char *pszRead, const char *pszFill));
2470
2471 /**
2472 * Deregister a Memory Mapped I/O (MMIO) region.
2473 *
2474 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2475 *
2476 * @returns VBox status.
2477 * @param pDevIns The device instance owning the MMIO region(s).
2478 * @param GCPhysStart First physical address in the range.
2479 * @param cbRange The size of the range (in bytes).
2480 */
2481 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2482
2483 /**
2484 * Allocate and register a MMIO2 region.
2485 *
2486 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2487 * RAM associated with a device. It is also non-shared memory with a
2488 * permanent ring-3 mapping and page backing (presently).
2489 *
2490 * @returns VBox status.
2491 * @param pDevIns The device instance.
2492 * @param iRegion The region number. Use the PCI region number as
2493 * this must be known to the PCI bus device too. If
2494 * it's not associated with the PCI device, then
2495 * any number up to UINT8_MAX is fine.
2496 * @param cb The size (in bytes) of the region.
2497 * @param fFlags Reserved for future use, must be zero.
2498 * @param ppv Where to store the address of the ring-3 mapping
2499 * of the memory.
2500 * @param pszDesc Pointer to description string. This must not be
2501 * freed.
2502 * @thread EMT.
2503 */
2504 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2505
2506 /**
2507 * Deregisters and frees a MMIO2 region.
2508 *
2509 * Any physical (and virtual) access handlers registered for the region must
2510 * be deregistered before calling this function.
2511 *
2512 * @returns VBox status code.
2513 * @param pDevIns The device instance.
2514 * @param iRegion The region number used during registration.
2515 * @thread EMT.
2516 */
2517 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2518
2519 /**
2520 * Maps a MMIO2 region into the physical memory space.
2521 *
2522 * A MMIO2 range may overlap with base memory if a lot of RAM
2523 * is configured for the VM, in which case we'll drop the base
2524 * memory pages. Presently we will make no attempt to preserve
2525 * anything that happens to be present in the base memory that
2526 * is replaced, this is of course incorrect but it's too much
2527 * effort.
2528 *
2529 * @returns VBox status code.
2530 * @param pDevIns The device instance.
2531 * @param iRegion The region number used during registration.
2532 * @param GCPhys The physical address to map it at.
2533 * @thread EMT.
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2536
2537 /**
2538 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2539 *
2540 * @returns VBox status code.
2541 * @param pDevIns The device instance.
2542 * @param iRegion The region number used during registration.
2543 * @param GCPhys The physical address it's currently mapped at.
2544 * @thread EMT.
2545 */
2546 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2547
2548 /**
2549 * Maps a portion of an MMIO2 region into the hypervisor region.
2550 *
2551 * Callers of this API must never deregister the MMIO2 region before the
2552 * VM is powered off.
2553 *
2554 * @return VBox status code.
2555 * @param pDevIns The device owning the MMIO2 memory.
2556 * @param iRegion The region.
2557 * @param off The offset into the region. Will be rounded down
2558 * to closest page boundary.
2559 * @param cb The number of bytes to map. Will be rounded up
2560 * to the closest page boundary.
2561 * @param pszDesc Mapping description.
2562 * @param pRCPtr Where to store the RC address.
2563 */
2564 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2565 const char *pszDesc, PRTRCPTR pRCPtr));
2566
2567 /**
2568 * Maps a portion of an MMIO2 region into kernel space (host).
2569 *
2570 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2571 * or the VM is terminated.
2572 *
2573 * @return VBox status code.
2574 * @param pDevIns The device owning the MMIO2 memory.
2575 * @param iRegion The region.
2576 * @param off The offset into the region. Must be page
2577 * aligned.
2578 * @param cb The number of bytes to map. Must be page
2579 * aligned.
2580 * @param pszDesc Mapping description.
2581 * @param pR0Ptr Where to store the R0 address.
2582 */
2583 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2584 const char *pszDesc, PRTR0PTR pR0Ptr));
2585
2586 /**
2587 * Register a ROM (BIOS) region.
2588 *
2589 * It goes without saying that this is read-only memory. The memory region must be
2590 * in unassigned memory. I.e. from the top of the address space or on the PC in
2591 * the 0xa0000-0xfffff range.
2592 *
2593 * @returns VBox status.
2594 * @param pDevIns The device instance owning the ROM region.
2595 * @param GCPhysStart First physical address in the range.
2596 * Must be page aligned!
2597 * @param cbRange The size of the range (in bytes).
2598 * Must be page aligned!
2599 * @param pvBinary Pointer to the binary data backing the ROM image.
2600 * @param cbBinary The size of the binary pointer. This must
2601 * be equal or smaller than @a cbRange.
2602 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2603 * @param pszDesc Pointer to description string. This must not be freed.
2604 *
2605 * @remark There is no way to remove the rom, automatically on device cleanup or
2606 * manually from the device yet. At present I doubt we need such features...
2607 */
2608 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2609 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2610
2611 /**
2612 * Changes the protection of shadowed ROM mapping.
2613 *
2614 * This is intented for use by the system BIOS, chipset or device in question to
2615 * change the protection of shadowed ROM code after init and on reset.
2616 *
2617 * @param pDevIns The device instance.
2618 * @param GCPhysStart Where the mapping starts.
2619 * @param cbRange The size of the mapping.
2620 * @param enmProt The new protection type.
2621 */
2622 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2623
2624 /**
2625 * Register a save state data unit.
2626 *
2627 * @returns VBox status.
2628 * @param pDevIns The device instance.
2629 * @param uVersion Data layout version number.
2630 * @param cbGuess The approximate amount of data in the unit.
2631 * Only for progress indicators.
2632 * @param pszBefore Name of data unit which we should be put in
2633 * front of. Optional (NULL).
2634 *
2635 * @param pfnLivePrep Prepare live save callback, optional.
2636 * @param pfnLiveExec Execute live save callback, optional.
2637 * @param pfnLiveVote Vote live save callback, optional.
2638 *
2639 * @param pfnSavePrep Prepare save callback, optional.
2640 * @param pfnSaveExec Execute save callback, optional.
2641 * @param pfnSaveDone Done save callback, optional.
2642 *
2643 * @param pfnLoadPrep Prepare load callback, optional.
2644 * @param pfnLoadExec Execute load callback, optional.
2645 * @param pfnLoadDone Done load callback, optional.
2646 * @remarks Caller enters the device critical section prior to invoking the
2647 * registered callback methods.
2648 */
2649 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2650 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2651 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2652 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2653
2654 /**
2655 * Creates a timer.
2656 *
2657 * @returns VBox status.
2658 * @param pDevIns The device instance.
2659 * @param enmClock The clock to use on this timer.
2660 * @param pfnCallback Callback function.
2661 * @param pvUser User argument for the callback.
2662 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2663 * @param pszDesc Pointer to description string which must stay around
2664 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2665 * @param ppTimer Where to store the timer on success.
2666 * @remarks Caller enters the device critical section prior to invoking the
2667 * callback.
2668 */
2669 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback,
2670 void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2671
2672 /**
2673 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2674 *
2675 * @returns pTime.
2676 * @param pDevIns The device instance.
2677 * @param pTime Where to store the time.
2678 */
2679 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2680
2681 /**
2682 * Read physical memory.
2683 *
2684 * @returns VINF_SUCCESS (for now).
2685 * @param pDevIns The device instance.
2686 * @param GCPhys Physical address start reading from.
2687 * @param pvBuf Where to put the read bits.
2688 * @param cbRead How many bytes to read.
2689 * @thread Any thread, but the call may involve the emulation thread.
2690 */
2691 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2692
2693 /**
2694 * Write to physical memory.
2695 *
2696 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2697 * @param pDevIns The device instance.
2698 * @param GCPhys Physical address to write to.
2699 * @param pvBuf What to write.
2700 * @param cbWrite How many bytes to write.
2701 * @thread Any thread, but the call may involve the emulation thread.
2702 */
2703 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2704
2705 /**
2706 * Requests the mapping of a guest page into ring-3.
2707 *
2708 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2709 * release it.
2710 *
2711 * This API will assume your intention is to write to the page, and will
2712 * therefore replace shared and zero pages. If you do not intend to modify the
2713 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2714 *
2715 * @returns VBox status code.
2716 * @retval VINF_SUCCESS on success.
2717 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2718 * backing or if the page has any active access handlers. The caller
2719 * must fall back on using PGMR3PhysWriteExternal.
2720 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2721 *
2722 * @param pDevIns The device instance.
2723 * @param GCPhys The guest physical address of the page that
2724 * should be mapped.
2725 * @param fFlags Flags reserved for future use, MBZ.
2726 * @param ppv Where to store the address corresponding to
2727 * GCPhys.
2728 * @param pLock Where to store the lock information that
2729 * pfnPhysReleasePageMappingLock needs.
2730 *
2731 * @remark Avoid calling this API from within critical sections (other than the
2732 * PGM one) because of the deadlock risk when we have to delegating the
2733 * task to an EMT.
2734 * @thread Any.
2735 */
2736 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv,
2737 PPGMPAGEMAPLOCK pLock));
2738
2739 /**
2740 * Requests the mapping of a guest page into ring-3, external threads.
2741 *
2742 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2743 * release it.
2744 *
2745 * @returns VBox status code.
2746 * @retval VINF_SUCCESS on success.
2747 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2748 * backing or if the page as an active ALL access handler. The caller
2749 * must fall back on using PGMPhysRead.
2750 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2751 *
2752 * @param pDevIns The device instance.
2753 * @param GCPhys The guest physical address of the page that
2754 * should be mapped.
2755 * @param fFlags Flags reserved for future use, MBZ.
2756 * @param ppv Where to store the address corresponding to
2757 * GCPhys.
2758 * @param pLock Where to store the lock information that
2759 * pfnPhysReleasePageMappingLock needs.
2760 *
2761 * @remark Avoid calling this API from within critical sections.
2762 * @thread Any.
2763 */
2764 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags,
2765 void const **ppv, PPGMPAGEMAPLOCK pLock));
2766
2767 /**
2768 * Release the mapping of a guest page.
2769 *
2770 * This is the counter part of pfnPhysGCPhys2CCPtr and
2771 * pfnPhysGCPhys2CCPtrReadOnly.
2772 *
2773 * @param pDevIns The device instance.
2774 * @param pLock The lock structure initialized by the mapping
2775 * function.
2776 */
2777 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2778
2779 /**
2780 * Read guest physical memory by virtual address.
2781 *
2782 * @param pDevIns The device instance.
2783 * @param pvDst Where to put the read bits.
2784 * @param GCVirtSrc Guest virtual address to start reading from.
2785 * @param cb How many bytes to read.
2786 * @thread The emulation thread.
2787 */
2788 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2789
2790 /**
2791 * Write to guest physical memory by virtual address.
2792 *
2793 * @param pDevIns The device instance.
2794 * @param GCVirtDst Guest virtual address to write to.
2795 * @param pvSrc What to write.
2796 * @param cb How many bytes to write.
2797 * @thread The emulation thread.
2798 */
2799 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2800
2801 /**
2802 * Convert a guest virtual address to a guest physical address.
2803 *
2804 * @returns VBox status code.
2805 * @param pDevIns The device instance.
2806 * @param GCPtr Guest virtual address.
2807 * @param pGCPhys Where to store the GC physical address
2808 * corresponding to GCPtr.
2809 * @thread The emulation thread.
2810 * @remark Careful with page boundaries.
2811 */
2812 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2813
2814 /**
2815 * Allocate memory which is associated with current VM instance
2816 * and automatically freed on it's destruction.
2817 *
2818 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2819 * @param pDevIns The device instance.
2820 * @param cb Number of bytes to allocate.
2821 */
2822 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2823
2824 /**
2825 * Allocate memory which is associated with current VM instance
2826 * and automatically freed on it's destruction. The memory is ZEROed.
2827 *
2828 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2829 * @param pDevIns The device instance.
2830 * @param cb Number of bytes to allocate.
2831 */
2832 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2833
2834 /**
2835 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2836 *
2837 * @param pDevIns The device instance.
2838 * @param pv Pointer to the memory to free.
2839 */
2840 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2841
2842 /**
2843 * Gets the VM state.
2844 *
2845 * @returns VM state.
2846 * @param pDevIns The device instance.
2847 * @thread Any thread (just keep in mind that it's volatile info).
2848 */
2849 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2850
2851 /**
2852 * Checks if the VM was teleported and hasn't been fully resumed yet.
2853 *
2854 * @returns true / false.
2855 * @param pDevIns The device instance.
2856 * @thread Any thread.
2857 */
2858 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2859
2860 /**
2861 * Set the VM error message
2862 *
2863 * @returns rc.
2864 * @param pDevIns The device instance.
2865 * @param rc VBox status code.
2866 * @param SRC_POS Use RT_SRC_POS.
2867 * @param pszFormat Error message format string.
2868 * @param ... Error message arguments.
2869 */
2870 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2871 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
2872
2873 /**
2874 * Set the VM error message
2875 *
2876 * @returns rc.
2877 * @param pDevIns The device instance.
2878 * @param rc VBox status code.
2879 * @param SRC_POS Use RT_SRC_POS.
2880 * @param pszFormat Error message format string.
2881 * @param va Error message arguments.
2882 */
2883 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2884 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2885
2886 /**
2887 * Set the VM runtime error message
2888 *
2889 * @returns VBox status code.
2890 * @param pDevIns The device instance.
2891 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2892 * @param pszErrorId Error ID string.
2893 * @param pszFormat Error message format string.
2894 * @param ... Error message arguments.
2895 */
2896 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2897 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
2898
2899 /**
2900 * Set the VM runtime error message
2901 *
2902 * @returns VBox status code.
2903 * @param pDevIns The device instance.
2904 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2905 * @param pszErrorId Error ID string.
2906 * @param pszFormat Error message format string.
2907 * @param va Error message arguments.
2908 */
2909 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2910 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
2911
2912 /**
2913 * Stops the VM and enters the debugger to look at the guest state.
2914 *
2915 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2916 * invoking this function directly.
2917 *
2918 * @returns VBox status code which must be passed up to the VMM.
2919 * @param pDevIns The device instance.
2920 * @param pszFile Filename of the assertion location.
2921 * @param iLine The linenumber of the assertion location.
2922 * @param pszFunction Function of the assertion location.
2923 * @param pszFormat Message. (optional)
2924 * @param args Message parameters.
2925 */
2926 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction,
2927 const char *pszFormat, va_list args) RT_IPRT_FORMAT_ATTR(5, 0));
2928
2929 /**
2930 * Register a info handler with DBGF,
2931 *
2932 * @returns VBox status code.
2933 * @param pDevIns The device instance.
2934 * @param pszName The identifier of the info.
2935 * @param pszDesc The description of the info and any arguments
2936 * the handler may take.
2937 * @param pfnHandler The handler function to be called to display the
2938 * info.
2939 */
2940 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2941
2942 /**
2943 * Registers a set of registers for a device.
2944 *
2945 * The @a pvUser argument of the getter and setter callbacks will be
2946 * @a pDevIns. The register names will be prefixed by the device name followed
2947 * immediately by the instance number.
2948 *
2949 * @returns VBox status code.
2950 * @param pDevIns The device instance.
2951 * @param paRegisters The register descriptors.
2952 *
2953 * @remarks The device critical section is NOT entered prior to working the
2954 * callbacks registered via this helper!
2955 */
2956 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2957
2958 /**
2959 * Gets the trace buffer handle.
2960 *
2961 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2962 * really inteded for direct usage, thus no inline wrapper function.
2963 *
2964 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2965 * @param pDevIns The device instance.
2966 */
2967 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2968
2969 /**
2970 * Registers a statistics sample if statistics are enabled.
2971 *
2972 * @param pDevIns Device instance of the DMA.
2973 * @param pvSample Pointer to the sample.
2974 * @param enmType Sample type. This indicates what pvSample is
2975 * pointing at.
2976 * @param pszName Sample name. The name is on this form
2977 * "/<component>/<sample>". Further nesting is
2978 * possible.
2979 * @param enmUnit Sample unit.
2980 * @param pszDesc Sample description.
2981 */
2982 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2983
2984 /**
2985 * Same as pfnSTAMRegister except that the name is specified in a
2986 * RTStrPrintf like fashion.
2987 *
2988 * @returns VBox status.
2989 * @param pDevIns Device instance of the DMA.
2990 * @param pvSample Pointer to the sample.
2991 * @param enmType Sample type. This indicates what pvSample is
2992 * pointing at.
2993 * @param enmVisibility Visibility type specifying whether unused
2994 * statistics should be visible or not.
2995 * @param enmUnit Sample unit.
2996 * @param pszDesc Sample description.
2997 * @param pszName The sample name format string.
2998 * @param ... Arguments to the format string.
2999 */
3000 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
3001 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
3002 const char *pszName, ...) RT_IPRT_FORMAT_ATTR(7, 8));
3003
3004 /**
3005 * Same as pfnSTAMRegister except that the name is specified in a
3006 * RTStrPrintfV like fashion.
3007 *
3008 * @returns VBox status.
3009 * @param pDevIns Device instance of the DMA.
3010 * @param pvSample Pointer to the sample.
3011 * @param enmType Sample type. This indicates what pvSample is
3012 * pointing at.
3013 * @param enmVisibility Visibility type specifying whether unused
3014 * statistics should be visible or not.
3015 * @param enmUnit Sample unit.
3016 * @param pszDesc Sample description.
3017 * @param pszName The sample name format string.
3018 * @param args Arguments to the format string.
3019 */
3020 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
3021 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
3022 const char *pszName, va_list args) RT_IPRT_FORMAT_ATTR(7, 0));
3023
3024 /**
3025 * Registers the device with the default PCI bus.
3026 *
3027 * @returns VBox status code.
3028 * @param pDevIns The device instance.
3029 * @param pPciDev The PCI device structure.
3030 * Any PCI enabled device must keep this in it's instance data!
3031 * Fill in the PCI data config before registration, please.
3032 * @remark This is the simple interface, a Ex interface will be created if
3033 * more features are needed later.
3034 */
3035 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
3036
3037 /**
3038 * Initialize MSI support in a PCI device.
3039 *
3040 * @returns VBox status code.
3041 * @param pDevIns The device instance.
3042 * @param pMsiReg MSI registartion structure.
3043 */
3044 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
3045
3046 /**
3047 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
3048 *
3049 * @returns VBox status code.
3050 * @param pDevIns The device instance.
3051 * @param iRegion The region number.
3052 * @param cbRegion Size of the region.
3053 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
3054 * @param pfnCallback Callback for doing the mapping.
3055 * @remarks The callback will be invoked holding the PDM lock. The device lock
3056 * is NOT take because that is very likely be a lock order violation.
3057 */
3058 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
3059 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
3060
3061 /**
3062 * Register PCI configuration space read/write callbacks.
3063 *
3064 * @param pDevIns The device instance.
3065 * @param pPciDev The PCI device structure.
3066 * If NULL the default PCI device for this device instance is used.
3067 * @param pfnRead Pointer to the user defined PCI config read function.
3068 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
3069 * PCI config read function. This way, user can decide when (and if)
3070 * to call default PCI config read function. Can be NULL.
3071 * @param pfnWrite Pointer to the user defined PCI config write function.
3072 * @param ppfnWriteOld Pointer to function pointer which will receive
3073 * the old (default) PCI config write function.
3074 * This way, user can decide when (and if) to call
3075 * default PCI config write function. Can be NULL.
3076 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
3077 * is NOT take because that is very likely be a lock order violation.
3078 * @thread EMT
3079 */
3080 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3081 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
3082
3083 /**
3084 * Bus master physical memory read.
3085 *
3086 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3087 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3088 * @param pDevIns The device instance.
3089 * @param GCPhys Physical address start reading from.
3090 * @param pvBuf Where to put the read bits.
3091 * @param cbRead How many bytes to read.
3092 * @thread Any thread, but the call may involve the emulation thread.
3093 */
3094 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3095
3096 /**
3097 * Bus master physical memory write.
3098 *
3099 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3100 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3101 * @param pDevIns The device instance.
3102 * @param GCPhys Physical address to write to.
3103 * @param pvBuf What to write.
3104 * @param cbWrite How many bytes to write.
3105 * @thread Any thread, but the call may involve the emulation thread.
3106 */
3107 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3108
3109 /**
3110 * Set the IRQ for a PCI device.
3111 *
3112 * @param pDevIns The device instance.
3113 * @param iIrq IRQ number to set.
3114 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3115 * @thread Any thread, but will involve the emulation thread.
3116 */
3117 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3118
3119 /**
3120 * Set the IRQ for a PCI device, but don't wait for EMT to process
3121 * the request when not called from EMT.
3122 *
3123 * @param pDevIns The device instance.
3124 * @param iIrq IRQ number to set.
3125 * @param iLevel IRQ level.
3126 * @thread Any thread, but will involve the emulation thread.
3127 */
3128 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3129
3130 /**
3131 * Set ISA IRQ for a device.
3132 *
3133 * @param pDevIns The device instance.
3134 * @param iIrq IRQ number to set.
3135 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3136 * @thread Any thread, but will involve the emulation thread.
3137 */
3138 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3139
3140 /**
3141 * Set the ISA IRQ for a device, but don't wait for EMT to process
3142 * the request when not called from EMT.
3143 *
3144 * @param pDevIns The device instance.
3145 * @param iIrq IRQ number to set.
3146 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3147 * @thread Any thread, but will involve the emulation thread.
3148 */
3149 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3150
3151 /**
3152 * Attaches a driver (chain) to the device.
3153 *
3154 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3155 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3156 *
3157 * @returns VBox status code.
3158 * @param pDevIns The device instance.
3159 * @param iLun The logical unit to attach.
3160 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3161 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3162 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3163 * for the live of the device instance.
3164 */
3165 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3166 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3167
3168 /**
3169 * Detaches an attached driver (chain) from the device again.
3170 *
3171 * @returns VBox status code.
3172 * @param pDevIns The device instance.
3173 * @param pDrvIns The driver instance to detach.
3174 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3175 */
3176 DECLR3CALLBACKMEMBER(int, pfnDriverDetach,(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags));
3177
3178 /**
3179 * Create a queue.
3180 *
3181 * @returns VBox status code.
3182 * @param pDevIns The device instance.
3183 * @param cbItem The size of a queue item.
3184 * @param cItems The number of items in the queue.
3185 * @param cMilliesInterval The number of milliseconds between polling the queue.
3186 * If 0 then the emulation thread will be notified whenever an item arrives.
3187 * @param pfnCallback The consumer function.
3188 * @param fRZEnabled Set if the queue should work in RC and R0.
3189 * @param pszName The queue base name. The instance number will be
3190 * appended automatically.
3191 * @param ppQueue Where to store the queue handle on success.
3192 * @thread The emulation thread.
3193 * @remarks The device critical section will NOT be entered before calling the
3194 * callback. No locks will be held, but for now it's safe to assume
3195 * that only one EMT will do queue callbacks at any one time.
3196 */
3197 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3198 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3199
3200 /**
3201 * Initializes a PDM critical section.
3202 *
3203 * The PDM critical sections are derived from the IPRT critical sections, but
3204 * works in RC and R0 as well.
3205 *
3206 * @returns VBox status code.
3207 * @param pDevIns The device instance.
3208 * @param pCritSect Pointer to the critical section.
3209 * @param SRC_POS Use RT_SRC_POS.
3210 * @param pszNameFmt Format string for naming the critical section.
3211 * For statistics and lock validation.
3212 * @param va Arguments for the format string.
3213 */
3214 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3215 const char *pszNameFmt, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3216
3217 /**
3218 * Gets the NOP critical section.
3219 *
3220 * @returns The ring-3 address of the NOP critical section.
3221 * @param pDevIns The device instance.
3222 */
3223 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3224
3225 /**
3226 * Gets the NOP critical section.
3227 *
3228 * @returns The ring-0 address of the NOP critical section.
3229 * @param pDevIns The device instance.
3230 */
3231 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3232
3233 /**
3234 * Gets the NOP critical section.
3235 *
3236 * @returns The raw-mode context address of the NOP critical section.
3237 * @param pDevIns The device instance.
3238 */
3239 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3240
3241 /**
3242 * Changes the device level critical section from the automatically created
3243 * default to one desired by the device constructor.
3244 *
3245 * @returns VBox status code.
3246 * @param pDevIns The device instance.
3247 * @param pCritSect The critical section to use. NULL is not
3248 * valid, instead use the NOP critical
3249 * section.
3250 */
3251 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3252
3253 /**
3254 * Creates a PDM thread.
3255 *
3256 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3257 * resuming, and destroying the thread as the VM state changes.
3258 *
3259 * @returns VBox status code.
3260 * @param pDevIns The device instance.
3261 * @param ppThread Where to store the thread 'handle'.
3262 * @param pvUser The user argument to the thread function.
3263 * @param pfnThread The thread function.
3264 * @param pfnWakeup The wakup callback. This is called on the EMT
3265 * thread when a state change is pending.
3266 * @param cbStack See RTThreadCreate.
3267 * @param enmType See RTThreadCreate.
3268 * @param pszName See RTThreadCreate.
3269 * @remarks The device critical section will NOT be entered prior to invoking
3270 * the function pointers.
3271 */
3272 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3273 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3274
3275 /**
3276 * Set up asynchronous handling of a suspend, reset or power off notification.
3277 *
3278 * This shall only be called when getting the notification. It must be called
3279 * for each one.
3280 *
3281 * @returns VBox status code.
3282 * @param pDevIns The device instance.
3283 * @param pfnAsyncNotify The callback.
3284 * @thread EMT(0)
3285 * @remarks The caller will enter the device critical section prior to invoking
3286 * the callback.
3287 */
3288 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3289
3290 /**
3291 * Notify EMT(0) that the device has completed the asynchronous notification
3292 * handling.
3293 *
3294 * This can be called at any time, spurious calls will simply be ignored.
3295 *
3296 * @param pDevIns The device instance.
3297 * @thread Any
3298 */
3299 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3300
3301 /**
3302 * Register the RTC device.
3303 *
3304 * @returns VBox status code.
3305 * @param pDevIns The device instance.
3306 * @param pRtcReg Pointer to a RTC registration structure.
3307 * @param ppRtcHlp Where to store the pointer to the helper
3308 * functions.
3309 */
3310 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3311
3312 /**
3313 * Register the PCI Bus.
3314 *
3315 * @returns VBox status code.
3316 * @param pDevIns The device instance.
3317 * @param pPciBusReg Pointer to PCI bus registration structure.
3318 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3319 * helpers.
3320 */
3321 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3322
3323 /**
3324 * Register the PIC device.
3325 *
3326 * @returns VBox status code.
3327 * @param pDevIns The device instance.
3328 * @param pPicReg Pointer to a PIC registration structure.
3329 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3330 * helpers.
3331 */
3332 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3333
3334 /**
3335 * Register the APIC device.
3336 *
3337 * @returns VBox status code.
3338 * @param pDevIns The device instance.
3339 * @param pApicReg Pointer to a APIC registration structure.
3340 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3341 */
3342 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3343
3344 /**
3345 * Register the I/O APIC device.
3346 *
3347 * @returns VBox status code.
3348 * @param pDevIns The device instance.
3349 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3350 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3351 * helpers.
3352 */
3353 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3354
3355 /**
3356 * Register the HPET device.
3357 *
3358 * @returns VBox status code.
3359 * @param pDevIns The device instance.
3360 * @param pHpetReg Pointer to a HPET registration structure.
3361 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3362 * helpers.
3363 */
3364 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3365
3366 /**
3367 * Register a raw PCI device.
3368 *
3369 * @returns VBox status code.
3370 * @param pDevIns The device instance.
3371 * @param pPciRawReg Pointer to a raw PCI registration structure.
3372 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3373 * device helpers.
3374 */
3375 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3376
3377 /**
3378 * Register the DMA device.
3379 *
3380 * @returns VBox status code.
3381 * @param pDevIns The device instance.
3382 * @param pDmacReg Pointer to a DMAC registration structure.
3383 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3384 */
3385 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3386
3387 /**
3388 * Register transfer function for DMA channel.
3389 *
3390 * @returns VBox status code.
3391 * @param pDevIns The device instance.
3392 * @param uChannel Channel number.
3393 * @param pfnTransferHandler Device specific transfer callback function.
3394 * @param pvUser User pointer to pass to the callback.
3395 * @thread EMT
3396 */
3397 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3398
3399 /**
3400 * Read memory.
3401 *
3402 * @returns VBox status code.
3403 * @param pDevIns The device instance.
3404 * @param uChannel Channel number.
3405 * @param pvBuffer Pointer to target buffer.
3406 * @param off DMA position.
3407 * @param cbBlock Block size.
3408 * @param pcbRead Where to store the number of bytes which was
3409 * read. optional.
3410 * @thread EMT
3411 */
3412 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3413
3414 /**
3415 * Write memory.
3416 *
3417 * @returns VBox status code.
3418 * @param pDevIns The device instance.
3419 * @param uChannel Channel number.
3420 * @param pvBuffer Memory to write.
3421 * @param off DMA position.
3422 * @param cbBlock Block size.
3423 * @param pcbWritten Where to store the number of bytes which was
3424 * written. optional.
3425 * @thread EMT
3426 */
3427 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3428
3429 /**
3430 * Set the DREQ line.
3431 *
3432 * @returns VBox status code.
3433 * @param pDevIns Device instance.
3434 * @param uChannel Channel number.
3435 * @param uLevel Level of the line.
3436 * @thread EMT
3437 */
3438 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3439
3440 /**
3441 * Get channel mode.
3442 *
3443 * @returns Channel mode. See specs.
3444 * @param pDevIns The device instance.
3445 * @param uChannel Channel number.
3446 * @thread EMT
3447 */
3448 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3449
3450 /**
3451 * Schedule DMA execution.
3452 *
3453 * @param pDevIns The device instance.
3454 * @thread Any thread.
3455 */
3456 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3457
3458 /**
3459 * Write CMOS value and update the checksum(s).
3460 *
3461 * @returns VBox status code.
3462 * @param pDevIns The device instance.
3463 * @param iReg The CMOS register index.
3464 * @param u8Value The CMOS register value.
3465 * @thread EMT
3466 */
3467 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3468
3469 /**
3470 * Read CMOS value.
3471 *
3472 * @returns VBox status code.
3473 * @param pDevIns The device instance.
3474 * @param iReg The CMOS register index.
3475 * @param pu8Value Where to store the CMOS register value.
3476 * @thread EMT
3477 */
3478 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3479
3480 /**
3481 * Assert that the current thread is the emulation thread.
3482 *
3483 * @returns True if correct.
3484 * @returns False if wrong.
3485 * @param pDevIns The device instance.
3486 * @param pszFile Filename of the assertion location.
3487 * @param iLine The linenumber of the assertion location.
3488 * @param pszFunction Function of the assertion location.
3489 */
3490 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3491
3492 /**
3493 * Assert that the current thread is NOT the emulation thread.
3494 *
3495 * @returns True if correct.
3496 * @returns False if wrong.
3497 * @param pDevIns The device instance.
3498 * @param pszFile Filename of the assertion location.
3499 * @param iLine The linenumber of the assertion location.
3500 * @param pszFunction Function of the assertion location.
3501 */
3502 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3503
3504 /**
3505 * Resolves the symbol for a raw-mode context interface.
3506 *
3507 * @returns VBox status code.
3508 * @param pDevIns The device instance.
3509 * @param pvInterface The interface structure.
3510 * @param cbInterface The size of the interface structure.
3511 * @param pszSymPrefix What to prefix the symbols in the list with
3512 * before resolving them. This must start with
3513 * 'dev' and contain the driver name.
3514 * @param pszSymList List of symbols corresponding to the interface.
3515 * There is generally a there is generally a define
3516 * holding this list associated with the interface
3517 * definition (INTERFACE_SYM_LIST). For more
3518 * details see PDMR3LdrGetInterfaceSymbols.
3519 * @thread EMT
3520 */
3521 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3522 const char *pszSymPrefix, const char *pszSymList));
3523
3524 /**
3525 * Resolves the symbol for a ring-0 context interface.
3526 *
3527 * @returns VBox status code.
3528 * @param pDevIns The device instance.
3529 * @param pvInterface The interface structure.
3530 * @param cbInterface The size of the interface structure.
3531 * @param pszSymPrefix What to prefix the symbols in the list with
3532 * before resolving them. This must start with
3533 * 'dev' and contain the driver name.
3534 * @param pszSymList List of symbols corresponding to the interface.
3535 * There is generally a there is generally a define
3536 * holding this list associated with the interface
3537 * definition (INTERFACE_SYM_LIST). For more
3538 * details see PDMR3LdrGetInterfaceSymbols.
3539 * @thread EMT
3540 */
3541 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3542 const char *pszSymPrefix, const char *pszSymList));
3543
3544 /**
3545 * Call the ring-0 request handler routine of the device.
3546 *
3547 * For this to work, the device must be ring-0 enabled and export a request
3548 * handler function. The name of the function must be the device name in
3549 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3550 * 'ReqHandler'. The device name will be captialized. It shall take the
3551 * exact same arguments as this function and be declared using
3552 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3553 *
3554 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3555 * or two as the handler address will be resolved on each invocation. This
3556 * is the reason for the EMT only restriction as well.
3557 *
3558 * @returns VBox status code.
3559 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3560 * handler function.
3561 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3562 *
3563 * @param pDevIns The device instance.
3564 * @param uOperation The operation to perform.
3565 * @param u64Arg 64-bit integer argument.
3566 * @thread EMT
3567 */
3568 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3569
3570 /**
3571 * Gets the reason for the most recent VM suspend.
3572 *
3573 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3574 * suspend has been made or if the pDevIns is invalid.
3575 * @param pDevIns The device instance.
3576 */
3577 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3578
3579 /**
3580 * Gets the reason for the most recent VM resume.
3581 *
3582 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3583 * resume has been made or if the pDevIns is invalid.
3584 * @param pDevIns The device instance.
3585 */
3586 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3587
3588
3589 /** Space reserved for future members.
3590 * @{ */
3591 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3592 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3593 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3594 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3595 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3596 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3597 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3598 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3599 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3600 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3601 /** @} */
3602
3603
3604 /** API available to trusted devices only.
3605 *
3606 * These APIs are providing unrestricted access to the guest and the VM,
3607 * or they are interacting intimately with PDM.
3608 *
3609 * @{
3610 */
3611
3612 /**
3613 * Gets the user mode VM handle. Restricted API.
3614 *
3615 * @returns User mode VM Handle.
3616 * @param pDevIns The device instance.
3617 */
3618 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3619
3620 /**
3621 * Gets the global VM handle. Restricted API.
3622 *
3623 * @returns VM Handle.
3624 * @param pDevIns The device instance.
3625 */
3626 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3627
3628 /**
3629 * Gets the VMCPU handle. Restricted API.
3630 *
3631 * @returns VMCPU Handle.
3632 * @param pDevIns The device instance.
3633 */
3634 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3635
3636 /**
3637 * The the VM CPU ID of the current thread (restricted API).
3638 *
3639 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3640 * @param pDevIns The device instance.
3641 */
3642 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3643
3644 /**
3645 * Registers the VMM device heap or notifies about mapping/unmapping.
3646 *
3647 * This interface serves three purposes:
3648 *
3649 * -# Register the VMM device heap during device construction
3650 * for the HM to use.
3651 * -# Notify PDM/HM that it's mapped into guest address
3652 * space (i.e. usable).
3653 * -# Notify PDM/HM that it is being unmapped from the guest
3654 * address space (i.e. not usable).
3655 *
3656 * @returns VBox status code.
3657 * @param pDevIns The device instance.
3658 * @param GCPhys The physical address if mapped, NIL_RTGCPHYS if
3659 * not mapped.
3660 * @param pvHeap Ring 3 heap pointer.
3661 * @param cbHeap Size of the heap.
3662 * @thread EMT.
3663 */
3664 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap));
3665
3666 /**
3667 * Registers the firmware (BIOS, EFI) device with PDM.
3668 *
3669 * The firmware provides a callback table and gets a special PDM helper table.
3670 * There can only be one firmware device for a VM.
3671 *
3672 * @returns VBox status code.
3673 * @param pDevIns The device instance.
3674 * @param pFwReg Firmware registration structure.
3675 * @param ppFwHlp Where to return the firmware helper structure.
3676 * @remarks Only valid during device construction.
3677 * @thread EMT(0)
3678 */
3679 DECLR3CALLBACKMEMBER(int, pfnFirmwareRegister,(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp));
3680
3681 /**
3682 * Resets the VM.
3683 *
3684 * @returns The appropriate VBox status code to pass around on reset.
3685 * @param pDevIns The device instance.
3686 * @param fFlags PDMVMRESET_F_XXX flags.
3687 * @thread The emulation thread.
3688 */
3689 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
3690
3691 /**
3692 * Suspends the VM.
3693 *
3694 * @returns The appropriate VBox status code to pass around on suspend.
3695 * @param pDevIns The device instance.
3696 * @thread The emulation thread.
3697 */
3698 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3699
3700 /**
3701 * Suspends, saves and powers off the VM.
3702 *
3703 * @returns The appropriate VBox status code to pass around.
3704 * @param pDevIns The device instance.
3705 * @thread An emulation thread.
3706 */
3707 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3708
3709 /**
3710 * Power off the VM.
3711 *
3712 * @returns The appropriate VBox status code to pass around on power off.
3713 * @param pDevIns The device instance.
3714 * @thread The emulation thread.
3715 */
3716 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3717
3718 /**
3719 * Checks if the Gate A20 is enabled or not.
3720 *
3721 * @returns true if A20 is enabled.
3722 * @returns false if A20 is disabled.
3723 * @param pDevIns The device instance.
3724 * @thread The emulation thread.
3725 */
3726 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3727
3728 /**
3729 * Enables or disables the Gate A20.
3730 *
3731 * @param pDevIns The device instance.
3732 * @param fEnable Set this flag to enable the Gate A20; clear it
3733 * to disable.
3734 * @thread The emulation thread.
3735 */
3736 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3737
3738 /**
3739 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3740 * thread.
3741 *
3742 * @param pDevIns The device instance.
3743 * @param iLeaf The CPUID leaf to get.
3744 * @param pEax Where to store the EAX value.
3745 * @param pEbx Where to store the EBX value.
3746 * @param pEcx Where to store the ECX value.
3747 * @param pEdx Where to store the EDX value.
3748 * @thread EMT.
3749 */
3750 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3751
3752 /**
3753 * Get the current virtual clock time in a VM. The clock frequency must be
3754 * queried separately.
3755 *
3756 * @returns Current clock time.
3757 * @param pDevIns The device instance.
3758 */
3759 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3760
3761 /**
3762 * Get the frequency of the virtual clock.
3763 *
3764 * @returns The clock frequency (not variable at run-time).
3765 * @param pDevIns The device instance.
3766 */
3767 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3768
3769 /**
3770 * Get the current virtual clock time in a VM, in nanoseconds.
3771 *
3772 * @returns Current clock time (in ns).
3773 * @param pDevIns The device instance.
3774 */
3775 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3776
3777 /**
3778 * Gets the support driver session.
3779 *
3780 * This is intended for working with the semaphore API.
3781 *
3782 * @returns Support driver session handle.
3783 * @param pDevIns The device instance.
3784 */
3785 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3786
3787 /** @} */
3788
3789 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3790 uint32_t u32TheEnd;
3791} PDMDEVHLPR3;
3792#endif /* !IN_RING3 */
3793/** Pointer to the R3 PDM Device API. */
3794typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3795/** Pointer to the R3 PDM Device API, const variant. */
3796typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3797
3798/** Current PDMDEVHLPR3 version number. */
3799#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 16, 0)
3800
3801
3802/**
3803 * PDM Device API - RC Variant.
3804 */
3805typedef struct PDMDEVHLPRC
3806{
3807 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3808 uint32_t u32Version;
3809
3810 /**
3811 * Bus master physical memory read.
3812 *
3813 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3814 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3815 * @param pDevIns The device instance.
3816 * @param GCPhys Physical address start reading from.
3817 * @param pvBuf Where to put the read bits.
3818 * @param cbRead How many bytes to read.
3819 * @thread Any thread, but the call may involve the emulation thread.
3820 */
3821 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3822
3823 /**
3824 * Bus master physical memory write.
3825 *
3826 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3827 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3828 * @param pDevIns The device instance.
3829 * @param GCPhys Physical address to write to.
3830 * @param pvBuf What to write.
3831 * @param cbWrite How many bytes to write.
3832 * @thread Any thread, but the call may involve the emulation thread.
3833 */
3834 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3835
3836 /**
3837 * Set the IRQ for a PCI device.
3838 *
3839 * @param pDevIns Device instance.
3840 * @param iIrq IRQ number to set.
3841 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3842 * @thread Any thread, but will involve the emulation thread.
3843 */
3844 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3845
3846 /**
3847 * Set ISA IRQ for a device.
3848 *
3849 * @param pDevIns Device instance.
3850 * @param iIrq IRQ number to set.
3851 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3852 * @thread Any thread, but will involve the emulation thread.
3853 */
3854 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3855
3856 /**
3857 * Read physical memory.
3858 *
3859 * @returns VINF_SUCCESS (for now).
3860 * @param pDevIns Device instance.
3861 * @param GCPhys Physical address start reading from.
3862 * @param pvBuf Where to put the read bits.
3863 * @param cbRead How many bytes to read.
3864 */
3865 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3866
3867 /**
3868 * Write to physical memory.
3869 *
3870 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3871 * @param pDevIns Device instance.
3872 * @param GCPhys Physical address to write to.
3873 * @param pvBuf What to write.
3874 * @param cbWrite How many bytes to write.
3875 */
3876 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3877
3878 /**
3879 * Checks if the Gate A20 is enabled or not.
3880 *
3881 * @returns true if A20 is enabled.
3882 * @returns false if A20 is disabled.
3883 * @param pDevIns Device instance.
3884 * @thread The emulation thread.
3885 */
3886 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3887
3888 /**
3889 * Gets the VM state.
3890 *
3891 * @returns VM state.
3892 * @param pDevIns The device instance.
3893 * @thread Any thread (just keep in mind that it's volatile info).
3894 */
3895 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3896
3897 /**
3898 * Set the VM error message
3899 *
3900 * @returns rc.
3901 * @param pDevIns Driver instance.
3902 * @param rc VBox status code.
3903 * @param SRC_POS Use RT_SRC_POS.
3904 * @param pszFormat Error message format string.
3905 * @param ... Error message arguments.
3906 */
3907 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3908 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
3909
3910 /**
3911 * Set the VM error message
3912 *
3913 * @returns rc.
3914 * @param pDevIns Driver instance.
3915 * @param rc VBox status code.
3916 * @param SRC_POS Use RT_SRC_POS.
3917 * @param pszFormat Error message format string.
3918 * @param va Error message arguments.
3919 */
3920 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3921 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3922
3923 /**
3924 * Set the VM runtime error message
3925 *
3926 * @returns VBox status code.
3927 * @param pDevIns Device instance.
3928 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3929 * @param pszErrorId Error ID string.
3930 * @param pszFormat Error message format string.
3931 * @param ... Error message arguments.
3932 */
3933 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3934 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
3935
3936 /**
3937 * Set the VM runtime error message
3938 *
3939 * @returns VBox status code.
3940 * @param pDevIns Device instance.
3941 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3942 * @param pszErrorId Error ID string.
3943 * @param pszFormat Error message format string.
3944 * @param va Error message arguments.
3945 */
3946 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3947 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
3948
3949 /**
3950 * Set parameters for pending MMIO patch operation
3951 *
3952 * @returns VBox status code.
3953 * @param pDevIns Device instance.
3954 * @param GCPhys MMIO physical address
3955 * @param pCachedData GC pointer to cached data
3956 */
3957 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3958
3959 /**
3960 * Gets the VM handle. Restricted API.
3961 *
3962 * @returns VM Handle.
3963 * @param pDevIns Device instance.
3964 */
3965 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3966
3967 /**
3968 * Gets the VMCPU handle. Restricted API.
3969 *
3970 * @returns VMCPU Handle.
3971 * @param pDevIns The device instance.
3972 */
3973 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3974
3975 /**
3976 * The the VM CPU ID of the current thread (restricted API).
3977 *
3978 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3979 * @param pDevIns The device instance.
3980 */
3981 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3982
3983 /**
3984 * Get the current virtual clock time in a VM. The clock frequency must be
3985 * queried separately.
3986 *
3987 * @returns Current clock time.
3988 * @param pDevIns The device instance.
3989 */
3990 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3991
3992 /**
3993 * Get the frequency of the virtual clock.
3994 *
3995 * @returns The clock frequency (not variable at run-time).
3996 * @param pDevIns The device instance.
3997 */
3998 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3999
4000 /**
4001 * Get the current virtual clock time in a VM, in nanoseconds.
4002 *
4003 * @returns Current clock time (in ns).
4004 * @param pDevIns The device instance.
4005 */
4006 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4007
4008 /**
4009 * Gets the trace buffer handle.
4010 *
4011 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4012 * really inteded for direct usage, thus no inline wrapper function.
4013 *
4014 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4015 * @param pDevIns The device instance.
4016 */
4017 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4018
4019 /** Just a safety precaution. */
4020 uint32_t u32TheEnd;
4021} PDMDEVHLPRC;
4022/** Pointer PDM Device RC API. */
4023typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
4024/** Pointer PDM Device RC API. */
4025typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
4026
4027/** Current PDMDEVHLP version number. */
4028#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 4, 1)
4029
4030
4031/**
4032 * PDM Device API - R0 Variant.
4033 */
4034typedef struct PDMDEVHLPR0
4035{
4036 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
4037 uint32_t u32Version;
4038
4039 /**
4040 * Bus master physical memory read.
4041 *
4042 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
4043 * VERR_EM_MEMORY.
4044 * @param pDevIns The device instance.
4045 * @param GCPhys Physical address start reading from.
4046 * @param pvBuf Where to put the read bits.
4047 * @param cbRead How many bytes to read.
4048 * @thread Any thread, but the call may involve the emulation thread.
4049 */
4050 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
4051
4052 /**
4053 * Bus master physical memory write.
4054 *
4055 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
4056 * VERR_EM_MEMORY.
4057 * @param pDevIns The device instance.
4058 * @param GCPhys Physical address to write to.
4059 * @param pvBuf What to write.
4060 * @param cbWrite How many bytes to write.
4061 * @thread Any thread, but the call may involve the emulation thread.
4062 */
4063 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
4064
4065 /**
4066 * Set the IRQ for a PCI device.
4067 *
4068 * @param pDevIns Device instance.
4069 * @param iIrq IRQ number to set.
4070 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
4071 * @thread Any thread, but will involve the emulation thread.
4072 */
4073 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
4074
4075 /**
4076 * Set ISA IRQ for a device.
4077 *
4078 * @param pDevIns Device instance.
4079 * @param iIrq IRQ number to set.
4080 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
4081 * @thread Any thread, but will involve the emulation thread.
4082 */
4083 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
4084
4085 /**
4086 * Read physical memory.
4087 *
4088 * @returns VINF_SUCCESS (for now).
4089 * @param pDevIns Device instance.
4090 * @param GCPhys Physical address start reading from.
4091 * @param pvBuf Where to put the read bits.
4092 * @param cbRead How many bytes to read.
4093 */
4094 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
4095
4096 /**
4097 * Write to physical memory.
4098 *
4099 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
4100 * @param pDevIns Device instance.
4101 * @param GCPhys Physical address to write to.
4102 * @param pvBuf What to write.
4103 * @param cbWrite How many bytes to write.
4104 */
4105 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
4106
4107 /**
4108 * Checks if the Gate A20 is enabled or not.
4109 *
4110 * @returns true if A20 is enabled.
4111 * @returns false if A20 is disabled.
4112 * @param pDevIns Device instance.
4113 * @thread The emulation thread.
4114 */
4115 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
4116
4117 /**
4118 * Gets the VM state.
4119 *
4120 * @returns VM state.
4121 * @param pDevIns The device instance.
4122 * @thread Any thread (just keep in mind that it's volatile info).
4123 */
4124 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
4125
4126 /**
4127 * Set the VM error message
4128 *
4129 * @returns rc.
4130 * @param pDevIns Driver instance.
4131 * @param rc VBox status code.
4132 * @param SRC_POS Use RT_SRC_POS.
4133 * @param pszFormat Error message format string.
4134 * @param ... Error message arguments.
4135 */
4136 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4137 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
4138
4139 /**
4140 * Set the VM error message
4141 *
4142 * @returns rc.
4143 * @param pDevIns Driver instance.
4144 * @param rc VBox status code.
4145 * @param SRC_POS Use RT_SRC_POS.
4146 * @param pszFormat Error message format string.
4147 * @param va Error message arguments.
4148 */
4149 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4150 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
4151
4152 /**
4153 * Set the VM runtime error message
4154 *
4155 * @returns VBox status code.
4156 * @param pDevIns Device instance.
4157 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4158 * @param pszErrorId Error ID string.
4159 * @param pszFormat Error message format string.
4160 * @param ... Error message arguments.
4161 */
4162 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4163 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
4164
4165 /**
4166 * Set the VM runtime error message
4167 *
4168 * @returns VBox status code.
4169 * @param pDevIns Device instance.
4170 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4171 * @param pszErrorId Error ID string.
4172 * @param pszFormat Error message format string.
4173 * @param va Error message arguments.
4174 */
4175 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4176 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
4177
4178 /**
4179 * Set parameters for pending MMIO patch operation
4180 *
4181 * @returns rc.
4182 * @param pDevIns Device instance.
4183 * @param GCPhys MMIO physical address
4184 * @param pCachedData GC pointer to cached data
4185 */
4186 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4187
4188 /**
4189 * Gets the VM handle. Restricted API.
4190 *
4191 * @returns VM Handle.
4192 * @param pDevIns Device instance.
4193 */
4194 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4195
4196 /**
4197 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4198 *
4199 * @returns true = yes, false = no
4200 * @param pDevIns Device instance.
4201 */
4202 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4203
4204 /**
4205 * Gets the VMCPU handle. Restricted API.
4206 *
4207 * @returns VMCPU Handle.
4208 * @param pDevIns The device instance.
4209 */
4210 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4211
4212 /**
4213 * The the VM CPU ID of the current thread (restricted API).
4214 *
4215 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
4216 * @param pDevIns The device instance.
4217 */
4218 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4219
4220 /**
4221 * Get the current virtual clock time in a VM. The clock frequency must be
4222 * queried separately.
4223 *
4224 * @returns Current clock time.
4225 * @param pDevIns The device instance.
4226 */
4227 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4228
4229 /**
4230 * Get the frequency of the virtual clock.
4231 *
4232 * @returns The clock frequency (not variable at run-time).
4233 * @param pDevIns The device instance.
4234 */
4235 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4236
4237 /**
4238 * Get the current virtual clock time in a VM, in nanoseconds.
4239 *
4240 * @returns Current clock time (in ns).
4241 * @param pDevIns The device instance.
4242 */
4243 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4244
4245 /**
4246 * Gets the trace buffer handle.
4247 *
4248 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4249 * really inteded for direct usage, thus no inline wrapper function.
4250 *
4251 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4252 * @param pDevIns The device instance.
4253 */
4254 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4255
4256 /** Just a safety precaution. */
4257 uint32_t u32TheEnd;
4258} PDMDEVHLPR0;
4259/** Pointer PDM Device R0 API. */
4260typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4261/** Pointer PDM Device GC API. */
4262typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4263
4264/** Current PDMDEVHLP version number. */
4265#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 4, 1)
4266
4267
4268
4269/**
4270 * PDM Device Instance.
4271 */
4272typedef struct PDMDEVINS
4273{
4274 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4275 uint32_t u32Version;
4276 /** Device instance number. */
4277 uint32_t iInstance;
4278
4279 /** Pointer the GC PDM Device API. */
4280 PCPDMDEVHLPRC pHlpRC;
4281 /** Pointer to device instance data. */
4282 RTRCPTR pvInstanceDataRC;
4283 /** The critical section for the device, see pCritSectXR3. */
4284 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4285 /** Alignment padding. */
4286 RTRCPTR pAlignmentRC;
4287
4288 /** Pointer the R0 PDM Device API. */
4289 PCPDMDEVHLPR0 pHlpR0;
4290 /** Pointer to device instance data (R0). */
4291 RTR0PTR pvInstanceDataR0;
4292 /** The critical section for the device, see pCritSectXR3. */
4293 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4294
4295 /** Pointer the HC PDM Device API. */
4296 PCPDMDEVHLPR3 pHlpR3;
4297 /** Pointer to device instance data. */
4298 RTR3PTR pvInstanceDataR3;
4299 /** The critical section for the device.
4300 *
4301 * TM and IOM will enter this critical section before calling into the device
4302 * code. PDM will when doing power on, power off, reset, suspend and resume
4303 * notifications. SSM will currently not, but this will be changed later on.
4304 *
4305 * The device gets a critical section automatically assigned to it before
4306 * the constructor is called. If the constructor wishes to use a different
4307 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4308 * very early on.
4309 */
4310 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4311
4312 /** Pointer to device registration structure. */
4313 R3PTRTYPE(PCPDMDEVREG) pReg;
4314 /** Configuration handle. */
4315 R3PTRTYPE(PCFGMNODE) pCfg;
4316
4317 /** The base interface of the device.
4318 *
4319 * The device constructor initializes this if it has any
4320 * device level interfaces to export. To obtain this interface
4321 * call PDMR3QueryDevice(). */
4322 PDMIBASE IBase;
4323
4324 /** Tracing indicator. */
4325 uint32_t fTracing;
4326 /** The tracing ID of this device. */
4327 uint32_t idTracing;
4328#if HC_ARCH_BITS == 32
4329 /** Align the internal data more naturally. */
4330 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4331#endif
4332
4333 /** Internal data. */
4334 union
4335 {
4336#ifdef PDMDEVINSINT_DECLARED
4337 PDMDEVINSINT s;
4338#endif
4339 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4340 } Internal;
4341
4342 /** Device instance data. The size of this area is defined
4343 * in the PDMDEVREG::cbInstanceData field. */
4344 char achInstanceData[8];
4345} PDMDEVINS;
4346
4347/** Current PDMDEVINS version number. */
4348#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4349
4350/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4351#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4352
4353/**
4354 * Checks the structure versions of the device instance and device helpers,
4355 * returning if they are incompatible.
4356 *
4357 * This is for use in the constructor.
4358 *
4359 * @param pDevIns The device instance pointer.
4360 */
4361#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4362 do \
4363 { \
4364 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4365 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4366 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4367 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4368 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4369 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4370 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4371 } while (0)
4372
4373/**
4374 * Quietly checks the structure versions of the device instance and device
4375 * helpers, returning if they are incompatible.
4376 *
4377 * This is for use in the destructor.
4378 *
4379 * @param pDevIns The device instance pointer.
4380 */
4381#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4382 do \
4383 { \
4384 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4385 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4386 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4387 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4388 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4389 } while (0)
4390
4391/**
4392 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4393 * constructor - returns on failure.
4394 *
4395 * This should be invoked after having initialized the instance data
4396 * sufficiently for the correct operation of the destructor. The destructor is
4397 * always called!
4398 *
4399 * @param pDevIns Pointer to the PDM device instance.
4400 * @param pszValidValues Patterns describing the valid value names. See
4401 * RTStrSimplePatternMultiMatch for details on the
4402 * pattern syntax.
4403 * @param pszValidNodes Patterns describing the valid node (key) names.
4404 * Pass empty string if no valid nodes.
4405 */
4406#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4407 do \
4408 { \
4409 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4410 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4411 if (RT_SUCCESS(rcValCfg)) \
4412 { /* likely */ } else return rcValCfg; \
4413 } while (0)
4414
4415/** @def PDMDEV_ASSERT_EMT
4416 * Assert that the current thread is the emulation thread.
4417 */
4418#ifdef VBOX_STRICT
4419# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4420#else
4421# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4422#endif
4423
4424/** @def PDMDEV_ASSERT_OTHER
4425 * Assert that the current thread is NOT the emulation thread.
4426 */
4427#ifdef VBOX_STRICT
4428# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4429#else
4430# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4431#endif
4432
4433/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4434 * Assert that the current thread is owner of the VM lock.
4435 */
4436#ifdef VBOX_STRICT
4437# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4438#else
4439# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4440#endif
4441
4442/** @def PDMDEV_SET_ERROR
4443 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4444 */
4445#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4446 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4447
4448/** @def PDMDEV_SET_RUNTIME_ERROR
4449 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4450 */
4451#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4452 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4453
4454/** @def PDMDEVINS_2_RCPTR
4455 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4456 */
4457#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4458
4459/** @def PDMDEVINS_2_R3PTR
4460 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4461 */
4462#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4463
4464/** @def PDMDEVINS_2_R0PTR
4465 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4466 */
4467#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4468
4469
4470#ifdef IN_RING3
4471
4472/**
4473 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4474 */
4475DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4476 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4477 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4478{
4479 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4480}
4481
4482/**
4483 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4484 */
4485DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4486 const char *pszOut, const char *pszIn, const char *pszOutStr,
4487 const char *pszInStr, const char *pszDesc)
4488{
4489 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4490}
4491
4492/**
4493 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4494 */
4495DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4496 const char *pszOut, const char *pszIn, const char *pszOutStr,
4497 const char *pszInStr, const char *pszDesc)
4498{
4499 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4500}
4501
4502/**
4503 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4504 */
4505DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4506{
4507 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4508}
4509
4510/**
4511 * Register a Memory Mapped I/O (MMIO) region.
4512 *
4513 * These callbacks are of course for the ring-3 context (R3). Register HC
4514 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4515 * must be a R3 handler for every RC and R0 handler!
4516 *
4517 * @returns VBox status.
4518 * @param pDevIns The device instance to register the MMIO with.
4519 * @param GCPhysStart First physical address in the range.
4520 * @param cbRange The size of the range (in bytes).
4521 * @param pvUser User argument.
4522 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4523 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4524 * @param pfnRead Pointer to function which is gonna handle Read operations.
4525 * @param pszDesc Pointer to description string. This must not be freed.
4526 */
4527DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4528 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4529{
4530 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4531 fFlags, pszDesc);
4532}
4533
4534/**
4535 * Register a Memory Mapped I/O (MMIO) region for RC.
4536 *
4537 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4538 * (R3) handlers before guest context handlers! There must be a R3 handler for
4539 * every RC handler!
4540 *
4541 * @returns VBox status.
4542 * @param pDevIns The device instance to register the MMIO with.
4543 * @param GCPhysStart First physical address in the range.
4544 * @param cbRange The size of the range (in bytes).
4545 * @param pvUser User argument.
4546 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4547 * @param pszRead Name of the RC function which is gonna handle Read operations.
4548 */
4549DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4550 const char *pszWrite, const char *pszRead)
4551{
4552 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4553}
4554
4555/**
4556 * Register a Memory Mapped I/O (MMIO) region for R0.
4557 *
4558 * These callbacks are for the ring-0 host context (R0). Register ring-3
4559 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
4560 * every R0 handler!
4561 *
4562 * @returns VBox status.
4563 * @param pDevIns The device instance to register the MMIO with.
4564 * @param GCPhysStart First physical address in the range.
4565 * @param cbRange The size of the range (in bytes).
4566 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
4567 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4568 * @param pszRead Name of the RC function which is gonna handle Read operations.
4569 * @remarks Caller enters the device critical section prior to invoking the
4570 * registered callback methods.
4571 */
4572DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4573 const char *pszWrite, const char *pszRead)
4574{
4575 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4576}
4577
4578/**
4579 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4580 */
4581DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4582 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4583 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4584{
4585 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4586 fFlags, pszDesc);
4587}
4588
4589/**
4590 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4591 */
4592DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4593 const char *pszWrite, const char *pszRead, const char *pszFill)
4594{
4595 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4596}
4597
4598/**
4599 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4600 */
4601DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4602 const char *pszWrite, const char *pszRead, const char *pszFill)
4603{
4604 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4605}
4606
4607/**
4608 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4609 */
4610DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4611{
4612 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4613}
4614
4615/**
4616 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4617 */
4618DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4619{
4620 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4621}
4622
4623/**
4624 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4625 */
4626DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4627{
4628 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4629}
4630
4631/**
4632 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4633 */
4634DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4635{
4636 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4637}
4638
4639/**
4640 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4641 */
4642DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4643{
4644 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4645}
4646
4647/**
4648 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4649 */
4650DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4651 const char *pszDesc, PRTRCPTR pRCPtr)
4652{
4653 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4654}
4655
4656/**
4657 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4658 */
4659DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4660 const char *pszDesc, PRTR0PTR pR0Ptr)
4661{
4662 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4663}
4664
4665/**
4666 * @copydoc PDMDEVHLPR3::pfnROMRegister
4667 */
4668DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4669 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4670{
4671 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4672}
4673
4674/**
4675 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4676 */
4677DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4678{
4679 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4680}
4681
4682/**
4683 * Register a save state data unit.
4684 *
4685 * @returns VBox status.
4686 * @param pDevIns The device instance.
4687 * @param uVersion Data layout version number.
4688 * @param cbGuess The approximate amount of data in the unit.
4689 * Only for progress indicators.
4690 * @param pfnSaveExec Execute save callback, optional.
4691 * @param pfnLoadExec Execute load callback, optional.
4692 */
4693DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4694 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4695{
4696 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4697 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4698 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4699 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4700}
4701
4702/**
4703 * Register a save state data unit with a live save callback as well.
4704 *
4705 * @returns VBox status.
4706 * @param pDevIns The device instance.
4707 * @param uVersion Data layout version number.
4708 * @param cbGuess The approximate amount of data in the unit.
4709 * Only for progress indicators.
4710 * @param pfnLiveExec Execute live callback, optional.
4711 * @param pfnSaveExec Execute save callback, optional.
4712 * @param pfnLoadExec Execute load callback, optional.
4713 */
4714DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4715 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4716{
4717 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4718 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4719 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4720 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4721}
4722
4723/**
4724 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4725 */
4726DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4727 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4728 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4729 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4730{
4731 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4732 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4733 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4734 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4735}
4736
4737/**
4738 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4739 */
4740DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4741 const char *pszDesc, PPTMTIMERR3 ppTimer)
4742{
4743 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4744}
4745
4746/**
4747 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4748 */
4749DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4750{
4751 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4752}
4753
4754#endif /* IN_RING3 */
4755
4756/**
4757 * @copydoc PDMDEVHLPR3::pfnPhysRead
4758 */
4759DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4760{
4761 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4762}
4763
4764/**
4765 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4766 */
4767DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4768{
4769 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4770}
4771
4772#ifdef IN_RING3
4773
4774/**
4775 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4776 */
4777DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4778{
4779 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4780}
4781
4782/**
4783 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4784 */
4785DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv,
4786 PPGMPAGEMAPLOCK pLock)
4787{
4788 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4789}
4790
4791/**
4792 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4793 */
4794DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4795{
4796 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4797}
4798
4799/**
4800 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4801 */
4802DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4803{
4804 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4805}
4806
4807/**
4808 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4809 */
4810DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4811{
4812 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4813}
4814
4815/**
4816 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4817 */
4818DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4819{
4820 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4821}
4822
4823/**
4824 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4825 */
4826DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4827{
4828 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4829}
4830
4831/**
4832 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4833 */
4834DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4835{
4836 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4837}
4838
4839/**
4840 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4841 */
4842DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4843{
4844 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4845}
4846#endif /* IN_RING3 */
4847
4848/**
4849 * @copydoc PDMDEVHLPR3::pfnVMState
4850 */
4851DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4852{
4853 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4854}
4855
4856#ifdef IN_RING3
4857/**
4858 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4859 */
4860DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4861{
4862 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4863}
4864#endif /* IN_RING3 */
4865
4866/**
4867 * @copydoc PDMDEVHLPR3::pfnVMSetError
4868 */
4869DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL,
4870 const char *pszFormat, ...)
4871{
4872 va_list va;
4873 va_start(va, pszFormat);
4874 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4875 va_end(va);
4876 return rc;
4877}
4878
4879/**
4880 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4881 */
4882DECLINLINE(int) RT_IPRT_FORMAT_ATTR(4, 5) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4883 const char *pszFormat, ...)
4884{
4885 va_list va;
4886 int rc;
4887 va_start(va, pszFormat);
4888 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4889 va_end(va);
4890 return rc;
4891}
4892
4893/**
4894 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4895 *
4896 * @returns VBox status code which must be passed up to the VMM. This will be
4897 * VINF_SUCCESS in non-strict builds.
4898 * @param pDevIns The device instance.
4899 * @param SRC_POS Use RT_SRC_POS.
4900 * @param pszFormat Message. (optional)
4901 * @param ... Message parameters.
4902 */
4903DECLINLINE(int) RT_IPRT_FORMAT_ATTR(5, 6) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4904{
4905#ifdef VBOX_STRICT
4906# ifdef IN_RING3
4907 int rc;
4908 va_list args;
4909 va_start(args, pszFormat);
4910 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4911 va_end(args);
4912 return rc;
4913# else
4914 NOREF(pDevIns);
4915 NOREF(pszFile);
4916 NOREF(iLine);
4917 NOREF(pszFunction);
4918 NOREF(pszFormat);
4919 return VINF_EM_DBG_STOP;
4920# endif
4921#else
4922 NOREF(pDevIns);
4923 NOREF(pszFile);
4924 NOREF(iLine);
4925 NOREF(pszFunction);
4926 NOREF(pszFormat);
4927 return VINF_SUCCESS;
4928#endif
4929}
4930
4931#ifdef IN_RING3
4932
4933/**
4934 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4935 */
4936DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4937{
4938 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4939}
4940
4941/**
4942 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4943 */
4944DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4945{
4946 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4947}
4948
4949/**
4950 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4951 */
4952DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4953{
4954 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4955}
4956
4957/**
4958 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4959 */
4960DECLINLINE(void) RT_IPRT_FORMAT_ATTR(7, 8) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
4961 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4962 const char *pszDesc, const char *pszName, ...)
4963{
4964 va_list va;
4965 va_start(va, pszName);
4966 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4967 va_end(va);
4968}
4969
4970/**
4971 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4972 */
4973DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4974{
4975 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4976}
4977
4978/**
4979 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4980 */
4981DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
4982 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4983{
4984 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4985}
4986
4987/**
4988 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4989 */
4990DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4991{
4992 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4993}
4994
4995/**
4996 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4997 */
4998DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4999 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
5000{
5001 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
5002}
5003
5004#endif /* IN_RING3 */
5005
5006/**
5007 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
5008 */
5009DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
5010{
5011 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
5012}
5013
5014/**
5015 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
5016 */
5017DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
5018{
5019 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
5020}
5021
5022/**
5023 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
5024 */
5025DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5026{
5027 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
5028}
5029
5030/**
5031 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
5032 */
5033DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5034{
5035 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
5036}
5037
5038/**
5039 * @copydoc PDMDEVHLPR3::pfnISASetIrq
5040 */
5041DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5042{
5043 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5044}
5045
5046/**
5047 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
5048 */
5049DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5050{
5051 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5052}
5053
5054#ifdef IN_RING3
5055
5056/**
5057 * @copydoc PDMDEVHLPR3::pfnDriverAttach
5058 */
5059DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
5060{
5061 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
5062}
5063
5064/**
5065 * @copydoc PDMDEVHLPR3::pfnDriverDetach
5066 */
5067DECLINLINE(int) PDMDevHlpDriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
5068{
5069 return pDevIns->pHlpR3->pfnDriverDetach(pDevIns, pDrvIns, fFlags);
5070}
5071
5072/**
5073 * @copydoc PDMDEVHLPR3::pfnQueueCreate
5074 */
5075DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
5076 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
5077{
5078 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
5079}
5080
5081/**
5082 * Initializes a PDM critical section.
5083 *
5084 * The PDM critical sections are derived from the IPRT critical sections, but
5085 * works in RC and R0 as well.
5086 *
5087 * @returns VBox status code.
5088 * @param pDevIns The device instance.
5089 * @param pCritSect Pointer to the critical section.
5090 * @param SRC_POS Use RT_SRC_POS.
5091 * @param pszNameFmt Format string for naming the critical section.
5092 * For statistics and lock validation.
5093 * @param ... Arguments for the format string.
5094 */
5095DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
5096 const char *pszNameFmt, ...)
5097{
5098 int rc;
5099 va_list va;
5100 va_start(va, pszNameFmt);
5101 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
5102 va_end(va);
5103 return rc;
5104}
5105
5106/**
5107 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
5108 */
5109DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
5110{
5111 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
5112}
5113
5114/**
5115 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
5116 */
5117DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
5118{
5119 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
5120}
5121
5122/**
5123 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
5124 */
5125DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
5126{
5127 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
5128}
5129
5130/**
5131 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
5132 */
5133DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
5134{
5135 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
5136}
5137
5138/**
5139 * @copydoc PDMDEVHLPR3::pfnThreadCreate
5140 */
5141DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
5142 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
5143{
5144 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
5145}
5146
5147/**
5148 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
5149 */
5150DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
5151{
5152 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
5153}
5154
5155/**
5156 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
5157 */
5158DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
5159{
5160 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
5161}
5162
5163/**
5164 * @copydoc PDMDEVHLPR3::pfnA20Set
5165 */
5166DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
5167{
5168 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5169}
5170
5171/**
5172 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5173 */
5174DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5175{
5176 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5177}
5178
5179/**
5180 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5181 */
5182DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
5183{
5184 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
5185}
5186
5187/**
5188 * @copydoc PDMDEVHLPR3::pfnPICRegister
5189 */
5190DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5191{
5192 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5193}
5194
5195/**
5196 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5197 */
5198DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
5199{
5200 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
5201}
5202
5203/**
5204 * @copydoc PDMDEVHLPR3::pfnIOAPICRegister
5205 */
5206DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5207{
5208 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5209}
5210
5211/**
5212 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5213 */
5214DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5215{
5216 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5217}
5218
5219/**
5220 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5221 */
5222DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5223{
5224 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5225}
5226
5227/**
5228 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5229 */
5230DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5231{
5232 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5233}
5234
5235/**
5236 * @copydoc PDMDEVHLPR3::pfnDMARegister
5237 */
5238DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5239{
5240 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5241}
5242
5243/**
5244 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5245 */
5246DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5247{
5248 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5249}
5250
5251/**
5252 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5253 */
5254DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5255{
5256 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5257}
5258
5259/**
5260 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5261 */
5262DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5263{
5264 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5265}
5266
5267/**
5268 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5269 */
5270DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5271{
5272 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5273}
5274
5275/**
5276 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5277 */
5278DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5279{
5280 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5281}
5282
5283/**
5284 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5285 */
5286DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5287{
5288 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5289}
5290
5291/**
5292 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5293 */
5294DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5295{
5296 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5297}
5298
5299/**
5300 * @copydoc PDMDEVHLPR3::pfnCallR0
5301 */
5302DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5303{
5304 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5305}
5306
5307/**
5308 * @copydoc PDMDEVHLPR3::pfnVMGetSuspendReason
5309 */
5310DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5311{
5312 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5313}
5314
5315/**
5316 * @copydoc PDMDEVHLPR3::pfnVMGetResumeReason
5317 */
5318DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5319{
5320 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5321}
5322
5323/**
5324 * @copydoc PDMDEVHLPR3::pfnGetUVM
5325 */
5326DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5327{
5328 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5329}
5330
5331#endif /* IN_RING3 */
5332
5333/**
5334 * @copydoc PDMDEVHLPR3::pfnGetVM
5335 */
5336DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5337{
5338 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5339}
5340
5341/**
5342 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5343 */
5344DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5345{
5346 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5347}
5348
5349/**
5350 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5351 */
5352DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5353{
5354 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5355}
5356
5357/**
5358 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5359 */
5360DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5361{
5362 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5363}
5364
5365/**
5366 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5367 */
5368DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5369{
5370 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5371}
5372
5373/**
5374 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5375 */
5376DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5377{
5378 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5379}
5380
5381#ifdef IN_RING3
5382
5383/**
5384 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5385 */
5386DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap)
5387{
5388 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbHeap);
5389}
5390
5391/**
5392 * @copydoc PDMDEVHLPR3::pfnFirmwareRegister
5393 */
5394DECLINLINE(int) PDMDevHlpFirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
5395{
5396 return pDevIns->pHlpR3->pfnFirmwareRegister(pDevIns, pFwReg, ppFwHlp);
5397}
5398
5399/**
5400 * @copydoc PDMDEVHLPR3::pfnVMReset
5401 */
5402DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
5403{
5404 return pDevIns->pHlpR3->pfnVMReset(pDevIns, fFlags);
5405}
5406
5407/**
5408 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5409 */
5410DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5411{
5412 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5413}
5414
5415/**
5416 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5417 */
5418DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5419{
5420 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5421}
5422
5423/**
5424 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5425 */
5426DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5427{
5428 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5429}
5430
5431#endif /* IN_RING3 */
5432
5433/**
5434 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5435 */
5436DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5437{
5438 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5439}
5440
5441#ifdef IN_RING3
5442
5443/**
5444 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5445 */
5446DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5447{
5448 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5449}
5450
5451/**
5452 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5453 */
5454DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5455{
5456 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5457}
5458
5459#endif /* IN_RING3 */
5460#ifdef IN_RING0
5461
5462/**
5463 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5464 */
5465DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5466{
5467 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5468}
5469
5470#endif /* IN_RING0 */
5471
5472
5473
5474
5475/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5476typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5477
5478/**
5479 * Callbacks for VBoxDeviceRegister().
5480 */
5481typedef struct PDMDEVREGCB
5482{
5483 /** Interface version.
5484 * This is set to PDM_DEVREG_CB_VERSION. */
5485 uint32_t u32Version;
5486
5487 /**
5488 * Registers a device with the current VM instance.
5489 *
5490 * @returns VBox status code.
5491 * @param pCallbacks Pointer to the callback table.
5492 * @param pReg Pointer to the device registration record.
5493 * This data must be permanent and readonly.
5494 */
5495 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5496} PDMDEVREGCB;
5497
5498/** Current version of the PDMDEVREGCB structure. */
5499#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5500
5501
5502/**
5503 * The VBoxDevicesRegister callback function.
5504 *
5505 * PDM will invoke this function after loading a device module and letting
5506 * the module decide which devices to register and how to handle conflicts.
5507 *
5508 * @returns VBox status code.
5509 * @param pCallbacks Pointer to the callback table.
5510 * @param u32Version VBox version number.
5511 */
5512typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5513
5514/** @} */
5515
5516RT_C_DECLS_END
5517
5518#endif
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