VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 60716

Last change on this file since 60716 was 60716, checked in by vboxsync, 9 years ago

VMM: Fixed TPR thresholding and related PDM interfaces.
Cleaned up the PDM interface and merged apicHasPendingIrq with apicGetTpr.
Fixed raw-mode with the new APIC code due to busted GC mapping relocation.

This finally fixes the NT4 VM boot-up issue with the new APIC code.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 208.4 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <VBox/sup.h>
43#include <iprt/stdarg.h>
44
45
46RT_C_DECLS_BEGIN
47
48/** @defgroup grp_pdm_device The PDM Devices API
49 * @ingroup grp_pdm
50 * @{
51 */
52
53/**
54 * Construct a device instance for a VM.
55 *
56 * @returns VBox status.
57 * @param pDevIns The device instance data. If the registration structure
58 * is needed, it can be accessed thru pDevIns->pReg.
59 * @param iInstance Instance number. Use this to figure out which registers
60 * and such to use. The instance number is also found in
61 * pDevIns->iInstance, but since it's likely to be
62 * frequently used PDM passes it as parameter.
63 * @param pCfg Configuration node handle for the driver. This is
64 * expected to be in high demand in the constructor and is
65 * therefore passed as an argument. When using it at other
66 * times, it can be found in pDevIns->pCfg.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 *
81 * @remarks The device critical section is not entered. The routine may delete
82 * the critical section, so the caller cannot exit it.
83 */
84typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
85/** Pointer to a FNPDMDEVDESTRUCT() function. */
86typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
87
88/**
89 * Device relocation callback.
90 *
91 * This is called when the instance data has been relocated in raw-mode context
92 * (RC). It is also called when the RC hypervisor selects changes. The device
93 * must fixup all necessary pointers and re-query all interfaces to other RC
94 * devices and drivers.
95 *
96 * Before the RC code is executed the first time, this function will be called
97 * with a 0 delta so RC pointer calculations can be one in one place.
98 *
99 * @param pDevIns Pointer to the device instance.
100 * @param offDelta The relocation delta relative to the old location.
101 *
102 * @remarks A relocation CANNOT fail.
103 *
104 * @remarks The device critical section is not entered. The relocations should
105 * not normally require any locking.
106 */
107typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
108/** Pointer to a FNPDMDEVRELOCATE() function. */
109typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
110
111/**
112 * Power On notification.
113 *
114 * @returns VBox status.
115 * @param pDevIns The device instance data.
116 *
117 * @remarks Caller enters the device critical section.
118 */
119typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
120/** Pointer to a FNPDMDEVPOWERON() function. */
121typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
122
123/**
124 * Reset notification.
125 *
126 * @returns VBox status.
127 * @param pDevIns The device instance data.
128 *
129 * @remarks Caller enters the device critical section.
130 */
131typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
132/** Pointer to a FNPDMDEVRESET() function. */
133typedef FNPDMDEVRESET *PFNPDMDEVRESET;
134
135/**
136 * Soft reset notification.
137 *
138 * This is mainly for emulating the 286 style protected mode exits, in which
139 * most devices should remain in their current state.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 * @param fFlags PDMVMRESET_F_XXX (only bits relevant to soft resets).
144 *
145 * @remarks Caller enters the device critical section.
146 */
147typedef DECLCALLBACK(void) FNPDMDEVSOFTRESET(PPDMDEVINS pDevIns, uint32_t fFlags);
148/** Pointer to a FNPDMDEVSOFTRESET() function. */
149typedef FNPDMDEVSOFTRESET *PFNPDMDEVSOFTRESET;
150
151/** @name PDMVMRESET_F_XXX - VM reset flags.
152 * These flags are used both for FNPDMDEVSOFTRESET and for hardware signalling
153 * reset via PDMDevHlpVMReset.
154 * @{ */
155/** Unknown reason. */
156#define PDMVMRESET_F_UNKNOWN UINT32_C(0x00000000)
157/** GIM triggered reset. */
158#define PDMVMRESET_F_GIM UINT32_C(0x00000001)
159/** The last source always causing hard resets. */
160#define PDMVMRESET_F_LAST_ALWAYS_HARD PDMVMRESET_F_GIM
161/** ACPI triggered reset. */
162#define PDMVMRESET_F_ACPI UINT32_C(0x0000000c)
163/** PS/2 system port A (92h) reset. */
164#define PDMVMRESET_F_PORT_A UINT32_C(0x0000000d)
165/** Keyboard reset. */
166#define PDMVMRESET_F_KBD UINT32_C(0x0000000e)
167/** Tripple fault. */
168#define PDMVMRESET_F_TRIPLE_FAULT UINT32_C(0x0000000f)
169/** Reset source mask. */
170#define PDMVMRESET_F_SRC_MASK UINT32_C(0x0000000f)
171/** @} */
172
173/**
174 * Suspend notification.
175 *
176 * @returns VBox status.
177 * @param pDevIns The device instance data.
178 * @thread EMT(0)
179 *
180 * @remarks Caller enters the device critical section.
181 */
182typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
183/** Pointer to a FNPDMDEVSUSPEND() function. */
184typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
185
186/**
187 * Resume notification.
188 *
189 * @returns VBox status.
190 * @param pDevIns The device instance data.
191 *
192 * @remarks Caller enters the device critical section.
193 */
194typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
195/** Pointer to a FNPDMDEVRESUME() function. */
196typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
197
198/**
199 * Power Off notification.
200 *
201 * This is always called when VMR3PowerOff is called.
202 * There will be no callback when hot plugging devices.
203 *
204 * @param pDevIns The device instance data.
205 * @thread EMT(0)
206 *
207 * @remarks Caller enters the device critical section.
208 */
209typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
210/** Pointer to a FNPDMDEVPOWEROFF() function. */
211typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
212
213/**
214 * Attach command.
215 *
216 * This is called to let the device attach to a driver for a specified LUN
217 * at runtime. This is not called during VM construction, the device
218 * constructor has to attach to all the available drivers.
219 *
220 * This is like plugging in the keyboard or mouse after turning on the PC.
221 *
222 * @returns VBox status code.
223 * @param pDevIns The device instance.
224 * @param iLUN The logical unit which is being attached.
225 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
226 *
227 * @remarks Caller enters the device critical section.
228 */
229typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
230/** Pointer to a FNPDMDEVATTACH() function. */
231typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
232
233/**
234 * Detach notification.
235 *
236 * This is called when a driver is detaching itself from a LUN of the device.
237 * The device should adjust its state to reflect this.
238 *
239 * This is like unplugging the network cable to use it for the laptop or
240 * something while the PC is still running.
241 *
242 * @param pDevIns The device instance.
243 * @param iLUN The logical unit which is being detached.
244 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
245 *
246 * @remarks Caller enters the device critical section.
247 */
248typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
249/** Pointer to a FNPDMDEVDETACH() function. */
250typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
251
252/**
253 * Query the base interface of a logical unit.
254 *
255 * @returns VBOX status code.
256 * @param pDevIns The device instance.
257 * @param iLUN The logicial unit to query.
258 * @param ppBase Where to store the pointer to the base interface of the LUN.
259 *
260 * @remarks The device critical section is not entered.
261 */
262typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
263/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
264typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
265
266/**
267 * Init complete notification (after ring-0 & RC init since 5.1).
268 *
269 * This can be done to do communication with other devices and other
270 * initialization which requires everything to be in place.
271 *
272 * @returns VBOX status code.
273 * @param pDevIns The device instance.
274 *
275 * @remarks Caller enters the device critical section.
276 */
277typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
278/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
279typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
280
281
282/**
283 * The context of a pfnMemSetup call.
284 */
285typedef enum PDMDEVMEMSETUPCTX
286{
287 /** Invalid zero value. */
288 PDMDEVMEMSETUPCTX_INVALID = 0,
289 /** After construction. */
290 PDMDEVMEMSETUPCTX_AFTER_CONSTRUCTION,
291 /** After reset. */
292 PDMDEVMEMSETUPCTX_AFTER_RESET,
293 /** Type size hack. */
294 PDMDEVMEMSETUPCTX_32BIT_HACK = 0x7fffffff
295} PDMDEVMEMSETUPCTX;
296
297
298/**
299 * PDM Device Registration Structure.
300 *
301 * This structure is used when registering a device from VBoxInitDevices() in HC
302 * Ring-3. PDM will continue use till the VM is terminated.
303 */
304typedef struct PDMDEVREG
305{
306 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
307 uint32_t u32Version;
308 /** Device name. */
309 char szName[32];
310 /** Name of the raw-mode context module (no path).
311 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
312 char szRCMod[32];
313 /** Name of the ring-0 module (no path).
314 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
315 char szR0Mod[32];
316 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
317 * remain unchanged from registration till VM destruction. */
318 const char *pszDescription;
319
320 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
321 uint32_t fFlags;
322 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
323 uint32_t fClass;
324 /** Maximum number of instances (per VM). */
325 uint32_t cMaxInstances;
326 /** Size of the instance data. */
327 uint32_t cbInstance;
328
329 /** Construct instance - required. */
330 PFNPDMDEVCONSTRUCT pfnConstruct;
331 /** Destruct instance - optional.
332 * Critical section NOT entered (will be destroyed). */
333 PFNPDMDEVDESTRUCT pfnDestruct;
334 /** Relocation command - optional.
335 * Critical section NOT entered. */
336 PFNPDMDEVRELOCATE pfnRelocate;
337
338 /**
339 * Memory setup callback.
340 *
341 * @param pDevIns The device instance data.
342 * @param enmCtx Indicates the context of the call.
343 * @remarks The critical section is entered prior to calling this method.
344 */
345 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx));
346
347 /** Power on notification - optional.
348 * Critical section is entered. */
349 PFNPDMDEVPOWERON pfnPowerOn;
350 /** Reset notification - optional.
351 * Critical section is entered. */
352 PFNPDMDEVRESET pfnReset;
353 /** Suspend notification - optional.
354 * Critical section is entered. */
355 PFNPDMDEVSUSPEND pfnSuspend;
356 /** Resume notification - optional.
357 * Critical section is entered. */
358 PFNPDMDEVRESUME pfnResume;
359 /** Attach command - optional.
360 * Critical section is entered. */
361 PFNPDMDEVATTACH pfnAttach;
362 /** Detach notification - optional.
363 * Critical section is entered. */
364 PFNPDMDEVDETACH pfnDetach;
365 /** Query a LUN base interface - optional.
366 * Critical section is NOT entered. */
367 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
368 /** Init complete notification - optional.
369 * Critical section is entered. */
370 PFNPDMDEVINITCOMPLETE pfnInitComplete;
371 /** Power off notification - optional.
372 * Critical section is entered. */
373 PFNPDMDEVPOWEROFF pfnPowerOff;
374 /** Software system reset notification - optional.
375 * Critical section is entered. */
376 PFNPDMDEVSOFTRESET pfnSoftReset;
377 /** Initialization safty marker. */
378 uint32_t u32VersionEnd;
379} PDMDEVREG;
380/** Pointer to a PDM Device Structure. */
381typedef PDMDEVREG *PPDMDEVREG;
382/** Const pointer to a PDM Device Structure. */
383typedef PDMDEVREG const *PCPDMDEVREG;
384
385/** Current DEVREG version number. */
386#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 1)
387
388/** PDM Device Flags.
389 * @{ */
390/** This flag is used to indicate that the device has a RC component. */
391#define PDM_DEVREG_FLAGS_RC 0x00000001
392/** This flag is used to indicate that the device has a R0 component. */
393#define PDM_DEVREG_FLAGS_R0 0x00000002
394
395/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
396 * The bit count for the current host. */
397#if HC_ARCH_BITS == 32
398# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
399#elif HC_ARCH_BITS == 64
400# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
401#else
402# error Unsupported HC_ARCH_BITS value.
403#endif
404/** The host bit count mask. */
405#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
406
407/** The device support only 32-bit guests. */
408#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
409/** The device support only 64-bit guests. */
410#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
411/** The device support both 32-bit & 64-bit guests. */
412#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
413/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
414 * The guest bit count for the current compilation. */
415#if GC_ARCH_BITS == 32
416# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
417#elif GC_ARCH_BITS == 64
418# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
419#else
420# error Unsupported GC_ARCH_BITS value.
421#endif
422/** The guest bit count mask. */
423#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
424
425/** A convenience. */
426#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
427
428/** Indicates that the devices support PAE36 on a 32-bit guest. */
429#define PDM_DEVREG_FLAGS_PAE36 0x00001000
430
431/** Indicates that the device needs to be notified before the drivers when suspending. */
432#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
433
434/** Indicates that the device needs to be notified before the drivers when powering off. */
435#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
436
437/** Indicates that the device needs to be notified before the drivers when resetting. */
438#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
439/** @} */
440
441
442/** PDM Device Classes.
443 * The order is important, lower bit earlier instantiation.
444 * @{ */
445/** Architecture device. */
446#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
447/** Architecture BIOS device. */
448#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
449/** PCI bus brigde. */
450#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
451/** ISA bus brigde. */
452#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
453/** Input device (mouse, keyboard, joystick, HID, ...). */
454#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
455/** Interrupt controller (PIC). */
456#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
457/** Interval controoler (PIT). */
458#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
459/** RTC/CMOS. */
460#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
461/** DMA controller. */
462#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
463/** VMM Device. */
464#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
465/** Graphics device, like VGA. */
466#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
467/** Storage controller device. */
468#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
469/** Network interface controller. */
470#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
471/** Audio. */
472#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
473/** USB HIC. */
474#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
475/** ACPI. */
476#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
477/** Serial controller device. */
478#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
479/** Parallel controller device */
480#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
481/** Host PCI pass-through device */
482#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
483/** Misc devices (always last). */
484#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
485/** @} */
486
487
488/** @name IRQ Level for use with the *SetIrq APIs.
489 * @{
490 */
491/** Assert the IRQ (can assume value 1). */
492#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
493/** Deassert the IRQ (can assume value 0). */
494#define PDM_IRQ_LEVEL_LOW 0
495/** flip-flop - deassert and then assert the IRQ again immediately. */
496#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
497/** @} */
498
499/**
500 * Registration record for MSI.
501 */
502typedef struct PDMMSIREG
503{
504 /** Number of MSI interrupt vectors, 0 if MSI not supported */
505 uint16_t cMsiVectors;
506 /** Offset of MSI capability */
507 uint8_t iMsiCapOffset;
508 /** Offset of next capability to MSI */
509 uint8_t iMsiNextOffset;
510 /** If we support 64-bit MSI addressing */
511 bool fMsi64bit;
512
513 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
514 uint16_t cMsixVectors;
515 /** Offset of MSI-X capability */
516 uint8_t iMsixCapOffset;
517 /** Offset of next capability to MSI-X */
518 uint8_t iMsixNextOffset;
519 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
520 uint8_t iMsixBar;
521} PDMMSIREG;
522typedef PDMMSIREG *PPDMMSIREG;
523
524/**
525 * PCI Bus registration structure.
526 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
527 */
528typedef struct PDMPCIBUSREG
529{
530 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
531 uint32_t u32Version;
532
533 /**
534 * Registers the device with the default PCI bus.
535 *
536 * @returns VBox status code.
537 * @param pDevIns Device instance of the PCI Bus.
538 * @param pPciDev The PCI device structure.
539 * Any PCI enabled device must keep this in it's instance data!
540 * Fill in the PCI data config before registration, please.
541 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
542 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
543 * If negative, the pci bus device will assign one.
544 * @remarks Caller enters the PDM critical section.
545 */
546 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
547
548 /**
549 * Initialize MSI support in a PCI device.
550 *
551 * @returns VBox status code.
552 * @param pDevIns Device instance of the PCI Bus.
553 * @param pPciDev The PCI device structure.
554 * @param pMsiReg MSI registration structure
555 * @remarks Caller enters the PDM critical section.
556 */
557 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
558
559 /**
560 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
561 *
562 * @returns VBox status code.
563 * @param pDevIns Device instance of the PCI Bus.
564 * @param pPciDev The PCI device structure.
565 * @param iRegion The region number.
566 * @param cbRegion Size of the region.
567 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
568 * @param pfnCallback Callback for doing the mapping.
569 * @remarks Caller enters the PDM critical section.
570 */
571 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
572
573 /**
574 * Register PCI configuration space read/write callbacks.
575 *
576 * @param pDevIns Device instance of the PCI Bus.
577 * @param pPciDev The PCI device structure.
578 * @param pfnRead Pointer to the user defined PCI config read function.
579 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
580 * PCI config read function. This way, user can decide when (and if)
581 * to call default PCI config read function. Can be NULL.
582 * @param pfnWrite Pointer to the user defined PCI config write function.
583 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
584 * PCI config write function. This way, user can decide when (and if)
585 * to call default PCI config write function. Can be NULL.
586 * @remarks Caller enters the PDM critical section.
587 * @thread EMT
588 */
589 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
590 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
591
592 /**
593 * Set the IRQ for a PCI device.
594 *
595 * @param pDevIns Device instance of the PCI Bus.
596 * @param pPciDev The PCI device structure.
597 * @param iIrq IRQ number to set.
598 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
599 * @param uTagSrc The IRQ tag and source (for tracing).
600 * @remarks Caller enters the PDM critical section.
601 */
602 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
603
604 /**
605 * Called to perform the job of the bios.
606 * This is only called for the first PCI Bus - it is expected to
607 * service all the PCI buses.
608 *
609 * @returns VBox status.
610 * @param pDevIns Device instance of the first bus.
611 * @remarks Caller enters the PDM critical section.
612 */
613 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
614
615 /** The name of the SetIrq RC entry point. */
616 const char *pszSetIrqRC;
617
618 /** The name of the SetIrq R0 entry point. */
619 const char *pszSetIrqR0;
620
621} PDMPCIBUSREG;
622/** Pointer to a PCI bus registration structure. */
623typedef PDMPCIBUSREG *PPDMPCIBUSREG;
624
625/** Current PDMPCIBUSREG version number. */
626#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
627
628/**
629 * PCI Bus RC helpers.
630 */
631typedef struct PDMPCIHLPRC
632{
633 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
634 uint32_t u32Version;
635
636 /**
637 * Set an ISA IRQ.
638 *
639 * @param pDevIns PCI device instance.
640 * @param iIrq IRQ number to set.
641 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
642 * @param uTagSrc The IRQ tag and source (for tracing).
643 * @thread EMT only.
644 */
645 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
646
647 /**
648 * Set an I/O-APIC IRQ.
649 *
650 * @param pDevIns PCI device instance.
651 * @param iIrq IRQ number to set.
652 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
653 * @param uTagSrc The IRQ tag and source (for tracing).
654 * @thread EMT only.
655 */
656 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
657
658 /**
659 * Send an MSI.
660 *
661 * @param pDevIns PCI device instance.
662 * @param GCPhys Physical address MSI request was written.
663 * @param uValue Value written.
664 * @param uTagSrc The IRQ tag and source (for tracing).
665 * @thread EMT only.
666 */
667 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
668
669
670 /**
671 * Acquires the PDM lock.
672 *
673 * @returns VINF_SUCCESS on success.
674 * @returns rc if we failed to acquire the lock.
675 * @param pDevIns The PCI device instance.
676 * @param rc What to return if we fail to acquire the lock.
677 */
678 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
679
680 /**
681 * Releases the PDM lock.
682 *
683 * @param pDevIns The PCI device instance.
684 */
685 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
686
687 /** Just a safety precaution. */
688 uint32_t u32TheEnd;
689} PDMPCIHLPRC;
690/** Pointer to PCI helpers. */
691typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
692/** Pointer to const PCI helpers. */
693typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
694
695/** Current PDMPCIHLPRC version number. */
696#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
697
698
699/**
700 * PCI Bus R0 helpers.
701 */
702typedef struct PDMPCIHLPR0
703{
704 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
705 uint32_t u32Version;
706
707 /**
708 * Set an ISA IRQ.
709 *
710 * @param pDevIns PCI device instance.
711 * @param iIrq IRQ number to set.
712 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
713 * @param uTagSrc The IRQ tag and source (for tracing).
714 * @thread EMT only.
715 */
716 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
717
718 /**
719 * Set an I/O-APIC IRQ.
720 *
721 * @param pDevIns PCI device instance.
722 * @param iIrq IRQ number to set.
723 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
724 * @param uTagSrc The IRQ tag and source (for tracing).
725 * @thread EMT only.
726 */
727 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
728
729 /**
730 * Send an MSI.
731 *
732 * @param pDevIns PCI device instance.
733 * @param GCPhys Physical address MSI request was written.
734 * @param uValue Value written.
735 * @param uTagSrc The IRQ tag and source (for tracing).
736 * @thread EMT only.
737 */
738 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
739
740
741 /**
742 * Acquires the PDM lock.
743 *
744 * @returns VINF_SUCCESS on success.
745 * @returns rc if we failed to acquire the lock.
746 * @param pDevIns The PCI device instance.
747 * @param rc What to return if we fail to acquire the lock.
748 */
749 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
750
751 /**
752 * Releases the PDM lock.
753 *
754 * @param pDevIns The PCI device instance.
755 */
756 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
757
758 /** Just a safety precaution. */
759 uint32_t u32TheEnd;
760} PDMPCIHLPR0;
761/** Pointer to PCI helpers. */
762typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
763/** Pointer to const PCI helpers. */
764typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
765
766/** Current PDMPCIHLPR0 version number. */
767#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
768
769/**
770 * PCI device helpers.
771 */
772typedef struct PDMPCIHLPR3
773{
774 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
775 uint32_t u32Version;
776
777 /**
778 * Set an ISA IRQ.
779 *
780 * @param pDevIns The PCI device instance.
781 * @param iIrq IRQ number to set.
782 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
783 * @param uTagSrc The IRQ tag and source (for tracing).
784 */
785 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
786
787 /**
788 * Set an I/O-APIC IRQ.
789 *
790 * @param pDevIns The PCI device instance.
791 * @param iIrq IRQ number to set.
792 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
793 * @param uTagSrc The IRQ tag and source (for tracing).
794 */
795 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
796
797 /**
798 * Send an MSI.
799 *
800 * @param pDevIns PCI device instance.
801 * @param GCPhys Physical address MSI request was written.
802 * @param uValue Value written.
803 * @param uTagSrc The IRQ tag and source (for tracing).
804 */
805 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
806
807 /**
808 * Checks if the given address is an MMIO2 base address or not.
809 *
810 * @returns true/false accordingly.
811 * @param pDevIns The PCI device instance.
812 * @param pOwner The owner of the memory, optional.
813 * @param GCPhys The address to check.
814 */
815 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
816
817 /**
818 * Gets the address of the RC PCI Bus helpers.
819 *
820 * This should be called at both construction and relocation time
821 * to obtain the correct address of the RC helpers.
822 *
823 * @returns RC pointer to the PCI Bus helpers.
824 * @param pDevIns Device instance of the PCI Bus.
825 * @thread EMT only.
826 */
827 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
828
829 /**
830 * Gets the address of the R0 PCI Bus helpers.
831 *
832 * This should be called at both construction and relocation time
833 * to obtain the correct address of the R0 helpers.
834 *
835 * @returns R0 pointer to the PCI Bus helpers.
836 * @param pDevIns Device instance of the PCI Bus.
837 * @thread EMT only.
838 */
839 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
840
841 /**
842 * Acquires the PDM lock.
843 *
844 * @returns VINF_SUCCESS on success.
845 * @returns Fatal error on failure.
846 * @param pDevIns The PCI device instance.
847 * @param rc Dummy for making the interface identical to the RC and R0 versions.
848 */
849 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
850
851 /**
852 * Releases the PDM lock.
853 *
854 * @param pDevIns The PCI device instance.
855 */
856 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
857
858 /** Just a safety precaution. */
859 uint32_t u32TheEnd;
860} PDMPCIHLPR3;
861/** Pointer to PCI helpers. */
862typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
863/** Pointer to const PCI helpers. */
864typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
865
866/** Current PDMPCIHLPR3 version number. */
867#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
868
869
870/**
871 * Programmable Interrupt Controller registration structure.
872 */
873typedef struct PDMPICREG
874{
875 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
876 uint32_t u32Version;
877
878 /**
879 * Set the an IRQ.
880 *
881 * @param pDevIns Device instance of the PIC.
882 * @param iIrq IRQ number to set.
883 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
884 * @param uTagSrc The IRQ tag and source (for tracing).
885 * @remarks Caller enters the PDM critical section.
886 */
887 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
888
889 /**
890 * Get a pending interrupt.
891 *
892 * @returns Pending interrupt number.
893 * @param pDevIns Device instance of the PIC.
894 * @param puTagSrc Where to return the IRQ tag and source.
895 * @remarks Caller enters the PDM critical section.
896 */
897 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
898
899 /** The name of the RC SetIrq entry point. */
900 const char *pszSetIrqRC;
901 /** The name of the RC GetInterrupt entry point. */
902 const char *pszGetInterruptRC;
903
904 /** The name of the R0 SetIrq entry point. */
905 const char *pszSetIrqR0;
906 /** The name of the R0 GetInterrupt entry point. */
907 const char *pszGetInterruptR0;
908} PDMPICREG;
909/** Pointer to a PIC registration structure. */
910typedef PDMPICREG *PPDMPICREG;
911
912/** Current PDMPICREG version number. */
913#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
914
915/**
916 * PIC RC helpers.
917 */
918typedef struct PDMPICHLPRC
919{
920 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
921 uint32_t u32Version;
922
923 /**
924 * Set the interrupt force action flag.
925 *
926 * @param pDevIns Device instance of the PIC.
927 */
928 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
929
930 /**
931 * Clear the interrupt force action flag.
932 *
933 * @param pDevIns Device instance of the PIC.
934 */
935 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
936
937 /**
938 * Acquires the PDM lock.
939 *
940 * @returns VINF_SUCCESS on success.
941 * @returns rc if we failed to acquire the lock.
942 * @param pDevIns The PIC device instance.
943 * @param rc What to return if we fail to acquire the lock.
944 */
945 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
946
947 /**
948 * Releases the PDM lock.
949 *
950 * @param pDevIns The PIC device instance.
951 */
952 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
953
954 /** Just a safety precaution. */
955 uint32_t u32TheEnd;
956} PDMPICHLPRC;
957
958/** Pointer to PIC RC helpers. */
959typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
960/** Pointer to const PIC RC helpers. */
961typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
962
963/** Current PDMPICHLPRC version number. */
964#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
965
966
967/**
968 * PIC R0 helpers.
969 */
970typedef struct PDMPICHLPR0
971{
972 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
973 uint32_t u32Version;
974
975 /**
976 * Set the interrupt force action flag.
977 *
978 * @param pDevIns Device instance of the PIC.
979 */
980 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
981
982 /**
983 * Clear the interrupt force action flag.
984 *
985 * @param pDevIns Device instance of the PIC.
986 */
987 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
988
989 /**
990 * Acquires the PDM lock.
991 *
992 * @returns VINF_SUCCESS on success.
993 * @returns rc if we failed to acquire the lock.
994 * @param pDevIns The PIC device instance.
995 * @param rc What to return if we fail to acquire the lock.
996 */
997 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
998
999 /**
1000 * Releases the PDM lock.
1001 *
1002 * @param pDevIns The PCI device instance.
1003 */
1004 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1005
1006 /** Just a safety precaution. */
1007 uint32_t u32TheEnd;
1008} PDMPICHLPR0;
1009
1010/** Pointer to PIC R0 helpers. */
1011typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
1012/** Pointer to const PIC R0 helpers. */
1013typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
1014
1015/** Current PDMPICHLPR0 version number. */
1016#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
1017
1018/**
1019 * PIC R3 helpers.
1020 */
1021typedef struct PDMPICHLPR3
1022{
1023 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
1024 uint32_t u32Version;
1025
1026 /**
1027 * Set the interrupt force action flag.
1028 *
1029 * @param pDevIns Device instance of the PIC.
1030 */
1031 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1032
1033 /**
1034 * Clear the interrupt force action flag.
1035 *
1036 * @param pDevIns Device instance of the PIC.
1037 */
1038 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1039
1040 /**
1041 * Acquires the PDM lock.
1042 *
1043 * @returns VINF_SUCCESS on success.
1044 * @returns Fatal error on failure.
1045 * @param pDevIns The PIC device instance.
1046 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1047 */
1048 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1049
1050 /**
1051 * Releases the PDM lock.
1052 *
1053 * @param pDevIns The PIC device instance.
1054 */
1055 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1056
1057 /**
1058 * Gets the address of the RC PIC helpers.
1059 *
1060 * This should be called at both construction and relocation time
1061 * to obtain the correct address of the RC helpers.
1062 *
1063 * @returns RC pointer to the PIC helpers.
1064 * @param pDevIns Device instance of the PIC.
1065 */
1066 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1067
1068 /**
1069 * Gets the address of the R0 PIC helpers.
1070 *
1071 * This should be called at both construction and relocation time
1072 * to obtain the correct address of the R0 helpers.
1073 *
1074 * @returns R0 pointer to the PIC helpers.
1075 * @param pDevIns Device instance of the PIC.
1076 */
1077 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1078
1079 /** Just a safety precaution. */
1080 uint32_t u32TheEnd;
1081} PDMPICHLPR3;
1082
1083/** Pointer to PIC R3 helpers. */
1084typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1085/** Pointer to const PIC R3 helpers. */
1086typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1087
1088/** Current PDMPICHLPR3 version number. */
1089#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1090
1091
1092
1093/**
1094 * Firmware registration structure.
1095 */
1096typedef struct PDMFWREG
1097{
1098 /** Struct version+magic number (PDM_FWREG_VERSION). */
1099 uint32_t u32Version;
1100
1101 /**
1102 * Checks whether this is a hard or soft reset.
1103 *
1104 * The current definition of soft reset is what the PC BIOS does when CMOS[0xF]
1105 * is 5, 9 or 0xA.
1106 *
1107 * @returns true if hard reset, false if soft.
1108 * @param pDevIns Device instance of the firmware.
1109 * @param fFlags PDMRESET_F_XXX passed to the PDMDevHlpVMReset API.
1110 */
1111 DECLR3CALLBACKMEMBER(bool, pfnIsHardReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
1112
1113 /** Just a safety precaution. */
1114 uint32_t u32TheEnd;
1115} PDMFWREG;
1116/** Pointer to a FW registration structure. */
1117typedef PDMFWREG *PPDMFWREG;
1118/** Pointer to a const FW registration structure. */
1119typedef PDMFWREG const *PCPDMFWREG;
1120
1121/** Current PDMFWREG version number. */
1122#define PDM_FWREG_VERSION PDM_VERSION_MAKE(0xffdd, 1, 0)
1123
1124/**
1125 * Firmware R3 helpers.
1126 */
1127typedef struct PDMFWHLPR3
1128{
1129 /** Structure version. PDM_FWHLP_VERSION defines the current version. */
1130 uint32_t u32Version;
1131
1132 /** Just a safety precaution. */
1133 uint32_t u32TheEnd;
1134} PDMFWHLPR3;
1135
1136/** Pointer to FW R3 helpers. */
1137typedef R3PTRTYPE(PDMFWHLPR3 *) PPDMFWHLPR3;
1138/** Pointer to const FW R3 helpers. */
1139typedef R3PTRTYPE(const PDMFWHLPR3 *) PCPDMFWHLPR3;
1140
1141/** Current PDMFWHLPR3 version number. */
1142#define PDM_FWHLPR3_VERSION PDM_VERSION_MAKE(0xffdb, 1, 0)
1143
1144
1145/**
1146 * Advanced Programmable Interrupt Controller registration structure.
1147 */
1148typedef struct PDMAPICREG
1149{
1150 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1151 uint32_t u32Version;
1152
1153 /**
1154 * Get a pending interrupt.
1155 *
1156 * @returns VBox status code.
1157 * @param pDevIns Device instance of the APIC.
1158 * @param pVCpu The cross context virtual CPU structure.
1159 * @param pu8Vector Where to store the vector.
1160 * @param pu32TagSrc Where to return the tag source (tracing
1161 * purposes).
1162 * @remarks Caller enters the PDM critical section.
1163 */
1164 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
1165
1166 /**
1167 * Set the APIC base.
1168 *
1169 * @param pDevIns Device instance of the APIC.
1170 * @param pVCpu The cross context virtual CPU structure.
1171 * @param u64BaseMsr The base MSR value.
1172 * @remarks Caller enters the PDM critical section (might not be the case with
1173 * the new APIC code)
1174 */
1175 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64BaseMsr));
1176
1177 /**
1178 * Get the APIC base.
1179 *
1180 * @returns Current base.
1181 * @param pDevIns Device instance of the APIC.
1182 * @param pVCpu The cross context virtual CPU structure.
1183 * @remarks Caller enters the PDM critical section.
1184 */
1185 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
1186
1187 /**
1188 * Set the TPR (task priority register).
1189 *
1190 * @param pDevIns Device instance of the APIC.
1191 * @param pVCpu The cross context virtual CPU structure.
1192 * @param u8Tpr The new TPR.
1193 * @remarks Caller enters the PDM critical section.
1194 */
1195 DECLR3CALLBACKMEMBER(void, pfnSetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
1196
1197 /**
1198 * Get the TPR (task priority register).
1199 *
1200 * @returns The current TPR.
1201 * @param pDevIns Device instance of the APIC.
1202 * @param pVCpu The cross context virtual CPU structure.
1203 * @param pfPending Where to store if there is an interrupt pending
1204 * (optional, can be NULL).
1205 * @param pu8PendingIntr Where to store the pending interrupt vector
1206 * (optional, can be NULL).
1207 * @remarks Caller enters the PDM critical section.
1208 */
1209 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool *pfPending, uint8_t *pu8PendingIntr));
1210
1211 /**
1212 * Write to a MSR in APIC range.
1213 *
1214 * @returns Strict VBox status code.
1215 * @param pDevIns Device instance of the APIC.
1216 * @param pVCpu The cross context virtual CPU structure.
1217 * @param u32Reg The MSR begin written to.
1218 * @param u64Value The value to write.
1219 *
1220 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1221 * calling this method.
1222 */
1223 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
1224
1225 /**
1226 * Read from a MSR in APIC range.
1227 *
1228 * @returns Strict VBox status code.
1229 * @param pDevIns Device instance of the APIC.
1230 * @param pVCpu The cross context virtual CPU structure.
1231 * @param u32Reg MSR to read.
1232 * @param pu64Value Where to return the read value.
1233 *
1234 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1235 * calling this method.
1236 */
1237 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
1238
1239 /**
1240 * Private interface between the IOAPIC and APIC.
1241 *
1242 * This is a low-level, APIC/IOAPIC implementation specific interface which
1243 * is registered with PDM only because it makes life so much simpler right
1244 * now (GC bits). This is a bad bad hack! The correct way of doing this
1245 * would involve some way of querying GC interfaces and relocating them.
1246 * Perhaps doing some kind of device init in GC...
1247 *
1248 * @returns VBox status code.
1249 * @param pDevIns Device instance of the APIC.
1250 * @param uDest The destination mask.
1251 * @param uDestMode The destination mode, see XAPICDESTMODE.
1252 * @param uDeliveryMode The delivery mode, see XAPICDELIVERYMODE.
1253 * @param uVector The interrupt vector.
1254 * @param uPolarity The input pin polarity.
1255 * @param uTriggerMode The trigger mode, see XAPICTRIGGERMODE.
1256 * @param uTagSrc The IRQ tag and source (for tracing).
1257 * @remarks Caller enters the PDM critical section.
1258 */
1259 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode,
1260 uint8_t uVector, uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
1261
1262 /**
1263 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1264 *
1265 * Used for virtual wire mode when interrupts from the PIC are passed through
1266 * LAPIC.
1267 *
1268 * @returns Strict VBox status code.
1269 * @param pDevIns Device instance of the APIC.
1270 * @param pVCpu The cross context virtual CPU structure.
1271 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1272 * @param u8Level The level.
1273 * @param rcRZ The return code if the operation cannot be
1274 * performed in the current context.
1275 * @remarks Caller enters the PDM critical section
1276 */
1277 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
1278 int rcRZ));
1279
1280 /**
1281 * Get the APIC timer frequency (in Hz).
1282 *
1283 * @returns The frequency of the APIC timer.
1284 * @param pDevIns Device instance of the APIC.
1285 */
1286 DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3,(PPDMDEVINS pDevIns));
1287
1288 /** The name of the RC GetInterrupt entry point. */
1289 const char *pszGetInterruptRC;
1290 /** The name of the RC SetBaseMsr entry point. */
1291 const char *pszSetBaseMsrRC;
1292 /** The name of the RC GetBaseMsr entry point. */
1293 const char *pszGetBaseMsrRC;
1294 /** The name of the RC SetTpr entry point. */
1295 const char *pszSetTprRC;
1296 /** The name of the RC GetTpr entry point. */
1297 const char *pszGetTprRC;
1298 /** The name of the RC WriteMsr entry point. */
1299 const char *pszWriteMsrRC;
1300 /** The name of the RC ReadMsr entry point. */
1301 const char *pszReadMsrRC;
1302 /** The name of the RC BusDeliver entry point. */
1303 const char *pszBusDeliverRC;
1304 /** The name of the RC LocalInterrupt entry point. */
1305 const char *pszLocalInterruptRC;
1306 /** The name of the RC GetTimerFreq entry point. */
1307 const char *pszGetTimerFreqRC;
1308
1309 /** The name of the R0 GetInterrupt entry point. */
1310 const char *pszGetInterruptR0;
1311 /** The name of the R0 SetBaseMsr entry point. */
1312 const char *pszSetBaseMsrR0;
1313 /** The name of the R0 GetBaseMsr entry point. */
1314 const char *pszGetBaseMsrR0;
1315 /** The name of the R0 SetTpr entry point. */
1316 const char *pszSetTprR0;
1317 /** The name of the R0 GetTpr entry point. */
1318 const char *pszGetTprR0;
1319 /** The name of the R0 WriteMsr entry point. */
1320 const char *pszWriteMsrR0;
1321 /** The name of the R0 ReadMsr entry point. */
1322 const char *pszReadMsrR0;
1323 /** The name of the R0 BusDeliver entry point. */
1324 const char *pszBusDeliverR0;
1325 /** The name of the R0 LocalInterrupt entry point. */
1326 const char *pszLocalInterruptR0;
1327 /** The name of the R0 GetTimerFreq entry point. */
1328 const char *pszGetTimerFreqR0;
1329} PDMAPICREG;
1330/** Pointer to an APIC registration structure. */
1331typedef PDMAPICREG *PPDMAPICREG;
1332
1333/** Current PDMAPICREG version number. */
1334#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 4, 0)
1335
1336
1337/**
1338 * APIC mode argument for pfnChangeFeature.
1339 *
1340 * Also used in saved-states, don't change existing values.
1341 */
1342typedef enum PDMAPICMODE
1343{
1344 /** Invalid 0 entry. */
1345 PDMAPICMODE_INVALID = 0,
1346 /** No APIC. */
1347 PDMAPICMODE_NONE,
1348 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1349 PDMAPICMODE_APIC,
1350 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1351 PDMAPICMODE_X2APIC,
1352 /** The usual 32-bit paranoia. */
1353 PDMAPICMODE_32BIT_HACK = 0x7fffffff
1354} PDMAPICMODE;
1355
1356/**
1357 * APIC irq argument for pfnSetInterruptFF and pfnClearInterruptFF.
1358 */
1359typedef enum PDMAPICIRQ
1360{
1361 /** Invalid 0 entry. */
1362 PDMAPICIRQ_INVALID = 0,
1363 /** Normal hardware interrupt. */
1364 PDMAPICIRQ_HARDWARE,
1365 /** NMI. */
1366 PDMAPICIRQ_NMI,
1367 /** SMI. */
1368 PDMAPICIRQ_SMI,
1369 /** ExtINT (HW interrupt via PIC). */
1370 PDMAPICIRQ_EXTINT,
1371 /** The usual 32-bit paranoia. */
1372 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1373} PDMAPICIRQ;
1374
1375
1376/**
1377 * APIC RC helpers.
1378 */
1379typedef struct PDMAPICHLPRC
1380{
1381 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1382 uint32_t u32Version;
1383
1384 /**
1385 * Set the interrupt force action flag.
1386 *
1387 * @param pDevIns Device instance of the APIC.
1388 * @param enmType IRQ type.
1389 * @param idCpu Virtual CPU to set flag upon.
1390 */
1391 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1392
1393 /**
1394 * Clear the interrupt force action flag.
1395 *
1396 * @param pDevIns Device instance of the APIC.
1397 * @param enmType IRQ type.
1398 * @param idCpu Virtual CPU to clear flag upon.
1399 */
1400 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1401
1402 /**
1403 * Calculates an IRQ tag for a timer, IPI or similar event.
1404 *
1405 * @returns The IRQ tag.
1406 * @param pDevIns Device instance of the APIC.
1407 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1408 */
1409 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1410
1411 /**
1412 * Modifies APIC-related bits in the CPUID feature mask.
1413 *
1414 * @param pDevIns Device instance of the APIC.
1415 * @param enmMode Supported APIC mode.
1416 */
1417 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1418
1419 /**
1420 * Acquires the PDM lock.
1421 *
1422 * @returns VINF_SUCCESS on success.
1423 * @returns rc if we failed to acquire the lock.
1424 * @param pDevIns The APIC device instance.
1425 * @param rc What to return if we fail to acquire the lock.
1426 */
1427 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1428
1429 /**
1430 * Releases the PDM lock.
1431 *
1432 * @param pDevIns The APIC device instance.
1433 */
1434 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1435
1436 /**
1437 * Get the virtual CPU id corresponding to the current EMT.
1438 *
1439 * @param pDevIns The APIC device instance.
1440 */
1441 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1442
1443 /** Just a safety precaution. */
1444 uint32_t u32TheEnd;
1445} PDMAPICHLPRC;
1446/** Pointer to APIC GC helpers. */
1447typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1448/** Pointer to const APIC helpers. */
1449typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1450
1451/** Current PDMAPICHLPRC version number. */
1452#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1453
1454
1455/**
1456 * APIC R0 helpers.
1457 */
1458typedef struct PDMAPICHLPR0
1459{
1460 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1461 uint32_t u32Version;
1462
1463 /**
1464 * Set the interrupt force action flag.
1465 *
1466 * @param pDevIns Device instance of the APIC.
1467 * @param enmType IRQ type.
1468 * @param idCpu Virtual CPU to set flag upon.
1469 */
1470 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1471
1472 /**
1473 * Clear the interrupt force action flag.
1474 *
1475 * @param pDevIns Device instance of the APIC.
1476 * @param enmType IRQ type.
1477 * @param idCpu Virtual CPU to clear flag upon.
1478 */
1479 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1480
1481 /**
1482 * Calculates an IRQ tag for a timer, IPI or similar event.
1483 *
1484 * @returns The IRQ tag.
1485 * @param pDevIns Device instance of the APIC.
1486 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1487 */
1488 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1489
1490 /**
1491 * Modifies APIC-related bits in the CPUID feature mask.
1492 *
1493 * @param pDevIns Device instance of the APIC.
1494 * @param enmMode Supported APIC mode.
1495 */
1496 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1497
1498 /**
1499 * Acquires the PDM lock.
1500 *
1501 * @returns VINF_SUCCESS on success.
1502 * @returns rc if we failed to acquire the lock.
1503 * @param pDevIns The APIC device instance.
1504 * @param rc What to return if we fail to acquire the lock.
1505 */
1506 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1507
1508 /**
1509 * Releases the PDM lock.
1510 *
1511 * @param pDevIns The APIC device instance.
1512 */
1513 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1514
1515 /**
1516 * Get the virtual CPU id corresponding to the current EMT.
1517 *
1518 * @param pDevIns The APIC device instance.
1519 */
1520 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1521
1522 /** Just a safety precaution. */
1523 uint32_t u32TheEnd;
1524} PDMAPICHLPR0;
1525/** Pointer to APIC GC helpers. */
1526typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1527/** Pointer to const APIC helpers. */
1528typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1529
1530/** Current PDMAPICHLPR0 version number. */
1531#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1532
1533/**
1534 * APIC R3 helpers.
1535 */
1536typedef struct PDMAPICHLPR3
1537{
1538 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1539 uint32_t u32Version;
1540
1541 /**
1542 * Set the interrupt force action flag.
1543 *
1544 * @param pDevIns Device instance of the APIC.
1545 * @param enmType IRQ type.
1546 * @param idCpu Virtual CPU to set flag upon.
1547 */
1548 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1549
1550 /**
1551 * Clear the interrupt force action flag.
1552 *
1553 * @param pDevIns Device instance of the APIC.
1554 * @param enmType IRQ type.
1555 * @param idCpu Virtual CPU to clear flag upon.
1556 */
1557 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1558
1559 /**
1560 * Calculates an IRQ tag for a timer, IPI or similar event.
1561 *
1562 * @returns The IRQ tag.
1563 * @param pDevIns Device instance of the APIC.
1564 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1565 */
1566 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1567
1568 /**
1569 * Modifies APIC-related bits in the CPUID feature mask.
1570 *
1571 * @param pDevIns Device instance of the APIC.
1572 * @param enmMode Supported APIC mode.
1573 */
1574 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICMODE enmMode));
1575
1576 /**
1577 * Get the virtual CPU id corresponding to the current EMT.
1578 *
1579 * @param pDevIns The APIC device instance.
1580 */
1581 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1582
1583 /**
1584 * Sends Startup IPI to given virtual CPU.
1585 *
1586 * @param pDevIns The APIC device instance.
1587 * @param idCpu Virtual CPU to perform Startup IPI on.
1588 * @param uVector Startup IPI vector.
1589 */
1590 DECLR3CALLBACKMEMBER(void, pfnSendStartupIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1591
1592 /**
1593 * Sends INIT IPI to given virtual CPU, should result in reset and
1594 * halting till Startup IPI.
1595 *
1596 * @param pDevIns The APIC device instance.
1597 * @param idCpu Virtual CPU to perform INIT IPI on.
1598 */
1599 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1600
1601 /**
1602 * Gets the address of the RC APIC helpers.
1603 *
1604 * This should be called at both construction and relocation time
1605 * to obtain the correct address of the RC helpers.
1606 *
1607 * @returns GC pointer to the APIC helpers.
1608 * @param pDevIns Device instance of the APIC.
1609 */
1610 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1611
1612 /**
1613 * Gets the address of the R0 APIC helpers.
1614 *
1615 * This should be called at both construction and relocation time
1616 * to obtain the correct address of the R0 helpers.
1617 *
1618 * @returns R0 pointer to the APIC helpers.
1619 * @param pDevIns Device instance of the APIC.
1620 */
1621 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1622
1623 /**
1624 * Get the critical section used to synchronize the PICs, PCI and stuff.
1625 *
1626 * @returns Ring-3 pointer to the critical section.
1627 * @param pDevIns The APIC device instance.
1628 */
1629 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1630
1631 /**
1632 * Get the critical section used to synchronize the PICs, PCI and stuff.
1633 *
1634 * @returns Raw-mode context pointer to the critical section.
1635 * @param pDevIns The APIC device instance.
1636 */
1637 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1638
1639 /**
1640 * Get the critical section used to synchronize the PICs, PCI and stuff.
1641 *
1642 * @returns Ring-0 pointer to the critical section.
1643 * @param pDevIns The APIC device instance.
1644 */
1645 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1646
1647 /** Just a safety precaution. */
1648 uint32_t u32TheEnd;
1649} PDMAPICHLPR3;
1650/** Pointer to APIC helpers. */
1651typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1652/** Pointer to const APIC helpers. */
1653typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1654
1655/** Current PDMAPICHLP version number. */
1656#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1657
1658
1659/**
1660 * I/O APIC registration structure.
1661 */
1662typedef struct PDMIOAPICREG
1663{
1664 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1665 uint32_t u32Version;
1666
1667 /**
1668 * Set the an IRQ.
1669 *
1670 * @param pDevIns Device instance of the I/O APIC.
1671 * @param iIrq IRQ number to set.
1672 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1673 * @param uTagSrc The IRQ tag and source (for tracing).
1674 * @remarks Caller enters the PDM critical section
1675 */
1676 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1677
1678 /** The name of the RC SetIrq entry point. */
1679 const char *pszSetIrqRC;
1680
1681 /** The name of the R0 SetIrq entry point. */
1682 const char *pszSetIrqR0;
1683
1684 /**
1685 * Send a MSI.
1686 *
1687 * @param pDevIns Device instance of the I/O APIC.
1688 * @param GCPhys Request address.
1689 * @param uValue Request value.
1690 * @param uTagSrc The IRQ tag and source (for tracing).
1691 * @remarks Caller enters the PDM critical section
1692 */
1693 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1694
1695 /** The name of the RC SendMsi entry point. */
1696 const char *pszSendMsiRC;
1697
1698 /** The name of the R0 SendMsi entry point. */
1699 const char *pszSendMsiR0;
1700} PDMIOAPICREG;
1701/** Pointer to an APIC registration structure. */
1702typedef PDMIOAPICREG *PPDMIOAPICREG;
1703
1704/** Current PDMAPICREG version number. */
1705#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1706
1707
1708/**
1709 * IOAPIC RC helpers.
1710 */
1711typedef struct PDMIOAPICHLPRC
1712{
1713 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1714 uint32_t u32Version;
1715
1716 /**
1717 * Private interface between the IOAPIC and APIC.
1718 *
1719 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1720 *
1721 * @returns status code.
1722 * @param pDevIns Device instance of the IOAPIC.
1723 * @param u8Dest See APIC implementation.
1724 * @param u8DestMode See APIC implementation.
1725 * @param u8DeliveryMode See APIC implementation.
1726 * @param iVector See APIC implementation.
1727 * @param u8Polarity See APIC implementation.
1728 * @param u8TriggerMode See APIC implementation.
1729 * @param uTagSrc The IRQ tag and source (for tracing).
1730 */
1731 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1732 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1733
1734 /**
1735 * Acquires the PDM lock.
1736 *
1737 * @returns VINF_SUCCESS on success.
1738 * @returns rc if we failed to acquire the lock.
1739 * @param pDevIns The IOAPIC device instance.
1740 * @param rc What to return if we fail to acquire the lock.
1741 */
1742 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1743
1744 /**
1745 * Releases the PDM lock.
1746 *
1747 * @param pDevIns The IOAPIC device instance.
1748 */
1749 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1750
1751 /** Just a safety precaution. */
1752 uint32_t u32TheEnd;
1753} PDMIOAPICHLPRC;
1754/** Pointer to IOAPIC RC helpers. */
1755typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1756/** Pointer to const IOAPIC helpers. */
1757typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1758
1759/** Current PDMIOAPICHLPRC version number. */
1760#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1761
1762
1763/**
1764 * IOAPIC R0 helpers.
1765 */
1766typedef struct PDMIOAPICHLPR0
1767{
1768 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1769 uint32_t u32Version;
1770
1771 /**
1772 * Private interface between the IOAPIC and APIC.
1773 *
1774 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1775 *
1776 * @returns status code.
1777 * @param pDevIns Device instance of the IOAPIC.
1778 * @param u8Dest See APIC implementation.
1779 * @param u8DestMode See APIC implementation.
1780 * @param u8DeliveryMode See APIC implementation.
1781 * @param iVector See APIC implementation.
1782 * @param u8Polarity See APIC implementation.
1783 * @param u8TriggerMode See APIC implementation.
1784 * @param uTagSrc The IRQ tag and source (for tracing).
1785 */
1786 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1787 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1788
1789 /**
1790 * Acquires the PDM lock.
1791 *
1792 * @returns VINF_SUCCESS on success.
1793 * @returns rc if we failed to acquire the lock.
1794 * @param pDevIns The IOAPIC device instance.
1795 * @param rc What to return if we fail to acquire the lock.
1796 */
1797 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1798
1799 /**
1800 * Releases the PDM lock.
1801 *
1802 * @param pDevIns The IOAPIC device instance.
1803 */
1804 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1805
1806 /** Just a safety precaution. */
1807 uint32_t u32TheEnd;
1808} PDMIOAPICHLPR0;
1809/** Pointer to IOAPIC R0 helpers. */
1810typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1811/** Pointer to const IOAPIC helpers. */
1812typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1813
1814/** Current PDMIOAPICHLPR0 version number. */
1815#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1816
1817/**
1818 * IOAPIC R3 helpers.
1819 */
1820typedef struct PDMIOAPICHLPR3
1821{
1822 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1823 uint32_t u32Version;
1824
1825 /**
1826 * Private interface between the IOAPIC and APIC.
1827 *
1828 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1829 *
1830 * @returns status code
1831 * @param pDevIns Device instance of the IOAPIC.
1832 * @param u8Dest See APIC implementation.
1833 * @param u8DestMode See APIC implementation.
1834 * @param u8DeliveryMode See APIC implementation.
1835 * @param iVector See APIC implementation.
1836 * @param u8Polarity See APIC implementation.
1837 * @param u8TriggerMode See APIC implementation.
1838 * @param uTagSrc The IRQ tag and source (for tracing).
1839 */
1840 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1841 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1842
1843 /**
1844 * Acquires the PDM lock.
1845 *
1846 * @returns VINF_SUCCESS on success.
1847 * @returns Fatal error on failure.
1848 * @param pDevIns The IOAPIC device instance.
1849 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1850 */
1851 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1852
1853 /**
1854 * Releases the PDM lock.
1855 *
1856 * @param pDevIns The IOAPIC device instance.
1857 */
1858 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1859
1860 /**
1861 * Gets the address of the RC IOAPIC helpers.
1862 *
1863 * This should be called at both construction and relocation time
1864 * to obtain the correct address of the RC helpers.
1865 *
1866 * @returns RC pointer to the IOAPIC helpers.
1867 * @param pDevIns Device instance of the IOAPIC.
1868 */
1869 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1870
1871 /**
1872 * Gets the address of the R0 IOAPIC helpers.
1873 *
1874 * This should be called at both construction and relocation time
1875 * to obtain the correct address of the R0 helpers.
1876 *
1877 * @returns R0 pointer to the IOAPIC helpers.
1878 * @param pDevIns Device instance of the IOAPIC.
1879 */
1880 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1881
1882 /** Just a safety precaution. */
1883 uint32_t u32TheEnd;
1884} PDMIOAPICHLPR3;
1885/** Pointer to IOAPIC R3 helpers. */
1886typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1887/** Pointer to const IOAPIC helpers. */
1888typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1889
1890/** Current PDMIOAPICHLPR3 version number. */
1891#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1892
1893
1894/**
1895 * HPET registration structure.
1896 */
1897typedef struct PDMHPETREG
1898{
1899 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1900 uint32_t u32Version;
1901
1902} PDMHPETREG;
1903/** Pointer to an HPET registration structure. */
1904typedef PDMHPETREG *PPDMHPETREG;
1905
1906/** Current PDMHPETREG version number. */
1907#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1908
1909/**
1910 * HPET RC helpers.
1911 *
1912 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1913 * at some later point.
1914 */
1915typedef struct PDMHPETHLPRC
1916{
1917 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1918 uint32_t u32Version;
1919
1920 /** Just a safety precaution. */
1921 uint32_t u32TheEnd;
1922} PDMHPETHLPRC;
1923
1924/** Pointer to HPET RC helpers. */
1925typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1926/** Pointer to const HPET RC helpers. */
1927typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1928
1929/** Current PDMHPETHLPRC version number. */
1930#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1931
1932
1933/**
1934 * HPET R0 helpers.
1935 *
1936 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1937 * at some later point.
1938 */
1939typedef struct PDMHPETHLPR0
1940{
1941 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1942 uint32_t u32Version;
1943
1944 /** Just a safety precaution. */
1945 uint32_t u32TheEnd;
1946} PDMHPETHLPR0;
1947
1948/** Pointer to HPET R0 helpers. */
1949typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1950/** Pointer to const HPET R0 helpers. */
1951typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1952
1953/** Current PDMHPETHLPR0 version number. */
1954#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1955
1956/**
1957 * HPET R3 helpers.
1958 */
1959typedef struct PDMHPETHLPR3
1960{
1961 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1962 uint32_t u32Version;
1963
1964 /**
1965 * Gets the address of the RC HPET helpers.
1966 *
1967 * This should be called at both construction and relocation time
1968 * to obtain the correct address of the RC helpers.
1969 *
1970 * @returns RC pointer to the HPET helpers.
1971 * @param pDevIns Device instance of the HPET.
1972 */
1973 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1974
1975 /**
1976 * Gets the address of the R0 HPET helpers.
1977 *
1978 * This should be called at both construction and relocation time
1979 * to obtain the correct address of the R0 helpers.
1980 *
1981 * @returns R0 pointer to the HPET helpers.
1982 * @param pDevIns Device instance of the HPET.
1983 */
1984 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1985
1986 /**
1987 * Set legacy mode on PIT and RTC.
1988 *
1989 * @returns VINF_SUCCESS on success.
1990 * @returns rc if we failed to set legacy mode.
1991 * @param pDevIns Device instance of the HPET.
1992 * @param fActivated Whether legacy mode is activated or deactivated.
1993 */
1994 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1995
1996
1997 /**
1998 * Set IRQ, bypassing ISA bus override rules.
1999 *
2000 * @returns VINF_SUCCESS on success.
2001 * @returns rc if we failed to set legacy mode.
2002 * @param pDevIns Device instance of the HPET.
2003 * @param iIrq IRQ number to set.
2004 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2005 */
2006 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2007
2008 /** Just a safety precaution. */
2009 uint32_t u32TheEnd;
2010} PDMHPETHLPR3;
2011
2012/** Pointer to HPET R3 helpers. */
2013typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
2014/** Pointer to const HPET R3 helpers. */
2015typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
2016
2017/** Current PDMHPETHLPR3 version number. */
2018#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
2019
2020
2021/**
2022 * Raw PCI device registration structure.
2023 */
2024typedef struct PDMPCIRAWREG
2025{
2026 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
2027 uint32_t u32Version;
2028 /** Just a safety precaution. */
2029 uint32_t u32TheEnd;
2030} PDMPCIRAWREG;
2031/** Pointer to a raw PCI registration structure. */
2032typedef PDMPCIRAWREG *PPDMPCIRAWREG;
2033
2034/** Current PDMPCIRAWREG version number. */
2035#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
2036
2037/**
2038 * Raw PCI device raw-mode context helpers.
2039 */
2040typedef struct PDMPCIRAWHLPRC
2041{
2042 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
2043 uint32_t u32Version;
2044 /** Just a safety precaution. */
2045 uint32_t u32TheEnd;
2046} PDMPCIRAWHLPRC;
2047/** Pointer to a raw PCI deviec raw-mode context helper structure. */
2048typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
2049/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
2050typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
2051
2052/** Current PDMPCIRAWHLPRC version number. */
2053#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
2054
2055/**
2056 * Raw PCI device ring-0 context helpers.
2057 */
2058typedef struct PDMPCIRAWHLPR0
2059{
2060 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
2061 uint32_t u32Version;
2062 /** Just a safety precaution. */
2063 uint32_t u32TheEnd;
2064} PDMPCIRAWHLPR0;
2065/** Pointer to a raw PCI deviec ring-0 context helper structure. */
2066typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
2067/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
2068typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
2069
2070/** Current PDMPCIRAWHLPR0 version number. */
2071#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
2072
2073
2074/**
2075 * Raw PCI device ring-3 context helpers.
2076 */
2077typedef struct PDMPCIRAWHLPR3
2078{
2079 /** Undefined structure version and magic number. */
2080 uint32_t u32Version;
2081
2082 /**
2083 * Gets the address of the RC raw PCI device helpers.
2084 *
2085 * This should be called at both construction and relocation time to obtain
2086 * the correct address of the RC helpers.
2087 *
2088 * @returns RC pointer to the raw PCI device helpers.
2089 * @param pDevIns Device instance of the raw PCI device.
2090 */
2091 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
2092
2093 /**
2094 * Gets the address of the R0 raw PCI device helpers.
2095 *
2096 * This should be called at both construction and relocation time to obtain
2097 * the correct address of the R0 helpers.
2098 *
2099 * @returns R0 pointer to the raw PCI device helpers.
2100 * @param pDevIns Device instance of the raw PCI device.
2101 */
2102 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
2103
2104 /** Just a safety precaution. */
2105 uint32_t u32TheEnd;
2106} PDMPCIRAWHLPR3;
2107/** Pointer to raw PCI R3 helpers. */
2108typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2109/** Pointer to const raw PCI R3 helpers. */
2110typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2111
2112/** Current PDMPCIRAWHLPR3 version number. */
2113#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2114
2115
2116#ifdef IN_RING3
2117
2118/**
2119 * DMA Transfer Handler.
2120 *
2121 * @returns Number of bytes transferred.
2122 * @param pDevIns Device instance of the DMA.
2123 * @param pvUser User pointer.
2124 * @param uChannel Channel number.
2125 * @param off DMA position.
2126 * @param cb Block size.
2127 * @remarks The device lock is not taken, however, the DMA device lock is held.
2128 */
2129typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2130/** Pointer to a FNDMATRANSFERHANDLER(). */
2131typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2132
2133/**
2134 * DMA Controller registration structure.
2135 */
2136typedef struct PDMDMAREG
2137{
2138 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2139 uint32_t u32Version;
2140
2141 /**
2142 * Execute pending transfers.
2143 *
2144 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2145 * @param pDevIns Device instance of the DMAC.
2146 * @remarks No locks held, called on EMT(0) as a form of serialization.
2147 */
2148 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2149
2150 /**
2151 * Register transfer function for DMA channel.
2152 *
2153 * @param pDevIns Device instance of the DMAC.
2154 * @param uChannel Channel number.
2155 * @param pfnTransferHandler Device specific transfer function.
2156 * @param pvUSer User pointer to be passed to the callback.
2157 * @remarks No locks held, called on an EMT.
2158 */
2159 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2160
2161 /**
2162 * Read memory
2163 *
2164 * @returns Number of bytes read.
2165 * @param pDevIns Device instance of the DMAC.
2166 * @param pvBuffer Pointer to target buffer.
2167 * @param off DMA position.
2168 * @param cbBlock Block size.
2169 * @remarks No locks held, called on an EMT.
2170 */
2171 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2172
2173 /**
2174 * Write memory
2175 *
2176 * @returns Number of bytes written.
2177 * @param pDevIns Device instance of the DMAC.
2178 * @param pvBuffer Memory to write.
2179 * @param off DMA position.
2180 * @param cbBlock Block size.
2181 * @remarks No locks held, called on an EMT.
2182 */
2183 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2184
2185 /**
2186 * Set the DREQ line.
2187 *
2188 * @param pDevIns Device instance of the DMAC.
2189 * @param uChannel Channel number.
2190 * @param uLevel Level of the line.
2191 * @remarks No locks held, called on an EMT.
2192 */
2193 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2194
2195 /**
2196 * Get channel mode
2197 *
2198 * @returns Channel mode.
2199 * @param pDevIns Device instance of the DMAC.
2200 * @param uChannel Channel number.
2201 * @remarks No locks held, called on an EMT.
2202 */
2203 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2204
2205} PDMDMACREG;
2206/** Pointer to a DMAC registration structure. */
2207typedef PDMDMACREG *PPDMDMACREG;
2208
2209/** Current PDMDMACREG version number. */
2210#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2211
2212
2213/**
2214 * DMA Controller device helpers.
2215 */
2216typedef struct PDMDMACHLP
2217{
2218 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2219 uint32_t u32Version;
2220
2221 /* to-be-defined */
2222
2223} PDMDMACHLP;
2224/** Pointer to DMAC helpers. */
2225typedef PDMDMACHLP *PPDMDMACHLP;
2226/** Pointer to const DMAC helpers. */
2227typedef const PDMDMACHLP *PCPDMDMACHLP;
2228
2229/** Current PDMDMACHLP version number. */
2230#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2231
2232#endif /* IN_RING3 */
2233
2234
2235
2236/**
2237 * RTC registration structure.
2238 */
2239typedef struct PDMRTCREG
2240{
2241 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2242 uint32_t u32Version;
2243 uint32_t u32Alignment; /**< structure size alignment. */
2244
2245 /**
2246 * Write to a CMOS register and update the checksum if necessary.
2247 *
2248 * @returns VBox status code.
2249 * @param pDevIns Device instance of the RTC.
2250 * @param iReg The CMOS register index.
2251 * @param u8Value The CMOS register value.
2252 * @remarks Caller enters the device critical section.
2253 */
2254 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2255
2256 /**
2257 * Read a CMOS register.
2258 *
2259 * @returns VBox status code.
2260 * @param pDevIns Device instance of the RTC.
2261 * @param iReg The CMOS register index.
2262 * @param pu8Value Where to store the CMOS register value.
2263 * @remarks Caller enters the device critical section.
2264 */
2265 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2266
2267} PDMRTCREG;
2268/** Pointer to a RTC registration structure. */
2269typedef PDMRTCREG *PPDMRTCREG;
2270/** Pointer to a const RTC registration structure. */
2271typedef const PDMRTCREG *PCPDMRTCREG;
2272
2273/** Current PDMRTCREG version number. */
2274#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2275
2276
2277/**
2278 * RTC device helpers.
2279 */
2280typedef struct PDMRTCHLP
2281{
2282 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2283 uint32_t u32Version;
2284
2285 /* to-be-defined */
2286
2287} PDMRTCHLP;
2288/** Pointer to RTC helpers. */
2289typedef PDMRTCHLP *PPDMRTCHLP;
2290/** Pointer to const RTC helpers. */
2291typedef const PDMRTCHLP *PCPDMRTCHLP;
2292
2293/** Current PDMRTCHLP version number. */
2294#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2295
2296
2297
2298#ifdef IN_RING3
2299
2300/**
2301 * PDM Device API.
2302 */
2303typedef struct PDMDEVHLPR3
2304{
2305 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2306 uint32_t u32Version;
2307
2308 /**
2309 * Register a number of I/O ports with a device.
2310 *
2311 * These callbacks are of course for the host context (HC).
2312 * Register HC handlers before guest context (GC) handlers! There must be a
2313 * HC handler for every GC handler!
2314 *
2315 * @returns VBox status.
2316 * @param pDevIns The device instance to register the ports with.
2317 * @param Port First port number in the range.
2318 * @param cPorts Number of ports to register.
2319 * @param pvUser User argument.
2320 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2321 * @param pfnIn Pointer to function which is gonna handle IN operations.
2322 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2323 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2324 * @param pszDesc Pointer to description string. This must not be freed.
2325 * @remarks Caller enters the device critical section prior to invoking the
2326 * registered callback methods.
2327 */
2328 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2329 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2330 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2331
2332 /**
2333 * Register a number of I/O ports with a device for RC.
2334 *
2335 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2336 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2337 * for every RC handler!
2338 *
2339 * @returns VBox status.
2340 * @param pDevIns The device instance to register the ports with
2341 * and which RC module to resolve the names
2342 * against.
2343 * @param Port First port number in the range.
2344 * @param cPorts Number of ports to register.
2345 * @param pvUser User argument.
2346 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2347 * @param pszIn Name of the RC function which is gonna handle IN operations.
2348 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2349 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2350 * @param pszDesc Pointer to description string. This must not be freed.
2351 * @remarks Caller enters the device critical section prior to invoking the
2352 * registered callback methods.
2353 */
2354 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2355 const char *pszOut, const char *pszIn,
2356 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2357
2358 /**
2359 * Register a number of I/O ports with a device.
2360 *
2361 * These callbacks are of course for the ring-0 host context (R0).
2362 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2363 *
2364 * @returns VBox status.
2365 * @param pDevIns The device instance to register the ports with.
2366 * @param Port First port number in the range.
2367 * @param cPorts Number of ports to register.
2368 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2369 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2370 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2371 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2372 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2373 * @param pszDesc Pointer to description string. This must not be freed.
2374 * @remarks Caller enters the device critical section prior to invoking the
2375 * registered callback methods.
2376 */
2377 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2378 const char *pszOut, const char *pszIn,
2379 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2380
2381 /**
2382 * Deregister I/O ports.
2383 *
2384 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2385 *
2386 * @returns VBox status.
2387 * @param pDevIns The device instance owning the ports.
2388 * @param Port First port number in the range.
2389 * @param cPorts Number of ports to deregister.
2390 */
2391 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2392
2393 /**
2394 * Register a Memory Mapped I/O (MMIO) region.
2395 *
2396 * These callbacks are of course for the ring-3 context (R3). Register HC
2397 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2398 * must be a R3 handler for every RC and R0 handler!
2399 *
2400 * @returns VBox status.
2401 * @param pDevIns The device instance to register the MMIO with.
2402 * @param GCPhysStart First physical address in the range.
2403 * @param cbRange The size of the range (in bytes).
2404 * @param pvUser User argument.
2405 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2406 * @param pfnRead Pointer to function which is gonna handle Read operations.
2407 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2408 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2409 * @param pszDesc Pointer to description string. This must not be freed.
2410 * @remarks Caller enters the device critical section prior to invoking the
2411 * registered callback methods.
2412 */
2413 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2414 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2415 uint32_t fFlags, const char *pszDesc));
2416
2417 /**
2418 * Register a Memory Mapped I/O (MMIO) region for RC.
2419 *
2420 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2421 * (R3) handlers before guest context handlers! There must be a R3 handler for
2422 * every RC handler!
2423 *
2424 * @returns VBox status.
2425 * @param pDevIns The device instance to register the MMIO with.
2426 * @param GCPhysStart First physical address in the range.
2427 * @param cbRange The size of the range (in bytes).
2428 * @param pvUser User argument.
2429 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2430 * @param pszRead Name of the RC function which is gonna handle Read operations.
2431 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2432 * @remarks Caller enters the device critical section prior to invoking the
2433 * registered callback methods.
2434 */
2435 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2436 const char *pszWrite, const char *pszRead, const char *pszFill));
2437
2438 /**
2439 * Register a Memory Mapped I/O (MMIO) region for R0.
2440 *
2441 * These callbacks are for the ring-0 host context (R0). Register ring-3
2442 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2443 * every R0 handler!
2444 *
2445 * @returns VBox status.
2446 * @param pDevIns The device instance to register the MMIO with.
2447 * @param GCPhysStart First physical address in the range.
2448 * @param cbRange The size of the range (in bytes).
2449 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2450 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2451 * @param pszRead Name of the RC function which is gonna handle Read operations.
2452 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2453 * @remarks Caller enters the device critical section prior to invoking the
2454 * registered callback methods.
2455 */
2456 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2457 const char *pszWrite, const char *pszRead, const char *pszFill));
2458
2459 /**
2460 * Deregister a Memory Mapped I/O (MMIO) region.
2461 *
2462 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2463 *
2464 * @returns VBox status.
2465 * @param pDevIns The device instance owning the MMIO region(s).
2466 * @param GCPhysStart First physical address in the range.
2467 * @param cbRange The size of the range (in bytes).
2468 */
2469 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2470
2471 /**
2472 * Allocate and register a MMIO2 region.
2473 *
2474 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2475 * RAM associated with a device. It is also non-shared memory with a
2476 * permanent ring-3 mapping and page backing (presently).
2477 *
2478 * @returns VBox status.
2479 * @param pDevIns The device instance.
2480 * @param iRegion The region number. Use the PCI region number as
2481 * this must be known to the PCI bus device too. If
2482 * it's not associated with the PCI device, then
2483 * any number up to UINT8_MAX is fine.
2484 * @param cb The size (in bytes) of the region.
2485 * @param fFlags Reserved for future use, must be zero.
2486 * @param ppv Where to store the address of the ring-3 mapping
2487 * of the memory.
2488 * @param pszDesc Pointer to description string. This must not be
2489 * freed.
2490 * @thread EMT.
2491 */
2492 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2493
2494 /**
2495 * Deregisters and frees a MMIO2 region.
2496 *
2497 * Any physical (and virtual) access handlers registered for the region must
2498 * be deregistered before calling this function.
2499 *
2500 * @returns VBox status code.
2501 * @param pDevIns The device instance.
2502 * @param iRegion The region number used during registration.
2503 * @thread EMT.
2504 */
2505 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2506
2507 /**
2508 * Maps a MMIO2 region into the physical memory space.
2509 *
2510 * A MMIO2 range may overlap with base memory if a lot of RAM
2511 * is configured for the VM, in which case we'll drop the base
2512 * memory pages. Presently we will make no attempt to preserve
2513 * anything that happens to be present in the base memory that
2514 * is replaced, this is of course incorrect but it's too much
2515 * effort.
2516 *
2517 * @returns VBox status code.
2518 * @param pDevIns The device instance.
2519 * @param iRegion The region number used during registration.
2520 * @param GCPhys The physical address to map it at.
2521 * @thread EMT.
2522 */
2523 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2524
2525 /**
2526 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2527 *
2528 * @returns VBox status code.
2529 * @param pDevIns The device instance.
2530 * @param iRegion The region number used during registration.
2531 * @param GCPhys The physical address it's currently mapped at.
2532 * @thread EMT.
2533 */
2534 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2535
2536 /**
2537 * Maps a portion of an MMIO2 region into the hypervisor region.
2538 *
2539 * Callers of this API must never deregister the MMIO2 region before the
2540 * VM is powered off.
2541 *
2542 * @return VBox status code.
2543 * @param pDevIns The device owning the MMIO2 memory.
2544 * @param iRegion The region.
2545 * @param off The offset into the region. Will be rounded down
2546 * to closest page boundary.
2547 * @param cb The number of bytes to map. Will be rounded up
2548 * to the closest page boundary.
2549 * @param pszDesc Mapping description.
2550 * @param pRCPtr Where to store the RC address.
2551 */
2552 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2553 const char *pszDesc, PRTRCPTR pRCPtr));
2554
2555 /**
2556 * Maps a portion of an MMIO2 region into kernel space (host).
2557 *
2558 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2559 * or the VM is terminated.
2560 *
2561 * @return VBox status code.
2562 * @param pDevIns The device owning the MMIO2 memory.
2563 * @param iRegion The region.
2564 * @param off The offset into the region. Must be page
2565 * aligned.
2566 * @param cb The number of bytes to map. Must be page
2567 * aligned.
2568 * @param pszDesc Mapping description.
2569 * @param pR0Ptr Where to store the R0 address.
2570 */
2571 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2572 const char *pszDesc, PRTR0PTR pR0Ptr));
2573
2574 /**
2575 * Register a ROM (BIOS) region.
2576 *
2577 * It goes without saying that this is read-only memory. The memory region must be
2578 * in unassigned memory. I.e. from the top of the address space or on the PC in
2579 * the 0xa0000-0xfffff range.
2580 *
2581 * @returns VBox status.
2582 * @param pDevIns The device instance owning the ROM region.
2583 * @param GCPhysStart First physical address in the range.
2584 * Must be page aligned!
2585 * @param cbRange The size of the range (in bytes).
2586 * Must be page aligned!
2587 * @param pvBinary Pointer to the binary data backing the ROM image.
2588 * @param cbBinary The size of the binary pointer. This must
2589 * be equal or smaller than @a cbRange.
2590 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2591 * @param pszDesc Pointer to description string. This must not be freed.
2592 *
2593 * @remark There is no way to remove the rom, automatically on device cleanup or
2594 * manually from the device yet. At present I doubt we need such features...
2595 */
2596 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2597 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2598
2599 /**
2600 * Changes the protection of shadowed ROM mapping.
2601 *
2602 * This is intented for use by the system BIOS, chipset or device in question to
2603 * change the protection of shadowed ROM code after init and on reset.
2604 *
2605 * @param pDevIns The device instance.
2606 * @param GCPhysStart Where the mapping starts.
2607 * @param cbRange The size of the mapping.
2608 * @param enmProt The new protection type.
2609 */
2610 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2611
2612 /**
2613 * Register a save state data unit.
2614 *
2615 * @returns VBox status.
2616 * @param pDevIns The device instance.
2617 * @param uVersion Data layout version number.
2618 * @param cbGuess The approximate amount of data in the unit.
2619 * Only for progress indicators.
2620 * @param pszBefore Name of data unit which we should be put in
2621 * front of. Optional (NULL).
2622 *
2623 * @param pfnLivePrep Prepare live save callback, optional.
2624 * @param pfnLiveExec Execute live save callback, optional.
2625 * @param pfnLiveVote Vote live save callback, optional.
2626 *
2627 * @param pfnSavePrep Prepare save callback, optional.
2628 * @param pfnSaveExec Execute save callback, optional.
2629 * @param pfnSaveDone Done save callback, optional.
2630 *
2631 * @param pfnLoadPrep Prepare load callback, optional.
2632 * @param pfnLoadExec Execute load callback, optional.
2633 * @param pfnLoadDone Done load callback, optional.
2634 * @remarks Caller enters the device critical section prior to invoking the
2635 * registered callback methods.
2636 */
2637 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2638 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2639 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2640 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2641
2642 /**
2643 * Creates a timer.
2644 *
2645 * @returns VBox status.
2646 * @param pDevIns The device instance.
2647 * @param enmClock The clock to use on this timer.
2648 * @param pfnCallback Callback function.
2649 * @param pvUser User argument for the callback.
2650 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2651 * @param pszDesc Pointer to description string which must stay around
2652 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2653 * @param ppTimer Where to store the timer on success.
2654 * @remarks Caller enters the device critical section prior to invoking the
2655 * callback.
2656 */
2657 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback,
2658 void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2659
2660 /**
2661 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2662 *
2663 * @returns pTime.
2664 * @param pDevIns The device instance.
2665 * @param pTime Where to store the time.
2666 */
2667 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2668
2669 /**
2670 * Read physical memory.
2671 *
2672 * @returns VINF_SUCCESS (for now).
2673 * @param pDevIns The device instance.
2674 * @param GCPhys Physical address start reading from.
2675 * @param pvBuf Where to put the read bits.
2676 * @param cbRead How many bytes to read.
2677 * @thread Any thread, but the call may involve the emulation thread.
2678 */
2679 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2680
2681 /**
2682 * Write to physical memory.
2683 *
2684 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2685 * @param pDevIns The device instance.
2686 * @param GCPhys Physical address to write to.
2687 * @param pvBuf What to write.
2688 * @param cbWrite How many bytes to write.
2689 * @thread Any thread, but the call may involve the emulation thread.
2690 */
2691 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2692
2693 /**
2694 * Requests the mapping of a guest page into ring-3.
2695 *
2696 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2697 * release it.
2698 *
2699 * This API will assume your intention is to write to the page, and will
2700 * therefore replace shared and zero pages. If you do not intend to modify the
2701 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2702 *
2703 * @returns VBox status code.
2704 * @retval VINF_SUCCESS on success.
2705 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2706 * backing or if the page has any active access handlers. The caller
2707 * must fall back on using PGMR3PhysWriteExternal.
2708 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2709 *
2710 * @param pDevIns The device instance.
2711 * @param GCPhys The guest physical address of the page that
2712 * should be mapped.
2713 * @param fFlags Flags reserved for future use, MBZ.
2714 * @param ppv Where to store the address corresponding to
2715 * GCPhys.
2716 * @param pLock Where to store the lock information that
2717 * pfnPhysReleasePageMappingLock needs.
2718 *
2719 * @remark Avoid calling this API from within critical sections (other than the
2720 * PGM one) because of the deadlock risk when we have to delegating the
2721 * task to an EMT.
2722 * @thread Any.
2723 */
2724 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv,
2725 PPGMPAGEMAPLOCK pLock));
2726
2727 /**
2728 * Requests the mapping of a guest page into ring-3, external threads.
2729 *
2730 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2731 * release it.
2732 *
2733 * @returns VBox status code.
2734 * @retval VINF_SUCCESS on success.
2735 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2736 * backing or if the page as an active ALL access handler. The caller
2737 * must fall back on using PGMPhysRead.
2738 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2739 *
2740 * @param pDevIns The device instance.
2741 * @param GCPhys The guest physical address of the page that
2742 * should be mapped.
2743 * @param fFlags Flags reserved for future use, MBZ.
2744 * @param ppv Where to store the address corresponding to
2745 * GCPhys.
2746 * @param pLock Where to store the lock information that
2747 * pfnPhysReleasePageMappingLock needs.
2748 *
2749 * @remark Avoid calling this API from within critical sections.
2750 * @thread Any.
2751 */
2752 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags,
2753 void const **ppv, PPGMPAGEMAPLOCK pLock));
2754
2755 /**
2756 * Release the mapping of a guest page.
2757 *
2758 * This is the counter part of pfnPhysGCPhys2CCPtr and
2759 * pfnPhysGCPhys2CCPtrReadOnly.
2760 *
2761 * @param pDevIns The device instance.
2762 * @param pLock The lock structure initialized by the mapping
2763 * function.
2764 */
2765 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2766
2767 /**
2768 * Read guest physical memory by virtual address.
2769 *
2770 * @param pDevIns The device instance.
2771 * @param pvDst Where to put the read bits.
2772 * @param GCVirtSrc Guest virtual address to start reading from.
2773 * @param cb How many bytes to read.
2774 * @thread The emulation thread.
2775 */
2776 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2777
2778 /**
2779 * Write to guest physical memory by virtual address.
2780 *
2781 * @param pDevIns The device instance.
2782 * @param GCVirtDst Guest virtual address to write to.
2783 * @param pvSrc What to write.
2784 * @param cb How many bytes to write.
2785 * @thread The emulation thread.
2786 */
2787 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2788
2789 /**
2790 * Convert a guest virtual address to a guest physical address.
2791 *
2792 * @returns VBox status code.
2793 * @param pDevIns The device instance.
2794 * @param GCPtr Guest virtual address.
2795 * @param pGCPhys Where to store the GC physical address
2796 * corresponding to GCPtr.
2797 * @thread The emulation thread.
2798 * @remark Careful with page boundaries.
2799 */
2800 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2801
2802 /**
2803 * Allocate memory which is associated with current VM instance
2804 * and automatically freed on it's destruction.
2805 *
2806 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2807 * @param pDevIns The device instance.
2808 * @param cb Number of bytes to allocate.
2809 */
2810 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2811
2812 /**
2813 * Allocate memory which is associated with current VM instance
2814 * and automatically freed on it's destruction. The memory is ZEROed.
2815 *
2816 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2817 * @param pDevIns The device instance.
2818 * @param cb Number of bytes to allocate.
2819 */
2820 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2821
2822 /**
2823 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2824 *
2825 * @param pDevIns The device instance.
2826 * @param pv Pointer to the memory to free.
2827 */
2828 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2829
2830 /**
2831 * Gets the VM state.
2832 *
2833 * @returns VM state.
2834 * @param pDevIns The device instance.
2835 * @thread Any thread (just keep in mind that it's volatile info).
2836 */
2837 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2838
2839 /**
2840 * Checks if the VM was teleported and hasn't been fully resumed yet.
2841 *
2842 * @returns true / false.
2843 * @param pDevIns The device instance.
2844 * @thread Any thread.
2845 */
2846 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2847
2848 /**
2849 * Set the VM error message
2850 *
2851 * @returns rc.
2852 * @param pDevIns The device instance.
2853 * @param rc VBox status code.
2854 * @param SRC_POS Use RT_SRC_POS.
2855 * @param pszFormat Error message format string.
2856 * @param ... Error message arguments.
2857 */
2858 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2859 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
2860
2861 /**
2862 * Set the VM error message
2863 *
2864 * @returns rc.
2865 * @param pDevIns The device instance.
2866 * @param rc VBox status code.
2867 * @param SRC_POS Use RT_SRC_POS.
2868 * @param pszFormat Error message format string.
2869 * @param va Error message arguments.
2870 */
2871 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
2872 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
2873
2874 /**
2875 * Set the VM runtime error message
2876 *
2877 * @returns VBox status code.
2878 * @param pDevIns The device instance.
2879 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2880 * @param pszErrorId Error ID string.
2881 * @param pszFormat Error message format string.
2882 * @param ... Error message arguments.
2883 */
2884 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2885 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
2886
2887 /**
2888 * Set the VM runtime error message
2889 *
2890 * @returns VBox status code.
2891 * @param pDevIns The device instance.
2892 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2893 * @param pszErrorId Error ID string.
2894 * @param pszFormat Error message format string.
2895 * @param va Error message arguments.
2896 */
2897 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
2898 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
2899
2900 /**
2901 * Stops the VM and enters the debugger to look at the guest state.
2902 *
2903 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2904 * invoking this function directly.
2905 *
2906 * @returns VBox status code which must be passed up to the VMM.
2907 * @param pDevIns The device instance.
2908 * @param pszFile Filename of the assertion location.
2909 * @param iLine The linenumber of the assertion location.
2910 * @param pszFunction Function of the assertion location.
2911 * @param pszFormat Message. (optional)
2912 * @param args Message parameters.
2913 */
2914 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction,
2915 const char *pszFormat, va_list args) RT_IPRT_FORMAT_ATTR(5, 0));
2916
2917 /**
2918 * Register a info handler with DBGF,
2919 *
2920 * @returns VBox status code.
2921 * @param pDevIns The device instance.
2922 * @param pszName The identifier of the info.
2923 * @param pszDesc The description of the info and any arguments
2924 * the handler may take.
2925 * @param pfnHandler The handler function to be called to display the
2926 * info.
2927 */
2928 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2929
2930 /**
2931 * Registers a set of registers for a device.
2932 *
2933 * The @a pvUser argument of the getter and setter callbacks will be
2934 * @a pDevIns. The register names will be prefixed by the device name followed
2935 * immediately by the instance number.
2936 *
2937 * @returns VBox status code.
2938 * @param pDevIns The device instance.
2939 * @param paRegisters The register descriptors.
2940 *
2941 * @remarks The device critical section is NOT entered prior to working the
2942 * callbacks registered via this helper!
2943 */
2944 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2945
2946 /**
2947 * Gets the trace buffer handle.
2948 *
2949 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2950 * really inteded for direct usage, thus no inline wrapper function.
2951 *
2952 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2953 * @param pDevIns The device instance.
2954 */
2955 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2956
2957 /**
2958 * Registers a statistics sample if statistics are enabled.
2959 *
2960 * @param pDevIns Device instance of the DMA.
2961 * @param pvSample Pointer to the sample.
2962 * @param enmType Sample type. This indicates what pvSample is
2963 * pointing at.
2964 * @param pszName Sample name. The name is on this form
2965 * "/<component>/<sample>". Further nesting is
2966 * possible.
2967 * @param enmUnit Sample unit.
2968 * @param pszDesc Sample description.
2969 */
2970 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2971
2972 /**
2973 * Same as pfnSTAMRegister except that the name is specified in a
2974 * RTStrPrintf like fashion.
2975 *
2976 * @returns VBox status.
2977 * @param pDevIns Device instance of the DMA.
2978 * @param pvSample Pointer to the sample.
2979 * @param enmType Sample type. This indicates what pvSample is
2980 * pointing at.
2981 * @param enmVisibility Visibility type specifying whether unused
2982 * statistics should be visible or not.
2983 * @param enmUnit Sample unit.
2984 * @param pszDesc Sample description.
2985 * @param pszName The sample name format string.
2986 * @param ... Arguments to the format string.
2987 */
2988 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
2989 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
2990 const char *pszName, ...) RT_IPRT_FORMAT_ATTR(7, 8));
2991
2992 /**
2993 * Same as pfnSTAMRegister except that the name is specified in a
2994 * RTStrPrintfV like fashion.
2995 *
2996 * @returns VBox status.
2997 * @param pDevIns Device instance of the DMA.
2998 * @param pvSample Pointer to the sample.
2999 * @param enmType Sample type. This indicates what pvSample is
3000 * pointing at.
3001 * @param enmVisibility Visibility type specifying whether unused
3002 * statistics should be visible or not.
3003 * @param enmUnit Sample unit.
3004 * @param pszDesc Sample description.
3005 * @param pszName The sample name format string.
3006 * @param args Arguments to the format string.
3007 */
3008 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
3009 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc,
3010 const char *pszName, va_list args) RT_IPRT_FORMAT_ATTR(7, 0));
3011
3012 /**
3013 * Registers the device with the default PCI bus.
3014 *
3015 * @returns VBox status code.
3016 * @param pDevIns The device instance.
3017 * @param pPciDev The PCI device structure.
3018 * Any PCI enabled device must keep this in it's instance data!
3019 * Fill in the PCI data config before registration, please.
3020 * @remark This is the simple interface, a Ex interface will be created if
3021 * more features are needed later.
3022 */
3023 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
3024
3025 /**
3026 * Initialize MSI support in a PCI device.
3027 *
3028 * @returns VBox status code.
3029 * @param pDevIns The device instance.
3030 * @param pMsiReg MSI registartion structure.
3031 */
3032 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
3033
3034 /**
3035 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
3036 *
3037 * @returns VBox status code.
3038 * @param pDevIns The device instance.
3039 * @param iRegion The region number.
3040 * @param cbRegion Size of the region.
3041 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
3042 * @param pfnCallback Callback for doing the mapping.
3043 * @remarks The callback will be invoked holding the PDM lock. The device lock
3044 * is NOT take because that is very likely be a lock order violation.
3045 */
3046 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
3047 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
3048
3049 /**
3050 * Register PCI configuration space read/write callbacks.
3051 *
3052 * @param pDevIns The device instance.
3053 * @param pPciDev The PCI device structure.
3054 * If NULL the default PCI device for this device instance is used.
3055 * @param pfnRead Pointer to the user defined PCI config read function.
3056 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
3057 * PCI config read function. This way, user can decide when (and if)
3058 * to call default PCI config read function. Can be NULL.
3059 * @param pfnWrite Pointer to the user defined PCI config write function.
3060 * @param ppfnWriteOld Pointer to function pointer which will receive
3061 * the old (default) PCI config write function.
3062 * This way, user can decide when (and if) to call
3063 * default PCI config write function. Can be NULL.
3064 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
3065 * is NOT take because that is very likely be a lock order violation.
3066 * @thread EMT
3067 */
3068 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3069 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
3070
3071 /**
3072 * Bus master physical memory read.
3073 *
3074 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3075 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3076 * @param pDevIns The device instance.
3077 * @param GCPhys Physical address start reading from.
3078 * @param pvBuf Where to put the read bits.
3079 * @param cbRead How many bytes to read.
3080 * @thread Any thread, but the call may involve the emulation thread.
3081 */
3082 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3083
3084 /**
3085 * Bus master physical memory write.
3086 *
3087 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3088 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3089 * @param pDevIns The device instance.
3090 * @param GCPhys Physical address to write to.
3091 * @param pvBuf What to write.
3092 * @param cbWrite How many bytes to write.
3093 * @thread Any thread, but the call may involve the emulation thread.
3094 */
3095 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3096
3097 /**
3098 * Set the IRQ for a PCI device.
3099 *
3100 * @param pDevIns The device instance.
3101 * @param iIrq IRQ number to set.
3102 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3103 * @thread Any thread, but will involve the emulation thread.
3104 */
3105 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3106
3107 /**
3108 * Set the IRQ for a PCI device, but don't wait for EMT to process
3109 * the request when not called from EMT.
3110 *
3111 * @param pDevIns The device instance.
3112 * @param iIrq IRQ number to set.
3113 * @param iLevel IRQ level.
3114 * @thread Any thread, but will involve the emulation thread.
3115 */
3116 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3117
3118 /**
3119 * Set ISA IRQ for a device.
3120 *
3121 * @param pDevIns The device instance.
3122 * @param iIrq IRQ number to set.
3123 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3124 * @thread Any thread, but will involve the emulation thread.
3125 */
3126 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3127
3128 /**
3129 * Set the ISA IRQ for a device, but don't wait for EMT to process
3130 * the request when not called from EMT.
3131 *
3132 * @param pDevIns The device instance.
3133 * @param iIrq IRQ number to set.
3134 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3135 * @thread Any thread, but will involve the emulation thread.
3136 */
3137 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3138
3139 /**
3140 * Attaches a driver (chain) to the device.
3141 *
3142 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3143 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3144 *
3145 * @returns VBox status code.
3146 * @param pDevIns The device instance.
3147 * @param iLun The logical unit to attach.
3148 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3149 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3150 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3151 * for the live of the device instance.
3152 */
3153 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3154 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3155
3156 /**
3157 * Detaches an attached driver (chain) from the device again.
3158 *
3159 * @returns VBox status code.
3160 * @param pDevIns The device instance.
3161 * @param pDrvIns The driver instance to detach.
3162 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3163 */
3164 DECLR3CALLBACKMEMBER(int, pfnDriverDetach,(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags));
3165
3166 /**
3167 * Create a queue.
3168 *
3169 * @returns VBox status code.
3170 * @param pDevIns The device instance.
3171 * @param cbItem The size of a queue item.
3172 * @param cItems The number of items in the queue.
3173 * @param cMilliesInterval The number of milliseconds between polling the queue.
3174 * If 0 then the emulation thread will be notified whenever an item arrives.
3175 * @param pfnCallback The consumer function.
3176 * @param fRZEnabled Set if the queue should work in RC and R0.
3177 * @param pszName The queue base name. The instance number will be
3178 * appended automatically.
3179 * @param ppQueue Where to store the queue handle on success.
3180 * @thread The emulation thread.
3181 * @remarks The device critical section will NOT be entered before calling the
3182 * callback. No locks will be held, but for now it's safe to assume
3183 * that only one EMT will do queue callbacks at any one time.
3184 */
3185 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3186 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3187
3188 /**
3189 * Initializes a PDM critical section.
3190 *
3191 * The PDM critical sections are derived from the IPRT critical sections, but
3192 * works in RC and R0 as well.
3193 *
3194 * @returns VBox status code.
3195 * @param pDevIns The device instance.
3196 * @param pCritSect Pointer to the critical section.
3197 * @param SRC_POS Use RT_SRC_POS.
3198 * @param pszNameFmt Format string for naming the critical section.
3199 * For statistics and lock validation.
3200 * @param va Arguments for the format string.
3201 */
3202 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3203 const char *pszNameFmt, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3204
3205 /**
3206 * Gets the NOP critical section.
3207 *
3208 * @returns The ring-3 address of the NOP critical section.
3209 * @param pDevIns The device instance.
3210 */
3211 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3212
3213 /**
3214 * Gets the NOP critical section.
3215 *
3216 * @returns The ring-0 address of the NOP critical section.
3217 * @param pDevIns The device instance.
3218 */
3219 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3220
3221 /**
3222 * Gets the NOP critical section.
3223 *
3224 * @returns The raw-mode context address of the NOP critical section.
3225 * @param pDevIns The device instance.
3226 */
3227 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3228
3229 /**
3230 * Changes the device level critical section from the automatically created
3231 * default to one desired by the device constructor.
3232 *
3233 * @returns VBox status code.
3234 * @param pDevIns The device instance.
3235 * @param pCritSect The critical section to use. NULL is not
3236 * valid, instead use the NOP critical
3237 * section.
3238 */
3239 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3240
3241 /**
3242 * Creates a PDM thread.
3243 *
3244 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3245 * resuming, and destroying the thread as the VM state changes.
3246 *
3247 * @returns VBox status code.
3248 * @param pDevIns The device instance.
3249 * @param ppThread Where to store the thread 'handle'.
3250 * @param pvUser The user argument to the thread function.
3251 * @param pfnThread The thread function.
3252 * @param pfnWakeup The wakup callback. This is called on the EMT
3253 * thread when a state change is pending.
3254 * @param cbStack See RTThreadCreate.
3255 * @param enmType See RTThreadCreate.
3256 * @param pszName See RTThreadCreate.
3257 * @remarks The device critical section will NOT be entered prior to invoking
3258 * the function pointers.
3259 */
3260 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3261 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3262
3263 /**
3264 * Set up asynchronous handling of a suspend, reset or power off notification.
3265 *
3266 * This shall only be called when getting the notification. It must be called
3267 * for each one.
3268 *
3269 * @returns VBox status code.
3270 * @param pDevIns The device instance.
3271 * @param pfnAsyncNotify The callback.
3272 * @thread EMT(0)
3273 * @remarks The caller will enter the device critical section prior to invoking
3274 * the callback.
3275 */
3276 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3277
3278 /**
3279 * Notify EMT(0) that the device has completed the asynchronous notification
3280 * handling.
3281 *
3282 * This can be called at any time, spurious calls will simply be ignored.
3283 *
3284 * @param pDevIns The device instance.
3285 * @thread Any
3286 */
3287 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3288
3289 /**
3290 * Register the RTC device.
3291 *
3292 * @returns VBox status code.
3293 * @param pDevIns The device instance.
3294 * @param pRtcReg Pointer to a RTC registration structure.
3295 * @param ppRtcHlp Where to store the pointer to the helper
3296 * functions.
3297 */
3298 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3299
3300 /**
3301 * Register the PCI Bus.
3302 *
3303 * @returns VBox status code.
3304 * @param pDevIns The device instance.
3305 * @param pPciBusReg Pointer to PCI bus registration structure.
3306 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3307 * helpers.
3308 */
3309 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3310
3311 /**
3312 * Register the PIC device.
3313 *
3314 * @returns VBox status code.
3315 * @param pDevIns The device instance.
3316 * @param pPicReg Pointer to a PIC registration structure.
3317 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3318 * helpers.
3319 */
3320 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3321
3322 /**
3323 * Register the APIC device.
3324 *
3325 * @returns VBox status code.
3326 * @param pDevIns The device instance.
3327 * @param pApicReg Pointer to a APIC registration structure.
3328 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3329 */
3330 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3331
3332 /**
3333 * Register the I/O APIC device.
3334 *
3335 * @returns VBox status code.
3336 * @param pDevIns The device instance.
3337 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3338 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3339 * helpers.
3340 */
3341 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3342
3343 /**
3344 * Register the HPET device.
3345 *
3346 * @returns VBox status code.
3347 * @param pDevIns The device instance.
3348 * @param pHpetReg Pointer to a HPET registration structure.
3349 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3350 * helpers.
3351 */
3352 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3353
3354 /**
3355 * Register a raw PCI device.
3356 *
3357 * @returns VBox status code.
3358 * @param pDevIns The device instance.
3359 * @param pPciRawReg Pointer to a raw PCI registration structure.
3360 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3361 * device helpers.
3362 */
3363 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3364
3365 /**
3366 * Register the DMA device.
3367 *
3368 * @returns VBox status code.
3369 * @param pDevIns The device instance.
3370 * @param pDmacReg Pointer to a DMAC registration structure.
3371 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3372 */
3373 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3374
3375 /**
3376 * Register transfer function for DMA channel.
3377 *
3378 * @returns VBox status code.
3379 * @param pDevIns The device instance.
3380 * @param uChannel Channel number.
3381 * @param pfnTransferHandler Device specific transfer callback function.
3382 * @param pvUser User pointer to pass to the callback.
3383 * @thread EMT
3384 */
3385 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3386
3387 /**
3388 * Read memory.
3389 *
3390 * @returns VBox status code.
3391 * @param pDevIns The device instance.
3392 * @param uChannel Channel number.
3393 * @param pvBuffer Pointer to target buffer.
3394 * @param off DMA position.
3395 * @param cbBlock Block size.
3396 * @param pcbRead Where to store the number of bytes which was
3397 * read. optional.
3398 * @thread EMT
3399 */
3400 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3401
3402 /**
3403 * Write memory.
3404 *
3405 * @returns VBox status code.
3406 * @param pDevIns The device instance.
3407 * @param uChannel Channel number.
3408 * @param pvBuffer Memory to write.
3409 * @param off DMA position.
3410 * @param cbBlock Block size.
3411 * @param pcbWritten Where to store the number of bytes which was
3412 * written. optional.
3413 * @thread EMT
3414 */
3415 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3416
3417 /**
3418 * Set the DREQ line.
3419 *
3420 * @returns VBox status code.
3421 * @param pDevIns Device instance.
3422 * @param uChannel Channel number.
3423 * @param uLevel Level of the line.
3424 * @thread EMT
3425 */
3426 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3427
3428 /**
3429 * Get channel mode.
3430 *
3431 * @returns Channel mode. See specs.
3432 * @param pDevIns The device instance.
3433 * @param uChannel Channel number.
3434 * @thread EMT
3435 */
3436 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3437
3438 /**
3439 * Schedule DMA execution.
3440 *
3441 * @param pDevIns The device instance.
3442 * @thread Any thread.
3443 */
3444 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3445
3446 /**
3447 * Write CMOS value and update the checksum(s).
3448 *
3449 * @returns VBox status code.
3450 * @param pDevIns The device instance.
3451 * @param iReg The CMOS register index.
3452 * @param u8Value The CMOS register value.
3453 * @thread EMT
3454 */
3455 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3456
3457 /**
3458 * Read CMOS value.
3459 *
3460 * @returns VBox status code.
3461 * @param pDevIns The device instance.
3462 * @param iReg The CMOS register index.
3463 * @param pu8Value Where to store the CMOS register value.
3464 * @thread EMT
3465 */
3466 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3467
3468 /**
3469 * Assert that the current thread is the emulation thread.
3470 *
3471 * @returns True if correct.
3472 * @returns False if wrong.
3473 * @param pDevIns The device instance.
3474 * @param pszFile Filename of the assertion location.
3475 * @param iLine The linenumber of the assertion location.
3476 * @param pszFunction Function of the assertion location.
3477 */
3478 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3479
3480 /**
3481 * Assert that the current thread is NOT the emulation thread.
3482 *
3483 * @returns True if correct.
3484 * @returns False if wrong.
3485 * @param pDevIns The device instance.
3486 * @param pszFile Filename of the assertion location.
3487 * @param iLine The linenumber of the assertion location.
3488 * @param pszFunction Function of the assertion location.
3489 */
3490 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3491
3492 /**
3493 * Resolves the symbol for a raw-mode context interface.
3494 *
3495 * @returns VBox status code.
3496 * @param pDevIns The device instance.
3497 * @param pvInterface The interface structure.
3498 * @param cbInterface The size of the interface structure.
3499 * @param pszSymPrefix What to prefix the symbols in the list with
3500 * before resolving them. This must start with
3501 * 'dev' and contain the driver name.
3502 * @param pszSymList List of symbols corresponding to the interface.
3503 * There is generally a there is generally a define
3504 * holding this list associated with the interface
3505 * definition (INTERFACE_SYM_LIST). For more
3506 * details see PDMR3LdrGetInterfaceSymbols.
3507 * @thread EMT
3508 */
3509 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3510 const char *pszSymPrefix, const char *pszSymList));
3511
3512 /**
3513 * Resolves the symbol for a ring-0 context interface.
3514 *
3515 * @returns VBox status code.
3516 * @param pDevIns The device instance.
3517 * @param pvInterface The interface structure.
3518 * @param cbInterface The size of the interface structure.
3519 * @param pszSymPrefix What to prefix the symbols in the list with
3520 * before resolving them. This must start with
3521 * 'dev' and contain the driver name.
3522 * @param pszSymList List of symbols corresponding to the interface.
3523 * There is generally a there is generally a define
3524 * holding this list associated with the interface
3525 * definition (INTERFACE_SYM_LIST). For more
3526 * details see PDMR3LdrGetInterfaceSymbols.
3527 * @thread EMT
3528 */
3529 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3530 const char *pszSymPrefix, const char *pszSymList));
3531
3532 /**
3533 * Call the ring-0 request handler routine of the device.
3534 *
3535 * For this to work, the device must be ring-0 enabled and export a request
3536 * handler function. The name of the function must be the device name in
3537 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3538 * 'ReqHandler'. The device name will be captialized. It shall take the
3539 * exact same arguments as this function and be declared using
3540 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3541 *
3542 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3543 * or two as the handler address will be resolved on each invocation. This
3544 * is the reason for the EMT only restriction as well.
3545 *
3546 * @returns VBox status code.
3547 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3548 * handler function.
3549 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3550 *
3551 * @param pDevIns The device instance.
3552 * @param uOperation The operation to perform.
3553 * @param u64Arg 64-bit integer argument.
3554 * @thread EMT
3555 */
3556 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3557
3558 /**
3559 * Gets the reason for the most recent VM suspend.
3560 *
3561 * @returns The suspend reason. VMSUSPENDREASON_INVALID is returned if no
3562 * suspend has been made or if the pDevIns is invalid.
3563 * @param pDevIns The device instance.
3564 */
3565 DECLR3CALLBACKMEMBER(VMSUSPENDREASON, pfnVMGetSuspendReason,(PPDMDEVINS pDevIns));
3566
3567 /**
3568 * Gets the reason for the most recent VM resume.
3569 *
3570 * @returns The resume reason. VMRESUMEREASON_INVALID is returned if no
3571 * resume has been made or if the pDevIns is invalid.
3572 * @param pDevIns The device instance.
3573 */
3574 DECLR3CALLBACKMEMBER(VMRESUMEREASON, pfnVMGetResumeReason,(PPDMDEVINS pDevIns));
3575
3576
3577 /** Space reserved for future members.
3578 * @{ */
3579 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3580 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3581 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3582 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3583 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3584 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3585 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3586 /*DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3587 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));*/
3588 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3589 /** @} */
3590
3591
3592 /** API available to trusted devices only.
3593 *
3594 * These APIs are providing unrestricted access to the guest and the VM,
3595 * or they are interacting intimately with PDM.
3596 *
3597 * @{
3598 */
3599
3600 /**
3601 * Gets the user mode VM handle. Restricted API.
3602 *
3603 * @returns User mode VM Handle.
3604 * @param pDevIns The device instance.
3605 */
3606 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3607
3608 /**
3609 * Gets the global VM handle. Restricted API.
3610 *
3611 * @returns VM Handle.
3612 * @param pDevIns The device instance.
3613 */
3614 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3615
3616 /**
3617 * Gets the VMCPU handle. Restricted API.
3618 *
3619 * @returns VMCPU Handle.
3620 * @param pDevIns The device instance.
3621 */
3622 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3623
3624 /**
3625 * The the VM CPU ID of the current thread (restricted API).
3626 *
3627 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3628 * @param pDevIns The device instance.
3629 */
3630 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3631
3632 /**
3633 * Registers the VMM device heap or notifies about mapping/unmapping.
3634 *
3635 * This interface serves three purposes:
3636 *
3637 * -# Register the VMM device heap during device construction
3638 * for the HM to use.
3639 * -# Notify PDM/HM that it's mapped into guest address
3640 * space (i.e. usable).
3641 * -# Notify PDM/HM that it is being unmapped from the guest
3642 * address space (i.e. not usable).
3643 *
3644 * @returns VBox status code.
3645 * @param pDevIns The device instance.
3646 * @param GCPhys The physical address if mapped, NIL_RTGCPHYS if
3647 * not mapped.
3648 * @param pvHeap Ring 3 heap pointer.
3649 * @param cbHeap Size of the heap.
3650 * @thread EMT.
3651 */
3652 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap));
3653
3654 /**
3655 * Registers the firmware (BIOS, EFI) device with PDM.
3656 *
3657 * The firmware provides a callback table and gets a special PDM helper table.
3658 * There can only be one firmware device for a VM.
3659 *
3660 * @returns VBox status code.
3661 * @param pDevIns The device instance.
3662 * @param pFwReg Firmware registration structure.
3663 * @param ppFwHlp Where to return the firmware helper structure.
3664 * @remarks Only valid during device construction.
3665 * @thread EMT(0)
3666 */
3667 DECLR3CALLBACKMEMBER(int, pfnFirmwareRegister,(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp));
3668
3669 /**
3670 * Resets the VM.
3671 *
3672 * @returns The appropriate VBox status code to pass around on reset.
3673 * @param pDevIns The device instance.
3674 * @param fFlags PDMVMRESET_F_XXX flags.
3675 * @thread The emulation thread.
3676 */
3677 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns, uint32_t fFlags));
3678
3679 /**
3680 * Suspends the VM.
3681 *
3682 * @returns The appropriate VBox status code to pass around on suspend.
3683 * @param pDevIns The device instance.
3684 * @thread The emulation thread.
3685 */
3686 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3687
3688 /**
3689 * Suspends, saves and powers off the VM.
3690 *
3691 * @returns The appropriate VBox status code to pass around.
3692 * @param pDevIns The device instance.
3693 * @thread An emulation thread.
3694 */
3695 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3696
3697 /**
3698 * Power off the VM.
3699 *
3700 * @returns The appropriate VBox status code to pass around on power off.
3701 * @param pDevIns The device instance.
3702 * @thread The emulation thread.
3703 */
3704 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3705
3706 /**
3707 * Checks if the Gate A20 is enabled or not.
3708 *
3709 * @returns true if A20 is enabled.
3710 * @returns false if A20 is disabled.
3711 * @param pDevIns The device instance.
3712 * @thread The emulation thread.
3713 */
3714 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3715
3716 /**
3717 * Enables or disables the Gate A20.
3718 *
3719 * @param pDevIns The device instance.
3720 * @param fEnable Set this flag to enable the Gate A20; clear it
3721 * to disable.
3722 * @thread The emulation thread.
3723 */
3724 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3725
3726 /**
3727 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3728 * thread.
3729 *
3730 * @param pDevIns The device instance.
3731 * @param iLeaf The CPUID leaf to get.
3732 * @param pEax Where to store the EAX value.
3733 * @param pEbx Where to store the EBX value.
3734 * @param pEcx Where to store the ECX value.
3735 * @param pEdx Where to store the EDX value.
3736 * @thread EMT.
3737 */
3738 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3739
3740 /**
3741 * Get the current virtual clock time in a VM. The clock frequency must be
3742 * queried separately.
3743 *
3744 * @returns Current clock time.
3745 * @param pDevIns The device instance.
3746 */
3747 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3748
3749 /**
3750 * Get the frequency of the virtual clock.
3751 *
3752 * @returns The clock frequency (not variable at run-time).
3753 * @param pDevIns The device instance.
3754 */
3755 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3756
3757 /**
3758 * Get the current virtual clock time in a VM, in nanoseconds.
3759 *
3760 * @returns Current clock time (in ns).
3761 * @param pDevIns The device instance.
3762 */
3763 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3764
3765 /**
3766 * Gets the support driver session.
3767 *
3768 * This is intended for working with the semaphore API.
3769 *
3770 * @returns Support driver session handle.
3771 * @param pDevIns The device instance.
3772 */
3773 DECLR3CALLBACKMEMBER(PSUPDRVSESSION, pfnGetSupDrvSession,(PPDMDEVINS pDevIns));
3774
3775 /** @} */
3776
3777 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3778 uint32_t u32TheEnd;
3779} PDMDEVHLPR3;
3780#endif /* !IN_RING3 */
3781/** Pointer to the R3 PDM Device API. */
3782typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3783/** Pointer to the R3 PDM Device API, const variant. */
3784typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3785
3786/** Current PDMDEVHLPR3 version number. */
3787#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 16, 0)
3788
3789
3790/**
3791 * PDM Device API - RC Variant.
3792 */
3793typedef struct PDMDEVHLPRC
3794{
3795 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3796 uint32_t u32Version;
3797
3798 /**
3799 * Bus master physical memory read.
3800 *
3801 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3802 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3803 * @param pDevIns The device instance.
3804 * @param GCPhys Physical address start reading from.
3805 * @param pvBuf Where to put the read bits.
3806 * @param cbRead How many bytes to read.
3807 * @thread Any thread, but the call may involve the emulation thread.
3808 */
3809 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3810
3811 /**
3812 * Bus master physical memory write.
3813 *
3814 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3815 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3816 * @param pDevIns The device instance.
3817 * @param GCPhys Physical address to write to.
3818 * @param pvBuf What to write.
3819 * @param cbWrite How many bytes to write.
3820 * @thread Any thread, but the call may involve the emulation thread.
3821 */
3822 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3823
3824 /**
3825 * Set the IRQ for a PCI device.
3826 *
3827 * @param pDevIns Device instance.
3828 * @param iIrq IRQ number to set.
3829 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3830 * @thread Any thread, but will involve the emulation thread.
3831 */
3832 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3833
3834 /**
3835 * Set ISA IRQ for a device.
3836 *
3837 * @param pDevIns Device instance.
3838 * @param iIrq IRQ number to set.
3839 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3840 * @thread Any thread, but will involve the emulation thread.
3841 */
3842 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3843
3844 /**
3845 * Read physical memory.
3846 *
3847 * @returns VINF_SUCCESS (for now).
3848 * @param pDevIns Device instance.
3849 * @param GCPhys Physical address start reading from.
3850 * @param pvBuf Where to put the read bits.
3851 * @param cbRead How many bytes to read.
3852 */
3853 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3854
3855 /**
3856 * Write to physical memory.
3857 *
3858 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3859 * @param pDevIns Device instance.
3860 * @param GCPhys Physical address to write to.
3861 * @param pvBuf What to write.
3862 * @param cbWrite How many bytes to write.
3863 */
3864 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3865
3866 /**
3867 * Checks if the Gate A20 is enabled or not.
3868 *
3869 * @returns true if A20 is enabled.
3870 * @returns false if A20 is disabled.
3871 * @param pDevIns Device instance.
3872 * @thread The emulation thread.
3873 */
3874 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3875
3876 /**
3877 * Gets the VM state.
3878 *
3879 * @returns VM state.
3880 * @param pDevIns The device instance.
3881 * @thread Any thread (just keep in mind that it's volatile info).
3882 */
3883 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3884
3885 /**
3886 * Set the VM error message
3887 *
3888 * @returns rc.
3889 * @param pDevIns Driver instance.
3890 * @param rc VBox status code.
3891 * @param SRC_POS Use RT_SRC_POS.
3892 * @param pszFormat Error message format string.
3893 * @param ... Error message arguments.
3894 */
3895 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3896 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
3897
3898 /**
3899 * Set the VM error message
3900 *
3901 * @returns rc.
3902 * @param pDevIns Driver instance.
3903 * @param rc VBox status code.
3904 * @param SRC_POS Use RT_SRC_POS.
3905 * @param pszFormat Error message format string.
3906 * @param va Error message arguments.
3907 */
3908 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
3909 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
3910
3911 /**
3912 * Set the VM runtime error message
3913 *
3914 * @returns VBox status code.
3915 * @param pDevIns Device instance.
3916 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3917 * @param pszErrorId Error ID string.
3918 * @param pszFormat Error message format string.
3919 * @param ... Error message arguments.
3920 */
3921 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3922 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
3923
3924 /**
3925 * Set the VM runtime error message
3926 *
3927 * @returns VBox status code.
3928 * @param pDevIns Device instance.
3929 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3930 * @param pszErrorId Error ID string.
3931 * @param pszFormat Error message format string.
3932 * @param va Error message arguments.
3933 */
3934 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
3935 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
3936
3937 /**
3938 * Set parameters for pending MMIO patch operation
3939 *
3940 * @returns VBox status code.
3941 * @param pDevIns Device instance.
3942 * @param GCPhys MMIO physical address
3943 * @param pCachedData GC pointer to cached data
3944 */
3945 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3946
3947 /**
3948 * Gets the VM handle. Restricted API.
3949 *
3950 * @returns VM Handle.
3951 * @param pDevIns Device instance.
3952 */
3953 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3954
3955 /**
3956 * Gets the VMCPU handle. Restricted API.
3957 *
3958 * @returns VMCPU Handle.
3959 * @param pDevIns The device instance.
3960 */
3961 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3962
3963 /**
3964 * The the VM CPU ID of the current thread (restricted API).
3965 *
3966 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
3967 * @param pDevIns The device instance.
3968 */
3969 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
3970
3971 /**
3972 * Get the current virtual clock time in a VM. The clock frequency must be
3973 * queried separately.
3974 *
3975 * @returns Current clock time.
3976 * @param pDevIns The device instance.
3977 */
3978 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3979
3980 /**
3981 * Get the frequency of the virtual clock.
3982 *
3983 * @returns The clock frequency (not variable at run-time).
3984 * @param pDevIns The device instance.
3985 */
3986 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3987
3988 /**
3989 * Get the current virtual clock time in a VM, in nanoseconds.
3990 *
3991 * @returns Current clock time (in ns).
3992 * @param pDevIns The device instance.
3993 */
3994 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3995
3996 /**
3997 * Gets the trace buffer handle.
3998 *
3999 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4000 * really inteded for direct usage, thus no inline wrapper function.
4001 *
4002 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4003 * @param pDevIns The device instance.
4004 */
4005 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4006
4007 /** Just a safety precaution. */
4008 uint32_t u32TheEnd;
4009} PDMDEVHLPRC;
4010/** Pointer PDM Device RC API. */
4011typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
4012/** Pointer PDM Device RC API. */
4013typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
4014
4015/** Current PDMDEVHLP version number. */
4016#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 4, 1)
4017
4018
4019/**
4020 * PDM Device API - R0 Variant.
4021 */
4022typedef struct PDMDEVHLPR0
4023{
4024 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
4025 uint32_t u32Version;
4026
4027 /**
4028 * Bus master physical memory read.
4029 *
4030 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
4031 * VERR_EM_MEMORY.
4032 * @param pDevIns The device instance.
4033 * @param GCPhys Physical address start reading from.
4034 * @param pvBuf Where to put the read bits.
4035 * @param cbRead How many bytes to read.
4036 * @thread Any thread, but the call may involve the emulation thread.
4037 */
4038 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
4039
4040 /**
4041 * Bus master physical memory write.
4042 *
4043 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
4044 * VERR_EM_MEMORY.
4045 * @param pDevIns The device instance.
4046 * @param GCPhys Physical address to write to.
4047 * @param pvBuf What to write.
4048 * @param cbWrite How many bytes to write.
4049 * @thread Any thread, but the call may involve the emulation thread.
4050 */
4051 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
4052
4053 /**
4054 * Set the IRQ for a PCI device.
4055 *
4056 * @param pDevIns Device instance.
4057 * @param iIrq IRQ number to set.
4058 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
4059 * @thread Any thread, but will involve the emulation thread.
4060 */
4061 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
4062
4063 /**
4064 * Set ISA IRQ for a device.
4065 *
4066 * @param pDevIns Device instance.
4067 * @param iIrq IRQ number to set.
4068 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
4069 * @thread Any thread, but will involve the emulation thread.
4070 */
4071 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
4072
4073 /**
4074 * Read physical memory.
4075 *
4076 * @returns VINF_SUCCESS (for now).
4077 * @param pDevIns Device instance.
4078 * @param GCPhys Physical address start reading from.
4079 * @param pvBuf Where to put the read bits.
4080 * @param cbRead How many bytes to read.
4081 */
4082 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
4083
4084 /**
4085 * Write to physical memory.
4086 *
4087 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
4088 * @param pDevIns Device instance.
4089 * @param GCPhys Physical address to write to.
4090 * @param pvBuf What to write.
4091 * @param cbWrite How many bytes to write.
4092 */
4093 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
4094
4095 /**
4096 * Checks if the Gate A20 is enabled or not.
4097 *
4098 * @returns true if A20 is enabled.
4099 * @returns false if A20 is disabled.
4100 * @param pDevIns Device instance.
4101 * @thread The emulation thread.
4102 */
4103 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
4104
4105 /**
4106 * Gets the VM state.
4107 *
4108 * @returns VM state.
4109 * @param pDevIns The device instance.
4110 * @thread Any thread (just keep in mind that it's volatile info).
4111 */
4112 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
4113
4114 /**
4115 * Set the VM error message
4116 *
4117 * @returns rc.
4118 * @param pDevIns Driver instance.
4119 * @param rc VBox status code.
4120 * @param SRC_POS Use RT_SRC_POS.
4121 * @param pszFormat Error message format string.
4122 * @param ... Error message arguments.
4123 */
4124 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4125 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7));
4126
4127 /**
4128 * Set the VM error message
4129 *
4130 * @returns rc.
4131 * @param pDevIns Driver instance.
4132 * @param rc VBox status code.
4133 * @param SRC_POS Use RT_SRC_POS.
4134 * @param pszFormat Error message format string.
4135 * @param va Error message arguments.
4136 */
4137 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL,
4138 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0));
4139
4140 /**
4141 * Set the VM runtime error message
4142 *
4143 * @returns VBox status code.
4144 * @param pDevIns Device instance.
4145 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4146 * @param pszErrorId Error ID string.
4147 * @param pszFormat Error message format string.
4148 * @param ... Error message arguments.
4149 */
4150 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4151 const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(4, 5));
4152
4153 /**
4154 * Set the VM runtime error message
4155 *
4156 * @returns VBox status code.
4157 * @param pDevIns Device instance.
4158 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
4159 * @param pszErrorId Error ID string.
4160 * @param pszFormat Error message format string.
4161 * @param va Error message arguments.
4162 */
4163 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4164 const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(4, 0));
4165
4166 /**
4167 * Set parameters for pending MMIO patch operation
4168 *
4169 * @returns rc.
4170 * @param pDevIns Device instance.
4171 * @param GCPhys MMIO physical address
4172 * @param pCachedData GC pointer to cached data
4173 */
4174 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
4175
4176 /**
4177 * Gets the VM handle. Restricted API.
4178 *
4179 * @returns VM Handle.
4180 * @param pDevIns Device instance.
4181 */
4182 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
4183
4184 /**
4185 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
4186 *
4187 * @returns true = yes, false = no
4188 * @param pDevIns Device instance.
4189 */
4190 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
4191
4192 /**
4193 * Gets the VMCPU handle. Restricted API.
4194 *
4195 * @returns VMCPU Handle.
4196 * @param pDevIns The device instance.
4197 */
4198 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
4199
4200 /**
4201 * The the VM CPU ID of the current thread (restricted API).
4202 *
4203 * @returns The VMCPUID of the calling thread, NIL_CPUID if not EMT.
4204 * @param pDevIns The device instance.
4205 */
4206 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCurrentCpuId,(PPDMDEVINS pDevIns));
4207
4208 /**
4209 * Get the current virtual clock time in a VM. The clock frequency must be
4210 * queried separately.
4211 *
4212 * @returns Current clock time.
4213 * @param pDevIns The device instance.
4214 */
4215 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
4216
4217 /**
4218 * Get the frequency of the virtual clock.
4219 *
4220 * @returns The clock frequency (not variable at run-time).
4221 * @param pDevIns The device instance.
4222 */
4223 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4224
4225 /**
4226 * Get the current virtual clock time in a VM, in nanoseconds.
4227 *
4228 * @returns Current clock time (in ns).
4229 * @param pDevIns The device instance.
4230 */
4231 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4232
4233 /**
4234 * Gets the trace buffer handle.
4235 *
4236 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4237 * really inteded for direct usage, thus no inline wrapper function.
4238 *
4239 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4240 * @param pDevIns The device instance.
4241 */
4242 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4243
4244 /** Just a safety precaution. */
4245 uint32_t u32TheEnd;
4246} PDMDEVHLPR0;
4247/** Pointer PDM Device R0 API. */
4248typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4249/** Pointer PDM Device GC API. */
4250typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4251
4252/** Current PDMDEVHLP version number. */
4253#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 4, 1)
4254
4255
4256
4257/**
4258 * PDM Device Instance.
4259 */
4260typedef struct PDMDEVINS
4261{
4262 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4263 uint32_t u32Version;
4264 /** Device instance number. */
4265 uint32_t iInstance;
4266
4267 /** Pointer the GC PDM Device API. */
4268 PCPDMDEVHLPRC pHlpRC;
4269 /** Pointer to device instance data. */
4270 RTRCPTR pvInstanceDataRC;
4271 /** The critical section for the device, see pCritSectXR3. */
4272 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4273 /** Alignment padding. */
4274 RTRCPTR pAlignmentRC;
4275
4276 /** Pointer the R0 PDM Device API. */
4277 PCPDMDEVHLPR0 pHlpR0;
4278 /** Pointer to device instance data (R0). */
4279 RTR0PTR pvInstanceDataR0;
4280 /** The critical section for the device, see pCritSectXR3. */
4281 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4282
4283 /** Pointer the HC PDM Device API. */
4284 PCPDMDEVHLPR3 pHlpR3;
4285 /** Pointer to device instance data. */
4286 RTR3PTR pvInstanceDataR3;
4287 /** The critical section for the device.
4288 *
4289 * TM and IOM will enter this critical section before calling into the device
4290 * code. PDM will when doing power on, power off, reset, suspend and resume
4291 * notifications. SSM will currently not, but this will be changed later on.
4292 *
4293 * The device gets a critical section automatically assigned to it before
4294 * the constructor is called. If the constructor wishes to use a different
4295 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4296 * very early on.
4297 */
4298 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4299
4300 /** Pointer to device registration structure. */
4301 R3PTRTYPE(PCPDMDEVREG) pReg;
4302 /** Configuration handle. */
4303 R3PTRTYPE(PCFGMNODE) pCfg;
4304
4305 /** The base interface of the device.
4306 *
4307 * The device constructor initializes this if it has any
4308 * device level interfaces to export. To obtain this interface
4309 * call PDMR3QueryDevice(). */
4310 PDMIBASE IBase;
4311
4312 /** Tracing indicator. */
4313 uint32_t fTracing;
4314 /** The tracing ID of this device. */
4315 uint32_t idTracing;
4316#if HC_ARCH_BITS == 32
4317 /** Align the internal data more naturally. */
4318 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4319#endif
4320
4321 /** Internal data. */
4322 union
4323 {
4324#ifdef PDMDEVINSINT_DECLARED
4325 PDMDEVINSINT s;
4326#endif
4327 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4328 } Internal;
4329
4330 /** Device instance data. The size of this area is defined
4331 * in the PDMDEVREG::cbInstanceData field. */
4332 char achInstanceData[8];
4333} PDMDEVINS;
4334
4335/** Current PDMDEVINS version number. */
4336#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4337
4338/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4339#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4340
4341/**
4342 * Checks the structure versions of the device instance and device helpers,
4343 * returning if they are incompatible.
4344 *
4345 * This is for use in the constructor.
4346 *
4347 * @param pDevIns The device instance pointer.
4348 */
4349#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4350 do \
4351 { \
4352 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4353 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4354 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4355 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4356 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4357 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4358 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4359 } while (0)
4360
4361/**
4362 * Quietly checks the structure versions of the device instance and device
4363 * helpers, returning if they are incompatible.
4364 *
4365 * This is for use in the destructor.
4366 *
4367 * @param pDevIns The device instance pointer.
4368 */
4369#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4370 do \
4371 { \
4372 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4373 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4374 { /* likely */ } else return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4375 if (RT_LIKELY(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4376 { /* likely */ } else return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4377 } while (0)
4378
4379/**
4380 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4381 * constructor - returns on failure.
4382 *
4383 * This should be invoked after having initialized the instance data
4384 * sufficiently for the correct operation of the destructor. The destructor is
4385 * always called!
4386 *
4387 * @param pDevIns Pointer to the PDM device instance.
4388 * @param pszValidValues Patterns describing the valid value names. See
4389 * RTStrSimplePatternMultiMatch for details on the
4390 * pattern syntax.
4391 * @param pszValidNodes Patterns describing the valid node (key) names.
4392 * Pass empty string if no valid nodes.
4393 */
4394#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4395 do \
4396 { \
4397 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4398 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4399 if (RT_SUCCESS(rcValCfg)) \
4400 { /* likely */ } else return rcValCfg; \
4401 } while (0)
4402
4403/** @def PDMDEV_ASSERT_EMT
4404 * Assert that the current thread is the emulation thread.
4405 */
4406#ifdef VBOX_STRICT
4407# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4408#else
4409# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4410#endif
4411
4412/** @def PDMDEV_ASSERT_OTHER
4413 * Assert that the current thread is NOT the emulation thread.
4414 */
4415#ifdef VBOX_STRICT
4416# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4417#else
4418# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4419#endif
4420
4421/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4422 * Assert that the current thread is owner of the VM lock.
4423 */
4424#ifdef VBOX_STRICT
4425# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4426#else
4427# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4428#endif
4429
4430/** @def PDMDEV_SET_ERROR
4431 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4432 */
4433#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4434 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4435
4436/** @def PDMDEV_SET_RUNTIME_ERROR
4437 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4438 */
4439#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4440 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4441
4442/** @def PDMDEVINS_2_RCPTR
4443 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4444 */
4445#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4446
4447/** @def PDMDEVINS_2_R3PTR
4448 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4449 */
4450#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4451
4452/** @def PDMDEVINS_2_R0PTR
4453 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4454 */
4455#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4456
4457
4458#ifdef IN_RING3
4459
4460/**
4461 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4462 */
4463DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4464 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4465 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4466{
4467 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4468}
4469
4470/**
4471 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4472 */
4473DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4474 const char *pszOut, const char *pszIn, const char *pszOutStr,
4475 const char *pszInStr, const char *pszDesc)
4476{
4477 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4478}
4479
4480/**
4481 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4482 */
4483DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4484 const char *pszOut, const char *pszIn, const char *pszOutStr,
4485 const char *pszInStr, const char *pszDesc)
4486{
4487 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4488}
4489
4490/**
4491 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4492 */
4493DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4494{
4495 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4496}
4497
4498/**
4499 * Register a Memory Mapped I/O (MMIO) region.
4500 *
4501 * These callbacks are of course for the ring-3 context (R3). Register HC
4502 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4503 * must be a R3 handler for every RC and R0 handler!
4504 *
4505 * @returns VBox status.
4506 * @param pDevIns The device instance to register the MMIO with.
4507 * @param GCPhysStart First physical address in the range.
4508 * @param cbRange The size of the range (in bytes).
4509 * @param pvUser User argument.
4510 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4511 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4512 * @param pfnRead Pointer to function which is gonna handle Read operations.
4513 * @param pszDesc Pointer to description string. This must not be freed.
4514 */
4515DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4516 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4517{
4518 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4519 fFlags, pszDesc);
4520}
4521
4522/**
4523 * Register a Memory Mapped I/O (MMIO) region for RC.
4524 *
4525 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4526 * (R3) handlers before guest context handlers! There must be a R3 handler for
4527 * every RC handler!
4528 *
4529 * @returns VBox status.
4530 * @param pDevIns The device instance to register the MMIO with.
4531 * @param GCPhysStart First physical address in the range.
4532 * @param cbRange The size of the range (in bytes).
4533 * @param pvUser User argument.
4534 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4535 * @param pszRead Name of the RC function which is gonna handle Read operations.
4536 */
4537DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4538 const char *pszWrite, const char *pszRead)
4539{
4540 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4541}
4542
4543/**
4544 * Register a Memory Mapped I/O (MMIO) region for R0.
4545 *
4546 * These callbacks are for the ring-0 host context (R0). Register ring-3
4547 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
4548 * every R0 handler!
4549 *
4550 * @returns VBox status.
4551 * @param pDevIns The device instance to register the MMIO with.
4552 * @param GCPhysStart First physical address in the range.
4553 * @param cbRange The size of the range (in bytes).
4554 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
4555 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4556 * @param pszRead Name of the RC function which is gonna handle Read operations.
4557 * @remarks Caller enters the device critical section prior to invoking the
4558 * registered callback methods.
4559 */
4560DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4561 const char *pszWrite, const char *pszRead)
4562{
4563 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4564}
4565
4566/**
4567 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4568 */
4569DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4570 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4571 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4572{
4573 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4574 fFlags, pszDesc);
4575}
4576
4577/**
4578 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4579 */
4580DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4581 const char *pszWrite, const char *pszRead, const char *pszFill)
4582{
4583 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4584}
4585
4586/**
4587 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4588 */
4589DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4590 const char *pszWrite, const char *pszRead, const char *pszFill)
4591{
4592 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4593}
4594
4595/**
4596 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4597 */
4598DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4599{
4600 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4601}
4602
4603/**
4604 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4605 */
4606DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4607{
4608 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4609}
4610
4611/**
4612 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4613 */
4614DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4615{
4616 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4617}
4618
4619/**
4620 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4621 */
4622DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4623{
4624 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4625}
4626
4627/**
4628 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4629 */
4630DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4631{
4632 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4633}
4634
4635/**
4636 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4637 */
4638DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4639 const char *pszDesc, PRTRCPTR pRCPtr)
4640{
4641 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4642}
4643
4644/**
4645 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4646 */
4647DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4648 const char *pszDesc, PRTR0PTR pR0Ptr)
4649{
4650 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4651}
4652
4653/**
4654 * @copydoc PDMDEVHLPR3::pfnROMRegister
4655 */
4656DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4657 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4658{
4659 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4660}
4661
4662/**
4663 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4664 */
4665DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4666{
4667 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4668}
4669
4670/**
4671 * Register a save state data unit.
4672 *
4673 * @returns VBox status.
4674 * @param pDevIns The device instance.
4675 * @param uVersion Data layout version number.
4676 * @param cbGuess The approximate amount of data in the unit.
4677 * Only for progress indicators.
4678 * @param pfnSaveExec Execute save callback, optional.
4679 * @param pfnLoadExec Execute load callback, optional.
4680 */
4681DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4682 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4683{
4684 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4685 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4686 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4687 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4688}
4689
4690/**
4691 * Register a save state data unit with a live save callback as well.
4692 *
4693 * @returns VBox status.
4694 * @param pDevIns The device instance.
4695 * @param uVersion Data layout version number.
4696 * @param cbGuess The approximate amount of data in the unit.
4697 * Only for progress indicators.
4698 * @param pfnLiveExec Execute live callback, optional.
4699 * @param pfnSaveExec Execute save callback, optional.
4700 * @param pfnLoadExec Execute load callback, optional.
4701 */
4702DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4703 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4704{
4705 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4706 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4707 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4708 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4709}
4710
4711/**
4712 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4713 */
4714DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4715 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4716 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4717 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4718{
4719 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4720 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4721 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4722 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4723}
4724
4725/**
4726 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4727 */
4728DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4729 const char *pszDesc, PPTMTIMERR3 ppTimer)
4730{
4731 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4732}
4733
4734/**
4735 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4736 */
4737DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4738{
4739 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4740}
4741
4742#endif /* IN_RING3 */
4743
4744/**
4745 * @copydoc PDMDEVHLPR3::pfnPhysRead
4746 */
4747DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4748{
4749 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4750}
4751
4752/**
4753 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4754 */
4755DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4756{
4757 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4758}
4759
4760#ifdef IN_RING3
4761
4762/**
4763 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4764 */
4765DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4766{
4767 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4768}
4769
4770/**
4771 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4772 */
4773DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv,
4774 PPGMPAGEMAPLOCK pLock)
4775{
4776 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4777}
4778
4779/**
4780 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4781 */
4782DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4783{
4784 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4785}
4786
4787/**
4788 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4789 */
4790DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4791{
4792 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4793}
4794
4795/**
4796 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4797 */
4798DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4799{
4800 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4801}
4802
4803/**
4804 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4805 */
4806DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4807{
4808 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4809}
4810
4811/**
4812 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4813 */
4814DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4815{
4816 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4817}
4818
4819/**
4820 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4821 */
4822DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4823{
4824 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4825}
4826
4827/**
4828 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4829 */
4830DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4831{
4832 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4833}
4834#endif /* IN_RING3 */
4835
4836/**
4837 * @copydoc PDMDEVHLPR3::pfnVMState
4838 */
4839DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4840{
4841 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4842}
4843
4844#ifdef IN_RING3
4845/**
4846 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4847 */
4848DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4849{
4850 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4851}
4852#endif /* IN_RING3 */
4853
4854/**
4855 * @copydoc PDMDEVHLPR3::pfnVMSetError
4856 */
4857DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL,
4858 const char *pszFormat, ...)
4859{
4860 va_list va;
4861 va_start(va, pszFormat);
4862 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4863 va_end(va);
4864 return rc;
4865}
4866
4867/**
4868 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4869 */
4870DECLINLINE(int) RT_IPRT_FORMAT_ATTR(4, 5) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId,
4871 const char *pszFormat, ...)
4872{
4873 va_list va;
4874 int rc;
4875 va_start(va, pszFormat);
4876 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4877 va_end(va);
4878 return rc;
4879}
4880
4881/**
4882 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4883 *
4884 * @returns VBox status code which must be passed up to the VMM. This will be
4885 * VINF_SUCCESS in non-strict builds.
4886 * @param pDevIns The device instance.
4887 * @param SRC_POS Use RT_SRC_POS.
4888 * @param pszFormat Message. (optional)
4889 * @param ... Message parameters.
4890 */
4891DECLINLINE(int) RT_IPRT_FORMAT_ATTR(5, 6) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4892{
4893#ifdef VBOX_STRICT
4894# ifdef IN_RING3
4895 int rc;
4896 va_list args;
4897 va_start(args, pszFormat);
4898 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4899 va_end(args);
4900 return rc;
4901# else
4902 NOREF(pDevIns);
4903 NOREF(pszFile);
4904 NOREF(iLine);
4905 NOREF(pszFunction);
4906 NOREF(pszFormat);
4907 return VINF_EM_DBG_STOP;
4908# endif
4909#else
4910 NOREF(pDevIns);
4911 NOREF(pszFile);
4912 NOREF(iLine);
4913 NOREF(pszFunction);
4914 NOREF(pszFormat);
4915 return VINF_SUCCESS;
4916#endif
4917}
4918
4919#ifdef IN_RING3
4920
4921/**
4922 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4923 */
4924DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4925{
4926 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4927}
4928
4929/**
4930 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4931 */
4932DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4933{
4934 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4935}
4936
4937/**
4938 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4939 */
4940DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4941{
4942 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4943}
4944
4945/**
4946 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4947 */
4948DECLINLINE(void) RT_IPRT_FORMAT_ATTR(7, 8) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType,
4949 STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4950 const char *pszDesc, const char *pszName, ...)
4951{
4952 va_list va;
4953 va_start(va, pszName);
4954 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4955 va_end(va);
4956}
4957
4958/**
4959 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4960 */
4961DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4962{
4963 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4964}
4965
4966/**
4967 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4968 */
4969DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
4970 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4971{
4972 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4973}
4974
4975/**
4976 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4977 */
4978DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4979{
4980 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4981}
4982
4983/**
4984 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4985 */
4986DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4987 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4988{
4989 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4990}
4991
4992#endif /* IN_RING3 */
4993
4994/**
4995 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4996 */
4997DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4998{
4999 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
5000}
5001
5002/**
5003 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
5004 */
5005DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
5006{
5007 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
5008}
5009
5010/**
5011 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
5012 */
5013DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5014{
5015 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
5016}
5017
5018/**
5019 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
5020 */
5021DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5022{
5023 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
5024}
5025
5026/**
5027 * @copydoc PDMDEVHLPR3::pfnISASetIrq
5028 */
5029DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5030{
5031 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5032}
5033
5034/**
5035 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
5036 */
5037DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
5038{
5039 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
5040}
5041
5042#ifdef IN_RING3
5043
5044/**
5045 * @copydoc PDMDEVHLPR3::pfnDriverAttach
5046 */
5047DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
5048{
5049 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
5050}
5051
5052/**
5053 * @copydoc PDMDEVHLPR3::pfnDriverDetach
5054 */
5055DECLINLINE(int) PDMDevHlpDriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
5056{
5057 return pDevIns->pHlpR3->pfnDriverDetach(pDevIns, pDrvIns, fFlags);
5058}
5059
5060/**
5061 * @copydoc PDMDEVHLPR3::pfnQueueCreate
5062 */
5063DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
5064 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
5065{
5066 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
5067}
5068
5069/**
5070 * Initializes a PDM critical section.
5071 *
5072 * The PDM critical sections are derived from the IPRT critical sections, but
5073 * works in RC and R0 as well.
5074 *
5075 * @returns VBox status code.
5076 * @param pDevIns The device instance.
5077 * @param pCritSect Pointer to the critical section.
5078 * @param SRC_POS Use RT_SRC_POS.
5079 * @param pszNameFmt Format string for naming the critical section.
5080 * For statistics and lock validation.
5081 * @param ... Arguments for the format string.
5082 */
5083DECLINLINE(int) RT_IPRT_FORMAT_ATTR(6, 7) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
5084 const char *pszNameFmt, ...)
5085{
5086 int rc;
5087 va_list va;
5088 va_start(va, pszNameFmt);
5089 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
5090 va_end(va);
5091 return rc;
5092}
5093
5094/**
5095 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
5096 */
5097DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
5098{
5099 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
5100}
5101
5102/**
5103 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
5104 */
5105DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
5106{
5107 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
5108}
5109
5110/**
5111 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
5112 */
5113DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
5114{
5115 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
5116}
5117
5118/**
5119 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
5120 */
5121DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
5122{
5123 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
5124}
5125
5126/**
5127 * @copydoc PDMDEVHLPR3::pfnThreadCreate
5128 */
5129DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
5130 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
5131{
5132 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
5133}
5134
5135/**
5136 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
5137 */
5138DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
5139{
5140 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
5141}
5142
5143/**
5144 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
5145 */
5146DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
5147{
5148 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
5149}
5150
5151/**
5152 * @copydoc PDMDEVHLPR3::pfnA20Set
5153 */
5154DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
5155{
5156 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
5157}
5158
5159/**
5160 * @copydoc PDMDEVHLPR3::pfnRTCRegister
5161 */
5162DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
5163{
5164 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
5165}
5166
5167/**
5168 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
5169 */
5170DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
5171{
5172 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
5173}
5174
5175/**
5176 * @copydoc PDMDEVHLPR3::pfnPICRegister
5177 */
5178DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
5179{
5180 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
5181}
5182
5183/**
5184 * @copydoc PDMDEVHLPR3::pfnAPICRegister
5185 */
5186DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
5187{
5188 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
5189}
5190
5191/**
5192 * @copydoc PDMDEVHLPR3::pfnIOAPICRegister
5193 */
5194DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
5195{
5196 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
5197}
5198
5199/**
5200 * @copydoc PDMDEVHLPR3::pfnHPETRegister
5201 */
5202DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
5203{
5204 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
5205}
5206
5207/**
5208 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
5209 */
5210DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
5211{
5212 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
5213}
5214
5215/**
5216 * @copydoc PDMDEVHLPR3::pfnDMACRegister
5217 */
5218DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
5219{
5220 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
5221}
5222
5223/**
5224 * @copydoc PDMDEVHLPR3::pfnDMARegister
5225 */
5226DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
5227{
5228 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
5229}
5230
5231/**
5232 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
5233 */
5234DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
5235{
5236 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
5237}
5238
5239/**
5240 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
5241 */
5242DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
5243{
5244 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
5245}
5246
5247/**
5248 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5249 */
5250DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5251{
5252 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5253}
5254
5255/**
5256 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5257 */
5258DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5259{
5260 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5261}
5262
5263/**
5264 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5265 */
5266DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5267{
5268 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5269}
5270
5271/**
5272 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5273 */
5274DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5275{
5276 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5277}
5278
5279/**
5280 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5281 */
5282DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5283{
5284 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5285}
5286
5287/**
5288 * @copydoc PDMDEVHLPR3::pfnCallR0
5289 */
5290DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5291{
5292 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5293}
5294
5295/**
5296 * @copydoc PDMDEVHLPR3::pfnVMGetSuspendReason
5297 */
5298DECLINLINE(VMSUSPENDREASON) PDMDevHlpVMGetSuspendReason(PPDMDEVINS pDevIns)
5299{
5300 return pDevIns->pHlpR3->pfnVMGetSuspendReason(pDevIns);
5301}
5302
5303/**
5304 * @copydoc PDMDEVHLPR3::pfnVMGetResumeReason
5305 */
5306DECLINLINE(VMRESUMEREASON) PDMDevHlpVMGetResumeReason(PPDMDEVINS pDevIns)
5307{
5308 return pDevIns->pHlpR3->pfnVMGetResumeReason(pDevIns);
5309}
5310
5311/**
5312 * @copydoc PDMDEVHLPR3::pfnGetUVM
5313 */
5314DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5315{
5316 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5317}
5318
5319#endif /* IN_RING3 */
5320
5321/**
5322 * @copydoc PDMDEVHLPR3::pfnGetVM
5323 */
5324DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5325{
5326 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5327}
5328
5329/**
5330 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5331 */
5332DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5333{
5334 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5335}
5336
5337/**
5338 * @copydoc PDMDEVHLPR3::pfnGetCurrentCpuId
5339 */
5340DECLINLINE(VMCPUID) PDMDevHlpGetCurrentCpuId(PPDMDEVINS pDevIns)
5341{
5342 return pDevIns->CTX_SUFF(pHlp)->pfnGetCurrentCpuId(pDevIns);
5343}
5344
5345/**
5346 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5347 */
5348DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5349{
5350 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5351}
5352
5353/**
5354 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5355 */
5356DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5357{
5358 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5359}
5360
5361/**
5362 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5363 */
5364DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5365{
5366 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5367}
5368
5369#ifdef IN_RING3
5370
5371/**
5372 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5373 */
5374DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap)
5375{
5376 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbHeap);
5377}
5378
5379/**
5380 * @copydoc PDMDEVHLPR3::pfnFirmwareRegister
5381 */
5382DECLINLINE(int) PDMDevHlpFirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
5383{
5384 return pDevIns->pHlpR3->pfnFirmwareRegister(pDevIns, pFwReg, ppFwHlp);
5385}
5386
5387/**
5388 * @copydoc PDMDEVHLPR3::pfnVMReset
5389 */
5390DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
5391{
5392 return pDevIns->pHlpR3->pfnVMReset(pDevIns, fFlags);
5393}
5394
5395/**
5396 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5397 */
5398DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5399{
5400 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5401}
5402
5403/**
5404 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5405 */
5406DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5407{
5408 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5409}
5410
5411/**
5412 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5413 */
5414DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5415{
5416 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5417}
5418
5419#endif /* IN_RING3 */
5420
5421/**
5422 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5423 */
5424DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5425{
5426 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5427}
5428
5429#ifdef IN_RING3
5430
5431/**
5432 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5433 */
5434DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5435{
5436 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5437}
5438
5439/**
5440 * @copydoc PDMDEVHLPR3::pfnGetSupDrvSession
5441 */
5442DECLINLINE(PSUPDRVSESSION) PDMDevHlpGetSupDrvSession(PPDMDEVINS pDevIns)
5443{
5444 return pDevIns->pHlpR3->pfnGetSupDrvSession(pDevIns);
5445}
5446
5447#endif /* IN_RING3 */
5448#ifdef IN_RING0
5449
5450/**
5451 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5452 */
5453DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5454{
5455 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5456}
5457
5458#endif /* IN_RING0 */
5459
5460
5461
5462
5463/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5464typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5465
5466/**
5467 * Callbacks for VBoxDeviceRegister().
5468 */
5469typedef struct PDMDEVREGCB
5470{
5471 /** Interface version.
5472 * This is set to PDM_DEVREG_CB_VERSION. */
5473 uint32_t u32Version;
5474
5475 /**
5476 * Registers a device with the current VM instance.
5477 *
5478 * @returns VBox status code.
5479 * @param pCallbacks Pointer to the callback table.
5480 * @param pReg Pointer to the device registration record.
5481 * This data must be permanent and readonly.
5482 */
5483 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5484} PDMDEVREGCB;
5485
5486/** Current version of the PDMDEVREGCB structure. */
5487#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5488
5489
5490/**
5491 * The VBoxDevicesRegister callback function.
5492 *
5493 * PDM will invoke this function after loading a device module and letting
5494 * the module decide which devices to register and how to handle conflicts.
5495 *
5496 * @returns VBox status code.
5497 * @param pCallbacks Pointer to the callback table.
5498 * @param u32Version VBox version number.
5499 */
5500typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5501
5502/** @} */
5503
5504RT_C_DECLS_END
5505
5506#endif
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