| 1 | /** @file
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| 2 | * PDM - Pluggable Device Manager, raw PCI Devices. (VMM)
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| 3 | */
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| 4 |
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| 5 | /*
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| 6 | * Copyright (C) 2010-2016 Oracle Corporation
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| 7 | *
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| 8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 9 | * available from http://www.virtualbox.org. This file is free software;
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| 10 | * you can redistribute it and/or modify it under the terms of the GNU
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| 11 | * General Public License (GPL) as published by the Free Software
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| 12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 15 | *
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| 16 | * The contents of this file may alternatively be used under the terms
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| 17 | * of the Common Development and Distribution License Version 1.0
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| 18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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| 19 | * VirtualBox OSE distribution, in which case the provisions of the
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| 20 | * CDDL are applicable instead of those of the GPL.
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| 21 | *
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| 22 | * You may elect to license modified versions of this file under the
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| 23 | * terms and conditions of either the GPL or the CDDL or both.
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| 24 | */
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| 25 |
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| 26 | #ifndef ___VBox_vmm_pdmpci_h
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| 27 | #define ___VBox_vmm_pdmpci_h
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| 28 |
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| 29 | #include <VBox/types.h>
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| 30 | #include <VBox/rawpci.h>
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| 31 |
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| 32 | RT_C_DECLS_BEGIN
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| 33 |
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| 34 | /** @defgroup grp_pdm_pciraw The raw PCI Devices API
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| 35 | * @ingroup grp_pdm
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| 36 | * @{
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| 37 | */
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| 38 |
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| 39 | typedef struct PDMIPCIRAW *PPDMIPCIRAW;
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| 40 | typedef struct PDMIPCIRAW
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| 41 | {
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| 42 | /**
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| 43 | * Notify virtual device that interrupt has arrived.
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| 44 | * For this callback to be called, interface have to be
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| 45 | * registered with PDMIPCIRAWUP::pfnRegisterInterruptListener.
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| 46 | *
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| 47 | * @note no level parameter, as we can only support flip-flop.
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| 48 | *
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| 49 | * @param pInterface Pointer to this interface structure.
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| 50 | * @param iGuestIrq Guest interrupt number, passed earlier when registering listener.
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| 51 | *
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| 52 | * @thread Any thread.
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| 53 | */
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| 54 | DECLR3CALLBACKMEMBER(int, pfnInterruptRequest,(PPDMIPCIRAW pInterface, int32_t iGuestIrq));
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| 55 | } PDMIPCIRAW;
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| 56 |
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| 57 | typedef struct PDMIPCIRAWUP *PPDMIPCIRAWUP;
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| 58 | typedef struct PDMIPCIRAWUP
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| 59 | {
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| 60 | /**
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| 61 | * Host PCI MMIO access function.
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| 62 | */
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| 63 |
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| 64 | /**
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| 65 | * Request driver info about PCI region on host PCI device.
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| 66 | *
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| 67 | * @returns true, if region is present, and out parameters are correct
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| 68 | * @param pInterface Pointer to this interface structure.
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| 69 | * @param iRegion Region number.
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| 70 | * @param pGCPhysRegion Where to store region base address (guest).
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| 71 | * @param pcbRegion Where to store region size.
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| 72 | *
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| 73 | * @param pfFlags If region is MMIO or IO.
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| 74 | * @thread Any thread.
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| 75 | */
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| 76 | DECLR3CALLBACKMEMBER(bool, pfnGetRegionInfo, (PPDMIPCIRAWUP pInterface,
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| 77 | uint32_t iRegion,
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| 78 | RTGCPHYS *pGCPhysRegion,
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| 79 | uint64_t *pcbRegion,
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| 80 | uint32_t *pfFlags));
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| 81 |
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| 82 | /**
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| 83 | * Request driver to map part of host device's MMIO region to the VM process and maybe kernel.
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| 84 | * Shall only be issued within earlier obtained with pfnGetRegionInfo()
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| 85 | * host physical address ranges for the device BARs. Even if failed, device still may function
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| 86 | * using pfnMmio* and pfnPio* operations, just much slower.
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| 87 | *
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| 88 | * @returns status code
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| 89 | * @param pInterface Pointer to this interface structure.
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| 90 | * @param iRegion Number of the region.
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| 91 | * @param StartAddress Host physical address of start.
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| 92 | * @param cbRegion Size of the region.
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| 93 | * @param fFlags Flags, currently lowest significant bit set if R0 mapping requested too
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| 94 | * @param ppvAddressR3 Where to store mapped region address for R3 (can be 0, if cannot map into userland)
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| 95 | * @param ppvAddressR0 Where to store mapped region address for R0 (can be 0, if cannot map into kernel)
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| 96 | *
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| 97 | * @thread Any thread.
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| 98 | */
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| 99 | DECLR3CALLBACKMEMBER(int, pfnMapRegion, (PPDMIPCIRAWUP pInterface,
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| 100 | uint32_t iRegion,
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| 101 | RTHCPHYS StartAddress,
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| 102 | uint64_t cbRegion,
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| 103 | uint32_t fFlags,
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| 104 | PRTR3PTR ppvAddressR3,
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| 105 | PRTR0PTR ppvAddressR0));
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| 106 |
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| 107 | /**
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| 108 | * Request driver to unmap part of host device's MMIO region to the VM process.
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| 109 | * Shall only be issued with pointer earlier obtained with pfnMapRegion().
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| 110 | *
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| 111 | * @returns status code
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| 112 | * @param pInterface Pointer to this interface structure
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| 113 | * @param iRegion Number of the region.
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| 114 | * @param StartAddress Host physical address of start.
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| 115 | * @param cbRegion Size of the region.
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| 116 | * @param pvAddressR3 R3 address of mapped region.
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| 117 | * @param pvAddressR0 R0 address of mapped region.
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| 118 | *
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| 119 | * @thread Any thread.
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| 120 | */
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| 121 | DECLR3CALLBACKMEMBER(int, pfnUnmapRegion, (PPDMIPCIRAWUP pInterface,
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| 122 | uint32_t iRegion,
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| 123 | RTHCPHYS StartAddress,
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| 124 | uint64_t cbRegion,
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| 125 | RTR3PTR pvAddressR3,
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| 126 | RTR0PTR pvAddressR0));
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| 127 |
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| 128 | /**
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| 129 | * Request port IO write.
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| 130 | *
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| 131 | * @returns status code
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| 132 | * @param pInterface Pointer to this interface structure.
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| 133 | * @param uPort I/O port address.
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| 134 | * @param uValue Value to write.
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| 135 | * @param cb Access width.
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| 136 | *
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| 137 | * @thread EMT thread.
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| 138 | */
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| 139 | DECLR3CALLBACKMEMBER(int, pfnPioWrite, (PPDMIPCIRAWUP pInterface,
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| 140 | RTIOPORT uPort,
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| 141 | uint32_t uValue,
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| 142 | unsigned cb));
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| 143 |
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| 144 | /**
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| 145 | * Request port IO read.
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| 146 | *
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| 147 | * @returns status code
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| 148 | * @param pInterface Pointer to this interface structure.
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| 149 | * @param uPort I/O port address.
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| 150 | * @param puValue Place to store read value.
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| 151 | * @param cb Access width.
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| 152 | *
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| 153 | * @thread EMT thread.
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| 154 | */
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| 155 |
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| 156 | DECLR3CALLBACKMEMBER(int, pfnPioRead, (PPDMIPCIRAWUP pInterface,
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| 157 | RTIOPORT uPort,
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| 158 | uint32_t *puValue,
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| 159 | unsigned cb));
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| 160 |
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| 161 |
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| 162 | /**
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| 163 | * Request MMIO write. This callback is only called if driver wants to receive MMIO via
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| 164 | * pu32Flags argument of pfnPciDeviceConstructStart().
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| 165 | *
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| 166 | * @returns status code
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| 167 | * @param pInterface Pointer to this interface structure.
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| 168 | * @param Address Guest physical address.
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| 169 | * @todo Why is this documented as guest physical
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| 170 | * address and given a host ring-0 address type?
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| 171 | * @param pvValue Address of value to write.
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| 172 | * @param cb Access width.
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| 173 | *
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| 174 | * @thread EMT thread.
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| 175 | */
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| 176 | DECLR3CALLBACKMEMBER(int, pfnMmioWrite, (PPDMIPCIRAWUP pInterface,
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| 177 | RTR0PTR Address,
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| 178 | void const *pvValue,
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| 179 | unsigned cb));
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| 180 |
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| 181 | /**
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| 182 | * Request MMIO read.
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| 183 | *
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| 184 | * @returns status code
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| 185 | * @param pInterface Pointer to this interface structure.
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| 186 | * @param Address Guest physical address.
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| 187 | * @todo Why is this documented as guest physical
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| 188 | * address and given a host ring-0 address type?
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| 189 | * @param pvValue Place to store read value.
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| 190 | * @param cb Access width.
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| 191 | *
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| 192 | * @thread EMT thread.
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| 193 | */
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| 194 |
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| 195 | DECLR3CALLBACKMEMBER(int, pfnMmioRead, (PPDMIPCIRAWUP pInterface,
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| 196 | RTR0PTR Address,
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| 197 | void *pvValue,
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| 198 | unsigned cb));
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| 199 |
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| 200 | /**
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| 201 | * Host PCI config space accessors.
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| 202 | */
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| 203 | /**
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| 204 | * Request driver to write value to host device's PCI config space.
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| 205 | * Host specific way (PIO or MCFG) is used to perform actual operation.
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| 206 | *
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| 207 | * @returns status code
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| 208 | * @param pInterface Pointer to this interface structure.
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| 209 | * @param offCfgSpace Offset in PCI config space.
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| 210 | * @param pvValue Value to write.
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| 211 | * @param cb Access width.
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| 212 | *
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| 213 | * @thread EMT thread.
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| 214 | */
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| 215 | DECLR3CALLBACKMEMBER(int, pfnPciCfgWrite, (PPDMIPCIRAWUP pInterface,
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| 216 | uint32_t offCfgSpace,
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| 217 | void *pvValue,
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| 218 | unsigned cb));
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| 219 | /**
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| 220 | * Request driver to read value from host device's PCI config space.
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| 221 | * Host specific way (PIO or MCFG) is used to perform actual operation.
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| 222 | *
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| 223 | * @returns status code
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| 224 | * @param pInterface Pointer to this interface structure.
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| 225 | * @param offCfgSpace Offset in PCI config space.
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| 226 | * @param pvValue Where to store read value.
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| 227 | * @param cb Access width.
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| 228 | *
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| 229 | * @thread EMT thread.
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| 230 | */
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| 231 | DECLR3CALLBACKMEMBER(int, pfnPciCfgRead, (PPDMIPCIRAWUP pInterface,
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| 232 | uint32_t offCfgSpace,
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| 233 | void *pvValue,
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| 234 | unsigned cb));
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| 235 |
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| 236 | /**
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| 237 | * Request to enable interrupt notifications. Please note that this is purely
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| 238 | * R3 interface, so it's up to implementor to perform necessary machinery
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| 239 | * for communications with host OS kernel driver. Typical implementation will start
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| 240 | * userland thread waiting on shared semaphore (such as using SUPSEMEVENT),
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| 241 | * notified by the kernel interrupt handler, and then will call
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| 242 | * upper port pfnInterruptRequest() based on data provided by the driver.
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| 243 | * This apporach is taken, as calling VBox code from an asyncronous R0
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| 244 | * interrupt handler when VMM may not be even running doesn't look
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| 245 | * like a good idea.
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| 246 | *
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| 247 | * @returns status code
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| 248 | * @param pInterface Pointer to this interface structure.
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| 249 | * @param uGuestIrq Guest IRQ to be passed to pfnInterruptRequest().
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| 250 | *
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| 251 | * @thread Any thread, pfnInterruptRequest() will be usually invoked on a dedicated thread.
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| 252 | */
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| 253 | DECLR3CALLBACKMEMBER(int, pfnEnableInterruptNotifications, (PPDMIPCIRAWUP pInterface, uint8_t uGuestIrq));
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| 254 |
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| 255 | /**
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| 256 | * Request to disable interrupt notifications.
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| 257 | *
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| 258 | * @returns status code
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| 259 | * @param pInterface Pointer to this interface structure.
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| 260 | *
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| 261 | * @thread Any thread.
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| 262 | */
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| 263 | DECLR3CALLBACKMEMBER(int, pfnDisableInterruptNotifications, (PPDMIPCIRAWUP pInterface));
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| 264 |
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| 265 | /** @name Notification APIs.
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| 266 | * @{
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| 267 | */
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| 268 |
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| 269 | /**
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| 270 | * Notify driver when raw PCI device construction starts.
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| 271 | *
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| 272 | * Have to be the first operation as initializes internal state and opens host
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| 273 | * device driver.
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| 274 | *
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| 275 | * @returns status code
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| 276 | * @param pInterface Pointer to this interface structure.
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| 277 | * @param uHostPciAddress Host PCI address of device attached.
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| 278 | * @param uGuestPciAddress Guest PCI address of device attached.
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| 279 | * @param pszDeviceName Human readable device name.
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| 280 | * @param fDeviceFlags Flags for the host device.
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| 281 | * @param pfFlags Flags for virtual device, from the upper driver.
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| 282 | *
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| 283 | * @thread Any thread.
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| 284 | */
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| 285 | DECLR3CALLBACKMEMBER(int, pfnPciDeviceConstructStart, (PPDMIPCIRAWUP pInterface,
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| 286 | uint32_t uHostPciAddress,
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| 287 | uint32_t uGuestPciAddress,
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| 288 | const char *pszDeviceName,
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| 289 | uint32_t fDeviceFlags,
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| 290 | uint32_t *pfFlags));
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| 291 |
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| 292 | /**
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| 293 | * Notify driver when raw PCI device construction completes, so that it may
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| 294 | * perform further actions depending on success or failure of this operation.
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| 295 | * Standard action is to raise global IHostPciDevicePlugEvent.
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| 296 | *
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| 297 | * @param pInterface Pointer to this interface structure.
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| 298 | * @param rc Result code of the operation.
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| 299 | *
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| 300 | * @thread Any thread.
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| 301 | */
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| 302 | DECLR3CALLBACKMEMBER(void, pfnPciDeviceConstructComplete, (PPDMIPCIRAWUP pInterface, int rc));
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| 303 |
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| 304 | /**
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| 305 | * Notify driver on finalization of raw PCI device.
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| 306 | *
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| 307 | * @param pInterface Pointer to this interface structure.
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| 308 | * @param fFlags Flags.
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| 309 | *
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| 310 | * @thread Any thread.
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| 311 | */
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| 312 | DECLR3CALLBACKMEMBER(int, pfnPciDeviceDestruct, (PPDMIPCIRAWUP pInterface, uint32_t fFlags));
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| 313 |
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| 314 | /**
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| 315 | * Notify driver on guest power state change.
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| 316 | *
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| 317 | * @param pInterface Pointer to this interface structure.
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| 318 | * @param enmState New power state.
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| 319 | * @param pu64Param State-specific in/out parameter. For now only used during power-on to provide VM caps.
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| 320 | *
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| 321 | * @thread Any thread.
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| 322 | */
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| 323 | DECLR3CALLBACKMEMBER(int, pfnPciDevicePowerStateChange, (PPDMIPCIRAWUP pInterface,
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| 324 | PCIRAWPOWERSTATE enmState,
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| 325 | uint64_t *pu64Param));
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| 326 |
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| 327 | /**
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| 328 | * Notify driver about runtime error.
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| 329 | *
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| 330 | * @param pInterface Pointer to this interface structure.
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| 331 | * @param fFatal If error is fatal.
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| 332 | * @param pszErrorId Error ID.
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| 333 | * @param pszMessage Error message.
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| 334 | *
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| 335 | * @thread Any thread.
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| 336 | */
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| 337 | DECLR3CALLBACKMEMBER(int, pfnReportRuntimeError, (PPDMIPCIRAWUP pInterface,
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| 338 | bool fFatal,
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| 339 | const char *pszErrorId,
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| 340 | const char *pszMessage));
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| 341 | /** @} */
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| 342 | } PDMIPCIRAWUP;
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| 343 |
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| 344 | /**
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| 345 | * Init R0 PCI module.
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| 346 | */
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| 347 | PCIRAWR0DECL(int) PciRawR0Init(void);
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| 348 | /**
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| 349 | * Process request (in R0).
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| 350 | */
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| 351 | PCIRAWR0DECL(int) PciRawR0ProcessReq(PSUPDRVSESSION pSession, PVM pVM, PPCIRAWSENDREQ pReq);
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| 352 | /**
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| 353 | * Terminate R0 PCI module.
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| 354 | */
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| 355 | PCIRAWR0DECL(void) PciRawR0Term(void);
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| 356 |
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| 357 | /**
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| 358 | * Per-VM R0 module init.
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| 359 | */
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| 360 | PCIRAWR0DECL(int) PciRawR0InitVM(PVM pVM);
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| 361 |
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| 362 | /**
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| 363 | * Per-VM R0 module termination routine.
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| 364 | */
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| 365 | PCIRAWR0DECL(void) PciRawR0TermVM(PVM pVM);
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| 366 |
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| 367 | /**
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| 368 | * Flags returned by pfnPciDeviceConstructStart(), to notify device
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| 369 | * how it shall handle device IO traffic.
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| 370 | */
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| 371 | typedef enum PCIRAWDEVICEFLAGS
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| 372 | {
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| 373 | /** Intercept port IO (R3 PIO always go to the driver). */
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| 374 | PCIRAWRFLAG_CAPTURE_PIO = (1 << 0),
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| 375 | /** Intercept MMIO. */
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| 376 | PCIRAWRFLAG_CAPTURE_MMIO = (1 << 1),
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| 377 | /** Allow bus mastering by physical device (requires IOMMU). */
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| 378 | PCIRAWRFLAG_ALLOW_BM = (1 << 2),
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| 379 | /** Allow R3 MMIO mapping. */
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| 380 | PCIRAWRFLAG_ALLOW_R3MAP = (1 << 3),
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| 381 |
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| 382 | /** The usual 32-bit type blow up. */
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| 383 | PCIRAWRFLAG_32BIT_HACK = 0x7fffffff
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| 384 | } PCIRAWDEVICEFLAGS;
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| 385 |
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| 386 | #define PDMIPCIRAWUP_IID "06daa17f-097b-4ebe-a626-15f467b1de12"
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| 387 | #define PDMIPCIRAW_IID "68c6e4c4-4223-47e0-9134-e3c297992543"
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| 388 |
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| 389 | /** @} */
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| 390 |
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| 391 | RT_C_DECLS_END
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| 392 |
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| 393 | #endif
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