VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 76823

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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
27#define VBOX_INCLUDED_vmm_pdmpcidev_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/pci.h>
33#include <iprt/assert.h>
34
35
36/** @defgroup grp_pdm_pcidev PDM PCI Device
37 * @ingroup grp_pdm_device
38 * @{
39 */
40
41/**
42 * Callback function for reading from the PCI configuration space.
43 *
44 * @returns The register value.
45 * @param pDevIns Pointer to the device instance the PCI device
46 * belongs to.
47 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
48 * @param uAddress The configuration space register address. [0..4096]
49 * @param cb The register size. [1,2,4]
50 *
51 * @remarks Called with the PDM lock held. The device lock is NOT take because
52 * that is very likely be a lock order violation.
53 */
54typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, unsigned cb);
55/** Pointer to a FNPCICONFIGREAD() function. */
56typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
57/** Pointer to a PFNPCICONFIGREAD. */
58typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
59
60/**
61 * Callback function for writing to the PCI configuration space.
62 *
63 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status.
64 *
65 * @param pDevIns Pointer to the device instance the PCI device
66 * belongs to.
67 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
68 * @param uAddress The configuration space register address. [0..4096]
69 * @param u32Value The value that's being written. The number of bits actually used from
70 * this value is determined by the cb parameter.
71 * @param cb The register size. [1,2,4]
72 *
73 * @remarks Called with the PDM lock held. The device lock is NOT take because
74 * that is very likely be a lock order violation.
75 */
76typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
77 uint32_t uAddress, uint32_t u32Value, unsigned cb);
78/** Pointer to a FNPCICONFIGWRITE() function. */
79typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
80/** Pointer to a PFNPCICONFIGWRITE. */
81typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
82
83/**
84 * Callback function for mapping an PCI I/O region.
85 *
86 * @returns VBox status code.
87 * @param pDevIns Pointer to the device instance the PCI device
88 * belongs to.
89 * @param pPciDev Pointer to the PCI device.
90 * @param iRegion The region number.
91 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
92 * is an I/O port, otherwise it's a physical address.
93 *
94 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
95 * that the device deregister access handlers for it and update its internal
96 * state to reflect this.
97 *
98 * @param cb Size of the region in bytes.
99 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
100 *
101 * @remarks Called with the PDM lock held. The device lock is NOT take because
102 * that is very likely be a lock order violation.
103 */
104typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
105 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
106/** Pointer to a FNPCIIOREGIONMAP() function. */
107typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
108
109
110/**
111 * Sets the size and type for old saved states from within a
112 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
113 *
114 * @returns VBox status code.
115 * @param pPciDev Pointer to the PCI device.
116 * @param iRegion The region number.
117 * @param cbRegion The region size.
118 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
119 */
120typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
121/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
122typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
123
124
125
126/*
127 * Hack to include the PDMPCIDEVINT structure at the right place
128 * to avoid duplications of FNPCIIOREGIONMAP and such.
129 */
130#ifdef PDMPCIDEV_INCLUDE_PRIVATE
131# include "pdmpcidevint.h"
132#endif
133
134/**
135 * PDM PCI Device structure.
136 *
137 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
138 * devices associated with it. The first PCI device that it registers
139 * automatically becomes the default PCI device and can be used implicitly
140 * with the device helper APIs. Subsequent PCI devices must be specified
141 * explicitly to the device helper APIs when used.
142 */
143typedef struct PDMPCIDEV
144{
145 /** PCI config space. */
146 uint8_t abConfig[256];
147
148 /** Internal data. */
149 union
150 {
151#ifdef PDMPCIDEVINT_DECLARED
152 PDMPCIDEVINT s;
153#endif
154 uint8_t padding[HC_ARCH_BITS == 32 ? 288 : 384];
155 } Int;
156
157 /** @name Read only data.
158 * @{
159 */
160 /** PCI device number [11:3] and function [2:0] on the pci bus.
161 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
162 uint32_t uDevFn;
163 uint32_t Alignment0; /**< Alignment. */
164 /** Device name. */
165 R3PTRTYPE(const char *) pszNameR3;
166 /** @} */
167
168 /**
169 * Callback for dealing with size changes.
170 *
171 * This is set by the PCI device when needed. It is only needed if any changes
172 * in the PCI resources have been made that may be incompatible with saved state
173 * (i.e. does not reflect configuration, but configuration defaults changed).
174 *
175 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
176 * allocation down in size. There is currently no way of growing resources.
177 * Dropping a resource is automatic.
178 *
179 * @returns VBox status code.
180 * @param pDevIns Pointer to the device instance the PCI device
181 * belongs to.
182 * @param pPciDev Pointer to the PCI device.
183 * @param iRegion The region number or UINT32_MAX if old saved state call.
184 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
185 * call, or 0 for dummy 64-bit top half region.
186 * @param enmType The type being loaded, -1 if old saved state call, or
187 * 0xff if dummy 64-bit top half region.
188 * @param pfnOldSetter Callback for setting size and type for call
189 * regarding old saved states. NULL otherwise.
190 */
191 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
192 uint64_t cbRegion, PCIADDRESSSPACE enmType,
193 PFNPCIIOREGIONOLDSETTER pfnOldSetter));
194} PDMPCIDEV;
195#ifdef PDMPCIDEVINT_DECLARED
196AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
197#endif
198
199
200
201/** @name PDM PCI config space accessor function.
202 * @{
203 */
204
205/** @todo handle extended space access. */
206
207DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
208{
209 Assert(offReg < sizeof(pPciDev->abConfig));
210 pPciDev->abConfig[offReg] = u8Value;
211}
212
213DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
214{
215 Assert(offReg < sizeof(pPciDev->abConfig));
216 return pPciDev->abConfig[offReg];
217}
218
219DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
220{
221 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
222 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
223}
224
225DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
226{
227 uint16_t u16Value;
228 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
229 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
230 return RT_H2LE_U16(u16Value);
231}
232
233DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
234{
235 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
236 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
237}
238
239DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
240{
241 uint32_t u32Value;
242 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
243 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
244 return RT_H2LE_U32(u32Value);
245}
246
247DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
248{
249 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
250 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
251}
252
253DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
254{
255 uint64_t u64Value;
256 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
257 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
258 return RT_H2LE_U64(u64Value);
259}
260
261/**
262 * Sets the vendor id config register.
263 * @param pPciDev The PCI device.
264 * @param u16VendorId The vendor id.
265 */
266DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
267{
268 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
269}
270
271/**
272 * Gets the vendor id config register.
273 * @returns the vendor id.
274 * @param pPciDev The PCI device.
275 */
276DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
277{
278 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
279}
280
281
282/**
283 * Sets the device id config register.
284 * @param pPciDev The PCI device.
285 * @param u16DeviceId The device id.
286 */
287DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
288{
289 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
290}
291
292/**
293 * Gets the device id config register.
294 * @returns the device id.
295 * @param pPciDev The PCI device.
296 */
297DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
298{
299 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
300}
301
302/**
303 * Sets the command config register.
304 *
305 * @param pPciDev The PCI device.
306 * @param u16Command The command register value.
307 */
308DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
309{
310 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
311}
312
313
314/**
315 * Gets the command config register.
316 * @returns The command register value.
317 * @param pPciDev The PCI device.
318 */
319DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
320{
321 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
322}
323
324/**
325 * Checks if the given PCI device is a bus master.
326 * @returns true if the device is a bus master, false if not.
327 * @param pPciDev The PCI device.
328 */
329DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
330{
331 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
332}
333
334/**
335 * Checks if INTx interrupts disabled in the command config register.
336 * @returns true if disabled.
337 * @param pPciDev The PCI device.
338 */
339DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
340{
341 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
342}
343
344/**
345 * Gets the status config register.
346 *
347 * @returns status config register.
348 * @param pPciDev The PCI device.
349 */
350DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
351{
352 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
353}
354
355/**
356 * Sets the status config register.
357 *
358 * @param pPciDev The PCI device.
359 * @param u16Status The status register value.
360 */
361DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
362{
363 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
364}
365
366
367/**
368 * Sets the revision id config register.
369 *
370 * @param pPciDev The PCI device.
371 * @param u8RevisionId The revision id.
372 */
373DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
374{
375 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
376}
377
378
379/**
380 * Sets the register level programming class config register.
381 *
382 * @param pPciDev The PCI device.
383 * @param u8ClassProg The new value.
384 */
385DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
386{
387 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
388}
389
390
391/**
392 * Sets the sub-class (aka device class) config register.
393 *
394 * @param pPciDev The PCI device.
395 * @param u8SubClass The sub-class.
396 */
397DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
398{
399 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
400}
401
402
403/**
404 * Sets the base class config register.
405 *
406 * @param pPciDev The PCI device.
407 * @param u8BaseClass The base class.
408 */
409DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
410{
411 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
412}
413
414/**
415 * Sets the header type config register.
416 *
417 * @param pPciDev The PCI device.
418 * @param u8HdrType The header type.
419 */
420DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
421{
422 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
423}
424
425/**
426 * Gets the header type config register.
427 *
428 * @param pPciDev The PCI device.
429 * @returns u8HdrType The header type.
430 */
431DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
432{
433 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
434}
435
436/**
437 * Sets the BIST (built-in self-test) config register.
438 *
439 * @param pPciDev The PCI device.
440 * @param u8Bist The BIST value.
441 */
442DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
443{
444 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
445}
446
447/**
448 * Gets the BIST (built-in self-test) config register.
449 *
450 * @param pPciDev The PCI device.
451 * @returns u8Bist The BIST.
452 */
453DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
454{
455 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
456}
457
458
459/**
460 * Sets a base address config register.
461 *
462 * @param pPciDev The PCI device.
463 * @param iReg Base address register number (0..5).
464 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
465 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
466 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
467 * @param u32Addr The address value.
468 */
469DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
470 uint32_t u32Addr)
471{
472 if (fIOSpace)
473 {
474 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
475 u32Addr |= RT_BIT_32(0);
476 }
477 else
478 {
479 Assert(!(u32Addr & 0xf));
480 if (fPrefetchable)
481 u32Addr |= RT_BIT_32(3);
482 if (f64Bit)
483 u32Addr |= 0x2 << 1;
484 }
485 switch (iReg)
486 {
487 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
488 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
489 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
490 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
491 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
492 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
493 default: AssertFailedReturnVoid();
494 }
495
496 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
497}
498
499/**
500 * Please document me. I don't seem to be getting as much as calculating
501 * the address of some PCI region.
502 */
503DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
504{
505 return iRegion == VBOX_PCI_ROM_SLOT
506 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
507}
508
509/**
510 * Sets the sub-system vendor id config register.
511 *
512 * @param pPciDev The PCI device.
513 * @param u16SubSysVendorId The sub-system vendor id.
514 */
515DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
516{
517 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
518}
519
520/**
521 * Gets the sub-system vendor id config register.
522 * @returns the sub-system vendor id.
523 * @param pPciDev The PCI device.
524 */
525DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
526{
527 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
528}
529
530
531/**
532 * Sets the sub-system id config register.
533 *
534 * @param pPciDev The PCI device.
535 * @param u16SubSystemId The sub-system id.
536 */
537DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
538{
539 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
540}
541
542/**
543 * Gets the sub-system id config register.
544 * @returns the sub-system id.
545 * @param pPciDev The PCI device.
546 */
547DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
548{
549 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
550}
551
552/**
553 * Sets offset to capability list.
554 *
555 * @param pPciDev The PCI device.
556 * @param u8Offset The offset to capability list.
557 */
558DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
559{
560 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
561}
562
563/**
564 * Returns offset to capability list.
565 *
566 * @returns offset to capability list.
567 * @param pPciDev The PCI device.
568 */
569DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
570{
571 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
572}
573
574/**
575 * Sets the interrupt line config register.
576 *
577 * @param pPciDev The PCI device.
578 * @param u8Line The interrupt line.
579 */
580DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
581{
582 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
583}
584
585/**
586 * Gets the interrupt line config register.
587 *
588 * @returns The interrupt line.
589 * @param pPciDev The PCI device.
590 */
591DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
592{
593 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
594}
595
596/**
597 * Sets the interrupt pin config register.
598 *
599 * @param pPciDev The PCI device.
600 * @param u8Pin The interrupt pin.
601 */
602DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
603{
604 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
605}
606
607/**
608 * Gets the interrupt pin config register.
609 *
610 * @returns The interrupt pin.
611 * @param pPciDev The PCI device.
612 */
613DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
614{
615 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
616}
617
618/** @} */
619
620/** @name Aliases for old function names.
621 * @{
622 */
623#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
624# define PCIDevSetByte PDMPciDevSetByte
625# define PCIDevGetByte PDMPciDevGetByte
626# define PCIDevSetWord PDMPciDevSetWord
627# define PCIDevGetWord PDMPciDevGetWord
628# define PCIDevSetDWord PDMPciDevSetDWord
629# define PCIDevGetDWord PDMPciDevGetDWord
630# define PCIDevSetQWord PDMPciDevSetQWord
631# define PCIDevGetQWord PDMPciDevGetQWord
632# define PCIDevSetVendorId PDMPciDevSetVendorId
633# define PCIDevGetVendorId PDMPciDevGetVendorId
634# define PCIDevSetDeviceId PDMPciDevSetDeviceId
635# define PCIDevGetDeviceId PDMPciDevGetDeviceId
636# define PCIDevSetCommand PDMPciDevSetCommand
637# define PCIDevGetCommand PDMPciDevGetCommand
638# define PCIDevIsBusmaster PDMPciDevIsBusmaster
639# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
640# define PCIDevGetStatus PDMPciDevGetStatus
641# define PCIDevSetStatus PDMPciDevSetStatus
642# define PCIDevSetRevisionId PDMPciDevSetRevisionId
643# define PCIDevSetClassProg PDMPciDevSetClassProg
644# define PCIDevSetClassSub PDMPciDevSetClassSub
645# define PCIDevSetClassBase PDMPciDevSetClassBase
646# define PCIDevSetHeaderType PDMPciDevSetHeaderType
647# define PCIDevGetHeaderType PDMPciDevGetHeaderType
648# define PCIDevSetBIST PDMPciDevSetBIST
649# define PCIDevGetBIST PDMPciDevGetBIST
650# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
651# define PCIDevGetRegionReg PDMPciDevGetRegionReg
652# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
653# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
654# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
655# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
656# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
657# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
658# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
659# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
660# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
661# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
662#endif
663/** @} */
664
665
666/* Special purpose "interface" for getting access to the PDMPCIDEV structure
667 * of a ich9pcibridge instance. This is useful for unusual raw or pass-through
668 * implementation which need to provide different PCI configuration space
669 * content for bridges (as long as we don't allow pass-through of bridges or
670 * custom bridge device implementations). */
671typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
672typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
673
674#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
675
676
677/** @} */
678
679#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */
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