VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 64387

Last change on this file since 64387 was 64387, checked in by vboxsync, 8 years ago

PDM,Devices: Some PCI device type cleanup.

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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmpcidev_h
27#define ___VBox_vmm_pdmpcidev_h
28
29#include <VBox/pci.h>
30#include <iprt/assert.h>
31
32
33/** @defgroup grp_pdm_pcidev PDM PCI Device
34 * @ingroup grp_pdm_device
35 * @{
36 */
37
38/**
39 * Callback function for reading from the PCI configuration space.
40 *
41 * @returns The register value.
42 * @param pDevIns Pointer to the device instance the PCI device
43 * belongs to.
44 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
45 * @param Address The configuration space register address. [0..4096]
46 * @param cb The register size. [1,2,4]
47 *
48 * @remarks Called with the PDM lock held. The device lock is NOT take because
49 * that is very likely be a lock order violation.
50 *
51 * @todo add pDevIns parameter.
52 */
53typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, unsigned cb);
54/** Pointer to a FNPCICONFIGREAD() function. */
55typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
56/** Pointer to a PFNPCICONFIGREAD. */
57typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
58
59/**
60 * Callback function for writing to the PCI configuration space.
61 *
62 * @param pDevIns Pointer to the device instance the PCI device
63 * belongs to.
64 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
65 * @param Address The configuration space register address. [0..4096]
66 * @param u32Value The value that's being written. The number of bits actually used from
67 * this value is determined by the cb parameter.
68 * @param cb The register size. [1,2,4]
69 *
70 * @remarks Called with the PDM lock held. The device lock is NOT take because
71 * that is very likely be a lock order violation.
72 *
73 * @todo add pDevIns parameter and fix iRegion type.
74 */
75typedef DECLCALLBACK(void) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, uint32_t u32Value, unsigned cb);
76/** Pointer to a FNPCICONFIGWRITE() function. */
77typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
78/** Pointer to a PFNPCICONFIGWRITE. */
79typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
80
81/**
82 * Callback function for mapping an PCI I/O region.
83 *
84 * @returns VBox status code.
85 * @param pDevIns Pointer to the device instance the PCI device
86 * belongs to.
87 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
88 * @param iRegion The region number.
89 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
90 * is an I/O port, otherwise it's a physical address.
91 *
92 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
93 * that the device deregister access handlers for it and update its internal
94 * state to reflect this.
95 *
96 * @param cb Size of the region in bytes.
97 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
98 *
99 * @remarks Called with the PDM lock held. The device lock is NOT take because
100 * that is very likely be a lock order violation.
101 *
102 * @todo add pDevIns parameter and fix iRegion type.
103 */
104typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
105 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
106/** Pointer to a FNPCIIOREGIONMAP() function. */
107typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
108
109
110/*
111 * Hack to include the PDMPCIDEVICEINT structure at the right place
112 * to avoid duplications of FNPCIIOREGIONMAP and such.
113 */
114#ifdef PDMPCIDEV_INCLUDE_PRIVATE
115# include "pdmpcidevint.h"
116#endif
117
118/**
119 * PDM PCI Device structure.
120 *
121 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
122 * devices associated with it. The first PCI device that it registers
123 * automatically becomes the default PCI device and can be used implicitly
124 * with the device helper APIs. Subsequent PCI devices must be specified
125 * expeclitly to the device helper APIs when used.
126 */
127typedef struct PDMPCIDEV
128{
129 union
130 {
131 /** PCI config space. */
132 uint8_t abConfig[256];
133#ifndef PDMPCIDEVICE_NO_DEPRECATED
134 /** @deprecated Use abConfig! */
135 uint8_t config[256];
136#endif
137 };
138
139 /** Internal data. */
140 union
141 {
142#ifdef PDMPCIDEVICEINT_DECLARED
143 PDMPCIDEVICEINT s;
144#endif
145 uint8_t padding[HC_ARCH_BITS == 32 ? 272 : 384];
146 } Int;
147
148 /** @name Read only data.
149 * @{
150 */
151 union
152 {
153 /** PCI device number [11:3] and function [2:0] on the pci bus.
154 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
155 uint32_t uDevFn;
156#ifndef PDMPCIDEVICE_NO_DEPRECATED
157 /** @deprecated Use uDevFn! */
158 int32_t devfn;
159#endif
160 };
161 uint32_t Alignment0; /**< Alignment. */
162
163 union
164 {
165 /** Device name. */
166 R3PTRTYPE(const char *) pszNameR3;
167#ifndef PDMPCIDEVICE_NO_DEPRECATED
168 /** @deprecated Use pszNameR3! */
169 R3PTRTYPE(const char *) name;
170#endif
171 };
172 /** Pointer to the device instance which registered the device.
173 * @todo eliminate this one? */
174 PPDMDEVINSR3 pDevIns;
175 /** @} */
176} PDMPCIDEV;
177#ifdef PDMPCIDEVICEINT_DECLARED
178AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
179#endif
180
181
182
183/** @name PDM PCI config space accessor function.
184 * @{
185 */
186
187/** @todo handle extended space access. */
188
189DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
190{
191 Assert(offReg < sizeof(pPciDev->abConfig));
192 pPciDev->abConfig[offReg] = u8Value;
193}
194
195DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
196{
197 Assert(offReg < sizeof(pPciDev->abConfig));
198 return pPciDev->abConfig[offReg];
199}
200
201DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
202{
203 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
204 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
205}
206
207DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
208{
209 uint16_t u16Value;
210 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
211 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
212 return RT_H2LE_U16(u16Value);
213}
214
215DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
216{
217 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
218 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
219}
220
221DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
222{
223 uint32_t u32Value;
224 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
225 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
226 return RT_H2LE_U32(u32Value);
227}
228
229DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
230{
231 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
232 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
233}
234
235DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
236{
237 uint64_t u64Value;
238 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
239 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
240 return RT_H2LE_U64(u64Value);
241}
242
243/**
244 * Sets the vendor id config register.
245 * @param pPciDev The PCI device.
246 * @param u16VendorId The vendor id.
247 */
248DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
249{
250 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
251}
252
253/**
254 * Gets the vendor id config register.
255 * @returns the vendor id.
256 * @param pPciDev The PCI device.
257 */
258DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
259{
260 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
261}
262
263
264/**
265 * Sets the device id config register.
266 * @param pPciDev The PCI device.
267 * @param u16DeviceId The device id.
268 */
269DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
270{
271 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
272}
273
274/**
275 * Gets the device id config register.
276 * @returns the device id.
277 * @param pPciDev The PCI device.
278 */
279DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
280{
281 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
282}
283
284/**
285 * Sets the command config register.
286 *
287 * @param pPciDev The PCI device.
288 * @param u16Command The command register value.
289 */
290DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
291{
292 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
293}
294
295
296/**
297 * Gets the command config register.
298 * @returns The command register value.
299 * @param pPciDev The PCI device.
300 */
301DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
302{
303 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
304}
305
306/**
307 * Checks if the given PCI device is a bus master.
308 * @returns true if the device is a bus master, false if not.
309 * @param pPciDev The PCI device.
310 */
311DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
312{
313 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
314}
315
316/**
317 * Checks if INTx interrupts disabled in the command config register.
318 * @returns true if disabled.
319 * @param pPciDev The PCI device.
320 */
321DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
322{
323 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
324}
325
326/**
327 * Gets the status config register.
328 *
329 * @returns status config register.
330 * @param pPciDev The PCI device.
331 */
332DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
333{
334 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
335}
336
337/**
338 * Sets the status config register.
339 *
340 * @param pPciDev The PCI device.
341 * @param u16Status The status register value.
342 */
343DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
344{
345 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
346}
347
348
349/**
350 * Sets the revision id config register.
351 *
352 * @param pPciDev The PCI device.
353 * @param u8RevisionId The revision id.
354 */
355DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
356{
357 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
358}
359
360
361/**
362 * Sets the register level programming class config register.
363 *
364 * @param pPciDev The PCI device.
365 * @param u8ClassProg The new value.
366 */
367DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
368{
369 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
370}
371
372
373/**
374 * Sets the sub-class (aka device class) config register.
375 *
376 * @param pPciDev The PCI device.
377 * @param u8SubClass The sub-class.
378 */
379DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
380{
381 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
382}
383
384
385/**
386 * Sets the base class config register.
387 *
388 * @param pPciDev The PCI device.
389 * @param u8BaseClass The base class.
390 */
391DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
392{
393 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
394}
395
396/**
397 * Sets the header type config register.
398 *
399 * @param pPciDev The PCI device.
400 * @param u8HdrType The header type.
401 */
402DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
403{
404 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
405}
406
407/**
408 * Gets the header type config register.
409 *
410 * @param pPciDev The PCI device.
411 * @returns u8HdrType The header type.
412 */
413DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
414{
415 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
416}
417
418/**
419 * Sets the BIST (built-in self-test) config register.
420 *
421 * @param pPciDev The PCI device.
422 * @param u8Bist The BIST value.
423 */
424DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
425{
426 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
427}
428
429/**
430 * Gets the BIST (built-in self-test) config register.
431 *
432 * @param pPciDev The PCI device.
433 * @returns u8Bist The BIST.
434 */
435DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
436{
437 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
438}
439
440
441/**
442 * Sets a base address config register.
443 *
444 * @param pPciDev The PCI device.
445 * @param iReg Base address register number (0..5).
446 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
447 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
448 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
449 * @param u32Addr The address value.
450 */
451DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
452 uint32_t u32Addr)
453{
454 if (fIOSpace)
455 {
456 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
457 u32Addr |= RT_BIT_32(0);
458 }
459 else
460 {
461 Assert(!(u32Addr & 0xf));
462 if (fPrefetchable)
463 u32Addr |= RT_BIT_32(3);
464 if (f64Bit)
465 u32Addr |= 0x2 << 1;
466 }
467 switch (iReg)
468 {
469 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
470 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
471 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
472 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
473 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
474 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
475 default: AssertFailedReturnVoid();
476 }
477
478 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
479}
480
481/**
482 * Please document me. I don't seem to be getting as much as calculating
483 * the address of some PCI region.
484 */
485DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
486{
487 return iRegion == VBOX_PCI_ROM_SLOT
488 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
489}
490
491/**
492 * Sets the sub-system vendor id config register.
493 *
494 * @param pPciDev The PCI device.
495 * @param u16SubSysVendorId The sub-system vendor id.
496 */
497DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
498{
499 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
500}
501
502/**
503 * Gets the sub-system vendor id config register.
504 * @returns the sub-system vendor id.
505 * @param pPciDev The PCI device.
506 */
507DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
508{
509 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
510}
511
512
513/**
514 * Sets the sub-system id config register.
515 *
516 * @param pPciDev The PCI device.
517 * @param u16SubSystemId The sub-system id.
518 */
519DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
520{
521 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
522}
523
524/**
525 * Gets the sub-system id config register.
526 * @returns the sub-system id.
527 * @param pPciDev The PCI device.
528 */
529DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
530{
531 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
532}
533
534/**
535 * Sets offset to capability list.
536 *
537 * @param pPciDev The PCI device.
538 * @param u8Offset The offset to capability list.
539 */
540DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
541{
542 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
543}
544
545/**
546 * Returns offset to capability list.
547 *
548 * @returns offset to capability list.
549 * @param pPciDev The PCI device.
550 */
551DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
552{
553 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
554}
555
556/**
557 * Sets the interrupt line config register.
558 *
559 * @param pPciDev The PCI device.
560 * @param u8Line The interrupt line.
561 */
562DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
563{
564 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
565}
566
567/**
568 * Gets the interrupt line config register.
569 *
570 * @returns The interrupt line.
571 * @param pPciDev The PCI device.
572 */
573DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
574{
575 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
576}
577
578/**
579 * Sets the interrupt pin config register.
580 *
581 * @param pPciDev The PCI device.
582 * @param u8Pin The interrupt pin.
583 */
584DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
585{
586 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
587}
588
589/**
590 * Gets the interrupt pin config register.
591 *
592 * @returns The interrupt pin.
593 * @param pPciDev The PCI device.
594 */
595DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
596{
597 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
598}
599
600/** @} */
601
602/** @name Aliases for old function names.
603 * @{
604 */
605#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
606# define PCIDevSetByte PDMPciDevSetByte
607# define PCIDevGetByte PDMPciDevGetByte
608# define PCIDevSetWord PDMPciDevSetWord
609# define PCIDevGetWord PDMPciDevGetWord
610# define PCIDevSetDWord PDMPciDevSetDWord
611# define PCIDevGetDWord PDMPciDevGetDWord
612# define PCIDevSetQWord PDMPciDevSetQWord
613# define PCIDevGetQWord PDMPciDevGetQWord
614# define PCIDevSetVendorId PDMPciDevSetVendorId
615# define PCIDevGetVendorId PDMPciDevGetVendorId
616# define PCIDevSetDeviceId PDMPciDevSetDeviceId
617# define PCIDevGetDeviceId PDMPciDevGetDeviceId
618# define PCIDevSetCommand PDMPciDevSetCommand
619# define PCIDevGetCommand PDMPciDevGetCommand
620# define PCIDevIsBusmaster PDMPciDevIsBusmaster
621# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
622# define PCIDevGetStatus PDMPciDevGetStatus
623# define PCIDevSetStatus PDMPciDevSetStatus
624# define PCIDevSetRevisionId PDMPciDevSetRevisionId
625# define PCIDevSetClassProg PDMPciDevSetClassProg
626# define PCIDevSetClassSub PDMPciDevSetClassSub
627# define PCIDevSetClassBase PDMPciDevSetClassBase
628# define PCIDevSetHeaderType PDMPciDevSetHeaderType
629# define PCIDevGetHeaderType PDMPciDevGetHeaderType
630# define PCIDevSetBIST PDMPciDevSetBIST
631# define PCIDevGetBIST PDMPciDevGetBIST
632# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
633# define PCIDevGetRegionReg PDMPciDevGetRegionReg
634# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
635# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
636# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
637# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
638# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
639# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
640# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
641# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
642# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
643# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
644#endif
645/** @} */
646
647
648/** @} */
649
650#endif
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