1 | /** @file
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2 | * PCI - The PCI Controller And Devices. (DEV)
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2016 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef ___VBox_vmm_pdmpcidev_h
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27 | #define ___VBox_vmm_pdmpcidev_h
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28 |
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29 | #include <VBox/pci.h>
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30 | #include <iprt/assert.h>
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31 |
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32 |
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33 | /** @defgroup grp_pdm_pcidev PDM PCI Device
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34 | * @ingroup grp_pdm_device
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35 | * @{
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36 | */
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37 |
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38 | /**
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39 | * Callback function for reading from the PCI configuration space.
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40 | *
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41 | * @returns The register value.
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42 | * @param pDevIns Pointer to the device instance the PCI device
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43 | * belongs to.
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44 | * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
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45 | * @param Address The configuration space register address. [0..4096]
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46 | * @param cb The register size. [1,2,4]
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47 | *
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48 | * @remarks Called with the PDM lock held. The device lock is NOT take because
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49 | * that is very likely be a lock order violation.
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50 | *
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51 | * @todo add pDevIns parameter.
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52 | */
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53 | typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, unsigned cb);
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54 | /** Pointer to a FNPCICONFIGREAD() function. */
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55 | typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
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56 | /** Pointer to a PFNPCICONFIGREAD. */
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57 | typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
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58 |
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59 | /**
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60 | * Callback function for writing to the PCI configuration space.
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61 | *
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62 | * @param pDevIns Pointer to the device instance the PCI device
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63 | * belongs to.
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64 | * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
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65 | * @param Address The configuration space register address. [0..4096]
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66 | * @param u32Value The value that's being written. The number of bits actually used from
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67 | * this value is determined by the cb parameter.
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68 | * @param cb The register size. [1,2,4]
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69 | *
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70 | * @remarks Called with the PDM lock held. The device lock is NOT take because
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71 | * that is very likely be a lock order violation.
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72 | *
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73 | * @todo add pDevIns parameter and fix iRegion type.
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74 | */
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75 | typedef DECLCALLBACK(void) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, uint32_t u32Value, unsigned cb);
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76 | /** Pointer to a FNPCICONFIGWRITE() function. */
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77 | typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
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78 | /** Pointer to a PFNPCICONFIGWRITE. */
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79 | typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
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80 |
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81 | /**
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82 | * Callback function for mapping an PCI I/O region.
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83 | *
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84 | * @returns VBox status code.
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85 | * @param pDevIns Pointer to the device instance the PCI device
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86 | * belongs to.
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87 | * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
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88 | * @param iRegion The region number.
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89 | * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
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90 | * is an I/O port, otherwise it's a physical address.
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91 | *
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92 | * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
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93 | * that the device deregister access handlers for it and update its internal
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94 | * state to reflect this.
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95 | *
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96 | * @param cb Size of the region in bytes.
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97 | * @param enmType One of the PCI_ADDRESS_SPACE_* values.
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98 | *
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99 | * @remarks Called with the PDM lock held. The device lock is NOT take because
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100 | * that is very likely be a lock order violation.
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101 | *
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102 | * @todo add pDevIns parameter and fix iRegion type.
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103 | */
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104 | typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
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105 | RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
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106 | /** Pointer to a FNPCIIOREGIONMAP() function. */
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107 | typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
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108 |
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109 |
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110 | /*
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111 | * Hack to include the PDMPCIDEVICEINT structure at the right place
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112 | * to avoid duplications of FNPCIIOREGIONMAP and such.
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113 | */
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114 | #ifdef PDMPCIDEV_INCLUDE_PRIVATE
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115 | # include "pdmpcidevint.h"
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116 | #endif
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117 |
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118 | /**
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119 | * PDM PCI Device structure.
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120 | *
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121 | * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
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122 | * devices associated with it. The first PCI device that it registers
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123 | * automatically becomes the default PCI device and can be used implicitly
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124 | * with the device helper APIs. Subsequent PCI devices must be specified
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125 | * expeclitly to the device helper APIs when used.
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126 | */
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127 | typedef struct PDMPCIDEV
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128 | {
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129 | union
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130 | {
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131 | /** PCI config space. */
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132 | uint8_t abConfig[256];
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133 | #ifndef PDMPCIDEVICE_NO_DEPRECATED
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134 | /** @deprecated Use abConfig! */
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135 | uint8_t config[256];
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136 | #endif
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137 | };
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138 |
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139 | /** Internal data. */
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140 | union
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141 | {
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142 | #ifdef PDMPCIDEVICEINT_DECLARED
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143 | PDMPCIDEVICEINT s;
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144 | #endif
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145 | uint8_t padding[HC_ARCH_BITS == 32 ? 272 : 384];
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146 | } Int;
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147 |
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148 | /** @name Read only data.
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149 | * @{
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150 | */
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151 | /** PCI device number [11:3] and function [2:0] on the pci bus.
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152 | * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
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153 | uint32_t uDevFn;
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154 | uint32_t Alignment0; /**< Alignment. */
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155 |
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156 | union
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157 | {
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158 | /** Device name. */
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159 | R3PTRTYPE(const char *) pszNameR3;
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160 | #ifndef PDMPCIDEVICE_NO_DEPRECATED
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161 | /** @deprecated Use pszNameR3! */
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162 | R3PTRTYPE(const char *) name;
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163 | #endif
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164 | };
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165 | /** Reserved. */
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166 | RTR3PTR pvReserved;
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167 | /** @} */
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168 | } PDMPCIDEV;
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169 | #ifdef PDMPCIDEVICEINT_DECLARED
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170 | AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
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171 | #endif
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172 |
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173 |
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174 |
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175 | /** @name PDM PCI config space accessor function.
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176 | * @{
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177 | */
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178 |
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179 | /** @todo handle extended space access. */
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180 |
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181 | DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
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182 | {
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183 | Assert(offReg < sizeof(pPciDev->abConfig));
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184 | pPciDev->abConfig[offReg] = u8Value;
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185 | }
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186 |
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187 | DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
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188 | {
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189 | Assert(offReg < sizeof(pPciDev->abConfig));
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190 | return pPciDev->abConfig[offReg];
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191 | }
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192 |
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193 | DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
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194 | {
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195 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
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196 | *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
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197 | }
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198 |
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199 | DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
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200 | {
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201 | uint16_t u16Value;
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202 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
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203 | u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
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204 | return RT_H2LE_U16(u16Value);
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205 | }
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206 |
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207 | DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
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208 | {
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209 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
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210 | *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
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211 | }
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212 |
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213 | DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
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214 | {
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215 | uint32_t u32Value;
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216 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
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217 | u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
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218 | return RT_H2LE_U32(u32Value);
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219 | }
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220 |
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221 | DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
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222 | {
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223 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
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224 | *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
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225 | }
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226 |
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227 | DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
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228 | {
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229 | uint64_t u64Value;
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230 | Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
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231 | u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
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232 | return RT_H2LE_U64(u64Value);
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233 | }
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234 |
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235 | /**
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236 | * Sets the vendor id config register.
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237 | * @param pPciDev The PCI device.
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238 | * @param u16VendorId The vendor id.
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239 | */
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240 | DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
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241 | {
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242 | PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
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243 | }
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244 |
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245 | /**
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246 | * Gets the vendor id config register.
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247 | * @returns the vendor id.
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248 | * @param pPciDev The PCI device.
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249 | */
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250 | DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
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251 | {
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252 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
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253 | }
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254 |
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255 |
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256 | /**
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257 | * Sets the device id config register.
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258 | * @param pPciDev The PCI device.
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259 | * @param u16DeviceId The device id.
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260 | */
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261 | DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
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262 | {
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263 | PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
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264 | }
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265 |
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266 | /**
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267 | * Gets the device id config register.
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268 | * @returns the device id.
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269 | * @param pPciDev The PCI device.
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270 | */
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271 | DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
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272 | {
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273 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
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274 | }
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275 |
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276 | /**
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277 | * Sets the command config register.
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278 | *
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279 | * @param pPciDev The PCI device.
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280 | * @param u16Command The command register value.
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281 | */
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282 | DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
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283 | {
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284 | PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
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285 | }
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286 |
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287 |
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288 | /**
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289 | * Gets the command config register.
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290 | * @returns The command register value.
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291 | * @param pPciDev The PCI device.
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292 | */
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293 | DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
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294 | {
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295 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
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296 | }
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297 |
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298 | /**
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299 | * Checks if the given PCI device is a bus master.
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300 | * @returns true if the device is a bus master, false if not.
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301 | * @param pPciDev The PCI device.
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302 | */
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303 | DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
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304 | {
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305 | return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
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306 | }
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307 |
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308 | /**
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309 | * Checks if INTx interrupts disabled in the command config register.
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310 | * @returns true if disabled.
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311 | * @param pPciDev The PCI device.
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312 | */
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313 | DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
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314 | {
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315 | return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
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316 | }
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317 |
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318 | /**
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319 | * Gets the status config register.
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320 | *
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321 | * @returns status config register.
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322 | * @param pPciDev The PCI device.
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323 | */
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324 | DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
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325 | {
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326 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
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327 | }
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328 |
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329 | /**
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330 | * Sets the status config register.
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331 | *
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332 | * @param pPciDev The PCI device.
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333 | * @param u16Status The status register value.
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334 | */
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335 | DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
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336 | {
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337 | PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
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338 | }
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339 |
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340 |
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341 | /**
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342 | * Sets the revision id config register.
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343 | *
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344 | * @param pPciDev The PCI device.
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345 | * @param u8RevisionId The revision id.
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346 | */
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347 | DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
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348 | {
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349 | PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
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350 | }
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351 |
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352 |
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353 | /**
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354 | * Sets the register level programming class config register.
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355 | *
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356 | * @param pPciDev The PCI device.
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357 | * @param u8ClassProg The new value.
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358 | */
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359 | DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
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360 | {
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361 | PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
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362 | }
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363 |
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364 |
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365 | /**
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366 | * Sets the sub-class (aka device class) config register.
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367 | *
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368 | * @param pPciDev The PCI device.
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369 | * @param u8SubClass The sub-class.
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370 | */
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371 | DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
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372 | {
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373 | PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
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374 | }
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375 |
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376 |
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377 | /**
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378 | * Sets the base class config register.
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379 | *
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380 | * @param pPciDev The PCI device.
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381 | * @param u8BaseClass The base class.
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382 | */
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383 | DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
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384 | {
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385 | PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
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386 | }
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387 |
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388 | /**
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389 | * Sets the header type config register.
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390 | *
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391 | * @param pPciDev The PCI device.
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392 | * @param u8HdrType The header type.
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393 | */
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394 | DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
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395 | {
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396 | PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
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397 | }
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398 |
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399 | /**
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400 | * Gets the header type config register.
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401 | *
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402 | * @param pPciDev The PCI device.
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403 | * @returns u8HdrType The header type.
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404 | */
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405 | DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
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406 | {
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407 | return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
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408 | }
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409 |
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410 | /**
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411 | * Sets the BIST (built-in self-test) config register.
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412 | *
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413 | * @param pPciDev The PCI device.
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414 | * @param u8Bist The BIST value.
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415 | */
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416 | DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
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417 | {
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418 | PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
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419 | }
|
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420 |
|
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421 | /**
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422 | * Gets the BIST (built-in self-test) config register.
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423 | *
|
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424 | * @param pPciDev The PCI device.
|
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425 | * @returns u8Bist The BIST.
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426 | */
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427 | DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
|
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428 | {
|
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429 | return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
|
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430 | }
|
---|
431 |
|
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432 |
|
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433 | /**
|
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434 | * Sets a base address config register.
|
---|
435 | *
|
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436 | * @param pPciDev The PCI device.
|
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437 | * @param iReg Base address register number (0..5).
|
---|
438 | * @param fIOSpace Whether it's I/O (true) or memory (false) space.
|
---|
439 | * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
|
---|
440 | * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
|
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441 | * @param u32Addr The address value.
|
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442 | */
|
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443 | DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
|
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444 | uint32_t u32Addr)
|
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445 | {
|
---|
446 | if (fIOSpace)
|
---|
447 | {
|
---|
448 | Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
|
---|
449 | u32Addr |= RT_BIT_32(0);
|
---|
450 | }
|
---|
451 | else
|
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452 | {
|
---|
453 | Assert(!(u32Addr & 0xf));
|
---|
454 | if (fPrefetchable)
|
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455 | u32Addr |= RT_BIT_32(3);
|
---|
456 | if (f64Bit)
|
---|
457 | u32Addr |= 0x2 << 1;
|
---|
458 | }
|
---|
459 | switch (iReg)
|
---|
460 | {
|
---|
461 | case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
|
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462 | case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
|
---|
463 | case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
|
---|
464 | case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
|
---|
465 | case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
|
---|
466 | case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
|
---|
467 | default: AssertFailedReturnVoid();
|
---|
468 | }
|
---|
469 |
|
---|
470 | PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
|
---|
471 | }
|
---|
472 |
|
---|
473 | /**
|
---|
474 | * Please document me. I don't seem to be getting as much as calculating
|
---|
475 | * the address of some PCI region.
|
---|
476 | */
|
---|
477 | DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
|
---|
478 | {
|
---|
479 | return iRegion == VBOX_PCI_ROM_SLOT
|
---|
480 | ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
|
---|
481 | }
|
---|
482 |
|
---|
483 | /**
|
---|
484 | * Sets the sub-system vendor id config register.
|
---|
485 | *
|
---|
486 | * @param pPciDev The PCI device.
|
---|
487 | * @param u16SubSysVendorId The sub-system vendor id.
|
---|
488 | */
|
---|
489 | DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
|
---|
490 | {
|
---|
491 | PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
|
---|
492 | }
|
---|
493 |
|
---|
494 | /**
|
---|
495 | * Gets the sub-system vendor id config register.
|
---|
496 | * @returns the sub-system vendor id.
|
---|
497 | * @param pPciDev The PCI device.
|
---|
498 | */
|
---|
499 | DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
|
---|
500 | {
|
---|
501 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
|
---|
502 | }
|
---|
503 |
|
---|
504 |
|
---|
505 | /**
|
---|
506 | * Sets the sub-system id config register.
|
---|
507 | *
|
---|
508 | * @param pPciDev The PCI device.
|
---|
509 | * @param u16SubSystemId The sub-system id.
|
---|
510 | */
|
---|
511 | DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
|
---|
512 | {
|
---|
513 | PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
|
---|
514 | }
|
---|
515 |
|
---|
516 | /**
|
---|
517 | * Gets the sub-system id config register.
|
---|
518 | * @returns the sub-system id.
|
---|
519 | * @param pPciDev The PCI device.
|
---|
520 | */
|
---|
521 | DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
|
---|
522 | {
|
---|
523 | return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
|
---|
524 | }
|
---|
525 |
|
---|
526 | /**
|
---|
527 | * Sets offset to capability list.
|
---|
528 | *
|
---|
529 | * @param pPciDev The PCI device.
|
---|
530 | * @param u8Offset The offset to capability list.
|
---|
531 | */
|
---|
532 | DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
|
---|
533 | {
|
---|
534 | PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
|
---|
535 | }
|
---|
536 |
|
---|
537 | /**
|
---|
538 | * Returns offset to capability list.
|
---|
539 | *
|
---|
540 | * @returns offset to capability list.
|
---|
541 | * @param pPciDev The PCI device.
|
---|
542 | */
|
---|
543 | DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
|
---|
544 | {
|
---|
545 | return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
|
---|
546 | }
|
---|
547 |
|
---|
548 | /**
|
---|
549 | * Sets the interrupt line config register.
|
---|
550 | *
|
---|
551 | * @param pPciDev The PCI device.
|
---|
552 | * @param u8Line The interrupt line.
|
---|
553 | */
|
---|
554 | DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
|
---|
555 | {
|
---|
556 | PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
|
---|
557 | }
|
---|
558 |
|
---|
559 | /**
|
---|
560 | * Gets the interrupt line config register.
|
---|
561 | *
|
---|
562 | * @returns The interrupt line.
|
---|
563 | * @param pPciDev The PCI device.
|
---|
564 | */
|
---|
565 | DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
|
---|
566 | {
|
---|
567 | return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
|
---|
568 | }
|
---|
569 |
|
---|
570 | /**
|
---|
571 | * Sets the interrupt pin config register.
|
---|
572 | *
|
---|
573 | * @param pPciDev The PCI device.
|
---|
574 | * @param u8Pin The interrupt pin.
|
---|
575 | */
|
---|
576 | DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
|
---|
577 | {
|
---|
578 | PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
|
---|
579 | }
|
---|
580 |
|
---|
581 | /**
|
---|
582 | * Gets the interrupt pin config register.
|
---|
583 | *
|
---|
584 | * @returns The interrupt pin.
|
---|
585 | * @param pPciDev The PCI device.
|
---|
586 | */
|
---|
587 | DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
|
---|
588 | {
|
---|
589 | return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
|
---|
590 | }
|
---|
591 |
|
---|
592 | /** @} */
|
---|
593 |
|
---|
594 | /** @name Aliases for old function names.
|
---|
595 | * @{
|
---|
596 | */
|
---|
597 | #if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
|
---|
598 | # define PCIDevSetByte PDMPciDevSetByte
|
---|
599 | # define PCIDevGetByte PDMPciDevGetByte
|
---|
600 | # define PCIDevSetWord PDMPciDevSetWord
|
---|
601 | # define PCIDevGetWord PDMPciDevGetWord
|
---|
602 | # define PCIDevSetDWord PDMPciDevSetDWord
|
---|
603 | # define PCIDevGetDWord PDMPciDevGetDWord
|
---|
604 | # define PCIDevSetQWord PDMPciDevSetQWord
|
---|
605 | # define PCIDevGetQWord PDMPciDevGetQWord
|
---|
606 | # define PCIDevSetVendorId PDMPciDevSetVendorId
|
---|
607 | # define PCIDevGetVendorId PDMPciDevGetVendorId
|
---|
608 | # define PCIDevSetDeviceId PDMPciDevSetDeviceId
|
---|
609 | # define PCIDevGetDeviceId PDMPciDevGetDeviceId
|
---|
610 | # define PCIDevSetCommand PDMPciDevSetCommand
|
---|
611 | # define PCIDevGetCommand PDMPciDevGetCommand
|
---|
612 | # define PCIDevIsBusmaster PDMPciDevIsBusmaster
|
---|
613 | # define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
|
---|
614 | # define PCIDevGetStatus PDMPciDevGetStatus
|
---|
615 | # define PCIDevSetStatus PDMPciDevSetStatus
|
---|
616 | # define PCIDevSetRevisionId PDMPciDevSetRevisionId
|
---|
617 | # define PCIDevSetClassProg PDMPciDevSetClassProg
|
---|
618 | # define PCIDevSetClassSub PDMPciDevSetClassSub
|
---|
619 | # define PCIDevSetClassBase PDMPciDevSetClassBase
|
---|
620 | # define PCIDevSetHeaderType PDMPciDevSetHeaderType
|
---|
621 | # define PCIDevGetHeaderType PDMPciDevGetHeaderType
|
---|
622 | # define PCIDevSetBIST PDMPciDevSetBIST
|
---|
623 | # define PCIDevGetBIST PDMPciDevGetBIST
|
---|
624 | # define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
|
---|
625 | # define PCIDevGetRegionReg PDMPciDevGetRegionReg
|
---|
626 | # define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
|
---|
627 | # define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
|
---|
628 | # define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
|
---|
629 | # define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
|
---|
630 | # define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
|
---|
631 | # define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
|
---|
632 | # define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
|
---|
633 | # define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
|
---|
634 | # define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
|
---|
635 | # define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
|
---|
636 | #endif
|
---|
637 | /** @} */
|
---|
638 |
|
---|
639 |
|
---|
640 | /** @} */
|
---|
641 |
|
---|
642 | #endif
|
---|