VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 64391

Last change on this file since 64391 was 64391, checked in by vboxsync, 8 years ago

PDMPCIDEV: s/devfn/uDevFn/ everywhere, removing the legacy alias.

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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2016 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmpcidev_h
27#define ___VBox_vmm_pdmpcidev_h
28
29#include <VBox/pci.h>
30#include <iprt/assert.h>
31
32
33/** @defgroup grp_pdm_pcidev PDM PCI Device
34 * @ingroup grp_pdm_device
35 * @{
36 */
37
38/**
39 * Callback function for reading from the PCI configuration space.
40 *
41 * @returns The register value.
42 * @param pDevIns Pointer to the device instance the PCI device
43 * belongs to.
44 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
45 * @param Address The configuration space register address. [0..4096]
46 * @param cb The register size. [1,2,4]
47 *
48 * @remarks Called with the PDM lock held. The device lock is NOT take because
49 * that is very likely be a lock order violation.
50 *
51 * @todo add pDevIns parameter.
52 */
53typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, unsigned cb);
54/** Pointer to a FNPCICONFIGREAD() function. */
55typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
56/** Pointer to a PFNPCICONFIGREAD. */
57typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
58
59/**
60 * Callback function for writing to the PCI configuration space.
61 *
62 * @param pDevIns Pointer to the device instance the PCI device
63 * belongs to.
64 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
65 * @param Address The configuration space register address. [0..4096]
66 * @param u32Value The value that's being written. The number of bits actually used from
67 * this value is determined by the cb parameter.
68 * @param cb The register size. [1,2,4]
69 *
70 * @remarks Called with the PDM lock held. The device lock is NOT take because
71 * that is very likely be a lock order violation.
72 *
73 * @todo add pDevIns parameter and fix iRegion type.
74 */
75typedef DECLCALLBACK(void) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, uint32_t u32Value, unsigned cb);
76/** Pointer to a FNPCICONFIGWRITE() function. */
77typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
78/** Pointer to a PFNPCICONFIGWRITE. */
79typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
80
81/**
82 * Callback function for mapping an PCI I/O region.
83 *
84 * @returns VBox status code.
85 * @param pDevIns Pointer to the device instance the PCI device
86 * belongs to.
87 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
88 * @param iRegion The region number.
89 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
90 * is an I/O port, otherwise it's a physical address.
91 *
92 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
93 * that the device deregister access handlers for it and update its internal
94 * state to reflect this.
95 *
96 * @param cb Size of the region in bytes.
97 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
98 *
99 * @remarks Called with the PDM lock held. The device lock is NOT take because
100 * that is very likely be a lock order violation.
101 *
102 * @todo add pDevIns parameter and fix iRegion type.
103 */
104typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
105 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
106/** Pointer to a FNPCIIOREGIONMAP() function. */
107typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
108
109
110/*
111 * Hack to include the PDMPCIDEVICEINT structure at the right place
112 * to avoid duplications of FNPCIIOREGIONMAP and such.
113 */
114#ifdef PDMPCIDEV_INCLUDE_PRIVATE
115# include "pdmpcidevint.h"
116#endif
117
118/**
119 * PDM PCI Device structure.
120 *
121 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
122 * devices associated with it. The first PCI device that it registers
123 * automatically becomes the default PCI device and can be used implicitly
124 * with the device helper APIs. Subsequent PCI devices must be specified
125 * expeclitly to the device helper APIs when used.
126 */
127typedef struct PDMPCIDEV
128{
129 union
130 {
131 /** PCI config space. */
132 uint8_t abConfig[256];
133#ifndef PDMPCIDEVICE_NO_DEPRECATED
134 /** @deprecated Use abConfig! */
135 uint8_t config[256];
136#endif
137 };
138
139 /** Internal data. */
140 union
141 {
142#ifdef PDMPCIDEVICEINT_DECLARED
143 PDMPCIDEVICEINT s;
144#endif
145 uint8_t padding[HC_ARCH_BITS == 32 ? 272 : 384];
146 } Int;
147
148 /** @name Read only data.
149 * @{
150 */
151 /** PCI device number [11:3] and function [2:0] on the pci bus.
152 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
153 uint32_t uDevFn;
154 uint32_t Alignment0; /**< Alignment. */
155
156 union
157 {
158 /** Device name. */
159 R3PTRTYPE(const char *) pszNameR3;
160#ifndef PDMPCIDEVICE_NO_DEPRECATED
161 /** @deprecated Use pszNameR3! */
162 R3PTRTYPE(const char *) name;
163#endif
164 };
165 /** Reserved. */
166 RTR3PTR pvReserved;
167 /** @} */
168} PDMPCIDEV;
169#ifdef PDMPCIDEVICEINT_DECLARED
170AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
171#endif
172
173
174
175/** @name PDM PCI config space accessor function.
176 * @{
177 */
178
179/** @todo handle extended space access. */
180
181DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
182{
183 Assert(offReg < sizeof(pPciDev->abConfig));
184 pPciDev->abConfig[offReg] = u8Value;
185}
186
187DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
188{
189 Assert(offReg < sizeof(pPciDev->abConfig));
190 return pPciDev->abConfig[offReg];
191}
192
193DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
194{
195 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
196 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
197}
198
199DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
200{
201 uint16_t u16Value;
202 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
203 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
204 return RT_H2LE_U16(u16Value);
205}
206
207DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
208{
209 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
210 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
211}
212
213DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
214{
215 uint32_t u32Value;
216 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
217 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
218 return RT_H2LE_U32(u32Value);
219}
220
221DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
222{
223 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
224 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
225}
226
227DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
228{
229 uint64_t u64Value;
230 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
231 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
232 return RT_H2LE_U64(u64Value);
233}
234
235/**
236 * Sets the vendor id config register.
237 * @param pPciDev The PCI device.
238 * @param u16VendorId The vendor id.
239 */
240DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
241{
242 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
243}
244
245/**
246 * Gets the vendor id config register.
247 * @returns the vendor id.
248 * @param pPciDev The PCI device.
249 */
250DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
251{
252 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
253}
254
255
256/**
257 * Sets the device id config register.
258 * @param pPciDev The PCI device.
259 * @param u16DeviceId The device id.
260 */
261DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
262{
263 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
264}
265
266/**
267 * Gets the device id config register.
268 * @returns the device id.
269 * @param pPciDev The PCI device.
270 */
271DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
272{
273 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
274}
275
276/**
277 * Sets the command config register.
278 *
279 * @param pPciDev The PCI device.
280 * @param u16Command The command register value.
281 */
282DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
283{
284 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
285}
286
287
288/**
289 * Gets the command config register.
290 * @returns The command register value.
291 * @param pPciDev The PCI device.
292 */
293DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
294{
295 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
296}
297
298/**
299 * Checks if the given PCI device is a bus master.
300 * @returns true if the device is a bus master, false if not.
301 * @param pPciDev The PCI device.
302 */
303DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
304{
305 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
306}
307
308/**
309 * Checks if INTx interrupts disabled in the command config register.
310 * @returns true if disabled.
311 * @param pPciDev The PCI device.
312 */
313DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
314{
315 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
316}
317
318/**
319 * Gets the status config register.
320 *
321 * @returns status config register.
322 * @param pPciDev The PCI device.
323 */
324DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
325{
326 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
327}
328
329/**
330 * Sets the status config register.
331 *
332 * @param pPciDev The PCI device.
333 * @param u16Status The status register value.
334 */
335DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
336{
337 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
338}
339
340
341/**
342 * Sets the revision id config register.
343 *
344 * @param pPciDev The PCI device.
345 * @param u8RevisionId The revision id.
346 */
347DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
348{
349 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
350}
351
352
353/**
354 * Sets the register level programming class config register.
355 *
356 * @param pPciDev The PCI device.
357 * @param u8ClassProg The new value.
358 */
359DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
360{
361 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
362}
363
364
365/**
366 * Sets the sub-class (aka device class) config register.
367 *
368 * @param pPciDev The PCI device.
369 * @param u8SubClass The sub-class.
370 */
371DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
372{
373 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
374}
375
376
377/**
378 * Sets the base class config register.
379 *
380 * @param pPciDev The PCI device.
381 * @param u8BaseClass The base class.
382 */
383DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
384{
385 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
386}
387
388/**
389 * Sets the header type config register.
390 *
391 * @param pPciDev The PCI device.
392 * @param u8HdrType The header type.
393 */
394DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
395{
396 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
397}
398
399/**
400 * Gets the header type config register.
401 *
402 * @param pPciDev The PCI device.
403 * @returns u8HdrType The header type.
404 */
405DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
406{
407 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
408}
409
410/**
411 * Sets the BIST (built-in self-test) config register.
412 *
413 * @param pPciDev The PCI device.
414 * @param u8Bist The BIST value.
415 */
416DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
417{
418 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
419}
420
421/**
422 * Gets the BIST (built-in self-test) config register.
423 *
424 * @param pPciDev The PCI device.
425 * @returns u8Bist The BIST.
426 */
427DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
428{
429 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
430}
431
432
433/**
434 * Sets a base address config register.
435 *
436 * @param pPciDev The PCI device.
437 * @param iReg Base address register number (0..5).
438 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
439 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
440 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
441 * @param u32Addr The address value.
442 */
443DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
444 uint32_t u32Addr)
445{
446 if (fIOSpace)
447 {
448 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
449 u32Addr |= RT_BIT_32(0);
450 }
451 else
452 {
453 Assert(!(u32Addr & 0xf));
454 if (fPrefetchable)
455 u32Addr |= RT_BIT_32(3);
456 if (f64Bit)
457 u32Addr |= 0x2 << 1;
458 }
459 switch (iReg)
460 {
461 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
462 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
463 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
464 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
465 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
466 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
467 default: AssertFailedReturnVoid();
468 }
469
470 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
471}
472
473/**
474 * Please document me. I don't seem to be getting as much as calculating
475 * the address of some PCI region.
476 */
477DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
478{
479 return iRegion == VBOX_PCI_ROM_SLOT
480 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
481}
482
483/**
484 * Sets the sub-system vendor id config register.
485 *
486 * @param pPciDev The PCI device.
487 * @param u16SubSysVendorId The sub-system vendor id.
488 */
489DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
490{
491 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
492}
493
494/**
495 * Gets the sub-system vendor id config register.
496 * @returns the sub-system vendor id.
497 * @param pPciDev The PCI device.
498 */
499DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
500{
501 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
502}
503
504
505/**
506 * Sets the sub-system id config register.
507 *
508 * @param pPciDev The PCI device.
509 * @param u16SubSystemId The sub-system id.
510 */
511DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
512{
513 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
514}
515
516/**
517 * Gets the sub-system id config register.
518 * @returns the sub-system id.
519 * @param pPciDev The PCI device.
520 */
521DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
522{
523 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
524}
525
526/**
527 * Sets offset to capability list.
528 *
529 * @param pPciDev The PCI device.
530 * @param u8Offset The offset to capability list.
531 */
532DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
533{
534 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
535}
536
537/**
538 * Returns offset to capability list.
539 *
540 * @returns offset to capability list.
541 * @param pPciDev The PCI device.
542 */
543DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
544{
545 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
546}
547
548/**
549 * Sets the interrupt line config register.
550 *
551 * @param pPciDev The PCI device.
552 * @param u8Line The interrupt line.
553 */
554DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
555{
556 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
557}
558
559/**
560 * Gets the interrupt line config register.
561 *
562 * @returns The interrupt line.
563 * @param pPciDev The PCI device.
564 */
565DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
566{
567 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
568}
569
570/**
571 * Sets the interrupt pin config register.
572 *
573 * @param pPciDev The PCI device.
574 * @param u8Pin The interrupt pin.
575 */
576DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
577{
578 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
579}
580
581/**
582 * Gets the interrupt pin config register.
583 *
584 * @returns The interrupt pin.
585 * @param pPciDev The PCI device.
586 */
587DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
588{
589 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
590}
591
592/** @} */
593
594/** @name Aliases for old function names.
595 * @{
596 */
597#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
598# define PCIDevSetByte PDMPciDevSetByte
599# define PCIDevGetByte PDMPciDevGetByte
600# define PCIDevSetWord PDMPciDevSetWord
601# define PCIDevGetWord PDMPciDevGetWord
602# define PCIDevSetDWord PDMPciDevSetDWord
603# define PCIDevGetDWord PDMPciDevGetDWord
604# define PCIDevSetQWord PDMPciDevSetQWord
605# define PCIDevGetQWord PDMPciDevGetQWord
606# define PCIDevSetVendorId PDMPciDevSetVendorId
607# define PCIDevGetVendorId PDMPciDevGetVendorId
608# define PCIDevSetDeviceId PDMPciDevSetDeviceId
609# define PCIDevGetDeviceId PDMPciDevGetDeviceId
610# define PCIDevSetCommand PDMPciDevSetCommand
611# define PCIDevGetCommand PDMPciDevGetCommand
612# define PCIDevIsBusmaster PDMPciDevIsBusmaster
613# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
614# define PCIDevGetStatus PDMPciDevGetStatus
615# define PCIDevSetStatus PDMPciDevSetStatus
616# define PCIDevSetRevisionId PDMPciDevSetRevisionId
617# define PCIDevSetClassProg PDMPciDevSetClassProg
618# define PCIDevSetClassSub PDMPciDevSetClassSub
619# define PCIDevSetClassBase PDMPciDevSetClassBase
620# define PCIDevSetHeaderType PDMPciDevSetHeaderType
621# define PCIDevGetHeaderType PDMPciDevGetHeaderType
622# define PCIDevSetBIST PDMPciDevSetBIST
623# define PCIDevGetBIST PDMPciDevGetBIST
624# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
625# define PCIDevGetRegionReg PDMPciDevGetRegionReg
626# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
627# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
628# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
629# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
630# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
631# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
632# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
633# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
634# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
635# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
636#endif
637/** @} */
638
639
640/** @} */
641
642#endif
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