VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 78865

Last change on this file since 78865 was 77299, checked in by vboxsync, 6 years ago

DevVGA,PCI,PGM: Hacks for making it possible to load saved states of the VBoxSVGA device with the 'wrong' BAR layout. bugref:9359

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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
27#define VBOX_INCLUDED_vmm_pdmpcidev_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/pci.h>
33#include <iprt/assert.h>
34
35
36/** @defgroup grp_pdm_pcidev PDM PCI Device
37 * @ingroup grp_pdm_device
38 * @{
39 */
40
41/**
42 * Callback function for reading from the PCI configuration space.
43 *
44 * @returns The register value.
45 * @param pDevIns Pointer to the device instance the PCI device
46 * belongs to.
47 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
48 * @param uAddress The configuration space register address. [0..4096]
49 * @param cb The register size. [1,2,4]
50 *
51 * @remarks Called with the PDM lock held. The device lock is NOT take because
52 * that is very likely be a lock order violation.
53 */
54typedef DECLCALLBACK(uint32_t) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t uAddress, unsigned cb);
55/** Pointer to a FNPCICONFIGREAD() function. */
56typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
57/** Pointer to a PFNPCICONFIGREAD. */
58typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
59
60/**
61 * Callback function for writing to the PCI configuration space.
62 *
63 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status.
64 *
65 * @param pDevIns Pointer to the device instance the PCI device
66 * belongs to.
67 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
68 * @param uAddress The configuration space register address. [0..4096]
69 * @param u32Value The value that's being written. The number of bits actually used from
70 * this value is determined by the cb parameter.
71 * @param cb The register size. [1,2,4]
72 *
73 * @remarks Called with the PDM lock held. The device lock is NOT take because
74 * that is very likely be a lock order violation.
75 */
76typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
77 uint32_t uAddress, uint32_t u32Value, unsigned cb);
78/** Pointer to a FNPCICONFIGWRITE() function. */
79typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
80/** Pointer to a PFNPCICONFIGWRITE. */
81typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
82
83/**
84 * Callback function for mapping an PCI I/O region.
85 *
86 * @returns VBox status code.
87 * @param pDevIns Pointer to the device instance the PCI device
88 * belongs to.
89 * @param pPciDev Pointer to the PCI device.
90 * @param iRegion The region number.
91 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
92 * is an I/O port, otherwise it's a physical address.
93 *
94 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
95 * that the device deregister access handlers for it and update its internal
96 * state to reflect this.
97 *
98 * @param cb Size of the region in bytes.
99 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
100 *
101 * @remarks Called with the PDM lock held. The device lock is NOT take because
102 * that is very likely be a lock order violation.
103 */
104typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
105 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
106/** Pointer to a FNPCIIOREGIONMAP() function. */
107typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
108
109
110/**
111 * Sets the size and type for old saved states from within a
112 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
113 *
114 * @returns VBox status code.
115 * @param pPciDev Pointer to the PCI device.
116 * @param iRegion The region number.
117 * @param cbRegion The region size.
118 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
119 */
120typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
121/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
122typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
123
124/**
125 * Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
126 * callback.
127 *
128 * @returns VBox status code.
129 * @param pPciDev Pointer to the PCI device.
130 * @param iRegion The region number.
131 * @param iOtherRegion The number of the region swap with.
132 * @sa @bugref{9359}
133 */
134typedef DECLCALLBACK(int) FNPCIIOREGIONSWAP(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion);
135/** Pointer to a FNPCIIOREGIONSWAP() function. */
136typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
137
138
139/*
140 * Hack to include the PDMPCIDEVINT structure at the right place
141 * to avoid duplications of FNPCIIOREGIONMAP and such.
142 */
143#ifdef PDMPCIDEV_INCLUDE_PRIVATE
144# include "pdmpcidevint.h"
145#endif
146
147/**
148 * PDM PCI Device structure.
149 *
150 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
151 * devices associated with it. The first PCI device that it registers
152 * automatically becomes the default PCI device and can be used implicitly
153 * with the device helper APIs. Subsequent PCI devices must be specified
154 * explicitly to the device helper APIs when used.
155 */
156typedef struct PDMPCIDEV
157{
158 /** PCI config space. */
159 uint8_t abConfig[256];
160
161 /** Internal data. */
162 union
163 {
164#ifdef PDMPCIDEVINT_DECLARED
165 PDMPCIDEVINT s;
166#endif
167 uint8_t padding[HC_ARCH_BITS == 32 ? 288 : 384];
168 } Int;
169
170 /** @name Read only data.
171 * @{
172 */
173 /** PCI device number [11:3] and function [2:0] on the pci bus.
174 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
175 uint32_t uDevFn;
176 uint32_t Alignment0; /**< Alignment. */
177 /** Device name. */
178 R3PTRTYPE(const char *) pszNameR3;
179 /** @} */
180
181 /**
182 * Callback for dealing with size changes.
183 *
184 * This is set by the PCI device when needed. It is only needed if any changes
185 * in the PCI resources have been made that may be incompatible with saved state
186 * (i.e. does not reflect configuration, but configuration defaults changed).
187 *
188 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
189 * allocation down in size. There is currently no way of growing resources.
190 * Dropping a resource is automatic.
191 *
192 * @returns VBox status code.
193 * @param pDevIns Pointer to the device instance the PCI device
194 * belongs to.
195 * @param pPciDev Pointer to the PCI device.
196 * @param iRegion The region number or UINT32_MAX if old saved state call.
197 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
198 * call, or 0 for dummy 64-bit top half region.
199 * @param enmType The type being loaded, -1 if old saved state call, or
200 * 0xff if dummy 64-bit top half region.
201 * @param pfnOldSetter Callback for setting size and type for call
202 * regarding old saved states. NULL otherwise.
203 * @param pfnSwapRegions Used to swaps two regions. The second one must be a
204 * higher number than @a iRegion. NULL if old saved
205 * state.
206 */
207 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
208 uint64_t cbRegion, PCIADDRESSSPACE enmType,
209 PFNPCIIOREGIONOLDSETTER pfnOldSetter,
210 PFNPCIIOREGIONSWAP pfnSwapRegion));
211} PDMPCIDEV;
212#ifdef PDMPCIDEVINT_DECLARED
213AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
214#endif
215
216
217
218/** @name PDM PCI config space accessor function.
219 * @{
220 */
221
222/** @todo handle extended space access. */
223
224DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
225{
226 Assert(offReg < sizeof(pPciDev->abConfig));
227 pPciDev->abConfig[offReg] = u8Value;
228}
229
230DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
231{
232 Assert(offReg < sizeof(pPciDev->abConfig));
233 return pPciDev->abConfig[offReg];
234}
235
236DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
237{
238 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
239 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
240}
241
242DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
243{
244 uint16_t u16Value;
245 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
246 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
247 return RT_H2LE_U16(u16Value);
248}
249
250DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
251{
252 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
253 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
254}
255
256DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
257{
258 uint32_t u32Value;
259 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
260 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
261 return RT_H2LE_U32(u32Value);
262}
263
264DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
265{
266 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
267 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
268}
269
270DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
271{
272 uint64_t u64Value;
273 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
274 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
275 return RT_H2LE_U64(u64Value);
276}
277
278/**
279 * Sets the vendor id config register.
280 * @param pPciDev The PCI device.
281 * @param u16VendorId The vendor id.
282 */
283DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
284{
285 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
286}
287
288/**
289 * Gets the vendor id config register.
290 * @returns the vendor id.
291 * @param pPciDev The PCI device.
292 */
293DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
294{
295 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
296}
297
298
299/**
300 * Sets the device id config register.
301 * @param pPciDev The PCI device.
302 * @param u16DeviceId The device id.
303 */
304DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
305{
306 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
307}
308
309/**
310 * Gets the device id config register.
311 * @returns the device id.
312 * @param pPciDev The PCI device.
313 */
314DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
315{
316 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
317}
318
319/**
320 * Sets the command config register.
321 *
322 * @param pPciDev The PCI device.
323 * @param u16Command The command register value.
324 */
325DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
326{
327 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
328}
329
330
331/**
332 * Gets the command config register.
333 * @returns The command register value.
334 * @param pPciDev The PCI device.
335 */
336DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
337{
338 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
339}
340
341/**
342 * Checks if the given PCI device is a bus master.
343 * @returns true if the device is a bus master, false if not.
344 * @param pPciDev The PCI device.
345 */
346DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
347{
348 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
349}
350
351/**
352 * Checks if INTx interrupts disabled in the command config register.
353 * @returns true if disabled.
354 * @param pPciDev The PCI device.
355 */
356DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
357{
358 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
359}
360
361/**
362 * Gets the status config register.
363 *
364 * @returns status config register.
365 * @param pPciDev The PCI device.
366 */
367DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
368{
369 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
370}
371
372/**
373 * Sets the status config register.
374 *
375 * @param pPciDev The PCI device.
376 * @param u16Status The status register value.
377 */
378DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
379{
380 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
381}
382
383
384/**
385 * Sets the revision id config register.
386 *
387 * @param pPciDev The PCI device.
388 * @param u8RevisionId The revision id.
389 */
390DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
391{
392 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
393}
394
395
396/**
397 * Sets the register level programming class config register.
398 *
399 * @param pPciDev The PCI device.
400 * @param u8ClassProg The new value.
401 */
402DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
403{
404 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
405}
406
407
408/**
409 * Sets the sub-class (aka device class) config register.
410 *
411 * @param pPciDev The PCI device.
412 * @param u8SubClass The sub-class.
413 */
414DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
415{
416 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
417}
418
419
420/**
421 * Sets the base class config register.
422 *
423 * @param pPciDev The PCI device.
424 * @param u8BaseClass The base class.
425 */
426DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
427{
428 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
429}
430
431/**
432 * Sets the header type config register.
433 *
434 * @param pPciDev The PCI device.
435 * @param u8HdrType The header type.
436 */
437DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
438{
439 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
440}
441
442/**
443 * Gets the header type config register.
444 *
445 * @param pPciDev The PCI device.
446 * @returns u8HdrType The header type.
447 */
448DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
449{
450 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
451}
452
453/**
454 * Sets the BIST (built-in self-test) config register.
455 *
456 * @param pPciDev The PCI device.
457 * @param u8Bist The BIST value.
458 */
459DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
460{
461 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
462}
463
464/**
465 * Gets the BIST (built-in self-test) config register.
466 *
467 * @param pPciDev The PCI device.
468 * @returns u8Bist The BIST.
469 */
470DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
471{
472 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
473}
474
475
476/**
477 * Sets a base address config register.
478 *
479 * @param pPciDev The PCI device.
480 * @param iReg Base address register number (0..5).
481 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
482 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
483 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
484 * @param u32Addr The address value.
485 */
486DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
487 uint32_t u32Addr)
488{
489 if (fIOSpace)
490 {
491 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
492 u32Addr |= RT_BIT_32(0);
493 }
494 else
495 {
496 Assert(!(u32Addr & 0xf));
497 if (fPrefetchable)
498 u32Addr |= RT_BIT_32(3);
499 if (f64Bit)
500 u32Addr |= 0x2 << 1;
501 }
502 switch (iReg)
503 {
504 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
505 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
506 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
507 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
508 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
509 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
510 default: AssertFailedReturnVoid();
511 }
512
513 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
514}
515
516/**
517 * Please document me. I don't seem to be getting as much as calculating
518 * the address of some PCI region.
519 */
520DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
521{
522 return iRegion == VBOX_PCI_ROM_SLOT
523 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
524}
525
526/**
527 * Sets the sub-system vendor id config register.
528 *
529 * @param pPciDev The PCI device.
530 * @param u16SubSysVendorId The sub-system vendor id.
531 */
532DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
533{
534 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
535}
536
537/**
538 * Gets the sub-system vendor id config register.
539 * @returns the sub-system vendor id.
540 * @param pPciDev The PCI device.
541 */
542DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
543{
544 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
545}
546
547
548/**
549 * Sets the sub-system id config register.
550 *
551 * @param pPciDev The PCI device.
552 * @param u16SubSystemId The sub-system id.
553 */
554DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
555{
556 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
557}
558
559/**
560 * Gets the sub-system id config register.
561 * @returns the sub-system id.
562 * @param pPciDev The PCI device.
563 */
564DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
565{
566 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
567}
568
569/**
570 * Sets offset to capability list.
571 *
572 * @param pPciDev The PCI device.
573 * @param u8Offset The offset to capability list.
574 */
575DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
576{
577 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
578}
579
580/**
581 * Returns offset to capability list.
582 *
583 * @returns offset to capability list.
584 * @param pPciDev The PCI device.
585 */
586DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
587{
588 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
589}
590
591/**
592 * Sets the interrupt line config register.
593 *
594 * @param pPciDev The PCI device.
595 * @param u8Line The interrupt line.
596 */
597DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
598{
599 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
600}
601
602/**
603 * Gets the interrupt line config register.
604 *
605 * @returns The interrupt line.
606 * @param pPciDev The PCI device.
607 */
608DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
609{
610 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
611}
612
613/**
614 * Sets the interrupt pin config register.
615 *
616 * @param pPciDev The PCI device.
617 * @param u8Pin The interrupt pin.
618 */
619DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
620{
621 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
622}
623
624/**
625 * Gets the interrupt pin config register.
626 *
627 * @returns The interrupt pin.
628 * @param pPciDev The PCI device.
629 */
630DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
631{
632 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
633}
634
635/** @} */
636
637/** @name Aliases for old function names.
638 * @{
639 */
640#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
641# define PCIDevSetByte PDMPciDevSetByte
642# define PCIDevGetByte PDMPciDevGetByte
643# define PCIDevSetWord PDMPciDevSetWord
644# define PCIDevGetWord PDMPciDevGetWord
645# define PCIDevSetDWord PDMPciDevSetDWord
646# define PCIDevGetDWord PDMPciDevGetDWord
647# define PCIDevSetQWord PDMPciDevSetQWord
648# define PCIDevGetQWord PDMPciDevGetQWord
649# define PCIDevSetVendorId PDMPciDevSetVendorId
650# define PCIDevGetVendorId PDMPciDevGetVendorId
651# define PCIDevSetDeviceId PDMPciDevSetDeviceId
652# define PCIDevGetDeviceId PDMPciDevGetDeviceId
653# define PCIDevSetCommand PDMPciDevSetCommand
654# define PCIDevGetCommand PDMPciDevGetCommand
655# define PCIDevIsBusmaster PDMPciDevIsBusmaster
656# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
657# define PCIDevGetStatus PDMPciDevGetStatus
658# define PCIDevSetStatus PDMPciDevSetStatus
659# define PCIDevSetRevisionId PDMPciDevSetRevisionId
660# define PCIDevSetClassProg PDMPciDevSetClassProg
661# define PCIDevSetClassSub PDMPciDevSetClassSub
662# define PCIDevSetClassBase PDMPciDevSetClassBase
663# define PCIDevSetHeaderType PDMPciDevSetHeaderType
664# define PCIDevGetHeaderType PDMPciDevGetHeaderType
665# define PCIDevSetBIST PDMPciDevSetBIST
666# define PCIDevGetBIST PDMPciDevGetBIST
667# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
668# define PCIDevGetRegionReg PDMPciDevGetRegionReg
669# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
670# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
671# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
672# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
673# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
674# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
675# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
676# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
677# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
678# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
679#endif
680/** @} */
681
682
683/* Special purpose "interface" for getting access to the PDMPCIDEV structure
684 * of a ich9pcibridge instance. This is useful for unusual raw or pass-through
685 * implementation which need to provide different PCI configuration space
686 * content for bridges (as long as we don't allow pass-through of bridges or
687 * custom bridge device implementations). */
688typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
689typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
690
691#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
692
693
694/** @} */
695
696#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */
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