VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 80943

Last change on this file since 80943 was 80943, checked in by vboxsync, 5 years ago

Devices/PCI: Device model refactoring, part I. bugref:9218
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1/** @file
2 * PCI - The PCI Controller And Devices. (DEV)
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
27#define VBOX_INCLUDED_vmm_pdmpcidev_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/pci.h>
33#include <iprt/assert.h>
34
35
36/** @defgroup grp_pdm_pcidev PDM PCI Device
37 * @ingroup grp_pdm_device
38 * @{
39 */
40
41/**
42 * Callback function for intercept reading from the PCI configuration space.
43 *
44 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
45 * @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
46 * PDMDevHlpPCIConfigRead()).
47 *
48 * @param pDevIns Pointer to the device instance the PCI device
49 * belongs to.
50 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
51 * @param uAddress The configuration space register address. [0..4096]
52 * @param cb The register size. [1,2,4]
53 * @param pu32Value Where to return the register value.
54 *
55 * @remarks Called with the PDM lock held. The device lock is NOT take because
56 * that is very likely be a lock order violation.
57 */
58typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
59 uint32_t uAddress, unsigned cb, uint32_t *pu32Value);
60/** Pointer to a FNPCICONFIGREAD() function. */
61typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
62/** Pointer to a PFNPCICONFIGREAD. */
63typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
64
65/**
66 * Callback function for writing to the PCI configuration space.
67 *
68 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
69 * @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
70 * PDMDevHlpPCIConfigWrite()).
71 *
72 * @param pDevIns Pointer to the device instance the PCI device
73 * belongs to.
74 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
75 * @param uAddress The configuration space register address. [0..4096]
76 * @param cb The register size. [1,2,4]
77 * @param u32Value The value that's being written. The number of bits actually used from
78 * this value is determined by the cb parameter.
79 *
80 * @remarks Called with the PDM lock held. The device lock is NOT take because
81 * that is very likely be a lock order violation.
82 */
83typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
84 uint32_t uAddress, unsigned cb, uint32_t u32Value);
85/** Pointer to a FNPCICONFIGWRITE() function. */
86typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
87/** Pointer to a PFNPCICONFIGWRITE. */
88typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
89
90/**
91 * Callback function for mapping an PCI I/O region.
92 *
93 * @returns VBox status code.
94 * @param pDevIns Pointer to the device instance the PCI device
95 * belongs to.
96 * @param pPciDev Pointer to the PCI device.
97 * @param iRegion The region number.
98 * @param GCPhysAddress Physical address of the region. If enmType is PCI_ADDRESS_SPACE_IO, this
99 * is an I/O port, otherwise it's a physical address.
100 *
101 * NIL_RTGCPHYS indicates that a MMIO2 mapping is about to be unmapped and
102 * that the device deregister access handlers for it and update its internal
103 * state to reflect this.
104 *
105 * @param cb Size of the region in bytes.
106 * @param enmType One of the PCI_ADDRESS_SPACE_* values.
107 *
108 * @remarks Called with the PDM lock held. The device lock is NOT take because
109 * that is very likely be a lock order violation.
110 */
111typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
112 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
113/** Pointer to a FNPCIIOREGIONMAP() function. */
114typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
115
116
117/**
118 * Sets the size and type for old saved states from within a
119 * PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
120 *
121 * @returns VBox status code.
122 * @param pPciDev Pointer to the PCI device.
123 * @param iRegion The region number.
124 * @param cbRegion The region size.
125 * @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
126 */
127typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
128/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
129typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
130
131/**
132 * Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
133 * callback.
134 *
135 * @returns VBox status code.
136 * @param pPciDev Pointer to the PCI device.
137 * @param iRegion The region number.
138 * @param iOtherRegion The number of the region swap with.
139 * @sa @bugref{9359}
140 */
141typedef DECLCALLBACK(int) FNPCIIOREGIONSWAP(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion);
142/** Pointer to a FNPCIIOREGIONSWAP() function. */
143typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
144
145
146/*
147 * Hack to include the PDMPCIDEVINT structure at the right place
148 * to avoid duplications of FNPCIIOREGIONMAP and such.
149 */
150#ifdef PDMPCIDEV_INCLUDE_PRIVATE
151# include "pdmpcidevint.h"
152#endif
153
154/**
155 * PDM PCI Device structure.
156 *
157 * A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
158 * devices associated with it. The first PCI device that it registers
159 * automatically becomes the default PCI device and can be used implicitly
160 * with the device helper APIs. Subsequent PCI devices must be specified
161 * explicitly to the device helper APIs when used.
162 */
163typedef struct PDMPCIDEV
164{
165 /** PCI config space. */
166 uint8_t abConfig[256];
167
168 /** Internal data. */
169 union
170 {
171#ifdef PDMPCIDEVINT_DECLARED
172 PDMPCIDEVINT s;
173#endif
174 uint8_t padding[HC_ARCH_BITS == 32 ? 288 : 384];
175 } Int;
176
177 /** @name Read only data.
178 * @{
179 */
180 /** PCI device number [11:3] and function [2:0] on the pci bus.
181 * @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
182 uint32_t uDevFn;
183 uint32_t Alignment0; /**< Alignment. */
184 /** Device name. */
185 R3PTRTYPE(const char *) pszNameR3;
186 /** @} */
187
188 /**
189 * Callback for dealing with size changes.
190 *
191 * This is set by the PCI device when needed. It is only needed if any changes
192 * in the PCI resources have been made that may be incompatible with saved state
193 * (i.e. does not reflect configuration, but configuration defaults changed).
194 *
195 * The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
196 * allocation down in size. There is currently no way of growing resources.
197 * Dropping a resource is automatic.
198 *
199 * @returns VBox status code.
200 * @param pDevIns Pointer to the device instance the PCI device
201 * belongs to.
202 * @param pPciDev Pointer to the PCI device.
203 * @param iRegion The region number or UINT32_MAX if old saved state call.
204 * @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
205 * call, or 0 for dummy 64-bit top half region.
206 * @param enmType The type being loaded, -1 if old saved state call, or
207 * 0xff if dummy 64-bit top half region.
208 * @param pfnOldSetter Callback for setting size and type for call
209 * regarding old saved states. NULL otherwise.
210 * @param pfnSwapRegions Used to swaps two regions. The second one must be a
211 * higher number than @a iRegion. NULL if old saved
212 * state.
213 */
214 DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
215 uint64_t cbRegion, PCIADDRESSSPACE enmType,
216 PFNPCIIOREGIONOLDSETTER pfnOldSetter,
217 PFNPCIIOREGIONSWAP pfnSwapRegion));
218} PDMPCIDEV;
219#ifdef PDMPCIDEVINT_DECLARED
220AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
221#endif
222
223
224
225/** @name PDM PCI config space accessor function.
226 * @{
227 */
228
229/** @todo handle extended space access. */
230
231DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
232{
233 Assert(offReg < sizeof(pPciDev->abConfig));
234 pPciDev->abConfig[offReg] = u8Value;
235}
236
237DECLINLINE(uint8_t) PDMPciDevGetByte(PPDMPCIDEV pPciDev, uint32_t offReg)
238{
239 Assert(offReg < sizeof(pPciDev->abConfig));
240 return pPciDev->abConfig[offReg];
241}
242
243DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
244{
245 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
246 *(uint16_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
247}
248
249DECLINLINE(uint16_t) PDMPciDevGetWord(PPDMPCIDEV pPciDev, uint32_t offReg)
250{
251 uint16_t u16Value;
252 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
253 u16Value = *(uint16_t*)&pPciDev->abConfig[offReg];
254 return RT_H2LE_U16(u16Value);
255}
256
257DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
258{
259 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
260 *(uint32_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
261}
262
263DECLINLINE(uint32_t) PDMPciDevGetDWord(PPDMPCIDEV pPciDev, uint32_t offReg)
264{
265 uint32_t u32Value;
266 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
267 u32Value = *(uint32_t*)&pPciDev->abConfig[offReg];
268 return RT_H2LE_U32(u32Value);
269}
270
271DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
272{
273 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
274 *(uint64_t*)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
275}
276
277DECLINLINE(uint64_t) PDMPciDevGetQWord(PPDMPCIDEV pPciDev, uint32_t offReg)
278{
279 uint64_t u64Value;
280 Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
281 u64Value = *(uint64_t*)&pPciDev->abConfig[offReg];
282 return RT_H2LE_U64(u64Value);
283}
284
285/**
286 * Sets the vendor id config register.
287 * @param pPciDev The PCI device.
288 * @param u16VendorId The vendor id.
289 */
290DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
291{
292 PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
293}
294
295/**
296 * Gets the vendor id config register.
297 * @returns the vendor id.
298 * @param pPciDev The PCI device.
299 */
300DECLINLINE(uint16_t) PDMPciDevGetVendorId(PPDMPCIDEV pPciDev)
301{
302 return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
303}
304
305
306/**
307 * Sets the device id config register.
308 * @param pPciDev The PCI device.
309 * @param u16DeviceId The device id.
310 */
311DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
312{
313 PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
314}
315
316/**
317 * Gets the device id config register.
318 * @returns the device id.
319 * @param pPciDev The PCI device.
320 */
321DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PPDMPCIDEV pPciDev)
322{
323 return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
324}
325
326/**
327 * Sets the command config register.
328 *
329 * @param pPciDev The PCI device.
330 * @param u16Command The command register value.
331 */
332DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
333{
334 PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
335}
336
337
338/**
339 * Gets the command config register.
340 * @returns The command register value.
341 * @param pPciDev The PCI device.
342 */
343DECLINLINE(uint16_t) PDMPciDevGetCommand(PPDMPCIDEV pPciDev)
344{
345 return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
346}
347
348/**
349 * Checks if the given PCI device is a bus master.
350 * @returns true if the device is a bus master, false if not.
351 * @param pPciDev The PCI device.
352 */
353DECLINLINE(bool) PDMPciDevIsBusmaster(PPDMPCIDEV pPciDev)
354{
355 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
356}
357
358/**
359 * Checks if INTx interrupts disabled in the command config register.
360 * @returns true if disabled.
361 * @param pPciDev The PCI device.
362 */
363DECLINLINE(bool) PDMPciDevIsIntxDisabled(PPDMPCIDEV pPciDev)
364{
365 return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
366}
367
368/**
369 * Gets the status config register.
370 *
371 * @returns status config register.
372 * @param pPciDev The PCI device.
373 */
374DECLINLINE(uint16_t) PDMPciDevGetStatus(PPDMPCIDEV pPciDev)
375{
376 return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
377}
378
379/**
380 * Sets the status config register.
381 *
382 * @param pPciDev The PCI device.
383 * @param u16Status The status register value.
384 */
385DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
386{
387 PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
388}
389
390
391/**
392 * Sets the revision id config register.
393 *
394 * @param pPciDev The PCI device.
395 * @param u8RevisionId The revision id.
396 */
397DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
398{
399 PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
400}
401
402
403/**
404 * Sets the register level programming class config register.
405 *
406 * @param pPciDev The PCI device.
407 * @param u8ClassProg The new value.
408 */
409DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
410{
411 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
412}
413
414
415/**
416 * Sets the sub-class (aka device class) config register.
417 *
418 * @param pPciDev The PCI device.
419 * @param u8SubClass The sub-class.
420 */
421DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
422{
423 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
424}
425
426
427/**
428 * Sets the base class config register.
429 *
430 * @param pPciDev The PCI device.
431 * @param u8BaseClass The base class.
432 */
433DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
434{
435 PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
436}
437
438/**
439 * Sets the header type config register.
440 *
441 * @param pPciDev The PCI device.
442 * @param u8HdrType The header type.
443 */
444DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
445{
446 PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
447}
448
449/**
450 * Gets the header type config register.
451 *
452 * @param pPciDev The PCI device.
453 * @returns u8HdrType The header type.
454 */
455DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PPDMPCIDEV pPciDev)
456{
457 return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
458}
459
460/**
461 * Sets the BIST (built-in self-test) config register.
462 *
463 * @param pPciDev The PCI device.
464 * @param u8Bist The BIST value.
465 */
466DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
467{
468 PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
469}
470
471/**
472 * Gets the BIST (built-in self-test) config register.
473 *
474 * @param pPciDev The PCI device.
475 * @returns u8Bist The BIST.
476 */
477DECLINLINE(uint8_t) PDMPciDevGetBIST(PPDMPCIDEV pPciDev)
478{
479 return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
480}
481
482
483/**
484 * Sets a base address config register.
485 *
486 * @param pPciDev The PCI device.
487 * @param iReg Base address register number (0..5).
488 * @param fIOSpace Whether it's I/O (true) or memory (false) space.
489 * @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
490 * @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
491 * @param u32Addr The address value.
492 */
493DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
494 uint32_t u32Addr)
495{
496 if (fIOSpace)
497 {
498 Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
499 u32Addr |= RT_BIT_32(0);
500 }
501 else
502 {
503 Assert(!(u32Addr & 0xf));
504 if (fPrefetchable)
505 u32Addr |= RT_BIT_32(3);
506 if (f64Bit)
507 u32Addr |= 0x2 << 1;
508 }
509 switch (iReg)
510 {
511 case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
512 case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
513 case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
514 case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
515 case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
516 case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
517 default: AssertFailedReturnVoid();
518 }
519
520 PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
521}
522
523/**
524 * Please document me. I don't seem to be getting as much as calculating
525 * the address of some PCI region.
526 */
527DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
528{
529 return iRegion == VBOX_PCI_ROM_SLOT
530 ? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
531}
532
533/**
534 * Sets the sub-system vendor id config register.
535 *
536 * @param pPciDev The PCI device.
537 * @param u16SubSysVendorId The sub-system vendor id.
538 */
539DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
540{
541 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
542}
543
544/**
545 * Gets the sub-system vendor id config register.
546 * @returns the sub-system vendor id.
547 * @param pPciDev The PCI device.
548 */
549DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PPDMPCIDEV pPciDev)
550{
551 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
552}
553
554
555/**
556 * Sets the sub-system id config register.
557 *
558 * @param pPciDev The PCI device.
559 * @param u16SubSystemId The sub-system id.
560 */
561DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
562{
563 PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
564}
565
566/**
567 * Gets the sub-system id config register.
568 * @returns the sub-system id.
569 * @param pPciDev The PCI device.
570 */
571DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PPDMPCIDEV pPciDev)
572{
573 return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
574}
575
576/**
577 * Sets offset to capability list.
578 *
579 * @param pPciDev The PCI device.
580 * @param u8Offset The offset to capability list.
581 */
582DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
583{
584 PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
585}
586
587/**
588 * Returns offset to capability list.
589 *
590 * @returns offset to capability list.
591 * @param pPciDev The PCI device.
592 */
593DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PPDMPCIDEV pPciDev)
594{
595 return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
596}
597
598/**
599 * Sets the interrupt line config register.
600 *
601 * @param pPciDev The PCI device.
602 * @param u8Line The interrupt line.
603 */
604DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
605{
606 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
607}
608
609/**
610 * Gets the interrupt line config register.
611 *
612 * @returns The interrupt line.
613 * @param pPciDev The PCI device.
614 */
615DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PPDMPCIDEV pPciDev)
616{
617 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
618}
619
620/**
621 * Sets the interrupt pin config register.
622 *
623 * @param pPciDev The PCI device.
624 * @param u8Pin The interrupt pin.
625 */
626DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
627{
628 PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
629}
630
631/**
632 * Gets the interrupt pin config register.
633 *
634 * @returns The interrupt pin.
635 * @param pPciDev The PCI device.
636 */
637DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PPDMPCIDEV pPciDev)
638{
639 return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
640}
641
642/** @} */
643
644/** @name Aliases for old function names.
645 * @{
646 */
647#if !defined(PDMPCIDEVICE_NO_DEPRECATED) || defined(DOXYGEN_RUNNING)
648# define PCIDevSetByte PDMPciDevSetByte
649# define PCIDevGetByte PDMPciDevGetByte
650# define PCIDevSetWord PDMPciDevSetWord
651# define PCIDevGetWord PDMPciDevGetWord
652# define PCIDevSetDWord PDMPciDevSetDWord
653# define PCIDevGetDWord PDMPciDevGetDWord
654# define PCIDevSetQWord PDMPciDevSetQWord
655# define PCIDevGetQWord PDMPciDevGetQWord
656# define PCIDevSetVendorId PDMPciDevSetVendorId
657# define PCIDevGetVendorId PDMPciDevGetVendorId
658# define PCIDevSetDeviceId PDMPciDevSetDeviceId
659# define PCIDevGetDeviceId PDMPciDevGetDeviceId
660# define PCIDevSetCommand PDMPciDevSetCommand
661# define PCIDevGetCommand PDMPciDevGetCommand
662# define PCIDevIsBusmaster PDMPciDevIsBusmaster
663# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
664# define PCIDevGetStatus PDMPciDevGetStatus
665# define PCIDevSetStatus PDMPciDevSetStatus
666# define PCIDevSetRevisionId PDMPciDevSetRevisionId
667# define PCIDevSetClassProg PDMPciDevSetClassProg
668# define PCIDevSetClassSub PDMPciDevSetClassSub
669# define PCIDevSetClassBase PDMPciDevSetClassBase
670# define PCIDevSetHeaderType PDMPciDevSetHeaderType
671# define PCIDevGetHeaderType PDMPciDevGetHeaderType
672# define PCIDevSetBIST PDMPciDevSetBIST
673# define PCIDevGetBIST PDMPciDevGetBIST
674# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
675# define PCIDevGetRegionReg PDMPciDevGetRegionReg
676# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
677# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
678# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
679# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
680# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
681# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
682# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
683# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
684# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
685# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
686#endif
687/** @} */
688
689
690/* Special purpose "interface" for getting access to the PDMPCIDEV structure
691 * of a ich9pcibridge instance. This is useful for unusual raw or pass-through
692 * implementation which need to provide different PCI configuration space
693 * content for bridges (as long as we don't allow pass-through of bridges or
694 * custom bridge device implementations). */
695typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
696typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
697
698#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
699
700
701/** @} */
702
703#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */
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