pdmpcidev.h@ 81375

Last change on this file since 81375 was 81375, checked in by vboxsync, 5 years ago
IOM,PDM,PCI: Making new MMIO code work with PCI. bugref:9218
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1	/** @file
2	* PCI - The PCI Controller And Devices. (DEV)
3	*/
4
5	/*
6	* Copyright (C) 2006-2019 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
27	#define VBOX_INCLUDED_vmm_pdmpcidev_h
28	#ifndef RT_WITHOUT_PRAGMA_ONCE
29	# pragma once
30	#endif
31
32	#include <VBox/pci.h>
33	#include <iprt/assert.h>
34
35
36	/** @defgroup grp_pdm_pcidev PDM PCI Device
37	* @ingroup grp_pdm_device
38	* @{
39	*/
40
41	/**
42	* Callback function for intercept reading from the PCI configuration space.
43	*
44	* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
45	* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
46	* PDMDevHlpPCIConfigRead()).
47	*
48	* @param pDevIns Pointer to the device instance the PCI device
49	* belongs to.
50	* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
51	* @param uAddress The configuration space register address. [0..4096]
52	* @param cb The register size. [1,2,4]
53	* @param pu32Value Where to return the register value.
54	*
55	* @remarks Called with the PDM lock held. The device lock is NOT take because
56	* that is very likely be a lock order violation.
57	*/
58	typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGREAD(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
59	uint32_t uAddress, unsigned cb, uint32_t *pu32Value);
60	/** Pointer to a FNPCICONFIGREAD() function. */
61	typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
62	/** Pointer to a PFNPCICONFIGREAD. */
63	typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
64
65	/**
66	* Callback function for writing to the PCI configuration space.
67	*
68	* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
69	* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
70	* PDMDevHlpPCIConfigWrite()).
71	*
72	* @param pDevIns Pointer to the device instance the PCI device
73	* belongs to.
74	* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
75	* @param uAddress The configuration space register address. [0..4096]
76	* @param cb The register size. [1,2,4]
77	* @param u32Value The value that's being written. The number of bits actually used from
78	* this value is determined by the cb parameter.
79	*
80	* @remarks Called with the PDM lock held. The device lock is NOT take because
81	* that is very likely be a lock order violation.
82	*/
83	typedef DECLCALLBACK(VBOXSTRICTRC) FNPCICONFIGWRITE(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
84	uint32_t uAddress, unsigned cb, uint32_t u32Value);
85	/** Pointer to a FNPCICONFIGWRITE() function. */
86	typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
87	/** Pointer to a PFNPCICONFIGWRITE. */
88	typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
89
90	/**
91	* Callback function for mapping an PCI I/O region.
92	*
93	* This is called when a PCI I/O region is mapped, and for new-style devices
94	* also when unmapped (address set to NIL_RTGCPHYS). For new-style devices,
95	* this callback is optional as the PCI bus calls IOM to map and unmap the
96	* regions.
97	*
98	* Old style devices have to call IOM to map the region themselves, while
99	* unmapping is done by the PCI bus like with the new style devices.
100	*
101	* @returns VBox status code.
102	* @param pDevIns Pointer to the device instance the PCI device
103	* belongs to.
104	* @param pPciDev Pointer to the PCI device.
105	* @param iRegion The region number.
106	* @param GCPhysAddress Physical address of the region. If @a enmType is
107	* PCI_ADDRESS_SPACE_IO, this is an I/O port, otherwise
108	* it's a physical address.
109	*
110	* NIL_RTGCPHYS indicates that a mapping is about to be
111	* unmapped and that the device deregister access
112	* handlers for it and update its internal state to
113	* reflect this.
114	*
115	* @param cb Size of the region in bytes.
116	* @param enmType One of the PCI_ADDRESS_SPACE_* values.
117	*
118	* @remarks Called with the PDM lock held. The device lock is NOT take because
119	* that is very likely be a lock order violation.
120	*/
121	typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
122	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
123	/** Pointer to a FNPCIIOREGIONMAP() function. */
124	typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
125
126
127	/**
128	* Sets the size and type for old saved states from within a
129	* PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
130	*
131	* @returns VBox status code.
132	* @param pPciDev Pointer to the PCI device.
133	* @param iRegion The region number.
134	* @param cbRegion The region size.
135	* @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
136	*/
137	typedef DECLCALLBACK(int) FNPCIIOREGIONOLDSETTER(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType);
138	/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
139	typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
140
141	/**
142	* Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
143	* callback.
144	*
145	* @returns VBox status code.
146	* @param pPciDev Pointer to the PCI device.
147	* @param iRegion The region number.
148	* @param iOtherRegion The number of the region swap with.
149	* @sa @bugref{9359}
150	*/
151	typedef DECLCALLBACK(int) FNPCIIOREGIONSWAP(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion);
152	/** Pointer to a FNPCIIOREGIONSWAP() function. */
153	typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
154
155
156	/*
157	* Hack to include the PDMPCIDEVINT structure at the right place
158	* to avoid duplications of FNPCIIOREGIONMAP and such.
159	*/
160	#ifdef PDMPCIDEV_INCLUDE_PRIVATE
161	# include "pdmpcidevint.h"
162	#endif
163
164	/**
165	* PDM PCI Device structure.
166	*
167	* A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
168	* devices associated with it. The first PCI device that it registers
169	* automatically becomes the default PCI device and can be used implicitly
170	* with the device helper APIs. Subsequent PCI devices must be specified
171	* explicitly to the device helper APIs when used.
172	*/
173	typedef struct PDMPCIDEV
174	{
175	/** @name Read only data.
176	* @{
177	*/
178	/** Magic number (PDMPCIDEV_MAGIC). */
179	uint32_t u32Magic;
180	/** PCI device number [11:3] and function [2:0] on the pci bus.
181	* @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
182	uint32_t uDevFn;
183	/** Size of the valid config space (we always allocate 4KB). */
184	uint16_t cbConfig;
185	/** Size of the MSI-X state data optionally following the config space. */
186	uint16_t cbMsixState;
187	/** Index into the PDMDEVINS::apPciDev array. */
188	uint16_t idxSubDev;
189	uint16_t u16Padding;
190	/** Device name. */
191	R3PTRTYPE(const char *) pszNameR3;
192	/** @} */
193
194	/**
195	* Callback for dealing with size changes.
196	*
197	* This is set by the PCI device when needed. It is only needed if any changes
198	* in the PCI resources have been made that may be incompatible with saved state
199	* (i.e. does not reflect configuration, but configuration defaults changed).
200	*
201	* The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
202	* allocation down in size. There is currently no way of growing resources.
203	* Dropping a resource is automatic.
204	*
205	* @returns VBox status code.
206	* @param pDevIns Pointer to the device instance the PCI device
207	* belongs to.
208	* @param pPciDev Pointer to the PCI device.
209	* @param iRegion The region number or UINT32_MAX if old saved state call.
210	* @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
211	* call, or 0 for dummy 64-bit top half region.
212	* @param enmType The type being loaded, -1 if old saved state call, or
213	* 0xff if dummy 64-bit top half region.
214	* @param pfnOldSetter Callback for setting size and type for call
215	* regarding old saved states. NULL otherwise.
216	* @param pfnSwapRegions Used to swaps two regions. The second one must be a
217	* higher number than @a iRegion. NULL if old saved
218	* state.
219	*/
220	DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
221	uint64_t cbRegion, PCIADDRESSSPACE enmType,
222	PFNPCIIOREGIONOLDSETTER pfnOldSetter,
223	PFNPCIIOREGIONSWAP pfnSwapRegion));
224
225	/** Reserved for future stuff. */
226	uint64_t au64Reserved[4 + (R3_ARCH_BITS == 32 ? 1 : 0)];
227
228	/** Internal data. */
229	union
230	{
231	#ifdef PDMPCIDEVINT_DECLARED
232	PDMPCIDEVINT s;
233	#endif
234	uint8_t padding[0x180];
235	} Int;
236
237	/** PCI config space.
238	* This is either 256 or 4096 in size. In the latter case it may be
239	* followed by a MSI-X state area. */
240	uint8_t abConfig[4096];
241	/** The MSI-X state data. Optional. */
242	uint8_t abMsixState[RT_FLEXIBLE_ARRAY];
243	} PDMPCIDEV;
244	#ifdef PDMPCIDEVINT_DECLARED
245	AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
246	#endif
247	/** Magic number of PDMPCIDEV::u32Magic (Margaret Eleanor Atwood). */
248	#define PDMPCIDEV_MAGIC UINT32_C(0x19391118)
249
250	/** Checks that the PCI device structure is valid and belongs to the device
251	* instance, but does not return. */
252	#ifdef VBOX_STRICT
253	# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) \
254	do { \
255	uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
256	uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
257	ASMCompilerBarrier(); \
258	AssertMsg( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
259	&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
260	&& offPciDevInTable % cbPciDevTmp == 0, \
261	("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
262	(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp)); \
263	AssertPtr((a_pPciDev)); \
264	AssertMsg((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic)); \
265	} while (0)
266	#else
267	# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) do { } while (0)
268	#endif
269
270	/** Checks that the PCI device structure is valid, belongs to the device
271	* instance and that it is registered, but does not return. */
272	#ifdef VBOX_STRICT
273	# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) \
274	do { \
275	PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev); \
276	Assert((a_pPciDev)->Int.s.fRegistered); \
277	} while (0)
278	#else
279	# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) do { } while (0)
280	#endif
281
282	/** Checks that the PCI device structure is valid and belongs to the device
283	* instance, returns appropriate status code if not valid. */
284	#define PDMPCIDEV_ASSERT_VALID_RET(a_pDevIns, a_pPciDev) \
285	do { \
286	uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
287	uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
288	ASMCompilerBarrier(); \
289	AssertMsgReturn( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
290	&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
291	&& offPciDevInTable % cbPciDevTmp == 0, \
292	("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
293	(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp), \
294	VERR_PDM_NOT_PCI_DEVICE); \
295	AssertMsgReturn((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic), VERR_PDM_NOT_PCI_DEVICE); \
296	AssertReturn((a_pPciDev)->Int.s.fRegistered, VERR_PDM_NOT_PCI_DEVICE); \
297	} while (0)
298
299
300
301	/** @name PDM PCI config space accessor function.
302	* @{
303	*/
304
305	/** @todo handle extended space access. */
306
307	DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
308	{
309	Assert(offReg < sizeof(pPciDev->abConfig));
310	pPciDev->abConfig[offReg] = u8Value;
311	}
312
313	DECLINLINE(uint8_t) PDMPciDevGetByte(PCPDMPCIDEV pPciDev, uint32_t offReg)
314	{
315	Assert(offReg < sizeof(pPciDev->abConfig));
316	return pPciDev->abConfig[offReg];
317	}
318
319	DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
320	{
321	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
322	(uint16_t)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
323	}
324
325	DECLINLINE(uint16_t) PDMPciDevGetWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
326	{
327	uint16_t u16Value;
328	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
329	u16Value = (uint16_t)&pPciDev->abConfig[offReg];
330	return RT_H2LE_U16(u16Value);
331	}
332
333	DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
334	{
335	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
336	(uint32_t)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
337	}
338
339	DECLINLINE(uint32_t) PDMPciDevGetDWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
340	{
341	uint32_t u32Value;
342	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
343	u32Value = (uint32_t)&pPciDev->abConfig[offReg];
344	return RT_H2LE_U32(u32Value);
345	}
346
347	DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
348	{
349	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
350	(uint64_t)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
351	}
352
353	DECLINLINE(uint64_t) PDMPciDevGetQWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
354	{
355	uint64_t u64Value;
356	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
357	u64Value = (uint64_t)&pPciDev->abConfig[offReg];
358	return RT_H2LE_U64(u64Value);
359	}
360
361	/**
362	* Sets the vendor id config register.
363	* @param pPciDev The PCI device.
364	* @param u16VendorId The vendor id.
365	*/
366	DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
367	{
368	PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
369	}
370
371	/**
372	* Gets the vendor id config register.
373	* @returns the vendor id.
374	* @param pPciDev The PCI device.
375	*/
376	DECLINLINE(uint16_t) PDMPciDevGetVendorId(PCPDMPCIDEV pPciDev)
377	{
378	return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
379	}
380
381
382	/**
383	* Sets the device id config register.
384	* @param pPciDev The PCI device.
385	* @param u16DeviceId The device id.
386	*/
387	DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
388	{
389	PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
390	}
391
392	/**
393	* Gets the device id config register.
394	* @returns the device id.
395	* @param pPciDev The PCI device.
396	*/
397	DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PCPDMPCIDEV pPciDev)
398	{
399	return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
400	}
401
402	/**
403	* Sets the command config register.
404	*
405	* @param pPciDev The PCI device.
406	* @param u16Command The command register value.
407	*/
408	DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
409	{
410	PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
411	}
412
413
414	/**
415	* Gets the command config register.
416	* @returns The command register value.
417	* @param pPciDev The PCI device.
418	*/
419	DECLINLINE(uint16_t) PDMPciDevGetCommand(PCPDMPCIDEV pPciDev)
420	{
421	return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
422	}
423
424	/**
425	* Checks if the given PCI device is a bus master.
426	* @returns true if the device is a bus master, false if not.
427	* @param pPciDev The PCI device.
428	*/
429	DECLINLINE(bool) PDMPciDevIsBusmaster(PCPDMPCIDEV pPciDev)
430	{
431	return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
432	}
433
434	/**
435	* Checks if INTx interrupts disabled in the command config register.
436	* @returns true if disabled.
437	* @param pPciDev The PCI device.
438	*/
439	DECLINLINE(bool) PDMPciDevIsIntxDisabled(PCPDMPCIDEV pPciDev)
440	{
441	return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
442	}
443
444	/**
445	* Gets the status config register.
446	*
447	* @returns status config register.
448	* @param pPciDev The PCI device.
449	*/
450	DECLINLINE(uint16_t) PDMPciDevGetStatus(PCPDMPCIDEV pPciDev)
451	{
452	return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
453	}
454
455	/**
456	* Sets the status config register.
457	*
458	* @param pPciDev The PCI device.
459	* @param u16Status The status register value.
460	*/
461	DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
462	{
463	PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
464	}
465
466
467	/**
468	* Sets the revision id config register.
469	*
470	* @param pPciDev The PCI device.
471	* @param u8RevisionId The revision id.
472	*/
473	DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
474	{
475	PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
476	}
477
478
479	/**
480	* Sets the register level programming class config register.
481	*
482	* @param pPciDev The PCI device.
483	* @param u8ClassProg The new value.
484	*/
485	DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
486	{
487	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
488	}
489
490
491	/**
492	* Sets the sub-class (aka device class) config register.
493	*
494	* @param pPciDev The PCI device.
495	* @param u8SubClass The sub-class.
496	*/
497	DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
498	{
499	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
500	}
501
502
503	/**
504	* Sets the base class config register.
505	*
506	* @param pPciDev The PCI device.
507	* @param u8BaseClass The base class.
508	*/
509	DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
510	{
511	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
512	}
513
514	/**
515	* Sets the header type config register.
516	*
517	* @param pPciDev The PCI device.
518	* @param u8HdrType The header type.
519	*/
520	DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
521	{
522	PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
523	}
524
525	/**
526	* Gets the header type config register.
527	*
528	* @param pPciDev The PCI device.
529	* @returns u8HdrType The header type.
530	*/
531	DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PCPDMPCIDEV pPciDev)
532	{
533	return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
534	}
535
536	/**
537	* Sets the BIST (built-in self-test) config register.
538	*
539	* @param pPciDev The PCI device.
540	* @param u8Bist The BIST value.
541	*/
542	DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
543	{
544	PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
545	}
546
547	/**
548	* Gets the BIST (built-in self-test) config register.
549	*
550	* @param pPciDev The PCI device.
551	* @returns u8Bist The BIST.
552	*/
553	DECLINLINE(uint8_t) PDMPciDevGetBIST(PCPDMPCIDEV pPciDev)
554	{
555	return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
556	}
557
558
559	/**
560	* Sets a base address config register.
561	*
562	* @param pPciDev The PCI device.
563	* @param iReg Base address register number (0..5).
564	* @param fIOSpace Whether it's I/O (true) or memory (false) space.
565	* @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
566	* @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
567	* @param u32Addr The address value.
568	*/
569	DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
570	uint32_t u32Addr)
571	{
572	if (fIOSpace)
573	{
574	Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
575	u32Addr \|= RT_BIT_32(0);
576	}
577	else
578	{
579	Assert(!(u32Addr & 0xf));
580	if (fPrefetchable)
581	u32Addr \|= RT_BIT_32(3);
582	if (f64Bit)
583	u32Addr \|= 0x2 << 1;
584	}
585	switch (iReg)
586	{
587	case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
588	case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
589	case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
590	case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
591	case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
592	case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
593	default: AssertFailedReturnVoid();
594	}
595
596	PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
597	}
598
599	/**
600	* Please document me. I don't seem to be getting as much as calculating
601	* the address of some PCI region.
602	*/
603	DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
604	{
605	return iRegion == VBOX_PCI_ROM_SLOT
606	? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
607	}
608
609	/**
610	* Sets the sub-system vendor id config register.
611	*
612	* @param pPciDev The PCI device.
613	* @param u16SubSysVendorId The sub-system vendor id.
614	*/
615	DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
616	{
617	PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
618	}
619
620	/**
621	* Gets the sub-system vendor id config register.
622	* @returns the sub-system vendor id.
623	* @param pPciDev The PCI device.
624	*/
625	DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PCPDMPCIDEV pPciDev)
626	{
627	return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
628	}
629
630
631	/**
632	* Sets the sub-system id config register.
633	*
634	* @param pPciDev The PCI device.
635	* @param u16SubSystemId The sub-system id.
636	*/
637	DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
638	{
639	PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
640	}
641
642	/**
643	* Gets the sub-system id config register.
644	* @returns the sub-system id.
645	* @param pPciDev The PCI device.
646	*/
647	DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PCPDMPCIDEV pPciDev)
648	{
649	return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
650	}
651
652	/**
653	* Sets offset to capability list.
654	*
655	* @param pPciDev The PCI device.
656	* @param u8Offset The offset to capability list.
657	*/
658	DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
659	{
660	PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
661	}
662
663	/**
664	* Returns offset to capability list.
665	*
666	* @returns offset to capability list.
667	* @param pPciDev The PCI device.
668	*/
669	DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PCPDMPCIDEV pPciDev)
670	{
671	return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
672	}
673
674	/**
675	* Sets the interrupt line config register.
676	*
677	* @param pPciDev The PCI device.
678	* @param u8Line The interrupt line.
679	*/
680	DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
681	{
682	PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
683	}
684
685	/**
686	* Gets the interrupt line config register.
687	*
688	* @returns The interrupt line.
689	* @param pPciDev The PCI device.
690	*/
691	DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PCPDMPCIDEV pPciDev)
692	{
693	return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
694	}
695
696	/**
697	* Sets the interrupt pin config register.
698	*
699	* @param pPciDev The PCI device.
700	* @param u8Pin The interrupt pin.
701	*/
702	DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
703	{
704	PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
705	}
706
707	/**
708	* Gets the interrupt pin config register.
709	*
710	* @returns The interrupt pin.
711	* @param pPciDev The PCI device.
712	*/
713	DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PCPDMPCIDEV pPciDev)
714	{
715	return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
716	}
717
718	/** @} */
719
720	/** @name Aliases for old function names.
721	* @{
722	*/
723	#if !defined(PDMPCIDEVICE_NO_DEPRECATED) \|\| defined(DOXYGEN_RUNNING)
724	# define PCIDevSetByte PDMPciDevSetByte
725	# define PCIDevGetByte PDMPciDevGetByte
726	# define PCIDevSetWord PDMPciDevSetWord
727	# define PCIDevGetWord PDMPciDevGetWord
728	# define PCIDevSetDWord PDMPciDevSetDWord
729	# define PCIDevGetDWord PDMPciDevGetDWord
730	# define PCIDevSetQWord PDMPciDevSetQWord
731	# define PCIDevGetQWord PDMPciDevGetQWord
732	# define PCIDevSetVendorId PDMPciDevSetVendorId
733	# define PCIDevGetVendorId PDMPciDevGetVendorId
734	# define PCIDevSetDeviceId PDMPciDevSetDeviceId
735	# define PCIDevGetDeviceId PDMPciDevGetDeviceId
736	# define PCIDevSetCommand PDMPciDevSetCommand
737	# define PCIDevGetCommand PDMPciDevGetCommand
738	# define PCIDevIsBusmaster PDMPciDevIsBusmaster
739	# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
740	# define PCIDevGetStatus PDMPciDevGetStatus
741	# define PCIDevSetStatus PDMPciDevSetStatus
742	# define PCIDevSetRevisionId PDMPciDevSetRevisionId
743	# define PCIDevSetClassProg PDMPciDevSetClassProg
744	# define PCIDevSetClassSub PDMPciDevSetClassSub
745	# define PCIDevSetClassBase PDMPciDevSetClassBase
746	# define PCIDevSetHeaderType PDMPciDevSetHeaderType
747	# define PCIDevGetHeaderType PDMPciDevGetHeaderType
748	# define PCIDevSetBIST PDMPciDevSetBIST
749	# define PCIDevGetBIST PDMPciDevGetBIST
750	# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
751	# define PCIDevGetRegionReg PDMPciDevGetRegionReg
752	# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
753	# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
754	# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
755	# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
756	# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
757	# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
758	# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
759	# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
760	# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
761	# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
762	#endif
763	/** @} */
764
765
766	/** @name PDMIICH9BRIDGEPDMPCIDEV_IID - Ugly 3rd party bridge/raw PCI hack.
767	*
768	* When querying this IID via IBase::pfnQueryInterface on a ICH9 bridge, you
769	* will get a pointer to a PDMPCIDEV rather pointer to an interface function
770	* table as is the custom. This was needed by some unusual 3rd-party raw and/or
771	* pass-through implementation which need to provide different PCI configuration
772	* space content for bridges (as long as we don't allow pass-through of bridges
773	* or custom bridge device implementations). So, HACK ALERT to all of this!
774	* @{ */
775	#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
776	typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
777	typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
778	/** @} */
779
780
781	/** @} */
782
783	#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */

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source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 81375

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