pdmpcidev.h@ 99582

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1	/** @file
2	* PCI - The PCI Controller And Devices. (DEV)
3	*/
4
5	/*
6	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
7	*
8	* This file is part of VirtualBox base platform packages, as
9	* available from https://www.virtualbox.org.
10	*
11	* This program is free software; you can redistribute it and/or
12	* modify it under the terms of the GNU General Public License
13	* as published by the Free Software Foundation, in version 3 of the
14	* License.
15	*
16	* This program is distributed in the hope that it will be useful, but
17	* WITHOUT ANY WARRANTY; without even the implied warranty of
18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19	* General Public License for more details.
20	*
21	* You should have received a copy of the GNU General Public License
22	* along with this program; if not, see <https://www.gnu.org/licenses>.
23	*
24	* The contents of this file may alternatively be used under the terms
25	* of the Common Development and Distribution License Version 1.0
26	* (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27	* in the VirtualBox distribution, in which case the provisions of the
28	* CDDL are applicable instead of those of the GPL.
29	*
30	* You may elect to license modified versions of this file under the
31	* terms and conditions of either the GPL or the CDDL or both.
32	*
33	* SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34	*/
35
36	#ifndef VBOX_INCLUDED_vmm_pdmpcidev_h
37	#define VBOX_INCLUDED_vmm_pdmpcidev_h
38	#ifndef RT_WITHOUT_PRAGMA_ONCE
39	# pragma once
40	#endif
41
42	#include <VBox/pci.h>
43	#include <iprt/assert.h>
44
45
46	/** @defgroup grp_pdm_pcidev PDM PCI Device
47	* @ingroup grp_pdm_device
48	* @{
49	*/
50
51	/**
52	* Callback function for intercept reading from the PCI configuration space.
53	*
54	* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
55	* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
56	* PDMDevHlpPCIConfigRead()).
57	*
58	* @param pDevIns Pointer to the device instance the PCI device
59	* belongs to.
60	* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
61	* @param uAddress The configuration space register address. [0..4096]
62	* @param cb The register size. [1,2,4]
63	* @param pu32Value Where to return the register value.
64	*
65	* @remarks Called with the PDM lock held. The device lock is NOT take because
66	* that is very likely be a lock order violation.
67	*/
68	typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCICONFIGREAD,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
69	uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
70	/** Pointer to a FNPCICONFIGREAD() function. */
71	typedef FNPCICONFIGREAD *PFNPCICONFIGREAD;
72	#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
73	/** Pointer to a PFNPCICONFIGREAD. */
74	typedef PFNPCICONFIGREAD *PPFNPCICONFIGREAD;
75	#endif
76
77	/**
78	* Callback function for writing to the PCI configuration space.
79	*
80	* @returns VINF_SUCCESS or PDMDevHlpDBGFStop status (maybe others later).
81	* @retval VINF_PDM_PCI_DO_DEFAULT to do default read (same as calling
82	* PDMDevHlpPCIConfigWrite()).
83	*
84	* @param pDevIns Pointer to the device instance the PCI device
85	* belongs to.
86	* @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance.
87	* @param uAddress The configuration space register address. [0..4096]
88	* @param cb The register size. [1,2,4]
89	* @param u32Value The value that's being written. The number of bits actually used from
90	* this value is determined by the cb parameter.
91	*
92	* @remarks Called with the PDM lock held. The device lock is NOT take because
93	* that is very likely be a lock order violation.
94	*/
95	typedef DECLCALLBACKTYPE(VBOXSTRICTRC, FNPCICONFIGWRITE,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
96	uint32_t uAddress, unsigned cb, uint32_t u32Value));
97	/** Pointer to a FNPCICONFIGWRITE() function. */
98	typedef FNPCICONFIGWRITE *PFNPCICONFIGWRITE;
99	#if !RT_CLANG_PREREQ(11, 0) /* Clang 11 (at least) has trouble with nothrow and pointers to function pointers. */
100	/** Pointer to a PFNPCICONFIGWRITE. */
101	typedef PFNPCICONFIGWRITE *PPFNPCICONFIGWRITE;
102	#endif
103
104	/**
105	* Callback function for mapping an PCI I/O region.
106	*
107	* This is called when a PCI I/O region is mapped, and for new-style devices
108	* also when unmapped (address set to NIL_RTGCPHYS). For new-style devices,
109	* this callback is optional as the PCI bus calls IOM to map and unmap the
110	* regions.
111	*
112	* Old style devices have to call IOM to map the region themselves, while
113	* unmapping is done by the PCI bus like with the new style devices.
114	*
115	* @returns VBox status code.
116	* @retval VINF_PCI_MAPPING_DONE if the caller already did the mapping and the
117	* PCI bus should not use the handle it got to do the registration
118	* again. (Only allowed when @a GCPhysAddress is not NIL_RTGCPHYS.)
119	*
120	* @param pDevIns Pointer to the device instance the PCI device
121	* belongs to.
122	* @param pPciDev Pointer to the PCI device.
123	* @param iRegion The region number.
124	* @param GCPhysAddress Physical address of the region. If @a enmType is
125	* PCI_ADDRESS_SPACE_IO, this is an I/O port, otherwise
126	* it's a physical address.
127	*
128	* NIL_RTGCPHYS indicates that a mapping is about to be
129	* unmapped and that the device deregister access
130	* handlers for it and update its internal state to
131	* reflect this.
132	*
133	* @param cb Size of the region in bytes.
134	* @param enmType One of the PCI_ADDRESS_SPACE_* values.
135	*
136	* @remarks Called with the PDM lock held. The device lock is NOT take because
137	* that is very likely be a lock order violation.
138	*/
139	typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONMAP,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
140	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType));
141	/** Pointer to a FNPCIIOREGIONMAP() function. */
142	typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
143
144
145	/**
146	* Sets the size and type for old saved states from within a
147	* PDMPCIDEV::pfnRegionLoadChangeHookR3 callback.
148	*
149	* @returns VBox status code.
150	* @param pPciDev Pointer to the PCI device.
151	* @param iRegion The region number.
152	* @param cbRegion The region size.
153	* @param enmType Combination of the PCI_ADDRESS_SPACE_* values.
154	*/
155	typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONOLDSETTER,(PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,
156	PCIADDRESSSPACE enmType));
157	/** Pointer to a FNPCIIOREGIONOLDSETTER() function. */
158	typedef FNPCIIOREGIONOLDSETTER *PFNPCIIOREGIONOLDSETTER;
159
160	/**
161	* Swaps two PCI I/O regions from within a PDMPCIDEV::pfnRegionLoadChangeHookR3
162	* callback.
163	*
164	* @returns VBox status code.
165	* @param pPciDev Pointer to the PCI device.
166	* @param iRegion The region number.
167	* @param iOtherRegion The number of the region swap with.
168	* @sa @bugref{9359}
169	*/
170	typedef DECLCALLBACKTYPE(int, FNPCIIOREGIONSWAP,(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t iOtherRegion));
171	/** Pointer to a FNPCIIOREGIONSWAP() function. */
172	typedef FNPCIIOREGIONSWAP *PFNPCIIOREGIONSWAP;
173
174
175	/*
176	* Hack to include the PDMPCIDEVINT structure at the right place
177	* to avoid duplications of FNPCIIOREGIONMAP and such.
178	*/
179	#ifdef PDMPCIDEV_INCLUDE_PRIVATE
180	# include "pdmpcidevint.h"
181	#endif
182
183	/**
184	* PDM PCI Device structure.
185	*
186	* A PCI device belongs to a PDM device. A PDM device may have zero or more PCI
187	* devices associated with it. The first PCI device that it registers
188	* automatically becomes the default PCI device and can be used implicitly
189	* with the device helper APIs. Subsequent PCI devices must be specified
190	* explicitly to the device helper APIs when used.
191	*/
192	typedef struct PDMPCIDEV
193	{
194	/** @name Read only data.
195	* @{
196	*/
197	/** Magic number (PDMPCIDEV_MAGIC). */
198	uint32_t u32Magic;
199	/** PCI device number [11:3] and function [2:0] on the pci bus.
200	* @sa VBOX_PCI_DEVFN_MAKE, VBOX_PCI_DEVFN_FUN_MASK, VBOX_PCI_DEVFN_DEV_SHIFT */
201	uint32_t uDevFn;
202	/** Size of the valid config space (we always allocate 4KB). */
203	uint16_t cbConfig;
204	/** Size of the MSI-X state data optionally following the config space. */
205	uint16_t cbMsixState;
206	/** Index into the PDMDEVINS::apPciDev array. */
207	uint16_t idxSubDev;
208	uint16_t u16Padding;
209	/** Device name. */
210	R3PTRTYPE(const char *) pszNameR3;
211	/** @} */
212
213	/**
214	* Callback for dealing with size changes.
215	*
216	* This is set by the PCI device when needed. It is only needed if any changes
217	* in the PCI resources have been made that may be incompatible with saved state
218	* (i.e. does not reflect configuration, but configuration defaults changed).
219	*
220	* The implementation can use PDMDevHlpMMIOExReduce to adjust the resource
221	* allocation down in size. There is currently no way of growing resources.
222	* Dropping a resource is automatic.
223	*
224	* @returns VBox status code.
225	* @param pDevIns Pointer to the device instance the PCI device
226	* belongs to.
227	* @param pPciDev Pointer to the PCI device.
228	* @param iRegion The region number or UINT32_MAX if old saved state call.
229	* @param cbRegion The size being loaded, RTGCPHYS_MAX if old saved state
230	* call, or 0 for dummy 64-bit top half region.
231	* @param enmType The type being loaded, -1 if old saved state call, or
232	* 0xff if dummy 64-bit top half region.
233	* @param pfnOldSetter Callback for setting size and type for call
234	* regarding old saved states. NULL otherwise.
235	* @param pfnSwapRegions Used to swaps two regions. The second one must be a
236	* higher number than @a iRegion. NULL if old saved
237	* state.
238	*/
239	DECLR3CALLBACKMEMBER(int, pfnRegionLoadChangeHookR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
240	uint64_t cbRegion, PCIADDRESSSPACE enmType,
241	PFNPCIIOREGIONOLDSETTER pfnOldSetter,
242	PFNPCIIOREGIONSWAP pfnSwapRegion));
243
244	/** Reserved for future stuff. */
245	uint64_t au64Reserved[4 + (R3_ARCH_BITS == 32 ? 1 : 0)];
246
247	/** Internal data. */
248	union
249	{
250	#ifdef PDMPCIDEVINT_DECLARED
251	PDMPCIDEVINT s;
252	#endif
253	uint8_t padding[0x180];
254	} Int;
255
256	/** PCI config space.
257	* This is either 256 or 4096 in size. In the latter case it may be
258	* followed by a MSI-X state area. */
259	uint8_t abConfig[4096];
260	/** The MSI-X state data. Optional. */
261	RT_FLEXIBLE_ARRAY_EXTENSION
262	uint8_t abMsixState[RT_FLEXIBLE_ARRAY];
263	} PDMPCIDEV;
264	#ifdef PDMPCIDEVINT_DECLARED
265	AssertCompile(RT_SIZEOFMEMB(PDMPCIDEV, Int.s) <= RT_SIZEOFMEMB(PDMPCIDEV, Int.padding));
266	#endif
267	/** Magic number of PDMPCIDEV::u32Magic (Margaret Eleanor Atwood). */
268	#define PDMPCIDEV_MAGIC UINT32_C(0x19391118)
269
270	/** Checks that the PCI device structure is valid and belongs to the device
271	* instance, but does not return. */
272	#ifdef VBOX_STRICT
273	# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) \
274	do { \
275	uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
276	uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
277	ASMCompilerBarrier(); \
278	AssertMsg( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
279	&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
280	&& offPciDevInTable % cbPciDevTmp == 0, \
281	("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
282	(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp)); \
283	AssertPtr((a_pPciDev)); \
284	AssertMsg((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic)); \
285	} while (0)
286	#else
287	# define PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev) do { } while (0)
288	#endif
289
290	/** Checks that the PCI device structure is valid, belongs to the device
291	* instance and that it is registered, but does not return. */
292	#ifdef VBOX_STRICT
293	# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) \
294	do { \
295	PDMPCIDEV_ASSERT_VALID(a_pDevIns, a_pPciDev); \
296	Assert((a_pPciDev)->Int.s.fRegistered); \
297	} while (0)
298	#else
299	# define PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(a_pDevIns, a_pPciDev) do { } while (0)
300	#endif
301
302	/** Checks that the PCI device structure is valid and belongs to the device
303	* instance, returns appropriate status code if not valid. */
304	#define PDMPCIDEV_ASSERT_VALID_RET(a_pDevIns, a_pPciDev) \
305	do { \
306	uintptr_t const offPciDevInTable = (uintptr_t)(a_pPciDev) - (uintptr_t)pDevIns->apPciDevs[0]; \
307	uint32_t const cbPciDevTmp = pDevIns->cbPciDev; \
308	ASMCompilerBarrier(); \
309	AssertMsgReturn( offPciDevInTable < pDevIns->cPciDevs * cbPciDevTmp \
310	&& cbPciDevTmp >= RT_UOFFSETOF(PDMPCIDEV, abConfig) + 256 \
311	&& offPciDevInTable % cbPciDevTmp == 0, \
312	("pPciDev=%p apPciDevs[0]=%p offPciDevInTable=%p cPciDevs=%#x cbPciDev=%#x\n", \
313	(a_pPciDev), pDevIns->apPciDevs[0], offPciDevInTable, pDevIns->cPciDevs, cbPciDevTmp), \
314	VERR_PDM_NOT_PCI_DEVICE); \
315	AssertMsgReturn((a_pPciDev)->u32Magic == PDMPCIDEV_MAGIC, ("%#x\n", (a_pPciDev)->u32Magic), VERR_PDM_NOT_PCI_DEVICE); \
316	AssertReturn((a_pPciDev)->Int.s.fRegistered, VERR_PDM_NOT_PCI_DEVICE); \
317	} while (0)
318
319
320
321	/** @name PDM PCI config space accessor function.
322	* @{
323	*/
324
325	/** @todo handle extended space access. */
326
327	DECLINLINE(void) PDMPciDevSetByte(PPDMPCIDEV pPciDev, uint32_t offReg, uint8_t u8Value)
328	{
329	Assert(offReg < sizeof(pPciDev->abConfig));
330	pPciDev->abConfig[offReg] = u8Value;
331	}
332
333	DECLINLINE(uint8_t) PDMPciDevGetByte(PCPDMPCIDEV pPciDev, uint32_t offReg)
334	{
335	Assert(offReg < sizeof(pPciDev->abConfig));
336	return pPciDev->abConfig[offReg];
337	}
338
339	DECLINLINE(void) PDMPciDevSetWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint16_t u16Value)
340	{
341	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
342	(uint16_t)&pPciDev->abConfig[offReg] = RT_H2LE_U16(u16Value);
343	}
344
345	DECLINLINE(uint16_t) PDMPciDevGetWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
346	{
347	uint16_t u16Value;
348	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint16_t));
349	u16Value = (uint16_t)&pPciDev->abConfig[offReg];
350	return RT_H2LE_U16(u16Value);
351	}
352
353	DECLINLINE(void) PDMPciDevSetDWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint32_t u32Value)
354	{
355	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
356	(uint32_t)&pPciDev->abConfig[offReg] = RT_H2LE_U32(u32Value);
357	}
358
359	DECLINLINE(uint32_t) PDMPciDevGetDWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
360	{
361	uint32_t u32Value;
362	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint32_t));
363	u32Value = (uint32_t)&pPciDev->abConfig[offReg];
364	return RT_H2LE_U32(u32Value);
365	}
366
367	DECLINLINE(void) PDMPciDevSetQWord(PPDMPCIDEV pPciDev, uint32_t offReg, uint64_t u64Value)
368	{
369	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
370	(uint64_t)&pPciDev->abConfig[offReg] = RT_H2LE_U64(u64Value);
371	}
372
373	DECLINLINE(uint64_t) PDMPciDevGetQWord(PCPDMPCIDEV pPciDev, uint32_t offReg)
374	{
375	uint64_t u64Value;
376	Assert(offReg <= sizeof(pPciDev->abConfig) - sizeof(uint64_t));
377	u64Value = (uint64_t)&pPciDev->abConfig[offReg];
378	return RT_H2LE_U64(u64Value);
379	}
380
381	/**
382	* Sets the vendor id config register.
383	* @param pPciDev The PCI device.
384	* @param u16VendorId The vendor id.
385	*/
386	DECLINLINE(void) PDMPciDevSetVendorId(PPDMPCIDEV pPciDev, uint16_t u16VendorId)
387	{
388	PDMPciDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
389	}
390
391	/**
392	* Gets the vendor id config register.
393	* @returns the vendor id.
394	* @param pPciDev The PCI device.
395	*/
396	DECLINLINE(uint16_t) PDMPciDevGetVendorId(PCPDMPCIDEV pPciDev)
397	{
398	return PDMPciDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
399	}
400
401
402	/**
403	* Sets the device id config register.
404	* @param pPciDev The PCI device.
405	* @param u16DeviceId The device id.
406	*/
407	DECLINLINE(void) PDMPciDevSetDeviceId(PPDMPCIDEV pPciDev, uint16_t u16DeviceId)
408	{
409	PDMPciDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
410	}
411
412	/**
413	* Gets the device id config register.
414	* @returns the device id.
415	* @param pPciDev The PCI device.
416	*/
417	DECLINLINE(uint16_t) PDMPciDevGetDeviceId(PCPDMPCIDEV pPciDev)
418	{
419	return PDMPciDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
420	}
421
422	/**
423	* Sets the command config register.
424	*
425	* @param pPciDev The PCI device.
426	* @param u16Command The command register value.
427	*/
428	DECLINLINE(void) PDMPciDevSetCommand(PPDMPCIDEV pPciDev, uint16_t u16Command)
429	{
430	PDMPciDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
431	}
432
433
434	/**
435	* Gets the command config register.
436	* @returns The command register value.
437	* @param pPciDev The PCI device.
438	*/
439	DECLINLINE(uint16_t) PDMPciDevGetCommand(PCPDMPCIDEV pPciDev)
440	{
441	return PDMPciDevGetWord(pPciDev, VBOX_PCI_COMMAND);
442	}
443
444	/**
445	* Checks if the given PCI device is a bus master.
446	* @returns true if the device is a bus master, false if not.
447	* @param pPciDev The PCI device.
448	*/
449	DECLINLINE(bool) PDMPciDevIsBusmaster(PCPDMPCIDEV pPciDev)
450	{
451	return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_MASTER) != 0;
452	}
453
454	/**
455	* Checks if INTx interrupts disabled in the command config register.
456	* @returns true if disabled.
457	* @param pPciDev The PCI device.
458	*/
459	DECLINLINE(bool) PDMPciDevIsIntxDisabled(PCPDMPCIDEV pPciDev)
460	{
461	return (PDMPciDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
462	}
463
464	/**
465	* Gets the status config register.
466	*
467	* @returns status config register.
468	* @param pPciDev The PCI device.
469	*/
470	DECLINLINE(uint16_t) PDMPciDevGetStatus(PCPDMPCIDEV pPciDev)
471	{
472	return PDMPciDevGetWord(pPciDev, VBOX_PCI_STATUS);
473	}
474
475	/**
476	* Sets the status config register.
477	*
478	* @param pPciDev The PCI device.
479	* @param u16Status The status register value.
480	*/
481	DECLINLINE(void) PDMPciDevSetStatus(PPDMPCIDEV pPciDev, uint16_t u16Status)
482	{
483	PDMPciDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
484	}
485
486
487	/**
488	* Sets the revision id config register.
489	*
490	* @param pPciDev The PCI device.
491	* @param u8RevisionId The revision id.
492	*/
493	DECLINLINE(void) PDMPciDevSetRevisionId(PPDMPCIDEV pPciDev, uint8_t u8RevisionId)
494	{
495	PDMPciDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
496	}
497
498
499	/**
500	* Sets the register level programming class config register.
501	*
502	* @param pPciDev The PCI device.
503	* @param u8ClassProg The new value.
504	*/
505	DECLINLINE(void) PDMPciDevSetClassProg(PPDMPCIDEV pPciDev, uint8_t u8ClassProg)
506	{
507	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
508	}
509
510
511	/**
512	* Sets the sub-class (aka device class) config register.
513	*
514	* @param pPciDev The PCI device.
515	* @param u8SubClass The sub-class.
516	*/
517	DECLINLINE(void) PDMPciDevSetClassSub(PPDMPCIDEV pPciDev, uint8_t u8SubClass)
518	{
519	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
520	}
521
522
523	/**
524	* Sets the base class config register.
525	*
526	* @param pPciDev The PCI device.
527	* @param u8BaseClass The base class.
528	*/
529	DECLINLINE(void) PDMPciDevSetClassBase(PPDMPCIDEV pPciDev, uint8_t u8BaseClass)
530	{
531	PDMPciDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
532	}
533
534	/**
535	* Sets the header type config register.
536	*
537	* @param pPciDev The PCI device.
538	* @param u8HdrType The header type.
539	*/
540	DECLINLINE(void) PDMPciDevSetHeaderType(PPDMPCIDEV pPciDev, uint8_t u8HdrType)
541	{
542	PDMPciDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
543	}
544
545	/**
546	* Gets the header type config register.
547	*
548	* @param pPciDev The PCI device.
549	* @returns u8HdrType The header type.
550	*/
551	DECLINLINE(uint8_t) PDMPciDevGetHeaderType(PCPDMPCIDEV pPciDev)
552	{
553	return PDMPciDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
554	}
555
556	/**
557	* Sets the BIST (built-in self-test) config register.
558	*
559	* @param pPciDev The PCI device.
560	* @param u8Bist The BIST value.
561	*/
562	DECLINLINE(void) PDMPciDevSetBIST(PPDMPCIDEV pPciDev, uint8_t u8Bist)
563	{
564	PDMPciDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
565	}
566
567	/**
568	* Gets the BIST (built-in self-test) config register.
569	*
570	* @param pPciDev The PCI device.
571	* @returns u8Bist The BIST.
572	*/
573	DECLINLINE(uint8_t) PDMPciDevGetBIST(PCPDMPCIDEV pPciDev)
574	{
575	return PDMPciDevGetByte(pPciDev, VBOX_PCI_BIST);
576	}
577
578
579	/**
580	* Sets a base address config register.
581	*
582	* @param pPciDev The PCI device.
583	* @param iReg Base address register number (0..5).
584	* @param fIOSpace Whether it's I/O (true) or memory (false) space.
585	* @param fPrefetchable Whether the memory is prefetachable. Must be false if fIOSpace == true.
586	* @param f64Bit Whether the memory can be mapped anywhere in the 64-bit address space. Otherwise restrict to 32-bit.
587	* @param u32Addr The address value.
588	*/
589	DECLINLINE(void) PDMPciDevSetBaseAddress(PPDMPCIDEV pPciDev, uint8_t iReg, bool fIOSpace, bool fPrefetchable, bool f64Bit,
590	uint32_t u32Addr)
591	{
592	if (fIOSpace)
593	{
594	Assert(!(u32Addr & 0x3)); Assert(!fPrefetchable); Assert(!f64Bit);
595	u32Addr \|= RT_BIT_32(0);
596	}
597	else
598	{
599	Assert(!(u32Addr & 0xf));
600	if (fPrefetchable)
601	u32Addr \|= RT_BIT_32(3);
602	if (f64Bit)
603	u32Addr \|= 0x2 << 1;
604	}
605	switch (iReg)
606	{
607	case 0: iReg = VBOX_PCI_BASE_ADDRESS_0; break;
608	case 1: iReg = VBOX_PCI_BASE_ADDRESS_1; break;
609	case 2: iReg = VBOX_PCI_BASE_ADDRESS_2; break;
610	case 3: iReg = VBOX_PCI_BASE_ADDRESS_3; break;
611	case 4: iReg = VBOX_PCI_BASE_ADDRESS_4; break;
612	case 5: iReg = VBOX_PCI_BASE_ADDRESS_5; break;
613	default: AssertFailedReturnVoid();
614	}
615
616	PDMPciDevSetDWord(pPciDev, iReg, u32Addr);
617	}
618
619	/**
620	* Please document me. I don't seem to be getting as much as calculating
621	* the address of some PCI region.
622	*/
623	DECLINLINE(uint32_t) PDMPciDevGetRegionReg(uint32_t iRegion)
624	{
625	return iRegion == VBOX_PCI_ROM_SLOT
626	? VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
627	}
628
629	/**
630	* Sets the sub-system vendor id config register.
631	*
632	* @param pPciDev The PCI device.
633	* @param u16SubSysVendorId The sub-system vendor id.
634	*/
635	DECLINLINE(void) PDMPciDevSetSubSystemVendorId(PPDMPCIDEV pPciDev, uint16_t u16SubSysVendorId)
636	{
637	PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
638	}
639
640	/**
641	* Gets the sub-system vendor id config register.
642	* @returns the sub-system vendor id.
643	* @param pPciDev The PCI device.
644	*/
645	DECLINLINE(uint16_t) PDMPciDevGetSubSystemVendorId(PCPDMPCIDEV pPciDev)
646	{
647	return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
648	}
649
650
651	/**
652	* Sets the sub-system id config register.
653	*
654	* @param pPciDev The PCI device.
655	* @param u16SubSystemId The sub-system id.
656	*/
657	DECLINLINE(void) PDMPciDevSetSubSystemId(PPDMPCIDEV pPciDev, uint16_t u16SubSystemId)
658	{
659	PDMPciDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
660	}
661
662	/**
663	* Gets the sub-system id config register.
664	* @returns the sub-system id.
665	* @param pPciDev The PCI device.
666	*/
667	DECLINLINE(uint16_t) PDMPciDevGetSubSystemId(PCPDMPCIDEV pPciDev)
668	{
669	return PDMPciDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
670	}
671
672	/**
673	* Sets offset to capability list.
674	*
675	* @param pPciDev The PCI device.
676	* @param u8Offset The offset to capability list.
677	*/
678	DECLINLINE(void) PDMPciDevSetCapabilityList(PPDMPCIDEV pPciDev, uint8_t u8Offset)
679	{
680	PDMPciDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
681	}
682
683	/**
684	* Returns offset to capability list.
685	*
686	* @returns offset to capability list.
687	* @param pPciDev The PCI device.
688	*/
689	DECLINLINE(uint8_t) PDMPciDevGetCapabilityList(PCPDMPCIDEV pPciDev)
690	{
691	return PDMPciDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
692	}
693
694	/**
695	* Sets the interrupt line config register.
696	*
697	* @param pPciDev The PCI device.
698	* @param u8Line The interrupt line.
699	*/
700	DECLINLINE(void) PDMPciDevSetInterruptLine(PPDMPCIDEV pPciDev, uint8_t u8Line)
701	{
702	PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
703	}
704
705	/**
706	* Gets the interrupt line config register.
707	*
708	* @returns The interrupt line.
709	* @param pPciDev The PCI device.
710	*/
711	DECLINLINE(uint8_t) PDMPciDevGetInterruptLine(PCPDMPCIDEV pPciDev)
712	{
713	return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
714	}
715
716	/**
717	* Sets the interrupt pin config register.
718	*
719	* @param pPciDev The PCI device.
720	* @param u8Pin The interrupt pin.
721	*/
722	DECLINLINE(void) PDMPciDevSetInterruptPin(PPDMPCIDEV pPciDev, uint8_t u8Pin)
723	{
724	PDMPciDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
725	}
726
727	/**
728	* Gets the interrupt pin config register.
729	*
730	* @returns The interrupt pin.
731	* @param pPciDev The PCI device.
732	*/
733	DECLINLINE(uint8_t) PDMPciDevGetInterruptPin(PCPDMPCIDEV pPciDev)
734	{
735	return PDMPciDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
736	}
737
738	/** @} */
739
740	/** @name Aliases for old function names.
741	* @{
742	*/
743	#if !defined(PDMPCIDEVICE_NO_DEPRECATED) \|\| defined(DOXYGEN_RUNNING)
744	# define PCIDevSetByte PDMPciDevSetByte
745	# define PCIDevGetByte PDMPciDevGetByte
746	# define PCIDevSetWord PDMPciDevSetWord
747	# define PCIDevGetWord PDMPciDevGetWord
748	# define PCIDevSetDWord PDMPciDevSetDWord
749	# define PCIDevGetDWord PDMPciDevGetDWord
750	# define PCIDevSetQWord PDMPciDevSetQWord
751	# define PCIDevGetQWord PDMPciDevGetQWord
752	# define PCIDevSetVendorId PDMPciDevSetVendorId
753	# define PCIDevGetVendorId PDMPciDevGetVendorId
754	# define PCIDevSetDeviceId PDMPciDevSetDeviceId
755	# define PCIDevGetDeviceId PDMPciDevGetDeviceId
756	# define PCIDevSetCommand PDMPciDevSetCommand
757	# define PCIDevGetCommand PDMPciDevGetCommand
758	# define PCIDevIsBusmaster PDMPciDevIsBusmaster
759	# define PCIDevIsIntxDisabled PDMPciDevIsIntxDisabled
760	# define PCIDevGetStatus PDMPciDevGetStatus
761	# define PCIDevSetStatus PDMPciDevSetStatus
762	# define PCIDevSetRevisionId PDMPciDevSetRevisionId
763	# define PCIDevSetClassProg PDMPciDevSetClassProg
764	# define PCIDevSetClassSub PDMPciDevSetClassSub
765	# define PCIDevSetClassBase PDMPciDevSetClassBase
766	# define PCIDevSetHeaderType PDMPciDevSetHeaderType
767	# define PCIDevGetHeaderType PDMPciDevGetHeaderType
768	# define PCIDevSetBIST PDMPciDevSetBIST
769	# define PCIDevGetBIST PDMPciDevGetBIST
770	# define PCIDevSetBaseAddress PDMPciDevSetBaseAddress
771	# define PCIDevGetRegionReg PDMPciDevGetRegionReg
772	# define PCIDevSetSubSystemVendorId PDMPciDevSetSubSystemVendorId
773	# define PCIDevGetSubSystemVendorId PDMPciDevGetSubSystemVendorId
774	# define PCIDevSetSubSystemId PDMPciDevSetSubSystemId
775	# define PCIDevGetSubSystemId PDMPciDevGetSubSystemId
776	# define PCIDevSetCapabilityList PDMPciDevSetCapabilityList
777	# define PCIDevGetCapabilityList PDMPciDevGetCapabilityList
778	# define PCIDevSetInterruptLine PDMPciDevSetInterruptLine
779	# define PCIDevGetInterruptLine PDMPciDevGetInterruptLine
780	# define PCIDevSetInterruptPin PDMPciDevSetInterruptPin
781	# define PCIDevGetInterruptPin PDMPciDevGetInterruptPin
782	#endif
783	/** @} */
784
785
786	/** @name PDMIICH9BRIDGEPDMPCIDEV_IID - Ugly 3rd party bridge/raw PCI hack.
787	*
788	* When querying this IID via IBase::pfnQueryInterface on a ICH9 bridge, you
789	* will get a pointer to a PDMPCIDEV rather pointer to an interface function
790	* table as is the custom. This was needed by some unusual 3rd-party raw and/or
791	* pass-through implementation which need to provide different PCI configuration
792	* space content for bridges (as long as we don't allow pass-through of bridges
793	* or custom bridge device implementations). So, HACK ALERT to all of this!
794	* @{ */
795	#define PDMIICH9BRIDGEPDMPCIDEV_IID "785c74b1-8510-4458-9422-56750bf221db"
796	typedef PPDMPCIDEV PPDMIICH9BRIDGEPDMPCIDEV;
797	typedef PDMPCIDEV PDMIICH9BRIDGEPDMPCIDEV;
798	/** @} */
799
800
801	/** @} */
802
803	#endif /* !VBOX_INCLUDED_vmm_pdmpcidev_h */

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source: vbox/trunk/include/VBox/vmm/pdmpcidev.h@ 99582

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