VirtualBox

source: vbox/trunk/include/VBox/vmm/pgm.h@ 55928

Last change on this file since 55928 was 55909, checked in by vboxsync, 10 years ago

PGM,++: Made the ring-3 physical access handler callbacks present in all contexts, where applicable. They are not yet registered or used. Taking things slowly.

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File size: 33.7 KB
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1/** @file
2 * PGM - Page Monitor / Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pgm_h
27#define ___VBox_vmm_pgm_h
28
29#include <VBox/types.h>
30#include <VBox/sup.h>
31#include <VBox/vmm/vmapi.h>
32#include <VBox/vmm/gmm.h> /* for PGMMREGISTERSHAREDMODULEREQ */
33#include <iprt/x86.h>
34#include <VBox/VMMDev.h> /* for VMMDEVSHAREDREGIONDESC */
35#include <VBox/param.h>
36
37RT_C_DECLS_BEGIN
38
39/** @defgroup grp_pgm The Page Monitor / Manager API
40 * @{
41 */
42
43/**
44 * FNPGMRELOCATE callback mode.
45 */
46typedef enum PGMRELOCATECALL
47{
48 /** The callback is for checking if the suggested address is suitable. */
49 PGMRELOCATECALL_SUGGEST = 1,
50 /** The callback is for executing the relocation. */
51 PGMRELOCATECALL_RELOCATE
52} PGMRELOCATECALL;
53
54
55/**
56 * Callback function which will be called when PGM is trying to find
57 * a new location for the mapping.
58 *
59 * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
60 * In 1) the callback should say if it objects to a suggested new location. If it
61 * accepts the new location, it is called again for doing it's relocation.
62 *
63 *
64 * @returns true if the location is ok.
65 * @returns false if another location should be found.
66 * @param GCPtrOld The old virtual address.
67 * @param GCPtrNew The new virtual address.
68 * @param enmMode Used to indicate the callback mode.
69 * @param pvUser User argument.
70 * @remark The return value is no a failure indicator, it's an acceptance
71 * indicator. Relocation can not fail!
72 */
73typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
74/** Pointer to a relocation callback function. */
75typedef FNPGMRELOCATE *PFNPGMRELOCATE;
76
77
78/**
79 * Memory access origin.
80 */
81typedef enum PGMACCESSORIGIN
82{
83 /** Invalid zero value. */
84 PGMACCESSORIGIN_INVALID = 0,
85 /** IEM is access memory. */
86 PGMACCESSORIGIN_IEM,
87 /** HM is access memory. */
88 PGMACCESSORIGIN_HM,
89 /** Some device is access memory. */
90 PGMACCESSORIGIN_DEVICE,
91 /** Someone debugging is access memory. */
92 PGMACCESSORIGIN_DEBUGGER,
93 /** SELM is access memory. */
94 PGMACCESSORIGIN_SELM,
95 /** FTM is access memory. */
96 PGMACCESSORIGIN_FTM,
97 /** REM is access memory. */
98 PGMACCESSORIGIN_REM,
99 /** IOM is access memory. */
100 PGMACCESSORIGIN_IOM,
101 /** End of valid values. */
102 PGMACCESSORIGIN_END,
103 /** Type size hack. */
104 PGMACCESSORIGIN_32BIT_HACK = 0x7fffffff
105} PGMACCESSORIGIN;
106
107
108/**
109 * Physical page access handler kind.
110 */
111typedef enum PGMPHYSHANDLERKIND
112{
113 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
114 PGMPHYSHANDLERKIND_MMIO = 1,
115 /** Handler all write access to a physical page range. */
116 PGMPHYSHANDLERKIND_WRITE,
117 /** Handler all access to a physical page range. */
118 PGMPHYSHANDLERKIND_ALL
119
120} PGMPHYSHANDLERKIND;
121
122/**
123 * Guest Access type
124 */
125typedef enum PGMACCESSTYPE
126{
127 /** Read access. */
128 PGMACCESSTYPE_READ = 1,
129 /** Write access. */
130 PGMACCESSTYPE_WRITE
131} PGMACCESSTYPE;
132
133
134/** @def PGM_ALL_CB_DECL
135 * Macro for declaring a handler callback for all contexts. The handler
136 * callback is static in ring-3, and exported in RC and R0.
137 * @sa PGM_ALL_CB2_DECL.
138 */
139#if defined(IN_RC) || defined(IN_RING0)
140# ifdef __cplusplus
141# define PGM_ALL_CB_DECL(type) extern "C" DECLEXPORT(type)
142# else
143# define PGM_ALL_CB_DECL(type) DECLEXPORT(type)
144# endif
145#else
146# define PGM_ALL_CB_DECL(type) static type
147#endif
148
149/** @def PGM_ALL_CB2_DECL
150 * Macro for declaring a handler callback for all contexts. The handler
151 * callback is hidden in ring-3, and exported in RC and R0.
152 * @sa PGM_ALL_CB2_DECL.
153 */
154#if defined(IN_RC) || defined(IN_RING0)
155# ifdef __cplusplus
156# define PGM_ALL_CB2_DECL(type) extern "C" DECLEXPORT(type)
157# else
158# define PGM_ALL_CB2_DECL(type) DECLEXPORT(type)
159# endif
160#else
161# define PGM_ALL_CB2_DECL(type) DECLHIDDEN(type)
162#endif
163
164
165/**
166 * \#PF Handler callback for physical access handler ranges in RC and R0.
167 *
168 * @returns VBox status code (appropriate for RC return).
169 * @param pVM VM Handle.
170 * @param pVCpu Pointer to the cross context CPU context for the
171 * calling EMT.
172 * @param uErrorCode CPU Error code.
173 * @param pRegFrame Trap register frame.
174 * NULL on DMA and other non CPU access.
175 * @param pvFault The fault address (cr2).
176 * @param GCPhysFault The GC physical address corresponding to pvFault.
177 * @param pvUser User argument.
178 */
179typedef DECLCALLBACK(int) FNPGMRZPHYSPFHANDLER(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
180 RTGCPHYS GCPhysFault, void *pvUser);
181/** Pointer to PGM access callback. */
182typedef FNPGMRZPHYSPFHANDLER *PFNPGMRZPHYSPFHANDLER;
183
184
185/**
186 * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
187 *
188 * The handler can not raise any faults, it's mainly for monitoring write access
189 * to certain pages.
190 *
191 * @returns VINF_SUCCESS if the handler have carried out the operation.
192 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
193 * @param pVM VM Handle.
194 * @param pVCpu Pointer to the cross context CPU context for the
195 * calling EMT.
196 * @param GCPhys The physical address the guest is writing to.
197 * @param pvPhys The HC mapping of that address.
198 * @param pvBuf What the guest is reading/writing.
199 * @param cbBuf How much it's reading/writing.
200 * @param enmAccessType The access type.
201 * @param enmOrigin The origin of this call.
202 * @param pvUser User argument.
203 */
204typedef DECLCALLBACK(int) FNPGMPHYSHANDLER(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
205 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser);
206/** Pointer to PGM access callback. */
207typedef FNPGMPHYSHANDLER *PFNPGMPHYSHANDLER;
208
209
210/**
211 * Virtual access handler type.
212 */
213typedef enum PGMVIRTHANDLERKIND
214{
215 /** Write access handled. */
216 PGMVIRTHANDLERKIND_WRITE = 1,
217 /** All access handled. */
218 PGMVIRTHANDLERKIND_ALL,
219 /** Hypervisor write access handled.
220 * This is used to catch the guest trying to write to LDT, TSS and any other
221 * system structure which the brain dead intel guys let unprivilegde code find. */
222 PGMVIRTHANDLERKIND_HYPERVISOR
223} PGMVIRTHANDLERKIND;
224
225/**
226 * \#PF Handler callback for virtual access handler ranges, RC.
227 *
228 * Important to realize that a physical page in a range can have aliases, and
229 * for ALL and WRITE handlers these will also trigger.
230 *
231 * @returns VBox status code (appropriate for GC return).
232 * @param pVM VM Handle.
233 * @param pVCpu Pointer to the cross context CPU context for the
234 * calling EMT.
235 * @param uErrorCode CPU Error code (X86_TRAP_PF_XXX).
236 * @param pRegFrame Trap register frame.
237 * @param pvFault The fault address (cr2).
238 * @param pvRange The base address of the handled virtual range.
239 * @param offRange The offset of the access into this range.
240 * (If it's a EIP range this is the EIP, if not it's pvFault.)
241 * @param pvUser User argument.
242 */
243typedef DECLCALLBACK(int) FNPGMRCVIRTPFHANDLER(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
244 RTGCPTR pvRange, uintptr_t offRange, void *pvUser);
245/** Pointer to PGM access callback. */
246typedef FNPGMRCVIRTPFHANDLER *PFNPGMRCVIRTPFHANDLER;
247
248/**
249 * \#PF Handler callback for virtual access handler ranges, R3.
250 *
251 * Important to realize that a physical page in a range can have aliases, and
252 * for ALL and WRITE handlers these will also trigger.
253 *
254 * @returns VINF_SUCCESS if the handler have carried out the operation.
255 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
256 * @param pVM VM Handle.
257 * @param pVCpu Pointer to the cross context CPU context for the
258 * calling EMT.
259 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
260 * @param pvPtr The HC mapping of that address.
261 * @param pvBuf What the guest is reading/writing.
262 * @param cbBuf How much it's reading/writing.
263 * @param enmAccessType The access type.
264 * @param enmOrigin Who is calling.
265 * @param pvUser User argument.
266 */
267typedef DECLCALLBACK(int) FNPGMR3VIRTHANDLER(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf,
268 PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser);
269/** Pointer to PGM access callback. */
270typedef FNPGMR3VIRTHANDLER *PFNPGMR3VIRTHANDLER;
271
272/**
273 * \#PF Handler callback for invalidation of virtual access handler ranges.
274 *
275 * @param pVM VM Handle.
276 * @param pVCpu Pointer to the cross context CPU context for the
277 * calling EMT.
278 * @param GCPtr The virtual address the guest has changed.
279 * @param pvUser User argument.
280 */
281typedef DECLCALLBACK(int) FNPGMR3VIRTINVALIDATE(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, void *pvUser);
282/** Pointer to PGM invalidation callback. */
283typedef FNPGMR3VIRTINVALIDATE *PFNPGMR3VIRTINVALIDATE;
284
285
286/**
287 * PGMR3PhysEnumDirtyFTPages callback for syncing dirty physical pages
288 *
289 * @param pVM VM Handle.
290 * @param GCPhys GC physical address
291 * @param pRange HC virtual address of the page(s)
292 * @param cbRange Size of the dirty range in bytes.
293 * @param pvUser User argument.
294 */
295typedef DECLCALLBACK(int) FNPGMENUMDIRTYFTPAGES(PVM pVM, RTGCPHYS GCPhys, uint8_t *pRange, unsigned cbRange, void *pvUser);
296/** Pointer to PGMR3PhysEnumDirtyFTPages callback. */
297typedef FNPGMENUMDIRTYFTPAGES *PFNPGMENUMDIRTYFTPAGES;
298
299
300/**
301 * Paging mode.
302 */
303typedef enum PGMMODE
304{
305 /** The usual invalid value. */
306 PGMMODE_INVALID = 0,
307 /** Real mode. */
308 PGMMODE_REAL,
309 /** Protected mode, no paging. */
310 PGMMODE_PROTECTED,
311 /** 32-bit paging. */
312 PGMMODE_32_BIT,
313 /** PAE paging. */
314 PGMMODE_PAE,
315 /** PAE paging with NX enabled. */
316 PGMMODE_PAE_NX,
317 /** 64-bit AMD paging (long mode). */
318 PGMMODE_AMD64,
319 /** 64-bit AMD paging (long mode) with NX enabled. */
320 PGMMODE_AMD64_NX,
321 /** Nested paging mode (shadow only; guest physical to host physical). */
322 PGMMODE_NESTED,
323 /** Extended paging (Intel) mode. */
324 PGMMODE_EPT,
325 /** The max number of modes */
326 PGMMODE_MAX,
327 /** 32bit hackishness. */
328 PGMMODE_32BIT_HACK = 0x7fffffff
329} PGMMODE;
330
331/** Macro for checking if the guest is using paging.
332 * @param enmMode PGMMODE_*.
333 * @remark ASSUMES certain order of the PGMMODE_* values.
334 */
335#define PGMMODE_WITH_PAGING(enmMode) ((enmMode) >= PGMMODE_32_BIT)
336
337/** Macro for checking if it's one of the long mode modes.
338 * @param enmMode PGMMODE_*.
339 */
340#define PGMMODE_IS_LONG_MODE(enmMode) ((enmMode) == PGMMODE_AMD64_NX || (enmMode) == PGMMODE_AMD64)
341
342/**
343 * Is the ROM mapped (true) or is the shadow RAM mapped (false).
344 *
345 * @returns boolean.
346 * @param enmProt The PGMROMPROT value, must be valid.
347 */
348#define PGMROMPROT_IS_ROM(enmProt) \
349 ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
350 || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
351
352
353
354VMMDECL(bool) PGMIsLockOwner(PVM pVM);
355
356VMMDECL(int) PGMRegisterStringFormatTypes(void);
357VMMDECL(void) PGMDeregisterStringFormatTypes(void);
358VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu);
359VMMDECL(RTHCPHYS) PGMGetNestedCR3(PVMCPU pVCpu, PGMMODE enmShadowMode);
360VMMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM);
361VMMDECL(RTHCPHYS) PGMGetInterRCCR3(PVM pVM, PVMCPU pVCpu);
362VMMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM);
363VMMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM);
364VMMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM);
365VMMDECL(int) PGMTrap0eHandler(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
366VMMDECL(int) PGMPrefetchPage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
367VMMDECL(int) PGMVerifyAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
368VMMDECL(int) PGMIsValidAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
369VMMDECL(VBOXSTRICTRC) PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
370VMMDECL(int) PGMMap(PVM pVM, RTGCPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
371VMMDECL(int) PGMMapGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
372VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
373VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
374#ifndef IN_RING0
375VMMDECL(bool) PGMMapHasConflicts(PVM pVM);
376#endif
377#ifdef VBOX_STRICT
378VMMDECL(void) PGMMapCheck(PVM pVM);
379#endif
380VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
381VMMDECL(int) PGMShwMakePageReadonly(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
382VMMDECL(int) PGMShwMakePageWritable(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
383VMMDECL(int) PGMShwMakePageNotPresent(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
384/** @name Flags for PGMShwMakePageReadonly, PGMShwMakePageWritable and
385 * PGMShwMakePageNotPresent
386 * @{ */
387/** The call is from an access handler for dealing with the a faulting write
388 * operation. The virtual address is within the same page. */
389#define PGM_MK_PG_IS_WRITE_FAULT RT_BIT(0)
390/** The page is an MMIO2. */
391#define PGM_MK_PG_IS_MMIO2 RT_BIT(1)
392/** @}*/
393VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
394VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr);
395VMMDECL(int) PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
396VMMDECL(int) PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
397VMM_INT_DECL(int) PGMGstGetPaePdpes(PVMCPU pVCpu, PX86PDPE paPdpes);
398VMM_INT_DECL(void) PGMGstUpdatePaePdpes(PVMCPU pVCpu, PCX86PDPE paPdpes);
399
400VMMDECL(int) PGMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
401VMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal);
402VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
403VMMDECL(int) PGMUpdateCR3(PVMCPU pVCpu, uint64_t cr3);
404VMMDECL(int) PGMChangeMode(PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
405VMMDECL(void) PGMCr0WpEnabled(PVMCPU pVCpu);
406VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu);
407VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu);
408VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
409VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
410VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
411VMMDECL(bool) PGMHasDirtyPages(PVM pVM);
412
413/** PGM physical access handler type registration handle (heap offset, valid
414 * cross contexts without needing fixing up). Callbacks and handler type is
415 * associated with this and it is shared by all handler registrations. */
416typedef uint32_t PGMPHYSHANDLERTYPE;
417/** Pointer to a PGM physical handler type registration handle. */
418typedef PGMPHYSHANDLERTYPE *PPGMPHYSHANDLERTYPE;
419/** NIL value for PGM physical access handler type handle. */
420#define NIL_PGMPHYSHANDLERTYPE UINT32_MAX
421VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType);
422VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType);
423
424VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
425 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
426 R3PTRTYPE(const char *) pszDesc);
427VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
428VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
429VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC);
430VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
431VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
432VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
433VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap);
434VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
435VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
436VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
437
438/** PGM virtual access handler type registration handle (heap offset, valid
439 * cross contexts without needing fixing up). Callbacks and handler type is
440 * associated with this and it is shared by all handler registrations. */
441typedef uint32_t PGMVIRTHANDLERTYPE;
442/** Pointer to a PGM virtual handler type registration handle. */
443typedef PGMVIRTHANDLERTYPE *PPGMVIRTHANDLERTYPE;
444/** NIL value for PGM virtual access handler type handle. */
445#define NIL_PGMVIRTHANDLERTYPE UINT32_MAX
446VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRelease(PVM pVM, PGMVIRTHANDLERTYPE hType);
447VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRetain(PVM pVM, PGMVIRTHANDLERTYPE hType);
448VMM_INT_DECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr);
449
450VMMDECL(bool) PGMPhysIsA20Enabled(PVMCPU pVCpu);
451VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
452VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
453VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
454VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
455VMMDECL(int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
456VMMDECL(int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
457VMMDECL(int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
458VMMDECL(int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
459VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
460VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
461VMMDECL(int) PGMPhysSimpleReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
462VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
463VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
464VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
465VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
466VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
467VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers, void **ppv, PPGMPAGEMAPLOCK pLock);
468VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers);
469
470#ifdef VBOX_STRICT
471VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
472VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
473VMMDECL(unsigned) PGMAssertCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4);
474#endif /* VBOX_STRICT */
475
476#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
477VMMDECL(void) PGMRZDynMapStartAutoSet(PVMCPU pVCpu);
478VMMDECL(void) PGMRZDynMapReleaseAutoSet(PVMCPU pVCpu);
479VMMDECL(void) PGMRZDynMapFlushAutoSet(PVMCPU pVCpu);
480VMMDECL(uint32_t) PGMRZDynMapPushAutoSubset(PVMCPU pVCpu);
481VMMDECL(void) PGMRZDynMapPopAutoSubset(PVMCPU pVCpu, uint32_t iPrevSubset);
482#endif
483
484VMMDECL(int) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages);
485
486/**
487 * Query large page usage state
488 *
489 * @returns 0 - disabled, 1 - enabled
490 * @param pVM The VM to operate on.
491 */
492#define PGMIsUsingLargePages(pVM) ((pVM)->fUseLargePages)
493
494
495#ifdef IN_RC
496/** @defgroup grp_pgm_gc The PGM Guest Context API
497 * @{
498 */
499VMMRCDECL(int) PGMRCDynMapInit(PVM pVM);
500/** @} */
501#endif /* IN_RC */
502
503
504#ifdef IN_RING0
505/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
506 * @{
507 */
508VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu);
509VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PVM pVM, PVMCPU pVCpu);
510VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PVM pVM, PVMCPU pVCpu);
511VMMR0_INT_DECL(int) PGMR0PhysSetupIommu(PVM pVM);
512VMMR0DECL(int) PGMR0SharedModuleCheck(PVM pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs);
513VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
514VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, uint32_t uErr);
515# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
516VMMR0DECL(int) PGMR0DynMapInit(void);
517VMMR0DECL(void) PGMR0DynMapTerm(void);
518VMMR0DECL(int) PGMR0DynMapInitVM(PVM pVM);
519VMMR0DECL(void) PGMR0DynMapTermVM(PVM pVM);
520VMMR0DECL(int) PGMR0DynMapAssertIntegrity(void);
521VMMR0DECL(bool) PGMR0DynMapStartOrMigrateAutoSet(PVMCPU pVCpu);
522VMMR0DECL(void) PGMR0DynMapMigrateAutoSet(PVMCPU pVCpu);
523# endif
524/** @} */
525#endif /* IN_RING0 */
526
527
528
529#ifdef IN_RING3
530/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
531 * @{
532 */
533VMMR3DECL(int) PGMR3Init(PVM pVM);
534VMMR3DECL(int) PGMR3InitDynMap(PVM pVM);
535VMMR3DECL(int) PGMR3InitFinalize(PVM pVM);
536VMMR3_INT_DECL(int) PGMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
537VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
538VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
539VMMR3_INT_DECL(void) PGMR3Reset(PVM pVM);
540VMMR3_INT_DECL(void) PGMR3MemSetup(PVM pVM, bool fReset);
541VMMR3DECL(int) PGMR3Term(PVM pVM);
542VMMR3DECL(int) PGMR3LockCall(PVM pVM);
543VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode);
544
545VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
546VMMR3DECL(int) PGMR3PhysChangeMemBalloon(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage);
547VMMR3DECL(int) PGMR3PhysWriteProtectRAM(PVM pVM);
548VMMR3DECL(int) PGMR3PhysEnumDirtyFTPages(PVM pVM, PFNPGMENUMDIRTYFTPAGES pfnEnum, void *pvUser);
549VMMR3DECL(uint32_t) PGMR3PhysGetRamRangeCount(PVM pVM);
550VMMR3DECL(int) PGMR3PhysGetRange(PVM pVM, uint32_t iRange, PRTGCPHYS pGCPhysStart, PRTGCPHYS pGCPhysLast,
551 const char **ppszDesc, bool *pfIsMmio);
552VMMR3DECL(int) PGMR3QueryMemoryStats(PUVM pUVM, uint64_t *pcbTotalMem, uint64_t *pcbPrivateMem, uint64_t *pcbSharedMem, uint64_t *pcbZeroMem);
553VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t *pcbAllocMem, uint64_t *pcbFreeMem, uint64_t *pcbBallonedMem, uint64_t *pcbSharedMem);
554
555VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType,
556 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc);
557VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
558VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc);
559VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
560VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
561VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
562VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
563VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
564VMMR3DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr);
565
566/** @name PGMR3PhysRegisterRom flags.
567 * @{ */
568/** Inidicates that ROM shadowing should be enabled. */
569#define PGMPHYS_ROM_FLAGS_SHADOWED RT_BIT_32(0)
570/** Indicates that what pvBinary points to won't go away
571 * and can be used for strictness checks. */
572#define PGMPHYS_ROM_FLAGS_PERMANENT_BINARY RT_BIT_32(1)
573/** @} */
574
575VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
576 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc);
577VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
578VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
579VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
580/** @name PGMR3MapPT flags.
581 * @{ */
582/** The mapping may be unmapped later. The default is permanent mappings. */
583#define PGMR3MAPPT_FLAGS_UNMAPPABLE RT_BIT(0)
584/** @} */
585VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, uint32_t fFlags, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
586VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
587VMMR3DECL(int) PGMR3FinalizeMappings(PVM pVM);
588VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
589VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
590VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
591VMMR3DECL(bool) PGMR3MappingsNeedReFixing(PVM pVM);
592#if defined(VBOX_WITH_RAW_MODE) || (HC_ARCH_BITS != 64 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL))
593VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
594#endif
595VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
596
597VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind,
598 PFNPGMPHYSHANDLER pfnHandlerR3,
599 R0PTRTYPE(PFNPGMRZPHYSPFHANDLER) pfnPfHandlerR0,
600 RCPTRTYPE(PFNPGMRZPHYSPFHANDLER) pfnPfHandlerRC,
601 const char *pszDesc, PPGMPHYSHANDLERTYPE phType);
602VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind,
603 R3PTRTYPE(PFNPGMPHYSHANDLER) pfnHandlerR3,
604 const char *pszModR0, const char *pszPfHandlerR0,
605 const char *pszModRC, const char *pszPfHandlerRC, const char *pszDesc,
606 PPGMPHYSHANDLERTYPE phType);
607VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegisterEx(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
608 PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
609 PFNPGMR3VIRTHANDLER pfnHandlerR3,
610 RCPTRTYPE(FNPGMRCVIRTPFHANDLER) pfnPfHandlerRC,
611 const char *pszDesc, PPGMVIRTHANDLERTYPE phType);
612VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegister(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
613 PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
614 PFNPGMR3VIRTHANDLER pfnHandlerR3,
615 const char *pszPfHandlerRC, const char *pszDesc,
616 PPGMVIRTHANDLERTYPE phType);
617VMMR3_INT_DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PVMCPU pVCpu, PGMVIRTHANDLERTYPE hType, RTGCPTR GCPtr,
618 RTGCPTR GCPtrLast, void *pvUserR3, RTRCPTR pvUserRC, const char *pszDesc);
619VMMR3_INT_DECL(int) PGMHandlerVirtualChangeType(PVM pVM, RTGCPTR GCPtr, PGMVIRTHANDLERTYPE hNewType);
620VMMR3_INT_DECL(int) PGMHandlerVirtualDeregister(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, bool fHypervisor);
621VMMR3DECL(int) PGMR3PoolGrow(PVM pVM);
622
623VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv);
624VMMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
625VMMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
626VMMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
627VMMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
628VMMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value, PGMACCESSORIGIN enmOrigin);
629VMMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value, PGMACCESSORIGIN enmOrigin);
630VMMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value, PGMACCESSORIGIN enmOrigin);
631VMMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value, PGMACCESSORIGIN enmOrigin);
632VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
633VMMR3DECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
634VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
635VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
636VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
637VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
638VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
639VMMR3DECL(int) PGMR3PhysAllocateLargeHandyPage(PVM pVM, RTGCPHYS GCPhys);
640
641VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
642
643VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys);
644VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys);
645VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
646VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
647VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
648VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
649VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
650VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
651VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
652VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
653VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
654
655
656/** @name Page sharing
657 * @{ */
658VMMR3DECL(int) PGMR3SharedModuleRegister(PVM pVM, VBOXOSFAMILY enmGuestOS, char *pszModuleName, char *pszVersion,
659 RTGCPTR GCBaseAddr, uint32_t cbModule,
660 uint32_t cRegions, VMMDEVSHAREDREGIONDESC const *paRegions);
661VMMR3DECL(int) PGMR3SharedModuleUnregister(PVM pVM, char *pszModuleName, char *pszVersion,
662 RTGCPTR GCBaseAddr, uint32_t cbModule);
663VMMR3DECL(int) PGMR3SharedModuleCheckAll(PVM pVM);
664VMMR3DECL(int) PGMR3SharedModuleGetPageState(PVM pVM, RTGCPTR GCPtrPage, bool *pfShared, uint64_t *pfPageFlags);
665/** @} */
666
667/** @} */
668#endif /* IN_RING3 */
669
670RT_C_DECLS_END
671
672/** @} */
673#endif
674
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