pgm.h@ 55900

Last change on this file since 55900 was 55900, checked in by vboxsync, 10 years ago
PGM: Added a pVCpu parameter to all virtual handler callouts and also a PGMACCESSORIGIN parameter to the ring-3 one.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 33.3 KB

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1	/** @file
2	* PGM - Page Monitor / Monitor.
3	*/
4
5	/*
6	* Copyright (C) 2006-2015 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_pgm_h
27	#define ___VBox_vmm_pgm_h
28
29	#include <VBox/types.h>
30	#include <VBox/sup.h>
31	#include <VBox/vmm/vmapi.h>
32	#include <VBox/vmm/gmm.h> /* for PGMMREGISTERSHAREDMODULEREQ */
33	#include <iprt/x86.h>
34	#include <VBox/VMMDev.h> /* for VMMDEVSHAREDREGIONDESC */
35	#include <VBox/param.h>
36
37	RT_C_DECLS_BEGIN
38
39	/** @defgroup grp_pgm The Page Monitor / Manager API
40	* @{
41	*/
42
43	/**
44	* FNPGMRELOCATE callback mode.
45	*/
46	typedef enum PGMRELOCATECALL
47	{
48	/** The callback is for checking if the suggested address is suitable. */
49	PGMRELOCATECALL_SUGGEST = 1,
50	/** The callback is for executing the relocation. */
51	PGMRELOCATECALL_RELOCATE
52	} PGMRELOCATECALL;
53
54
55	/**
56	* Callback function which will be called when PGM is trying to find
57	* a new location for the mapping.
58	*
59	* The callback is called in two modes, 1) the check mode and 2) the relocate mode.
60	* In 1) the callback should say if it objects to a suggested new location. If it
61	* accepts the new location, it is called again for doing it's relocation.
62	*
63	*
64	* @returns true if the location is ok.
65	* @returns false if another location should be found.
66	* @param GCPtrOld The old virtual address.
67	* @param GCPtrNew The new virtual address.
68	* @param enmMode Used to indicate the callback mode.
69	* @param pvUser User argument.
70	* @remark The return value is no a failure indicator, it's an acceptance
71	* indicator. Relocation can not fail!
72	*/
73	typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
74	/** Pointer to a relocation callback function. */
75	typedef FNPGMRELOCATE *PFNPGMRELOCATE;
76
77
78	/**
79	* Memory access origin.
80	*/
81	typedef enum PGMACCESSORIGIN
82	{
83	/** Invalid zero value. */
84	PGMACCESSORIGIN_INVALID = 0,
85	/** IEM is access memory. */
86	PGMACCESSORIGIN_IEM,
87	/** HM is access memory. */
88	PGMACCESSORIGIN_HM,
89	/** Some device is access memory. */
90	PGMACCESSORIGIN_DEVICE,
91	/** Someone debugging is access memory. */
92	PGMACCESSORIGIN_DEBUGGER,
93	/** SELM is access memory. */
94	PGMACCESSORIGIN_SELM,
95	/** FTM is access memory. */
96	PGMACCESSORIGIN_FTM,
97	/** REM is access memory. */
98	PGMACCESSORIGIN_REM,
99	/** IOM is access memory. */
100	PGMACCESSORIGIN_IOM,
101	/** End of valid values. */
102	PGMACCESSORIGIN_END,
103	/** Type size hack. */
104	PGMACCESSORIGIN_32BIT_HACK = 0x7fffffff
105	} PGMACCESSORIGIN;
106
107
108	/**
109	* Physical page access handler kind.
110	*/
111	typedef enum PGMPHYSHANDLERKIND
112	{
113	/** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
114	PGMPHYSHANDLERKIND_MMIO = 1,
115	/** Handler all write access to a physical page range. */
116	PGMPHYSHANDLERKIND_WRITE,
117	/** Handler all access to a physical page range. */
118	PGMPHYSHANDLERKIND_ALL
119
120	} PGMPHYSHANDLERKIND;
121
122	/**
123	* \#PF Handler callback for physical access handler ranges in RC.
124	*
125	* @returns VBox status code (appropriate for RC return).
126	* @param pVM VM Handle.
127	* @param uErrorCode CPU Error code.
128	* @param pRegFrame Trap register frame.
129	* NULL on DMA and other non CPU access.
130	* @param pvFault The fault address (cr2).
131	* @param GCPhysFault The GC physical address corresponding to pvFault.
132	* @param pvUser User argument.
133	*/
134	typedef DECLCALLBACK(int) FNPGMRCPHYSPFHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
135	RTGCPHYS GCPhysFault, void *pvUser);
136	/** Pointer to PGM access callback. */
137	typedef FNPGMRCPHYSPFHANDLER *PFNPGMRCPHYSPFHANDLER;
138
139	/**
140	* \#PF Handler callback for physical access handler ranges in R0.
141	*
142	* @returns VBox status code (appropriate for R0 return).
143	* @param pVM VM Handle.
144	* @param uErrorCode CPU Error code.
145	* @param pRegFrame Trap register frame.
146	* NULL on DMA and other non CPU access.
147	* @param pvFault The fault address (cr2).
148	* @param GCPhysFault The GC physical address corresponding to pvFault.
149	* @param pvUser User argument.
150	*/
151	typedef DECLCALLBACK(int) FNPGMR0PHYSPFHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
152	RTGCPHYS GCPhysFault, void *pvUser);
153	/** Pointer to PGM access callback. */
154	typedef FNPGMR0PHYSPFHANDLER *PFNPGMR0PHYSPFHANDLER;
155
156	/**
157	* Guest Access type
158	*/
159	typedef enum PGMACCESSTYPE
160	{
161	/** Read access. */
162	PGMACCESSTYPE_READ = 1,
163	/** Write access. */
164	PGMACCESSTYPE_WRITE
165	} PGMACCESSTYPE;
166
167	/**
168	* \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
169	*
170	* The handler can not raise any faults, it's mainly for monitoring write access
171	* to certain pages.
172	*
173	* @returns VINF_SUCCESS if the handler have carried out the operation.
174	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
175	* @param pVM VM Handle.
176	* @param GCPhys The physical address the guest is writing to.
177	* @param pvPhys The HC mapping of that address.
178	* @param pvBuf What the guest is reading/writing.
179	* @param cbBuf How much it's reading/writing.
180	* @param enmAccessType The access type.
181	* @param pvUser User argument.
182	*
183	* @todo Add pVCpu, possibly replacing pVM.
184	*/
185	typedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf,
186	PGMACCESSTYPE enmAccessType, void *pvUser);
187	/** Pointer to PGM access callback. */
188	typedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
189
190
191	/**
192	* Virtual access handler type.
193	*/
194	typedef enum PGMVIRTHANDLERKIND
195	{
196	/** Write access handled. */
197	PGMVIRTHANDLERKIND_WRITE = 1,
198	/** All access handled. */
199	PGMVIRTHANDLERKIND_ALL,
200	/** Hypervisor write access handled.
201	* This is used to catch the guest trying to write to LDT, TSS and any other
202	* system structure which the brain dead intel guys let unprivilegde code find. */
203	PGMVIRTHANDLERKIND_HYPERVISOR
204	} PGMVIRTHANDLERKIND;
205
206	/**
207	* \#PF Handler callback for virtual access handler ranges, RC.
208	*
209	* Important to realize that a physical page in a range can have aliases, and
210	* for ALL and WRITE handlers these will also trigger.
211	*
212	* @returns VBox status code (appropriate for GC return).
213	* @param pVM VM Handle.
214	* @param pVCpu Pointer to the cross context CPU context for the
215	* calling EMT.
216	* @param uErrorCode CPU Error code (X86_TRAP_PF_XXX).
217	* @param pRegFrame Trap register frame.
218	* @param pvFault The fault address (cr2).
219	* @param pvRange The base address of the handled virtual range.
220	* @param offRange The offset of the access into this range.
221	* (If it's a EIP range this is the EIP, if not it's pvFault.)
222	* @param pvUser User argument.
223	*/
224	typedef DECLCALLBACK(int) FNPGMRCVIRTPFHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
225	RTGCPTR pvRange, uintptr_t offRange, void *pvUser);
226	/** Pointer to PGM access callback. */
227	typedef FNPGMRCVIRTPFHANDLER *PFNPGMRCVIRTPFHANDLER;
228
229	/**
230	* \#PF Handler callback for virtual access handler ranges, R3.
231	*
232	* Important to realize that a physical page in a range can have aliases, and
233	* for ALL and WRITE handlers these will also trigger.
234	*
235	* @returns VINF_SUCCESS if the handler have carried out the operation.
236	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
237	* @param pVM VM Handle.
238	* @param pVCpu Pointer to the cross context CPU context for the
239	* calling EMT.
240	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
241	* @param pvPtr The HC mapping of that address.
242	* @param pvBuf What the guest is reading/writing.
243	* @param cbBuf How much it's reading/writing.
244	* @param enmAccessType The access type.
245	* @param enmOrigin Who is calling.
246	* @param pvUser User argument.
247	*/
248	typedef DECLCALLBACK(int) FNPGMR3VIRTHANDLER(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf,
249	PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser);
250	/** Pointer to PGM access callback. */
251	typedef FNPGMR3VIRTHANDLER *PFNPGMR3VIRTHANDLER;
252
253	/**
254	* \#PF Handler callback for invalidation of virtual access handler ranges.
255	*
256	* @param pVM VM Handle.
257	* @param pVCpu Pointer to the cross context CPU context for the
258	* calling EMT.
259	* @param GCPtr The virtual address the guest has changed.
260	* @param pvUser User argument.
261	*/
262	typedef DECLCALLBACK(int) FNPGMR3VIRTINVALIDATE(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, void *pvUser);
263	/** Pointer to PGM invalidation callback. */
264	typedef FNPGMR3VIRTINVALIDATE *PFNPGMR3VIRTINVALIDATE;
265
266
267	/**
268	* PGMR3PhysEnumDirtyFTPages callback for syncing dirty physical pages
269	*
270	* @param pVM VM Handle.
271	* @param GCPhys GC physical address
272	* @param pRange HC virtual address of the page(s)
273	* @param cbRange Size of the dirty range in bytes.
274	* @param pvUser User argument.
275	*/
276	typedef DECLCALLBACK(int) FNPGMENUMDIRTYFTPAGES(PVM pVM, RTGCPHYS GCPhys, uint8_t pRange, unsigned cbRange, void pvUser);
277	/** Pointer to PGMR3PhysEnumDirtyFTPages callback. */
278	typedef FNPGMENUMDIRTYFTPAGES *PFNPGMENUMDIRTYFTPAGES;
279
280
281	/**
282	* Paging mode.
283	*/
284	typedef enum PGMMODE
285	{
286	/** The usual invalid value. */
287	PGMMODE_INVALID = 0,
288	/** Real mode. */
289	PGMMODE_REAL,
290	/** Protected mode, no paging. */
291	PGMMODE_PROTECTED,
292	/** 32-bit paging. */
293	PGMMODE_32_BIT,
294	/** PAE paging. */
295	PGMMODE_PAE,
296	/** PAE paging with NX enabled. */
297	PGMMODE_PAE_NX,
298	/** 64-bit AMD paging (long mode). */
299	PGMMODE_AMD64,
300	/** 64-bit AMD paging (long mode) with NX enabled. */
301	PGMMODE_AMD64_NX,
302	/** Nested paging mode (shadow only; guest physical to host physical). */
303	PGMMODE_NESTED,
304	/** Extended paging (Intel) mode. */
305	PGMMODE_EPT,
306	/** The max number of modes */
307	PGMMODE_MAX,
308	/** 32bit hackishness. */
309	PGMMODE_32BIT_HACK = 0x7fffffff
310	} PGMMODE;
311
312	/** Macro for checking if the guest is using paging.
313	* @param enmMode PGMMODE_*.
314	* @remark ASSUMES certain order of the PGMMODE_* values.
315	*/
316	#define PGMMODE_WITH_PAGING(enmMode) ((enmMode) >= PGMMODE_32_BIT)
317
318	/** Macro for checking if it's one of the long mode modes.
319	* @param enmMode PGMMODE_*.
320	*/
321	#define PGMMODE_IS_LONG_MODE(enmMode) ((enmMode) == PGMMODE_AMD64_NX \|\| (enmMode) == PGMMODE_AMD64)
322
323	/**
324	* Is the ROM mapped (true) or is the shadow RAM mapped (false).
325	*
326	* @returns boolean.
327	* @param enmProt The PGMROMPROT value, must be valid.
328	*/
329	#define PGMROMPROT_IS_ROM(enmProt) \
330	( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
331	\|\| (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
332
333
334
335	VMMDECL(bool) PGMIsLockOwner(PVM pVM);
336
337	VMMDECL(int) PGMRegisterStringFormatTypes(void);
338	VMMDECL(void) PGMDeregisterStringFormatTypes(void);
339	VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu);
340	VMMDECL(RTHCPHYS) PGMGetNestedCR3(PVMCPU pVCpu, PGMMODE enmShadowMode);
341	VMMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM);
342	VMMDECL(RTHCPHYS) PGMGetInterRCCR3(PVM pVM, PVMCPU pVCpu);
343	VMMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM);
344	VMMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM);
345	VMMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM);
346	VMMDECL(int) PGMTrap0eHandler(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
347	VMMDECL(int) PGMPrefetchPage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
348	VMMDECL(int) PGMVerifyAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
349	VMMDECL(int) PGMIsValidAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
350	VMMDECL(VBOXSTRICTRC) PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
351	VMMDECL(int) PGMMap(PVM pVM, RTGCPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
352	VMMDECL(int) PGMMapGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
353	VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
354	VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
355	#ifndef IN_RING0
356	VMMDECL(bool) PGMMapHasConflicts(PVM pVM);
357	#endif
358	#ifdef VBOX_STRICT
359	VMMDECL(void) PGMMapCheck(PVM pVM);
360	#endif
361	VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
362	VMMDECL(int) PGMShwMakePageReadonly(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
363	VMMDECL(int) PGMShwMakePageWritable(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
364	VMMDECL(int) PGMShwMakePageNotPresent(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
365	/** @name Flags for PGMShwMakePageReadonly, PGMShwMakePageWritable and
366	* PGMShwMakePageNotPresent
367	* @{ */
368	/** The call is from an access handler for dealing with the a faulting write
369	* operation. The virtual address is within the same page. */
370	#define PGM_MK_PG_IS_WRITE_FAULT RT_BIT(0)
371	/** The page is an MMIO2. */
372	#define PGM_MK_PG_IS_MMIO2 RT_BIT(1)
373	/** @}*/
374	VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
375	VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr);
376	VMMDECL(int) PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
377	VMMDECL(int) PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
378	VMM_INT_DECL(int) PGMGstGetPaePdpes(PVMCPU pVCpu, PX86PDPE paPdpes);
379	VMM_INT_DECL(void) PGMGstUpdatePaePdpes(PVMCPU pVCpu, PCX86PDPE paPdpes);
380
381	VMMDECL(int) PGMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
382	VMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal);
383	VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
384	VMMDECL(int) PGMUpdateCR3(PVMCPU pVCpu, uint64_t cr3);
385	VMMDECL(int) PGMChangeMode(PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
386	VMMDECL(void) PGMCr0WpEnabled(PVMCPU pVCpu);
387	VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu);
388	VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu);
389	VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
390	VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
391	VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
392	VMMDECL(bool) PGMHasDirtyPages(PVM pVM);
393
394	/** PGM physical access handler type registration handle (heap offset, valid
395	* cross contexts without needing fixing up). Callbacks and handler type is
396	* associated with this and it is shared by all handler registrations. */
397	typedef uint32_t PGMPHYSHANDLERTYPE;
398	/** Pointer to a PGM physical handler type registration handle. */
399	typedef PGMPHYSHANDLERTYPE *PPGMPHYSHANDLERTYPE;
400	/** NIL value for PGM physical access handler type handle. */
401	#define NIL_PGMPHYSHANDLERTYPE UINT32_MAX
402	VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType);
403	VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType);
404
405	VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
406	RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
407	R3PTRTYPE(const char *) pszDesc);
408	VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
409	VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
410	VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC);
411	VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
412	VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
413	VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
414	VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap);
415	VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
416	VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
417	VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
418
419	/** PGM virtual access handler type registration handle (heap offset, valid
420	* cross contexts without needing fixing up). Callbacks and handler type is
421	* associated with this and it is shared by all handler registrations. */
422	typedef uint32_t PGMVIRTHANDLERTYPE;
423	/** Pointer to a PGM virtual handler type registration handle. */
424	typedef PGMVIRTHANDLERTYPE *PPGMVIRTHANDLERTYPE;
425	/** NIL value for PGM virtual access handler type handle. */
426	#define NIL_PGMVIRTHANDLERTYPE UINT32_MAX
427	VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRelease(PVM pVM, PGMVIRTHANDLERTYPE hType);
428	VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRetain(PVM pVM, PGMVIRTHANDLERTYPE hType);
429	VMM_INT_DECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr);
430
431	VMMDECL(bool) PGMPhysIsA20Enabled(PVMCPU pVCpu);
432	VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
433	VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
434	VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
435	VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
436	VMMDECL(int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
437	VMMDECL(int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
438	VMMDECL(int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
439	VMMDECL(int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, PGMACCESSORIGIN enmOrigin);
440	VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
441	VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
442	VMMDECL(int) PGMPhysSimpleReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
443	VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
444	VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
445	VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
446	VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
447	VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
448	VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers, void **ppv, PPGMPAGEMAPLOCK pLock);
449	VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers);
450
451	#ifdef VBOX_STRICT
452	VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
453	VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
454	VMMDECL(unsigned) PGMAssertCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4);
455	#endif /* VBOX_STRICT */
456
457	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
458	VMMDECL(void) PGMRZDynMapStartAutoSet(PVMCPU pVCpu);
459	VMMDECL(void) PGMRZDynMapReleaseAutoSet(PVMCPU pVCpu);
460	VMMDECL(void) PGMRZDynMapFlushAutoSet(PVMCPU pVCpu);
461	VMMDECL(uint32_t) PGMRZDynMapPushAutoSubset(PVMCPU pVCpu);
462	VMMDECL(void) PGMRZDynMapPopAutoSubset(PVMCPU pVCpu, uint32_t iPrevSubset);
463	#endif
464
465	VMMDECL(int) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages);
466
467	/**
468	* Query large page usage state
469	*
470	* @returns 0 - disabled, 1 - enabled
471	* @param pVM The VM to operate on.
472	*/
473	#define PGMIsUsingLargePages(pVM) ((pVM)->fUseLargePages)
474
475
476	#ifdef IN_RC
477	/** @defgroup grp_pgm_gc The PGM Guest Context API
478	* @{
479	*/
480	VMMRCDECL(int) PGMRCDynMapInit(PVM pVM);
481	/** @} */
482	#endif /* IN_RC */
483
484
485	#ifdef IN_RING0
486	/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
487	* @{
488	*/
489	VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu);
490	VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PVM pVM, PVMCPU pVCpu);
491	VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PVM pVM, PVMCPU pVCpu);
492	VMMR0_INT_DECL(int) PGMR0PhysSetupIommu(PVM pVM);
493	VMMR0DECL(int) PGMR0SharedModuleCheck(PVM pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs);
494	VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
495	VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, uint32_t uErr);
496	# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
497	VMMR0DECL(int) PGMR0DynMapInit(void);
498	VMMR0DECL(void) PGMR0DynMapTerm(void);
499	VMMR0DECL(int) PGMR0DynMapInitVM(PVM pVM);
500	VMMR0DECL(void) PGMR0DynMapTermVM(PVM pVM);
501	VMMR0DECL(int) PGMR0DynMapAssertIntegrity(void);
502	VMMR0DECL(bool) PGMR0DynMapStartOrMigrateAutoSet(PVMCPU pVCpu);
503	VMMR0DECL(void) PGMR0DynMapMigrateAutoSet(PVMCPU pVCpu);
504	# endif
505	/** @} */
506	#endif /* IN_RING0 */
507
508
509
510	#ifdef IN_RING3
511	/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
512	* @{
513	*/
514	VMMR3DECL(int) PGMR3Init(PVM pVM);
515	VMMR3DECL(int) PGMR3InitDynMap(PVM pVM);
516	VMMR3DECL(int) PGMR3InitFinalize(PVM pVM);
517	VMMR3_INT_DECL(int) PGMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
518	VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
519	VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
520	VMMR3_INT_DECL(void) PGMR3Reset(PVM pVM);
521	VMMR3_INT_DECL(void) PGMR3MemSetup(PVM pVM, bool fReset);
522	VMMR3DECL(int) PGMR3Term(PVM pVM);
523	VMMR3DECL(int) PGMR3LockCall(PVM pVM);
524	VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode);
525
526	VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
527	VMMR3DECL(int) PGMR3PhysChangeMemBalloon(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage);
528	VMMR3DECL(int) PGMR3PhysWriteProtectRAM(PVM pVM);
529	VMMR3DECL(int) PGMR3PhysEnumDirtyFTPages(PVM pVM, PFNPGMENUMDIRTYFTPAGES pfnEnum, void *pvUser);
530	VMMR3DECL(uint32_t) PGMR3PhysGetRamRangeCount(PVM pVM);
531	VMMR3DECL(int) PGMR3PhysGetRange(PVM pVM, uint32_t iRange, PRTGCPHYS pGCPhysStart, PRTGCPHYS pGCPhysLast,
532	const char *ppszDesc, bool pfIsMmio);
533	VMMR3DECL(int) PGMR3QueryMemoryStats(PUVM pUVM, uint64_t pcbTotalMem, uint64_t pcbPrivateMem, uint64_t pcbSharedMem, uint64_t pcbZeroMem);
534	VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t pcbAllocMem, uint64_t pcbFreeMem, uint64_t pcbBallonedMem, uint64_t pcbSharedMem);
535
536	VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType,
537	RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc);
538	VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
539	VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc);
540	VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
541	VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
542	VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
543	VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
544	VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
545	VMMR3DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr);
546
547	/** @name PGMR3PhysRegisterRom flags.
548	* @{ */
549	/** Inidicates that ROM shadowing should be enabled. */
550	#define PGMPHYS_ROM_FLAGS_SHADOWED RT_BIT_32(0)
551	/** Indicates that what pvBinary points to won't go away
552	* and can be used for strictness checks. */
553	#define PGMPHYS_ROM_FLAGS_PERMANENT_BINARY RT_BIT_32(1)
554	/** @} */
555
556	VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
557	const void pvBinary, uint32_t cbBinary, uint32_t fFlags, const char pszDesc);
558	VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
559	VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE paPages, const char *pszDesc);
560	VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
561	/** @name PGMR3MapPT flags.
562	* @{ */
563	/** The mapping may be unmapped later. The default is permanent mappings. */
564	#define PGMR3MAPPT_FLAGS_UNMAPPABLE RT_BIT(0)
565	/** @} */
566	VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, uint32_t fFlags, PFNPGMRELOCATE pfnRelocate, void pvUser, const char pszDesc);
567	VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
568	VMMR3DECL(int) PGMR3FinalizeMappings(PVM pVM);
569	VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
570	VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
571	VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
572	VMMR3DECL(bool) PGMR3MappingsNeedReFixing(PVM pVM);
573	#if defined(VBOX_WITH_RAW_MODE) \|\| (HC_ARCH_BITS != 64 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL))
574	VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
575	#endif
576	VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
577
578	VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind,
579	PFNPGMR3PHYSHANDLER pfnHandlerR3,
580	R0PTRTYPE(PFNPGMR0PHYSPFHANDLER) pfnPfHandlerR0,
581	RCPTRTYPE(PFNPGMRCPHYSPFHANDLER) pfnPfHandlerRC,
582	const char *pszDesc, PPGMPHYSHANDLERTYPE phType);
583	VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind,
584	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3,
585	const char pszModR0, const char pszPfHandlerR0,
586	const char pszModRC, const char pszPfHandlerRC, const char *pszDesc,
587	PPGMPHYSHANDLERTYPE phType);
588	VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegisterEx(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
589	PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
590	PFNPGMR3VIRTHANDLER pfnHandlerR3,
591	RCPTRTYPE(FNPGMRCVIRTPFHANDLER) pfnPfHandlerRC,
592	const char *pszDesc, PPGMVIRTHANDLERTYPE phType);
593	VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegister(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
594	PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
595	PFNPGMR3VIRTHANDLER pfnHandlerR3,
596	const char pszPfHandlerRC, const char pszDesc,
597	PPGMVIRTHANDLERTYPE phType);
598	VMMR3_INT_DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PVMCPU pVCpu, PGMVIRTHANDLERTYPE hType, RTGCPTR GCPtr,
599	RTGCPTR GCPtrLast, void pvUserR3, RTRCPTR pvUserRC, const char pszDesc);
600	VMMR3_INT_DECL(int) PGMHandlerVirtualChangeType(PVM pVM, RTGCPTR GCPtr, PGMVIRTHANDLERTYPE hNewType);
601	VMMR3_INT_DECL(int) PGMHandlerVirtualDeregister(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, bool fHypervisor);
602	VMMR3DECL(int) PGMR3PoolGrow(PVM pVM);
603
604	VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv);
605	VMMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
606	VMMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
607	VMMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
608	VMMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys, PGMACCESSORIGIN enmOrigin);
609	VMMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value, PGMACCESSORIGIN enmOrigin);
610	VMMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value, PGMACCESSORIGIN enmOrigin);
611	VMMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value, PGMACCESSORIGIN enmOrigin);
612	VMMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value, PGMACCESSORIGIN enmOrigin);
613	VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, PGMACCESSORIGIN enmOrigin);
614	VMMR3DECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, PGMACCESSORIGIN enmOrigin);
615	VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
616	VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
617	VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
618	VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
619	VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
620	VMMR3DECL(int) PGMR3PhysAllocateLargeHandyPage(PVM pVM, RTGCPHYS GCPhys);
621
622	VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
623
624	VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys);
625	VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys);
626	VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
627	VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t pcbRead);
628	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten);
629	VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t pcbRead);
630	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten);
631	VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
632	VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
633	VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
634	VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
635
636
637	/** @name Page sharing
638	* @{ */
639	VMMR3DECL(int) PGMR3SharedModuleRegister(PVM pVM, VBOXOSFAMILY enmGuestOS, char pszModuleName, char pszVersion,
640	RTGCPTR GCBaseAddr, uint32_t cbModule,
641	uint32_t cRegions, VMMDEVSHAREDREGIONDESC const *paRegions);
642	VMMR3DECL(int) PGMR3SharedModuleUnregister(PVM pVM, char pszModuleName, char pszVersion,
643	RTGCPTR GCBaseAddr, uint32_t cbModule);
644	VMMR3DECL(int) PGMR3SharedModuleCheckAll(PVM pVM);
645	VMMR3DECL(int) PGMR3SharedModuleGetPageState(PVM pVM, RTGCPTR GCPtrPage, bool pfShared, uint64_t pfPageFlags);
646	/** @} */
647
648	/** @} */
649	#endif /* IN_RING3 */
650
651	RT_C_DECLS_END
652
653	/** @} */
654	#endif
655

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source: vbox/trunk/include/VBox/vmm/pgm.h@ 55900

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