vm.h@ 45570

Last change on this file since 45570 was 45533, checked in by vboxsync, 12 years ago
#ifdef the raw-mode force flags to find more code to #ifdef out.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2012 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** Executing guest code and can be poked. */
72	VMCPUSTATE_STARTED_EXEC,
73	/** Executing guest code in the recompiler. */
74	VMCPUSTATE_STARTED_EXEC_REM,
75	/** Halted. */
76	VMCPUSTATE_STARTED_HALTED,
77
78	/** The end of valid virtual CPU states. */
79	VMCPUSTATE_END,
80
81	/** Ensure 32-bit type. */
82	VMCPUSTATE_32BIT_HACK = 0x7fffffff
83	} VMCPUSTATE;
84
85
86	/**
87	* Per virtual CPU data.
88	*/
89	typedef struct VMCPU
90	{
91	/** Per CPU forced action.
92	* See the VMCPU_FF_* \#defines. Updated atomically. */
93	uint32_t volatile fLocalForcedActions; /* 0 */
94	/** The CPU state. */
95	VMCPUSTATE volatile enmState; /* 4 */
96
97	/** Pointer to the ring-3 UVMCPU structure. */
98	PUVMCPU pUVCpu; /* 8 */
99	/** Ring-3 Host Context VM Pointer. */
100	PVMR3 pVMR3; /* 16 / 12 */
101	/** Ring-0 Host Context VM Pointer. */
102	PVMR0 pVMR0; /* 24 / 16 */
103	/** Raw-mode Context VM Pointer. */
104	PVMRC pVMRC; /* 32 / 20 */
105	/** The CPU ID.
106	* This is the index into the VM::aCpu array. */
107	VMCPUID idCpu; /* 36 / 24 */
108	/** The native thread handle. */
109	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
110	/** The native R0 thread handle. (different from the R3 handle!) */
111	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
112	/** Which host CPU ID is this EMT running on.
113	* Only valid when in RC or HMR0 with scheduling disabled. */
114	RTCPUID volatile idHostCpu; /* 56 / 36 */
115
116	/** Trace groups enable flags. */
117	uint32_t fTraceGroups; /* 60 / 40 */
118	/** Align the structures below bit on a 64-byte boundary and make sure it starts
119	* at the same offset in both 64-bit and 32-bit builds.
120	*
121	* @remarks The alignments of the members that are larger than 48 bytes should be
122	* 64-byte for cache line reasons. structs containing small amounts of
123	* data could be lumped together at the end with a < 64 byte padding
124	* following it (to grow into and align the struct size).
125	* */
126	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
127	/** State data for use by ad hoc profiling. */
128	uint32_t uAdHoc;
129	/** Profiling samples for use by ad hoc profiling. */
130	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
131
132	/** CPUM part. */
133	union
134	{
135	#ifdef ___CPUMInternal_h
136	struct CPUMCPU s;
137	#endif
138	uint8_t padding[3584]; /* multiple of 64 */
139	} cpum;
140
141	/** HM part. */
142	union
143	{
144	#ifdef ___HMInternal_h
145	struct HMCPU s;
146	#endif
147	uint8_t padding[5376]; /* multiple of 64 */
148	} hm;
149
150	/** EM part. */
151	union
152	{
153	#ifdef ___EMInternal_h
154	struct EMCPU s;
155	#endif
156	uint8_t padding[1472]; /* multiple of 64 */
157	} em;
158
159	/** IEM part. */
160	union
161	{
162	#ifdef ___IEMInternal_h
163	struct IEMCPU s;
164	#endif
165	uint8_t padding[3072]; /* multiple of 64 */
166	} iem;
167
168	/** TRPM part. */
169	union
170	{
171	#ifdef ___TRPMInternal_h
172	struct TRPMCPU s;
173	#endif
174	uint8_t padding[128]; /* multiple of 64 */
175	} trpm;
176
177	/** TM part. */
178	union
179	{
180	#ifdef ___TMInternal_h
181	struct TMCPU s;
182	#endif
183	uint8_t padding[384]; /* multiple of 64 */
184	} tm;
185
186	/** VMM part. */
187	union
188	{
189	#ifdef ___VMMInternal_h
190	struct VMMCPU s;
191	#endif
192	uint8_t padding[704]; /* multiple of 64 */
193	} vmm;
194
195	/** PDM part. */
196	union
197	{
198	#ifdef ___PDMInternal_h
199	struct PDMCPU s;
200	#endif
201	uint8_t padding[256]; /* multiple of 64 */
202	} pdm;
203
204	/** IOM part. */
205	union
206	{
207	#ifdef ___IOMInternal_h
208	struct IOMCPU s;
209	#endif
210	uint8_t padding[512]; /* multiple of 64 */
211	} iom;
212
213	/** DBGF part.
214	* @todo Combine this with other tiny structures. */
215	union
216	{
217	#ifdef ___DBGFInternal_h
218	struct DBGFCPU s;
219	#endif
220	uint8_t padding[64]; /* multiple of 64 */
221	} dbgf;
222
223	/** Align the following members on page boundary. */
224	uint8_t abAlignment2[448 - 64];
225
226	/** PGM part. */
227	union
228	{
229	#ifdef ___PGMInternal_h
230	struct PGMCPU s;
231	#endif
232	uint8_t padding[4096]; /* multiple of 4096 */
233	} pgm;
234
235	} VMCPU;
236
237
238	#ifndef VBOX_FOR_DTRACE_LIB
239
240	/** @name Operations on VMCPU::enmState
241	* @{ */
242	/** Gets the VMCPU state. */
243	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
244	/** Sets the VMCPU state. */
245	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
246	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
247	/** Cmpares and sets the VMCPU state. */
248	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
249	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
250	/** Checks the VMCPU state. */
251	#ifdef VBOX_STRICT
252	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
253	do { \
254	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
255	AssertMsg(enmState == (enmExpectedState), \
256	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
257	enmState, enmExpectedState, (pVCpu)->idCpu)); \
258	} while (0)
259	#else
260	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
261	#endif
262	/** Tests if the state means that the CPU is started. */
263	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
264	/** Tests if the state means that the CPU is stopped. */
265	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
266	/** @} */
267
268
269	/** The name of the Guest Context VMM Core module. */
270	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
271	/** The name of the Ring 0 Context VMM Core module. */
272	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
273
274	/**
275	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
276	*/
277	#ifdef VBOX_WITH_RAW_MODE
278	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
279	#else
280	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
281	#endif
282
283
284	/** VM Forced Action Flags.
285	*
286	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
287	* action mask of a VM.
288	*
289	* @{
290	*/
291	/** The virtual sync clock has been stopped, go to TM until it has been
292	* restarted... */
293	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
294	/** PDM Queues are pending. */
295	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
296	/** The bit number for VM_FF_PDM_QUEUES. */
297	#define VM_FF_PDM_QUEUES_BIT 3
298	/** PDM DMA transfers are pending. */
299	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
300	/** The bit number for VM_FF_PDM_DMA. */
301	#define VM_FF_PDM_DMA_BIT 4
302	/** This action forces the VM to call DBGF so DBGF can service debugger
303	* requests in the emulation thread.
304	* This action flag stays asserted till DBGF clears it.*/
305	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
306	/** The bit number for VM_FF_DBGF. */
307	#define VM_FF_DBGF_BIT 8
308	/** This action forces the VM to service pending requests from other
309	* thread or requests which must be executed in another context. */
310	#define VM_FF_REQUEST RT_BIT_32(9)
311	/** Check for VM state changes and take appropriate action. */
312	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
313	/** The bit number for VM_FF_CHECK_VM_STATE. */
314	#define VM_FF_CHECK_VM_STATE_BIT 10
315	/** Reset the VM. (postponed) */
316	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
317	/** The bit number for VM_FF_RESET. */
318	#define VM_FF_RESET_BIT 11
319	/** EMT rendezvous in VMM. */
320	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
321	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
322	#define VM_FF_EMT_RENDEZVOUS_BIT 12
323
324	/** PGM needs to allocate handy pages. */
325	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
326	/** PGM is out of memory.
327	* Abandon all loops and code paths which can be resumed and get up to the EM
328	* loops. */
329	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
330	/** PGM is about to perform a lightweight pool flush
331	* Guest SMP: all EMT threads should return to ring 3
332	*/
333	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
334	/** REM needs to be informed about handler changes. */
335	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
336	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
337	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
338	/** Suspend the VM - debug only. */
339	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
340
341
342	/** This action forces the VM to check any pending interrups on the APIC. */
343	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
344	/** This action forces the VM to check any pending interrups on the PIC. */
345	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
346	/** This action forces the VM to schedule and run pending timer (TM).
347	* @remarks Don't move - PATM compatibility. */
348	#define VMCPU_FF_TIMER RT_BIT_32(2)
349	/** This action forces the VM to check any pending NMIs. */
350	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
351	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
352	/** This action forces the VM to check any pending SMIs. */
353	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
354	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
355	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
356	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
357	/** This action forces the VM to service pending requests from other
358	* thread or requests which must be executed in another context. */
359	#define VMCPU_FF_REQUEST RT_BIT_32(9)
360	/** This action forces the VM to service any pending updates to CR3 (used only
361	* by HM). */
362	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
363	/** This action forces the VM to service any pending updates to PAE PDPEs (used
364	* only by HM). */
365	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
366	/** This action forces the VM to resync the page tables before going
367	* back to execute guest code. (GLOBAL FLUSH) */
368	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
369	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
370	* (NON-GLOBAL FLUSH) */
371	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
372	/** Check for pending TLB shootdown actions.
373	* Consumer: HM
374	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
375	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
376	/** Check for pending TLB flush action.
377	* Consumer: HM
378	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
379	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
380	/** The bit number for VMCPU_FF_TLB_FLUSH. */
381	#define VMCPU_FF_TLB_FLUSH_BIT 19
382	#ifdef VBOX_WITH_RAW_MODE
383	/** Check the interrupt and trap gates */
384	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
385	/** Check Guest's TSS ring 0 stack */
386	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
387	/** Check Guest's GDT table */
388	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
389	/** Check Guest's LDT table */
390	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
391	#endif /* VBOX_WITH_RAW_MODE */
392	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
393	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
394	#ifdef VBOX_WITH_RAW_MODE
395	/** CSAM needs to scan the page that's being executed */
396	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
397	/** CSAM needs to do some homework. */
398	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
399	#endif /* VBOX_WITH_RAW_MODE */
400	/** Force return to Ring-3. */
401	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
402
403	/** Externally VM forced actions. Used to quit the idle/wait loop. */
404	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
405	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
406	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
407
408	/** Externally forced VM actions. Used to quit the idle/wait loop. */
409	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
410	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
411	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
412	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
413	\| VMCPU_FF_TIMER)
414
415	/** High priority VM pre-execution actions. */
416	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
417	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
418	\| VM_FF_EMT_RENDEZVOUS)
419	/** High priority VMCPU pre-execution actions. */
420	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
421	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
422	\| VMCPU_FF_INHIBIT_INTERRUPTS \
423	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
424	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
425
426	/** High priority VM pre raw-mode execution mask. */
427	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
428	/** High priority VMCPU pre raw-mode execution mask. */
429	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
430	\| VMCPU_FF_INHIBIT_INTERRUPTS \
431	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
432	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
433
434	/** High priority post-execution actions. */
435	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
436	/** High priority post-execution actions. */
437	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
438	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
439
440	/** Normal priority VM post-execution actions. */
441	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
442	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
443	/** Normal priority VMCPU post-execution actions. */
444	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
445
446	/** Normal priority VM actions. */
447	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
448	\| VM_FF_EMT_RENDEZVOUS)
449	/** Normal priority VMCPU actions. */
450	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
451
452	/** Flags to clear before resuming guest execution. */
453	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
454
455	/** VM Flags that cause the HM loops to go back to ring-3. */
456	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
457	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
458	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
459	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
460
461	/** All the forced VM flags. */
462	#define VM_FF_ALL_MASK (~0U)
463	/** All the forced VMCPU flags. */
464	#define VMCPU_FF_ALL_MASK (~0U)
465
466	/** All the forced VM flags except those related to raw-mode and hardware
467	* assisted execution. */
468	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
469	/** All the forced VMCPU flags except those related to raw-mode and hardware
470	* assisted execution. */
471	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
472	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
473	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
474	/** @} */
475
476	/** @def VM_FF_SET
477	* Sets a force action flag.
478	*
479	* @param pVM VM Handle.
480	* @param fFlag The flag to set.
481	*/
482	#if 1
483	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
484	#else
485	# define VM_FF_SET(pVM, fFlag) \
486	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
487	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
488	} while (0)
489	#endif
490
491	/** @def VMCPU_FF_SET
492	* Sets a force action flag for the given VCPU.
493	*
494	* @param pVCpu VMCPU Handle.
495	* @param fFlag The flag to set.
496	*/
497	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
498
499	/** @def VM_FF_CLEAR
500	* Clears a force action flag.
501	*
502	* @param pVM VM Handle.
503	* @param fFlag The flag to clear.
504	*/
505	#if 1
506	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
507	#else
508	# define VM_FF_CLEAR(pVM, fFlag) \
509	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
510	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
511	} while (0)
512	#endif
513
514	/** @def VMCPU_FF_CLEAR
515	* Clears a force action flag for the given VCPU.
516	*
517	* @param pVCpu VMCPU Handle.
518	* @param fFlag The flag to clear.
519	*/
520	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
521
522	/** @def VM_FF_ISSET
523	* Checks if a force action flag is set.
524	*
525	* @param pVM VM Handle.
526	* @param fFlag The flag to check.
527	*/
528	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
529	/** @deprecated */
530	#define VM_FF_ISSET(pVM, fFlag) VM_FF_IS_SET(pVM, fFlag)
531
532	/** @def VMCPU_FF_ISSET
533	* Checks if a force action flag is set for the given VCPU.
534	*
535	* @param pVCpu VMCPU Handle.
536	* @param fFlag The flag to check.
537	*/
538	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
539	/** @deprecated */
540	#define VMCPU_FF_ISSET(pVCpu, fFlag) VMCPU_FF_IS_SET(pVCpu, fFlag)
541
542	/** @def VM_FF_ISPENDING
543	* Checks if one or more force action in the specified set is pending.
544	*
545	* @param pVM VM Handle.
546	* @param fFlags The flags to check for.
547	*/
548	#define VM_FF_IS_PENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
549	/** @deprecated */
550	#define VM_FF_ISPENDING(pVM, fFlags) VM_FF_IS_PENDING(pVM, fFlags)
551
552	/** @def VM_FF_TESTANDCLEAR
553	* Checks if one (!) force action in the specified set is pending and clears it atomically
554	*
555	* @returns true if the bit was set.
556	* @returns false if the bit was clear.
557	* @param pVM VM Handle.
558	* @param iBit Bit position to check and clear
559	*/
560	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
561	/** @deprecated */
562	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
563
564	/** @def VMCPU_FF_TESTANDCLEAR
565	* Checks if one (!) force action in the specified set is pending and clears it atomically
566	*
567	* @returns true if the bit was set.
568	* @returns false if the bit was clear.
569	* @param pVCpu VMCPU Handle.
570	* @param iBit Bit position to check and clear
571	*/
572	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
573	/** @deprecated */
574	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
575
576	/** @def VMCPU_FF_ISPENDING
577	* Checks if one or more force action in the specified set is pending for the given VCPU.
578	*
579	* @param pVCpu VMCPU Handle.
580	* @param fFlags The flags to check for.
581	*/
582	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
583	/** @deprecated */
584	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) VMCPU_FF_IS_PENDING(pVCpu, fFlags)
585
586	/** @def VM_FF_ISPENDING
587	* Checks if one or more force action in the specified set is pending while one
588	* or more other ones are not.
589	*
590	* @param pVM VM Handle.
591	* @param fFlags The flags to check for.
592	* @param fExcpt The flags that should not be set.
593	*/
594	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
595
596	/** @def VMCPU_FF_IS_PENDING_EXCEPT
597	* Checks if one or more force action in the specified set is pending for the given
598	* VCPU while one or more other ones are not.
599	*
600	* @param pVCpu VMCPU Handle.
601	* @param fFlags The flags to check for.
602	* @param fExcpt The flags that should not be set.
603	*/
604	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
605
606	/** @def VM_IS_EMT
607	* Checks if the current thread is the emulation thread (EMT).
608	*
609	* @remark The ring-0 variation will need attention if we expand the ring-0
610	* code to let threads other than EMT mess around with the VM.
611	*/
612	#ifdef IN_RC
613	# define VM_IS_EMT(pVM) true
614	#else
615	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
616	#endif
617
618	/** @def VMCPU_IS_EMT
619	* Checks if the current thread is the emulation thread (EMT) for the specified
620	* virtual CPU.
621	*/
622	#ifdef IN_RC
623	# define VMCPU_IS_EMT(pVCpu) true
624	#else
625	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
626	#endif
627
628	/** @def VM_ASSERT_EMT
629	* Asserts that the current thread IS the emulation thread (EMT).
630	*/
631	#ifdef IN_RC
632	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
633	#elif defined(IN_RING0)
634	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
635	#else
636	# define VM_ASSERT_EMT(pVM) \
637	AssertMsg(VM_IS_EMT(pVM), \
638	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
639	#endif
640
641	/** @def VMCPU_ASSERT_EMT
642	* Asserts that the current thread IS the emulation thread (EMT) of the
643	* specified virtual CPU.
644	*/
645	#ifdef IN_RC
646	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
647	#elif defined(IN_RING0)
648	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
649	#else
650	# define VMCPU_ASSERT_EMT(pVCpu) \
651	AssertMsg(VMCPU_IS_EMT(pVCpu), \
652	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
653	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
654	#endif
655
656	/** @def VM_ASSERT_EMT_RETURN
657	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
658	*/
659	#ifdef IN_RC
660	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
661	#elif defined(IN_RING0)
662	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
663	#else
664	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
665	AssertMsgReturn(VM_IS_EMT(pVM), \
666	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
667	(rc))
668	#endif
669
670	/** @def VMCPU_ASSERT_EMT_RETURN
671	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
672	*/
673	#ifdef IN_RC
674	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
675	#elif defined(IN_RING0)
676	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
677	#else
678	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
679	AssertMsg(VMCPU_IS_EMT(pVCpu), \
680	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
681	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
682	(rc))
683	#endif
684
685	/** @def VMCPU_ASSERT_EMT_OR_GURU
686	* Asserts that the current thread IS the emulation thread (EMT) of the
687	* specified virtual CPU.
688	*/
689	#if defined(IN_RC) \|\| defined(IN_RING0)
690	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
691	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
692	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
693	#else
694	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
695	AssertMsg( VMCPU_IS_EMT(pVCpu) \
696	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
697	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
698	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
699	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
700	#endif
701
702	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
703	* Asserts that the current thread IS the emulation thread (EMT) of the
704	* specified virtual CPU when the VM is running.
705	*/
706	#if defined(IN_RC) \|\| defined(IN_RING0)
707	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
708	Assert( VMCPU_IS_EMT(pVCpu) \
709	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
710	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
711	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
712	#else
713	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
714	AssertMsg( VMCPU_IS_EMT(pVCpu) \
715	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
716	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
717	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
718	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
719	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
720	#endif
721
722	/** @def VM_ASSERT_EMT0
723	* Asserts that the current thread IS emulation thread \#0 (EMT0).
724	*/
725	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
726
727	/** @def VM_ASSERT_EMT0_RETURN
728	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
729	* it isn't.
730	*/
731	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
732
733
734	/**
735	* Asserts that the current thread is NOT the emulation thread.
736	*/
737	#define VM_ASSERT_OTHER_THREAD(pVM) \
738	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
739
740
741	/** @def VM_ASSERT_STATE_RETURN
742	* Asserts a certain VM state.
743	*/
744	#define VM_ASSERT_STATE(pVM, _enmState) \
745	AssertMsg((pVM)->enmVMState == (_enmState), \
746	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
747
748	/** @def VM_ASSERT_STATE_RETURN
749	* Asserts a certain VM state and returns if it doesn't match.
750	*/
751	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
752	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
753	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
754	(rc))
755
756	/** @def VM_ASSERT_VALID_EXT_RETURN
757	* Asserts a the VM handle is valid for external access, i.e. not being
758	* destroy or terminated.
759	*/
760	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
761	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
762	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
763	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
764	&& VM_IS_EMT(pVM))), \
765	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
766	? VMGetStateName(pVM->enmVMState) : ""), \
767	(rc))
768
769	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
770	* Asserts a the VMCPU handle is valid for external access, i.e. not being
771	* destroy or terminated.
772	*/
773	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
774	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
775	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
776	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
777	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
778	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
779	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
780	(rc))
781
782	#endif /* !VBOX_FOR_DTRACE_LIB */
783
784
785
786	/** This is the VM structure.
787	*
788	* It contains (nearly?) all the VM data which have to be available in all
789	* contexts. Even if it contains all the data the idea is to use APIs not
790	* to modify all the members all around the place. Therefore we make use of
791	* unions to hide everything which isn't local to the current source module.
792	* This means we'll have to pay a little bit of attention when adding new
793	* members to structures in the unions and make sure to keep the padding sizes
794	* up to date.
795	*
796	* Run tstVMStructSize after update!
797	*/
798	typedef struct VM
799	{
800	/** The state of the VM.
801	* This field is read only to everyone except the VM and EM. */
802	VMSTATE volatile enmVMState;
803	/** Forced action flags.
804	* See the VM_FF_* \#defines. Updated atomically.
805	*/
806	volatile uint32_t fGlobalForcedActions;
807	/** Pointer to the array of page descriptors for the VM structure allocation. */
808	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
809	/** Session handle. For use when calling SUPR0 APIs. */
810	PSUPDRVSESSION pSession;
811	/** Pointer to the ring-3 VM structure. */
812	PUVM pUVM;
813	/** Ring-3 Host Context VM Pointer. */
814	R3PTRTYPE(struct VM *) pVMR3;
815	/** Ring-0 Host Context VM Pointer. */
816	R0PTRTYPE(struct VM *) pVMR0;
817	/** Raw-mode Context VM Pointer. */
818	RCPTRTYPE(struct VM *) pVMRC;
819
820	/** The GVM VM handle. Only the GVM should modify this field. */
821	uint32_t hSelf;
822	/** Number of virtual CPUs. */
823	uint32_t cCpus;
824	/** CPU excution cap (1-100) */
825	uint32_t uCpuExecutionCap;
826
827	/** Size of the VM structure including the VMCPU array. */
828	uint32_t cbSelf;
829
830	/** Offset to the VMCPU array starting from beginning of this structure. */
831	uint32_t offVMCPU;
832
833	/**
834	* VMMSwitcher assembly entry point returning to host context.
835	*
836	* Depending on how the host handles the rc status given in @a eax, this may
837	* return and let the caller resume whatever it was doing prior to the call.
838	*
839	*
840	* @param eax The return code, register.
841	* @remark Assume interrupts disabled.
842	* @remark This method pointer lives here because TRPM needs it.
843	*/
844	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
845
846	/**
847	* VMMSwitcher assembly entry point returning to host context without saving the
848	* raw-mode context (hyper) registers.
849	*
850	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
851	* expects the caller to save a RC context in CPUM where one might return if the
852	* return code indicate that this is possible.
853	*
854	* This method pointer lives here because TRPM needs it.
855	*
856	* @param eax The return code, register.
857	* @remark Assume interrupts disabled.
858	* @remark This method pointer lives here because TRPM needs it.
859	*/
860	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
861
862	/** @name Various items that are frequently accessed.
863	* @{ */
864	/** Whether to recompile user mode code or run it raw/hm. */
865	bool fRecompileUser;
866	/** Whether to recompile supervisor mode code or run it raw/hm. */
867	bool fRecompileSupervisor;
868	/** Whether raw mode supports ring-1 code or not. */
869	bool fRawRing1Enabled;
870	/** PATM enabled flag.
871	* This is placed here for performance reasons. */
872	bool fPATMEnabled;
873	/** CSAM enabled flag.
874	* This is placed here for performance reasons. */
875	bool fCSAMEnabled;
876	/** Hardware VM support is available and enabled.
877	* This is placed here for performance reasons. */
878	bool fHMEnabled;
879	/** Hardware VM support is required and non-optional.
880	* This is initialized together with the rest of the VM structure. */
881	bool fHwVirtExtForced;
882	/** Set when this VM is the master FT node. */
883	bool fFaultTolerantMaster;
884	/** Large page enabled flag. */
885	bool fUseLargePages;
886	/** @} */
887
888	/** Alignment padding.. */
889	uint8_t uPadding1[3];
890
891	/** @name Debugging
892	* @{ */
893	/** Raw-mode Context VM Pointer. */
894	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
895	/** Ring-3 Host Context VM Pointer. */
896	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
897	/** Ring-0 Host Context VM Pointer. */
898	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
899	/** @} */
900
901	#if HC_ARCH_BITS == 32
902	/** Alignment padding.. */
903	uint32_t uPadding2;
904	#endif
905
906	/** @name Switcher statistics (remove)
907	* @{ */
908	/** Profiling the total time from Qemu to GC. */
909	STAMPROFILEADV StatTotalQemuToGC;
910	/** Profiling the total time from GC to Qemu. */
911	STAMPROFILEADV StatTotalGCToQemu;
912	/** Profiling the total time spent in GC. */
913	STAMPROFILEADV StatTotalInGC;
914	/** Profiling the total time spent not in Qemu. */
915	STAMPROFILEADV StatTotalInQemu;
916	/** Profiling the VMMSwitcher code for going to GC. */
917	STAMPROFILEADV StatSwitcherToGC;
918	/** Profiling the VMMSwitcher code for going to HC. */
919	STAMPROFILEADV StatSwitcherToHC;
920	STAMPROFILEADV StatSwitcherSaveRegs;
921	STAMPROFILEADV StatSwitcherSysEnter;
922	STAMPROFILEADV StatSwitcherDebug;
923	STAMPROFILEADV StatSwitcherCR0;
924	STAMPROFILEADV StatSwitcherCR4;
925	STAMPROFILEADV StatSwitcherJmpCR3;
926	STAMPROFILEADV StatSwitcherRstrRegs;
927	STAMPROFILEADV StatSwitcherLgdt;
928	STAMPROFILEADV StatSwitcherLidt;
929	STAMPROFILEADV StatSwitcherLldt;
930	STAMPROFILEADV StatSwitcherTSS;
931	/** @} */
932
933	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
934	* must start at the same offset on both 64-bit and 32-bit hosts. */
935	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
936
937	/** CPUM part. */
938	union
939	{
940	#ifdef ___CPUMInternal_h
941	struct CPUM s;
942	#endif
943	uint8_t padding[1536]; /* multiple of 64 */
944	} cpum;
945
946	/** VMM part. */
947	union
948	{
949	#ifdef ___VMMInternal_h
950	struct VMM s;
951	#endif
952	uint8_t padding[1600]; /* multiple of 64 */
953	} vmm;
954
955	/** PGM part. */
956	union
957	{
958	#ifdef ___PGMInternal_h
959	struct PGM s;
960	#endif
961	uint8_t padding[40962+6080]; / multiple of 64 */
962	} pgm;
963
964	/** HM part. */
965	union
966	{
967	#ifdef ___HMInternal_h
968	struct HM s;
969	#endif
970	uint8_t padding[5376]; /* multiple of 64 */
971	} hm;
972
973	/** TRPM part. */
974	union
975	{
976	#ifdef ___TRPMInternal_h
977	struct TRPM s;
978	#endif
979	uint8_t padding[5248]; /* multiple of 64 */
980	} trpm;
981
982	/** SELM part. */
983	union
984	{
985	#ifdef ___SELMInternal_h
986	struct SELM s;
987	#endif
988	uint8_t padding[768]; /* multiple of 64 */
989	} selm;
990
991	/** MM part. */
992	union
993	{
994	#ifdef ___MMInternal_h
995	struct MM s;
996	#endif
997	uint8_t padding[192]; /* multiple of 64 */
998	} mm;
999
1000	/** PDM part. */
1001	union
1002	{
1003	#ifdef ___PDMInternal_h
1004	struct PDM s;
1005	#endif
1006	uint8_t padding[1920]; /* multiple of 64 */
1007	} pdm;
1008
1009	/** IOM part. */
1010	union
1011	{
1012	#ifdef ___IOMInternal_h
1013	struct IOM s;
1014	#endif
1015	uint8_t padding[896]; /* multiple of 64 */
1016	} iom;
1017
1018	/** PATM part. */
1019	union
1020	{
1021	#ifdef ___PATMInternal_h
1022	struct PATM s;
1023	#endif
1024	uint8_t padding[768]; /* multiple of 64 */
1025	} patm;
1026
1027	/** CSAM part. */
1028	union
1029	{
1030	#ifdef ___CSAMInternal_h
1031	struct CSAM s;
1032	#endif
1033	uint8_t padding[1088]; /* multiple of 64 */
1034	} csam;
1035
1036	/** EM part. */
1037	union
1038	{
1039	#ifdef ___EMInternal_h
1040	struct EM s;
1041	#endif
1042	uint8_t padding[256]; /* multiple of 64 */
1043	} em;
1044
1045	/** TM part. */
1046	union
1047	{
1048	#ifdef ___TMInternal_h
1049	struct TM s;
1050	#endif
1051	uint8_t padding[2432]; /* multiple of 64 */
1052	} tm;
1053
1054	/** DBGF part. */
1055	union
1056	{
1057	#ifdef ___DBGFInternal_h
1058	struct DBGF s;
1059	#endif
1060	uint8_t padding[2368]; /* multiple of 64 */
1061	} dbgf;
1062
1063	/** SSM part. */
1064	union
1065	{
1066	#ifdef ___SSMInternal_h
1067	struct SSM s;
1068	#endif
1069	uint8_t padding[128]; /* multiple of 64 */
1070	} ssm;
1071
1072	/** FTM part. */
1073	union
1074	{
1075	#ifdef ___FTMInternal_h
1076	struct FTM s;
1077	#endif
1078	uint8_t padding[512]; /* multiple of 64 */
1079	} ftm;
1080
1081	/** REM part. */
1082	union
1083	{
1084	#ifdef ___REMInternal_h
1085	struct REM s;
1086	#endif
1087	uint8_t padding[0x11100]; /* multiple of 64 */
1088	} rem;
1089
1090	/* ---- begin small stuff ---- */
1091
1092	/** VM part. */
1093	union
1094	{
1095	#ifdef ___VMInternal_h
1096	struct VMINT s;
1097	#endif
1098	uint8_t padding[24]; /* multiple of 8 */
1099	} vm;
1100
1101	/** CFGM part. */
1102	union
1103	{
1104	#ifdef ___CFGMInternal_h
1105	struct CFGM s;
1106	#endif
1107	uint8_t padding[8]; /* multiple of 8 */
1108	} cfgm;
1109
1110
1111	/** Padding for aligning the cpu array on a page boundary. */
1112	uint8_t abAlignment2[478];
1113
1114	/* ---- end small stuff ---- */
1115
1116	/** VMCPU array for the configured number of virtual CPUs.
1117	* Must be aligned on a page boundary for TLB hit reasons as well as
1118	* alignment of VMCPU members. */
1119	VMCPU aCpus[1];
1120	} VM;
1121
1122
1123	#ifdef IN_RC
1124	RT_C_DECLS_BEGIN
1125
1126	/** The VM structure.
1127	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1128	* of those magic globals which we should avoid using.
1129	*/
1130	extern DECLIMPORT(VM) g_VM;
1131
1132	RT_C_DECLS_END
1133	#endif
1134
1135	/** @} */
1136
1137	#endif
1138

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source: vbox/trunk/include/VBox/vmm/vm.h@ 45570

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