VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h@ 87542

Last change on this file since 87542 was 87481, checked in by vboxsync, 4 years ago

vm.h: todo
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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_vm_h
27#define VBOX_INCLUDED_vmm_vm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#ifndef VBOX_FOR_DTRACE_LIB
33# ifndef USING_VMM_COMMON_DEFS
34# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/Config.kmk - make sure you really need to include this file!"
35# endif
36# include <iprt/param.h>
37# include <VBox/param.h>
38# include <VBox/types.h>
39# include <VBox/vmm/cpum.h>
40# include <VBox/vmm/stam.h>
41# include <VBox/vmm/vmapi.h>
42# include <VBox/vmm/vmm.h>
43# include <VBox/sup.h>
44#else
45# pragma D depends_on library vbox-types.d
46# pragma D depends_on library CPUMInternal.d
47# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48#endif
49
50
51
52/** @defgroup grp_vm The Virtual Machine
53 * @ingroup grp_vmm
54 * @{
55 */
56
57/**
58 * The state of a Virtual CPU.
59 *
60 * The basic state indicated here is whether the CPU has been started or not. In
61 * addition, there are sub-states when started for assisting scheduling (GVMM
62 * mostly).
63 *
64 * The transition out of the STOPPED state is done by a vmR3PowerOn.
65 * The transition back to the STOPPED state is done by vmR3PowerOff.
66 *
67 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69 */
70typedef enum VMCPUSTATE
71{
72 /** The customary invalid zero. */
73 VMCPUSTATE_INVALID = 0,
74
75 /** Virtual CPU has not yet been started. */
76 VMCPUSTATE_STOPPED,
77
78 /** CPU started. */
79 VMCPUSTATE_STARTED,
80 /** CPU started in HM context. */
81 VMCPUSTATE_STARTED_HM,
82 /** Executing guest code and can be poked (RC or STI bits of HM). */
83 VMCPUSTATE_STARTED_EXEC,
84 /** Executing guest code using NEM. */
85 VMCPUSTATE_STARTED_EXEC_NEM,
86 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
87 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
88 /** Halted. */
89 VMCPUSTATE_STARTED_HALTED,
90
91 /** The end of valid virtual CPU states. */
92 VMCPUSTATE_END,
93
94 /** Ensure 32-bit type. */
95 VMCPUSTATE_32BIT_HACK = 0x7fffffff
96} VMCPUSTATE;
97
98/** Enables 64-bit FFs. */
99#define VMCPU_WITH_64_BIT_FFS
100
101
102/**
103 * The cross context virtual CPU structure.
104 *
105 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
106 */
107typedef struct VMCPU
108{
109 /** @name Volatile per-cpu data.
110 * @{ */
111 /** Per CPU forced action.
112 * See the VMCPU_FF_* \#defines. Updated atomically. */
113#ifdef VMCPU_WITH_64_BIT_FFS
114 uint64_t volatile fLocalForcedActions;
115#else
116 uint32_t volatile fLocalForcedActions;
117 uint32_t fForLocalForcedActionsExpansion;
118#endif
119 /** The CPU state. */
120 VMCPUSTATE volatile enmState;
121
122 /** Which host CPU ID is this EMT running on.
123 * Only valid when in RC or HMR0 with scheduling disabled. */
124 RTCPUID volatile idHostCpu;
125 /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
126 * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
127 uint32_t volatile iHostCpuSet;
128 /** Padding up to 64 bytes. */
129 uint8_t abAlignment0[64 - 20];
130 /** @} */
131
132 /** IEM part.
133 * @remarks This comes first as it allows the use of 8-bit immediates for the
134 * first 64 bytes of the structure, reducing code size a wee bit. */
135#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
136 union VMCPUUNIONIEMFULL
137#else
138 union VMCPUUNIONIEMSTUB
139#endif
140 {
141#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
142 struct IEMCPU s;
143#endif
144 uint8_t padding[18496]; /* multiple of 64 */
145 } iem;
146
147 /** @name Static per-cpu data.
148 * (Putting this after IEM, hoping that it's less frequently used than it.)
149 * @{ */
150 /** Ring-3 Host Context VM Pointer. */
151 PVMR3 pVMR3;
152 /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
153 RTR0PTR pVCpuR0ForVtg;
154 /** Raw-mode Context VM Pointer. */
155 uint32_t pVMRC;
156 /** Padding for new raw-mode (long mode). */
157 uint32_t pVMRCPadding;
158 /** Pointer to the ring-3 UVMCPU structure. */
159 PUVMCPU pUVCpu;
160 /** The native thread handle. */
161 RTNATIVETHREAD hNativeThread;
162 /** The native R0 thread handle. (different from the R3 handle!) */
163 RTNATIVETHREAD hNativeThreadR0;
164 /** The CPU ID.
165 * This is the index into the VM::aCpu array. */
166#ifdef IN_RING0
167 VMCPUID idCpuUnsafe;
168#else
169 VMCPUID idCpu;
170#endif
171
172 /** Align the structures below bit on a 64-byte boundary and make sure it starts
173 * at the same offset in both 64-bit and 32-bit builds.
174 *
175 * @remarks The alignments of the members that are larger than 48 bytes should be
176 * 64-byte for cache line reasons. structs containing small amounts of
177 * data could be lumped together at the end with a < 64 byte padding
178 * following it (to grow into and align the struct size).
179 */
180 uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
181 /** @} */
182
183 /** HM part. */
184 union VMCPUUNIONHM
185 {
186#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
187 struct HMCPU s;
188#endif
189 uint8_t padding[5888]; /* multiple of 64 */
190 } hm;
191
192 /** NEM part. */
193 union VMCPUUNIONNEM
194 {
195#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
196 struct NEMCPU s;
197#endif
198 uint8_t padding[512]; /* multiple of 64 */
199 } nem;
200
201 /** TRPM part. */
202 union VMCPUUNIONTRPM
203 {
204#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
205 struct TRPMCPU s;
206#endif
207 uint8_t padding[128]; /* multiple of 64 */
208 } trpm;
209
210 /** TM part. */
211 union VMCPUUNIONTM
212 {
213#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
214 struct TMCPU s;
215#endif
216 uint8_t padding[5760]; /* multiple of 64 */
217 } tm;
218
219 /** VMM part. */
220 union VMCPUUNIONVMM
221 {
222#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
223 struct VMMCPU s;
224#endif
225 uint8_t padding[896]; /* multiple of 64 */
226 } vmm;
227
228 /** PDM part. */
229 union VMCPUUNIONPDM
230 {
231#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
232 struct PDMCPU s;
233#endif
234 uint8_t padding[256]; /* multiple of 64 */
235 } pdm;
236
237 /** IOM part. */
238 union VMCPUUNIONIOM
239 {
240#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
241 struct IOMCPU s;
242#endif
243 uint8_t padding[512]; /* multiple of 64 */
244 } iom;
245
246 /** DBGF part.
247 * @todo Combine this with other tiny structures. */
248 union VMCPUUNIONDBGF
249 {
250#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
251 struct DBGFCPU s;
252#endif
253 uint8_t padding[512]; /* multiple of 64 */
254 } dbgf;
255
256 /** GIM part. */
257 union VMCPUUNIONGIM
258 {
259#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
260 struct GIMCPU s;
261#endif
262 uint8_t padding[512]; /* multiple of 64 */
263 } gim;
264
265 /** APIC part. */
266 union VMCPUUNIONAPIC
267 {
268#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
269 struct APICCPU s;
270#endif
271 uint8_t padding[3840]; /* multiple of 64 */
272 } apic;
273
274 /*
275 * Some less frequently used global members that doesn't need to take up
276 * precious space at the head of the structure.
277 */
278
279 /** Trace groups enable flags. */
280 uint32_t fTraceGroups; /* 64 / 44 */
281 /** State data for use by ad hoc profiling. */
282 uint32_t uAdHoc;
283 /** Profiling samples for use by ad hoc profiling. */
284 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
285
286 /** Align the following members on page boundary. */
287 uint8_t abAlignment2[3192];
288
289 /** PGM part. */
290 union VMCPUUNIONPGM
291 {
292#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
293 struct PGMCPU s;
294#endif
295 uint8_t padding[4096]; /* multiple of 4096 */
296 } pgm;
297
298 /** CPUM part. */
299 union VMCPUUNIONCPUM
300 {
301#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
302 struct CPUMCPU s;
303#endif
304#ifdef VMCPU_INCL_CPUM_GST_CTX
305 /** The guest CPUM context for direct use by execution engines.
306 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
307 * others. The rest will use the function based CPUM API. */
308 CPUMCTX GstCtx;
309#endif
310 uint8_t padding[4096]; /* multiple of 4096 */
311 } cpum;
312
313 /** EM part. */
314 union VMCPUUNIONEM
315 {
316#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
317 struct EMCPU s;
318#endif
319 uint8_t padding[40960]; /* multiple of 4096 */
320 } em;
321} VMCPU;
322
323
324#ifndef VBOX_FOR_DTRACE_LIB
325AssertCompileSizeAlignment(VMCPU, 4096);
326
327/** @name Operations on VMCPU::enmState
328 * @{ */
329/** Gets the VMCPU state. */
330#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
331/** Sets the VMCPU state. */
332#define VMCPU_SET_STATE(pVCpu, enmNewState) \
333 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
334/** Cmpares and sets the VMCPU state. */
335#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
336 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
337/** Checks the VMCPU state. */
338#ifdef VBOX_STRICT
339# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
340 do { \
341 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
342 AssertMsg(enmState == (enmExpectedState), \
343 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
344 enmState, enmExpectedState, (pVCpu)->idCpu)); \
345 } while (0)
346
347# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
348 do { \
349 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
350 AssertMsg( enmState == (enmExpectedState) \
351 || enmState == (a_enmExpectedState2), \
352 ("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
353 enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
354 } while (0)
355#else
356# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
357# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
358#endif
359/** Tests if the state means that the CPU is started. */
360#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
361/** Tests if the state means that the CPU is stopped. */
362#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
363/** @} */
364
365
366/** The name of the raw-mode context VMM Core module. */
367#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
368/** The name of the ring-0 context VMM Core module. */
369#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
370
371
372/** VM Forced Action Flags.
373 *
374 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
375 * action mask of a VM.
376 *
377 * Available VM bits:
378 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
379 *
380 *
381 * Available VMCPU bits:
382 * 14, 15, 36 to 63
383 *
384 * @todo If we run low on VMCPU, we may consider merging the SELM bits
385 *
386 * @{
387 */
388/** The virtual sync clock has been stopped, go to TM until it has been
389 * restarted... */
390#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
391#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
392/** PDM Queues are pending. */
393#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
394/** The bit number for VM_FF_PDM_QUEUES. */
395#define VM_FF_PDM_QUEUES_BIT 3
396/** PDM DMA transfers are pending. */
397#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
398/** The bit number for VM_FF_PDM_DMA. */
399#define VM_FF_PDM_DMA_BIT 4
400/** This action forces the VM to call DBGF so DBGF can service debugger
401 * requests in the emulation thread.
402 * This action flag stays asserted till DBGF clears it.*/
403#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
404/** The bit number for VM_FF_DBGF. */
405#define VM_FF_DBGF_BIT 8
406/** This action forces the VM to service pending requests from other
407 * thread or requests which must be executed in another context. */
408#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
409#define VM_FF_REQUEST_BIT 9
410/** Check for VM state changes and take appropriate action. */
411#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
412/** The bit number for VM_FF_CHECK_VM_STATE. */
413#define VM_FF_CHECK_VM_STATE_BIT 10
414/** Reset the VM. (postponed) */
415#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
416/** The bit number for VM_FF_RESET. */
417#define VM_FF_RESET_BIT 11
418/** EMT rendezvous in VMM. */
419#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
420/** The bit number for VM_FF_EMT_RENDEZVOUS. */
421#define VM_FF_EMT_RENDEZVOUS_BIT 12
422
423/** PGM needs to allocate handy pages. */
424#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
425#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
426/** PGM is out of memory.
427 * Abandon all loops and code paths which can be resumed and get up to the EM
428 * loops. */
429#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
430#define VM_FF_PGM_NO_MEMORY_BIT 19
431 /** PGM is about to perform a lightweight pool flush
432 * Guest SMP: all EMT threads should return to ring 3
433 */
434#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
435#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
436/** Suspend the VM - debug only. */
437#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
438#define VM_FF_DEBUG_SUSPEND_BIT 31
439
440
441/** This action forces the VM to check any pending interrupts on the APIC. */
442#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
443#define VMCPU_FF_INTERRUPT_APIC_BIT 0
444/** This action forces the VM to check any pending interrups on the PIC. */
445#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
446#define VMCPU_FF_INTERRUPT_PIC_BIT 1
447/** This action forces the VM to schedule and run pending timer (TM).
448 * @remarks Don't move - PATM compatibility. */
449#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
450#define VMCPU_FF_TIMER_BIT 2
451/** This action forces the VM to check any pending NMIs. */
452#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
453#define VMCPU_FF_INTERRUPT_NMI_BIT 3
454/** This action forces the VM to check any pending SMIs. */
455#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
456#define VMCPU_FF_INTERRUPT_SMI_BIT 4
457/** PDM critical section unlocking is pending, process promptly upon return to R3. */
458#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
459#define VMCPU_FF_PDM_CRITSECT_BIT 5
460/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
461 * the virtual CPU out of the next (/current) halted state. It is not processed
462 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
463 * is cleared the next time EM leaves the HALTED state. */
464#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
465#define VMCPU_FF_UNHALT_BIT 6
466/** Pending IEM action (mask). */
467#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
468/** Pending IEM action (bit number). */
469#define VMCPU_FF_IEM_BIT 7
470/** Pending APIC action (bit number). */
471#define VMCPU_FF_UPDATE_APIC_BIT 8
472/** This action forces the VM to update APIC's asynchronously arrived
473 * interrupts as pending interrupts. */
474#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
475/** This action forces the VM to service pending requests from other
476 * thread or requests which must be executed in another context. */
477#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
478#define VMCPU_FF_REQUEST_BIT 9
479/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
480#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
481/** The bit number for VMCPU_FF_DBGF. */
482#define VMCPU_FF_DBGF_BIT 10
483/** This action forces the VM to service any pending updates to CR3 (used only
484 * by HM). */
485/** Hardware virtualized nested-guest interrupt pending. */
486#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
487#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
488#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
489#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
490/** This action forces the VM to service any pending updates to PAE PDPEs (used
491 * only by HM)
492 * @todo r=bird: This description is very unhelpful. From the looks of things,
493 * when this flag is set the actual PDPE values live in HMCPU::aPdpes
494 * and PGM should fetch them from there before use. */
495#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
496#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
497/** This action forces the VM to resync the page tables before going
498 * back to execute guest code. (GLOBAL FLUSH) */
499#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
500#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
501/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
502 * (NON-GLOBAL FLUSH) */
503#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
504#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
505/** Check for pending TLB shootdown actions (deprecated)
506 * Reserved for furture HM re-use if necessary / safe.
507 * Consumer: HM */
508#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
509#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
510/** Check for pending TLB flush action.
511 * Consumer: HM
512 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
513#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
514/** The bit number for VMCPU_FF_TLB_FLUSH. */
515#define VMCPU_FF_TLB_FLUSH_BIT 19
516/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
517/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
518/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
519/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
520/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
521#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
522#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
523/** Block injection of non-maskable interrupts to the guest. */
524#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
525#define VMCPU_FF_BLOCK_NMIS_BIT 25
526/** Force return to Ring-3. */
527#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
528#define VMCPU_FF_TO_R3_BIT 28
529/** Force return to ring-3 to service pending I/O or MMIO write.
530 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
531 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
532 * status codes to be propagated at the same time without loss. */
533#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
534#define VMCPU_FF_IOM_BIT 29
535/* 30 used to be VMCPU_FF_CPUM */
536/** VMX-preemption timer expired. */
537#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
538#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
539/** Pending MTF (Monitor Trap Flag) event. */
540#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
541#define VMCPU_FF_VMX_MTF_BIT 32
542/** VMX APIC-write emulation pending. */
543#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
544#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
545/** VMX interrupt-window event pending. */
546#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
547#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
548/** VMX NMI-window event pending. */
549#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
550#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
551
552
553/** Externally VM forced actions. Used to quit the idle/wait loop. */
554#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
555/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
556#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
557
558/** Externally forced VM actions. Used to quit the idle/wait loop. */
559#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
560 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
561/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
562#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
563 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
564 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
565 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
566
567/** High priority VM pre-execution actions. */
568#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
569 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
570 | VM_FF_EMT_RENDEZVOUS )
571/** High priority VMCPU pre-execution actions. */
572#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
573 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
574 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
575 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
576 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
577
578/** High priority VM pre raw-mode execution mask. */
579#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
580/** High priority VMCPU pre raw-mode execution mask. */
581#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
582 | VMCPU_FF_INHIBIT_INTERRUPTS )
583
584/** High priority post-execution actions. */
585#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
586/** High priority post-execution actions. */
587#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
588 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
589 | VMCPU_FF_IEM | VMCPU_FF_IOM )
590
591/** Normal priority VM post-execution actions. */
592#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
593 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
594/** Normal priority VMCPU post-execution actions. */
595#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
596
597/** Normal priority VM actions. */
598#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
599/** Normal priority VMCPU actions. */
600#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
601
602/** Flags to clear before resuming guest execution. */
603#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
604
605
606/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
607#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
608 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
609/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
610#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
611 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
612/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
613#ifdef IN_RING3
614# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
615 | VMCPU_FF_VMX_MTF )
616#else
617# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
618 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
619#endif
620/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
621 * enabled. */
622#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
623 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
624 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
625 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
626 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
627/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
628 * disabled. */
629#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
630 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
631 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
632
633/** VM Flags that cause the HM loops to go back to ring-3. */
634#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
635 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
636/** VMCPU Flags that cause the HM loops to go back to ring-3. */
637#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
638 | VMCPU_FF_IEM | VMCPU_FF_IOM)
639
640/** High priority ring-0 VM pre HM-mode execution mask. */
641#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
642/** High priority ring-0 VMCPU pre HM-mode execution mask. */
643#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
644 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
645 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
646/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
647#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
648 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
649 | VM_FF_PDM_DMA) )
650/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
651#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
652 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
653
654/** All the VMX nested-guest flags. */
655#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
656 | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW )
657
658/** All the forced VM flags. */
659#define VM_FF_ALL_MASK (UINT32_MAX)
660/** All the forced VMCPU flags. */
661#define VMCPU_FF_ALL_MASK (UINT32_MAX)
662
663/** All the forced VM flags except those related to raw-mode and hardware
664 * assisted execution. */
665#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
666/** All the forced VMCPU flags except those related to raw-mode and hardware
667 * assisted execution. */
668#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
669/** @} */
670
671/** @def VM_FF_SET
672 * Sets a single force action flag.
673 *
674 * @param pVM The cross context VM structure.
675 * @param fFlag The flag to set.
676 */
677#define VM_FF_SET(pVM, fFlag) do { \
678 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
679 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
680 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
681 } while (0)
682
683/** @def VMCPU_FF_SET
684 * Sets a single force action flag for the given VCPU.
685 *
686 * @param pVCpu The cross context virtual CPU structure.
687 * @param fFlag The flag to set.
688 * @sa VMCPU_FF_SET_MASK
689 */
690#ifdef VMCPU_WITH_64_BIT_FFS
691# define VMCPU_FF_SET(pVCpu, fFlag) do { \
692 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
693 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
694 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
695 } while (0)
696#else
697# define VMCPU_FF_SET(pVCpu, fFlag) do { \
698 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
699 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
700 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
701 } while (0)
702#endif
703
704/** @def VMCPU_FF_SET_MASK
705 * Sets a two or more force action flag for the given VCPU.
706 *
707 * @param pVCpu The cross context virtual CPU structure.
708 * @param fFlags The flags to set.
709 * @sa VMCPU_FF_SET
710 */
711#ifdef VMCPU_WITH_64_BIT_FFS
712# if ARCH_BITS > 32
713# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
714 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
715# else
716# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
717 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
718 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
719 } while (0)
720# endif
721#else
722# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
723 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
724#endif
725
726/** @def VM_FF_CLEAR
727 * Clears a single force action flag.
728 *
729 * @param pVM The cross context VM structure.
730 * @param fFlag The flag to clear.
731 */
732#define VM_FF_CLEAR(pVM, fFlag) do { \
733 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
734 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
735 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
736 } while (0)
737
738/** @def VMCPU_FF_CLEAR
739 * Clears a single force action flag for the given VCPU.
740 *
741 * @param pVCpu The cross context virtual CPU structure.
742 * @param fFlag The flag to clear.
743 */
744#ifdef VMCPU_WITH_64_BIT_FFS
745# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
746 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
747 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
748 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
749 } while (0)
750#else
751# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
752 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
753 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
754 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
755 } while (0)
756#endif
757
758/** @def VMCPU_FF_CLEAR_MASK
759 * Clears two or more force action flags for the given VCPU.
760 *
761 * @param pVCpu The cross context virtual CPU structure.
762 * @param fFlags The flags to clear.
763 */
764#ifdef VMCPU_WITH_64_BIT_FFS
765# if ARCH_BITS > 32
766# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
767 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
768# else
769# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
770 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
771 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
772 } while (0)
773# endif
774#else
775# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
776 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
777#endif
778
779/** @def VM_FF_IS_SET
780 * Checks if single a force action flag is set.
781 *
782 * @param pVM The cross context VM structure.
783 * @param fFlag The flag to check.
784 * @sa VM_FF_IS_ANY_SET
785 */
786#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
787# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
788#else
789# define VM_FF_IS_SET(pVM, fFlag) \
790 ([](PVM a_pVM) -> bool \
791 { \
792 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
793 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
794 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
795 }(pVM))
796#endif
797
798/** @def VMCPU_FF_IS_SET
799 * Checks if a single force action flag is set for the given VCPU.
800 *
801 * @param pVCpu The cross context virtual CPU structure.
802 * @param fFlag The flag to check.
803 * @sa VMCPU_FF_IS_ANY_SET
804 */
805#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
806# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
807#else
808# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
809 ([](PCVMCPU a_pVCpu) -> bool \
810 { \
811 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
812 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
813 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
814 }(pVCpu))
815#endif
816
817/** @def VM_FF_IS_ANY_SET
818 * Checks if one or more force action in the specified set is pending.
819 *
820 * @param pVM The cross context VM structure.
821 * @param fFlags The flags to check for.
822 * @sa VM_FF_IS_SET
823 */
824#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
825
826/** @def VMCPU_FF_IS_ANY_SET
827 * Checks if two or more force action flags in the specified set is set for the given VCPU.
828 *
829 * @param pVCpu The cross context virtual CPU structure.
830 * @param fFlags The flags to check for.
831 * @sa VMCPU_FF_IS_SET
832 */
833#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
834
835/** @def VM_FF_TEST_AND_CLEAR
836 * Checks if one (!) force action in the specified set is pending and clears it atomically
837 *
838 * @returns true if the bit was set.
839 * @returns false if the bit was clear.
840 * @param pVM The cross context VM structure.
841 * @param fFlag Flag constant to check and clear (_BIT is appended).
842 */
843#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
844
845/** @def VMCPU_FF_TEST_AND_CLEAR
846 * Checks if one (!) force action in the specified set is pending and clears it atomically
847 *
848 * @returns true if the bit was set.
849 * @returns false if the bit was clear.
850 * @param pVCpu The cross context virtual CPU structure.
851 * @param fFlag Flag constant to check and clear (_BIT is appended).
852 */
853#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
854
855/** @def VM_FF_IS_PENDING_EXCEPT
856 * Checks if one or more force action in the specified set is pending while one
857 * or more other ones are not.
858 *
859 * @param pVM The cross context VM structure.
860 * @param fFlags The flags to check for.
861 * @param fExcpt The flags that should not be set.
862 */
863#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
864 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
865
866/** @def VM_IS_EMT
867 * Checks if the current thread is the emulation thread (EMT).
868 *
869 * @remark The ring-0 variation will need attention if we expand the ring-0
870 * code to let threads other than EMT mess around with the VM.
871 */
872#ifdef IN_RC
873# define VM_IS_EMT(pVM) true
874#else
875# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
876#endif
877
878/** @def VMCPU_IS_EMT
879 * Checks if the current thread is the emulation thread (EMT) for the specified
880 * virtual CPU.
881 */
882#ifdef IN_RC
883# define VMCPU_IS_EMT(pVCpu) true
884#else
885# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
886#endif
887
888/** @def VM_ASSERT_EMT
889 * Asserts that the current thread IS the emulation thread (EMT).
890 */
891#ifdef IN_RC
892# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
893#elif defined(IN_RING0)
894# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
895#else
896# define VM_ASSERT_EMT(pVM) \
897 AssertMsg(VM_IS_EMT(pVM), \
898 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
899#endif
900
901/** @def VMCPU_ASSERT_EMT
902 * Asserts that the current thread IS the emulation thread (EMT) of the
903 * specified virtual CPU.
904 */
905#ifdef IN_RC
906# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
907#elif defined(IN_RING0)
908# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
909 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
910 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
911 (pVCpu) ? (pVCpu)->idCpu : 0))
912#else
913# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
914 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
915 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
916#endif
917
918/** @def VM_ASSERT_EMT_RETURN
919 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
920 */
921#ifdef IN_RC
922# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
923#elif defined(IN_RING0)
924# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
925#else
926# define VM_ASSERT_EMT_RETURN(pVM, rc) \
927 AssertMsgReturn(VM_IS_EMT(pVM), \
928 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
929 (rc))
930#endif
931
932/** @def VMCPU_ASSERT_EMT_RETURN
933 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
934 */
935#ifdef IN_RC
936# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
937#elif defined(IN_RING0)
938# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
939#else
940# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
941 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
942 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
943 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
944 (rc))
945#endif
946
947/** @def VMCPU_ASSERT_EMT_OR_GURU
948 * Asserts that the current thread IS the emulation thread (EMT) of the
949 * specified virtual CPU.
950 */
951#if defined(IN_RC) || defined(IN_RING0)
952# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
953 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
954 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
955#else
956# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
957 AssertMsg( VMCPU_IS_EMT(pVCpu) \
958 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
959 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
960 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
961 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
962#endif
963
964/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
965 * Asserts that the current thread IS the emulation thread (EMT) of the
966 * specified virtual CPU or the VM is not running.
967 */
968#if defined(IN_RC) || defined(IN_RING0)
969# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
970 Assert( VMCPU_IS_EMT(pVCpu) \
971 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
972#else
973# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
974 AssertMsg( VMCPU_IS_EMT(pVCpu) \
975 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
976 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
977 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
978#endif
979
980/** @def VMSTATE_IS_RUNNING
981 * Checks if the given state indicates a running VM.
982 */
983#define VMSTATE_IS_RUNNING(a_enmVMState) \
984 ( (enmVMState) == VMSTATE_RUNNING \
985 || (enmVMState) == VMSTATE_RUNNING_LS )
986
987/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
988 * Checks if the VM is running.
989 * @note This is only for pure debug assertions. No AssertReturn or similar!
990 * @sa VMSTATE_IS_RUNNING
991 */
992#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
993 ( (pVM)->enmVMState == VMSTATE_RUNNING \
994 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
995
996/** @def VM_ASSERT_IS_NOT_RUNNING
997 * Asserts that the VM is not running.
998 */
999#if defined(IN_RC) || defined(IN_RING0)
1000#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
1001#else
1002#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
1003 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
1004#endif
1005
1006/** @def VM_ASSERT_EMT0
1007 * Asserts that the current thread IS emulation thread \#0 (EMT0).
1008 */
1009#ifdef IN_RING3
1010# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1011#else
1012# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1013#endif
1014
1015/** @def VM_ASSERT_EMT0_RETURN
1016 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1017 * it isn't.
1018 */
1019#ifdef IN_RING3
1020# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1021#else
1022# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1023#endif
1024
1025
1026/**
1027 * Asserts that the current thread is NOT the emulation thread.
1028 */
1029#define VM_ASSERT_OTHER_THREAD(pVM) \
1030 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1031
1032
1033/** @def VM_ASSERT_STATE
1034 * Asserts a certain VM state.
1035 */
1036#define VM_ASSERT_STATE(pVM, _enmState) \
1037 AssertMsg((pVM)->enmVMState == (_enmState), \
1038 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1039
1040/** @def VM_ASSERT_STATE_RETURN
1041 * Asserts a certain VM state and returns if it doesn't match.
1042 */
1043#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1044 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1045 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1046 (rc))
1047
1048/** @def VM_IS_VALID_EXT
1049 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1050 * or terminated. */
1051#define VM_IS_VALID_EXT(pVM) \
1052 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1053 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1054 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1055 && VM_IS_EMT(pVM))) )
1056
1057/** @def VM_ASSERT_VALID_EXT_RETURN
1058 * Asserts a the VM handle is valid for external access, i.e. not being
1059 * destroy or terminated.
1060 */
1061#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1062 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1063 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1064 ? VMGetStateName(pVM->enmVMState) : ""), \
1065 (rc))
1066
1067/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1068 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1069 * destroy or terminated.
1070 */
1071#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1072 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1073 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1074 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1075 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1076 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1077 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1078 (rc))
1079
1080#endif /* !VBOX_FOR_DTRACE_LIB */
1081
1082
1083/**
1084 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1085 *
1086 * ONLY HM and NEM MAY USE THIS!
1087 *
1088 * @param a_pVM The cross context VM structure.
1089 * @param a_bValue The new value.
1090 * @internal
1091 */
1092#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1093 do { \
1094 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1095 ASMCompilerBarrier(); /* just to be on the safe side */ \
1096 } while (0)
1097
1098/**
1099 * Checks whether raw-mode is used.
1100 *
1101 * @retval true if either is used.
1102 * @retval false if software virtualization (raw-mode) is used.
1103 *
1104 * @param a_pVM The cross context VM structure.
1105 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1106 * @internal
1107 */
1108#ifdef VBOX_WITH_RAW_MODE
1109# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1110#else
1111# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1112#endif
1113
1114/**
1115 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1116 *
1117 * @retval true if either is used.
1118 * @retval false if software virtualization (raw-mode) is used.
1119 *
1120 * @param a_pVM The cross context VM structure.
1121 * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1122 * @internal
1123 */
1124#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1125
1126/**
1127 * Checks whether HM is being used by this VM.
1128 *
1129 * @retval true if HM (VT-x/AMD-v) is used.
1130 * @retval false if not.
1131 *
1132 * @param a_pVM The cross context VM structure.
1133 * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1134 * @internal
1135 */
1136#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1137
1138/**
1139 * Checks whether NEM is being used by this VM.
1140 *
1141 * @retval true if a native hypervisor API is used.
1142 * @retval false if not.
1143 *
1144 * @param a_pVM The cross context VM structure.
1145 * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1146 * @internal
1147 */
1148#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1149
1150
1151/**
1152 * The cross context VM structure.
1153 *
1154 * It contains all the VM data which have to be available in all contexts.
1155 * Even if it contains all the data the idea is to use APIs not to modify all
1156 * the members all around the place. Therefore we make use of unions to hide
1157 * everything which isn't local to the current source module. This means we'll
1158 * have to pay a little bit of attention when adding new members to structures
1159 * in the unions and make sure to keep the padding sizes up to date.
1160 *
1161 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1162 */
1163typedef struct VM
1164{
1165 /** The state of the VM.
1166 * This field is read only to everyone except the VM and EM. */
1167 VMSTATE volatile enmVMState;
1168 /** Forced action flags.
1169 * See the VM_FF_* \#defines. Updated atomically.
1170 */
1171 volatile uint32_t fGlobalForcedActions;
1172 /** Pointer to the array of page descriptors for the VM structure allocation. */
1173 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1174 /** Session handle. For use when calling SUPR0 APIs. */
1175#ifdef IN_RING0
1176 PSUPDRVSESSION pSessionUnsafe;
1177#else
1178 PSUPDRVSESSION pSession;
1179#endif
1180 /** Pointer to the ring-3 VM structure. */
1181 PUVM pUVM;
1182 /** Ring-3 Host Context VM Pointer. */
1183#ifdef IN_RING0
1184 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1185#else
1186 R3PTRTYPE(struct VM *) pVMR3;
1187#endif
1188 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1189 R0PTRTYPE(struct VM *) pVMR0ForCall;
1190 /** Raw-mode Context VM Pointer. */
1191 uint32_t pVMRC;
1192 /** Padding for new raw-mode (long mode). */
1193 uint32_t pVMRCPadding;
1194
1195 /** The GVM VM handle. Only the GVM should modify this field. */
1196#ifdef IN_RING0
1197 uint32_t hSelfUnsafe;
1198#else
1199 uint32_t hSelf;
1200#endif
1201 /** Number of virtual CPUs. */
1202#ifdef IN_RING0
1203 uint32_t cCpusUnsafe;
1204#else
1205 uint32_t cCpus;
1206#endif
1207 /** CPU excution cap (1-100) */
1208 uint32_t uCpuExecutionCap;
1209
1210 /** Size of the VM structure. */
1211 uint32_t cbSelf;
1212 /** Size of the VMCPU structure. */
1213 uint32_t cbVCpu;
1214 /** Structure version number (TBD). */
1215 uint32_t uStructVersion;
1216
1217 /** @name Various items that are frequently accessed.
1218 * @{ */
1219 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1220 * This is set early during vmR3InitRing3 by HM or NEM. */
1221 uint8_t const bMainExecutionEngine;
1222
1223 /** Hardware VM support is available and enabled.
1224 * Determined very early during init.
1225 * This is placed here for performance reasons.
1226 * @todo obsoleted by bMainExecutionEngine, eliminate. */
1227 bool fHMEnabled;
1228
1229 /** Large page enabled flag.
1230 * @todo This doesn't need to be here, PGM should store it in it's own
1231 * structures instead. */
1232 bool fUseLargePages;
1233 /** @} */
1234
1235 /** Alignment padding. */
1236 uint8_t uPadding1[5];
1237
1238 /** @name Debugging
1239 * @{ */
1240 /** Ring-3 Host Context VM Pointer. */
1241 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1242 /** Ring-0 Host Context VM Pointer. */
1243 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1244 /** @} */
1245
1246 /** Padding - the unions must be aligned on a 64 bytes boundary. */
1247 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1248
1249 /** CPUM part. */
1250 union
1251 {
1252#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1253 struct CPUM s;
1254#endif
1255#ifdef VBOX_INCLUDED_vmm_cpum_h
1256 /** Read only info exposed about the host and guest CPUs. */
1257 struct
1258 {
1259 /** Padding for hidden fields. */
1260 uint8_t abHidden0[64];
1261 /** Host CPU feature information. */
1262 CPUMFEATURES HostFeatures;
1263 /** Guest CPU feature information. */
1264 CPUMFEATURES GuestFeatures;
1265 } const ro;
1266#endif
1267 uint8_t padding[1536]; /* multiple of 64 */
1268 } cpum;
1269
1270 /** VMM part. */
1271 union
1272 {
1273#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1274 struct VMM s;
1275#endif
1276 uint8_t padding[1600]; /* multiple of 64 */
1277 } vmm;
1278
1279 /** PGM part. */
1280 union
1281 {
1282#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1283 struct PGM s;
1284#endif
1285 uint8_t padding[21120]; /* multiple of 64 */
1286 } pgm;
1287
1288 /** HM part. */
1289 union
1290 {
1291#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1292 struct HM s;
1293#endif
1294 uint8_t padding[5504]; /* multiple of 64 */
1295 } hm;
1296
1297 /** TRPM part. */
1298 union
1299 {
1300#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1301 struct TRPM s;
1302#endif
1303 uint8_t padding[5248]; /* multiple of 64 */
1304 } trpm;
1305
1306 /** SELM part. */
1307 union
1308 {
1309#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1310 struct SELM s;
1311#endif
1312 uint8_t padding[768]; /* multiple of 64 */
1313 } selm;
1314
1315 /** MM part. */
1316 union
1317 {
1318#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1319 struct MM s;
1320#endif
1321 uint8_t padding[192]; /* multiple of 64 */
1322 } mm;
1323
1324 /** PDM part. */
1325 union
1326 {
1327#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1328 struct PDM s;
1329#endif
1330 uint8_t padding[8128]; /* multiple of 64 */
1331 } pdm;
1332
1333 /** IOM part. */
1334 union
1335 {
1336#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1337 struct IOM s;
1338#endif
1339 uint8_t padding[1152]; /* multiple of 64 */
1340 } iom;
1341
1342 /** EM part. */
1343 union
1344 {
1345#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1346 struct EM s;
1347#endif
1348 uint8_t padding[256]; /* multiple of 64 */
1349 } em;
1350
1351 /** NEM part. */
1352 union
1353 {
1354#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1355 struct NEM s;
1356#endif
1357 uint8_t padding[128]; /* multiple of 64 */
1358 } nem;
1359
1360 /** TM part. */
1361 union
1362 {
1363#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1364 struct TM s;
1365#endif
1366 uint8_t padding[7872]; /* multiple of 64 */
1367 } tm;
1368
1369 /** DBGF part. */
1370 union
1371 {
1372#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1373 struct DBGF s;
1374#endif
1375#ifdef VBOX_INCLUDED_vmm_dbgf_h
1376 /** Read only info exposed about interrupt breakpoints and selected events. */
1377 struct
1378 {
1379 /** Bitmap of enabled hardware interrupt breakpoints. */
1380 uint32_t bmHardIntBreakpoints[256 / 32];
1381 /** Bitmap of enabled software interrupt breakpoints. */
1382 uint32_t bmSoftIntBreakpoints[256 / 32];
1383 /** Bitmap of selected events.
1384 * This includes non-selectable events too for simplicity, we maintain the
1385 * state for some of these, as it may come in handy. */
1386 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1387 /** Enabled hardware interrupt breakpoints. */
1388 uint32_t cHardIntBreakpoints;
1389 /** Enabled software interrupt breakpoints. */
1390 uint32_t cSoftIntBreakpoints;
1391 /** The number of selected events. */
1392 uint32_t cSelectedEvents;
1393 /** The number of enabled hardware breakpoints. */
1394 uint8_t cEnabledHwBreakpoints;
1395 /** The number of enabled hardware I/O breakpoints. */
1396 uint8_t cEnabledHwIoBreakpoints;
1397#ifndef VBOX_WITH_LOTS_OF_DBGF_BPS
1398 /** The number of enabled INT3 breakpoints. */
1399 uint8_t cEnabledInt3Breakpoints;
1400 uint8_t abPadding[1]; /**< Unused padding space up for grabs. */
1401#else
1402 uint16_t u16Pad; /**< Unused padding space up for grabs. */
1403 /** The number of enabled INT3 breakpoints. */
1404 volatile uint32_t cEnabledInt3Breakpoints;
1405#endif
1406 } const ro;
1407#endif
1408 uint8_t padding[2432]; /* multiple of 64 */
1409 } dbgf;
1410
1411 /** SSM part. */
1412 union
1413 {
1414#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1415 struct SSM s;
1416#endif
1417 uint8_t padding[128]; /* multiple of 64 */
1418 } ssm;
1419
1420 union
1421 {
1422#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1423 struct GIM s;
1424#endif
1425 uint8_t padding[448]; /* multiple of 64 */
1426 } gim;
1427
1428 union
1429 {
1430#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1431 struct APIC s;
1432#endif
1433 uint8_t padding[128]; /* multiple of 8 */
1434 } apic;
1435
1436 /* ---- begin small stuff ---- */
1437
1438 /** VM part. */
1439 union
1440 {
1441#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1442 struct VMINT s;
1443#endif
1444 uint8_t padding[32]; /* multiple of 8 */
1445 } vm;
1446
1447 /** CFGM part. */
1448 union
1449 {
1450#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1451 struct CFGM s;
1452#endif
1453 uint8_t padding[8]; /* multiple of 8 */
1454 } cfgm;
1455
1456 /** Statistics for ring-0 only components. */
1457 struct
1458 {
1459 /** GMMR0 stats. */
1460 struct
1461 {
1462 /** Chunk TLB hits. */
1463 uint64_t cChunkTlbHits;
1464 /** Chunk TLB misses. */
1465 uint64_t cChunkTlbMisses;
1466 } gmm;
1467 uint64_t au64Padding[6]; /* probably more comming here... */
1468 } R0Stats;
1469
1470 /** Padding for aligning the structure size on a page boundrary. */
1471 uint8_t abAlignment2[4568 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1472
1473 /* ---- end small stuff ---- */
1474
1475 /** Array of VMCPU ring-3 pointers. */
1476 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1477} VM;
1478
1479
1480#ifdef IN_RC
1481RT_C_DECLS_BEGIN
1482
1483/** The VM structure.
1484 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1485 * globals which we should avoid using.
1486 */
1487extern DECLIMPORT(VM) g_VM;
1488
1489/** The VMCPU structure for virtual CPU \#0.
1490 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1491 * globals which we should avoid using.
1492 */
1493extern DECLIMPORT(VMCPU) g_VCpu0;
1494
1495RT_C_DECLS_END
1496#endif
1497
1498/** @} */
1499
1500#endif /* !VBOX_INCLUDED_vmm_vm_h */
1501
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