vm.h@ 105698

Last change on this file since 105698 was 105673, checked in by vboxsync, 4 months ago
VMM/IEM,TM: Do full-TB looping. Redid timer polling in the recompiler. Rewrote the Blt_CheckIrq code, eliminating a conditional. Fixed some TLB related assertions. Moved some IEMCPU members around in hope of better cache-locality. bugref:10656
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 61.7 KB

Line
1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
7	*
8	* This file is part of VirtualBox base platform packages, as
9	* available from https://www.virtualbox.org.
10	*
11	* This program is free software; you can redistribute it and/or
12	* modify it under the terms of the GNU General Public License
13	* as published by the Free Software Foundation, in version 3 of the
14	* License.
15	*
16	* This program is distributed in the hope that it will be useful, but
17	* WITHOUT ANY WARRANTY; without even the implied warranty of
18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19	* General Public License for more details.
20	*
21	* You should have received a copy of the GNU General Public License
22	* along with this program; if not, see <https://www.gnu.org/licenses>.
23	*
24	* The contents of this file may alternatively be used under the terms
25	* of the Common Development and Distribution License Version 1.0
26	* (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
27	* in the VirtualBox distribution, in which case the provisions of the
28	* CDDL are applicable instead of those of the GPL.
29	*
30	* You may elect to license modified versions of this file under the
31	* terms and conditions of either the GPL or the CDDL or both.
32	*
33	* SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
34	*/
35
36	#ifndef VBOX_INCLUDED_vmm_vm_h
37	#define VBOX_INCLUDED_vmm_vm_h
38	#ifndef RT_WITHOUT_PRAGMA_ONCE
39	# pragma once
40	#endif
41
42	#ifndef VBOX_FOR_DTRACE_LIB
43	# ifndef USING_VMM_COMMON_DEFS
44	# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
45	# endif
46	# include <iprt/param.h>
47	# include <VBox/param.h>
48	# include <VBox/types.h>
49	# include <VBox/vmm/cpum.h>
50	# include <VBox/vmm/stam.h>
51	# include <VBox/vmm/vmapi.h>
52	# include <VBox/vmm/vmm.h>
53	# include <VBox/sup.h>
54	#else
55	# pragma D depends_on library vbox-types.d
56	# pragma D depends_on library CPUMInternal.d
57	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
58	#endif
59
60
61
62	/** @defgroup grp_vm The Virtual Machine
63	* @ingroup grp_vmm
64	* @{
65	*/
66
67	/**
68	* The state of a Virtual CPU.
69	*
70	* The basic state indicated here is whether the CPU has been started or not. In
71	* addition, there are sub-states when started for assisting scheduling (GVMM
72	* mostly).
73	*
74	* The transition out of the STOPPED state is done by a vmR3PowerOn.
75	* The transition back to the STOPPED state is done by vmR3PowerOff.
76	*
77	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
78	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
79	*/
80	typedef enum VMCPUSTATE
81	{
82	/** The customary invalid zero. */
83	VMCPUSTATE_INVALID = 0,
84
85	/** Virtual CPU has not yet been started. */
86	VMCPUSTATE_STOPPED,
87
88	/** CPU started. */
89	VMCPUSTATE_STARTED,
90	/** CPU started in HM context. */
91	VMCPUSTATE_STARTED_HM,
92	/** Executing guest code and can be poked (RC or STI bits of HM). */
93	VMCPUSTATE_STARTED_EXEC,
94	/** Executing guest code using NEM. */
95	VMCPUSTATE_STARTED_EXEC_NEM,
96	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
97	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
98	/** Halted. */
99	VMCPUSTATE_STARTED_HALTED,
100
101	/** The end of valid virtual CPU states. */
102	VMCPUSTATE_END,
103
104	/** Ensure 32-bit type. */
105	VMCPUSTATE_32BIT_HACK = 0x7fffffff
106	} VMCPUSTATE;
107
108	/** Enables 64-bit FFs. */
109	#define VMCPU_WITH_64_BIT_FFS
110
111
112	/**
113	* The cross context virtual CPU structure.
114	*
115	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
116	*/
117	typedef struct VMCPU
118	{
119	/** @name Volatile per-cpu data.
120	* @{ */
121	/** Per CPU forced action.
122	* See the VMCPU_FF_* \#defines. Updated atomically. */
123	#ifdef VMCPU_WITH_64_BIT_FFS
124	uint64_t volatile fLocalForcedActions;
125	#else
126	uint32_t volatile fLocalForcedActions;
127	uint32_t fForLocalForcedActionsExpansion;
128	#endif
129	/** The CPU state. */
130	VMCPUSTATE volatile enmState;
131
132	#if defined(VBOX_VMM_TARGET_ARMV8)
133	uint32_t u32Alignment0;
134	/** The number of nano seconds when the vTimer of the associated vCPU is supposed to activate
135	* required to get out of a halt (due to wfi/wfe).
136	*
137	* @note This actually should go into TMCPU but this drags in a whole lot of padding changes
138	* and I'm not sure yet whether this will remain in this form anyway.
139	*/
140	uint64_t cNsVTimerActivate;
141	/** Padding up to 64 bytes. */
142	uint8_t abAlignment0[64 - 12 - 8 - 4];
143	#else
144	/** Padding up to 64 bytes. */
145	uint8_t abAlignment0[64 - 12];
146	#endif
147	/** @} */
148
149	/** IEM part.
150	* @remarks This comes first as it allows the use of 8-bit immediates for the
151	* first 64 bytes of the structure, reducing code size a wee bit. */
152	#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h) /* For PDB hacking. */
153	union VMCPUUNIONIEMFULL
154	#else
155	union VMCPUUNIONIEMSTUB
156	#endif
157	{
158	#if defined(VMM_INCLUDED_SRC_include_IEMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_IEMInternal_armv8_h)
159	struct IEMCPU s;
160	#endif
161	uint8_t padding[ 129984 /* The common base size. */
162	#ifdef RT_ARCH_AMD64
163	+ 32768 /* For 256 entries per TLBs. */
164	#else
165	+ 1048576 /* For 8192 entries per TLBs. */
166	#endif
167	]; /* multiple of 64 */
168	} iem;
169
170	/** @name Static per-cpu data.
171	* (Putting this after IEM, hoping that it's less frequently used than it.)
172	* @{ */
173	/** Ring-3 Host Context VM Pointer. */
174	PVMR3 pVMR3;
175	/** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
176	RTR0PTR pVCpuR0ForVtg;
177	/** Raw-mode Context VM Pointer. */
178	uint32_t pVMRC;
179	/** Padding for new raw-mode (long mode). */
180	uint32_t pVMRCPadding;
181	/** Pointer to the ring-3 UVMCPU structure. */
182	PUVMCPU pUVCpu;
183	/** The native thread handle. */
184	RTNATIVETHREAD hNativeThread;
185	/** The native R0 thread handle. (different from the R3 handle!) */
186	RTNATIVETHREAD hNativeThreadR0;
187	/** The IPRT thread handle (for VMMDevTesting). */
188	RTTHREAD hThread;
189	/** The CPU ID.
190	* This is the index into the VM::aCpu array. */
191	#ifdef IN_RING0
192	VMCPUID idCpuUnsafe;
193	#else
194	VMCPUID idCpu;
195	#endif
196
197	/** Align the structures below bit on a 64-byte boundary and make sure it starts
198	* at the same offset in both 64-bit and 32-bit builds.
199	*
200	* @remarks The alignments of the members that are larger than 48 bytes should be
201	* 64-byte for cache line reasons. structs containing small amounts of
202	* data could be lumped together at the end with a < 64 byte padding
203	* following it (to grow into and align the struct size).
204	*/
205	uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
206	/** @} */
207
208	/** HM part. */
209	union VMCPUUNIONHM
210	{
211	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
212	struct HMCPU s;
213	#endif
214	uint8_t padding[9984]; /* multiple of 64 */
215	} hm;
216
217	/** NEM part. */
218	union VMCPUUNIONNEM
219	{
220	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
221	struct NEMCPU s;
222	#endif
223	uint8_t padding[4608]; /* multiple of 64 */
224	} nem;
225
226	/** TRPM part. */
227	union VMCPUUNIONTRPM
228	{
229	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
230	struct TRPMCPU s;
231	#endif
232	uint8_t padding[128]; /* multiple of 64 */
233	} trpm;
234
235	/** TM part. */
236	union VMCPUUNIONTM
237	{
238	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
239	struct TMCPU s;
240	#endif
241	uint8_t padding[5760]; /* multiple of 64 */
242	} tm;
243
244	/** VMM part. */
245	union VMCPUUNIONVMM
246	{
247	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
248	struct VMMCPU s;
249	#endif
250	uint8_t padding[9536]; /* multiple of 64 */
251	} vmm;
252
253	/** PDM part. */
254	union VMCPUUNIONPDM
255	{
256	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
257	struct PDMCPU s;
258	#endif
259	uint8_t padding[256]; /* multiple of 64 */
260	} pdm;
261
262	/** IOM part. */
263	union VMCPUUNIONIOM
264	{
265	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
266	struct IOMCPU s;
267	#endif
268	uint8_t padding[512]; /* multiple of 64 */
269	} iom;
270
271	/** DBGF part.
272	* @todo Combine this with other tiny structures. */
273	union VMCPUUNIONDBGF
274	{
275	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
276	struct DBGFCPU s;
277	#endif
278	uint8_t padding[512]; /* multiple of 64 */
279	} dbgf;
280
281	/** GIM part. */
282	union VMCPUUNIONGIM
283	{
284	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
285	struct GIMCPU s;
286	#endif
287	uint8_t padding[512]; /* multiple of 64 */
288	} gim;
289
290	#if defined(VBOX_VMM_TARGET_ARMV8)
291	/** GIC part. */
292	union VMCPUUNIONGIC
293	{
294	# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
295	struct GICCPU s;
296	# endif
297	uint8_t padding[3840]; /* multiple of 64 */
298	} gic;
299	#else
300	/** APIC part. */
301	union VMCPUUNIONAPIC
302	{
303	# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
304	struct APICCPU s;
305	# endif
306	uint8_t padding[3840]; /* multiple of 64 */
307	} apic;
308	#endif
309
310	/*
311	* Some less frequently used global members that doesn't need to take up
312	* precious space at the head of the structure.
313	*/
314
315	/** Trace groups enable flags. */
316	uint32_t fTraceGroups; /* 64 / 44 */
317	/** Number of collisions hashing the ring-0 EMT handle. */
318	uint8_t cEmtHashCollisions;
319	uint8_t abAdHoc[3];
320	/** Profiling samples for use by ad hoc profiling. */
321	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
322
323	/** Align the following members on page boundary. */
324	uint8_t abAlignment2[1848];
325
326	/** PGM part. */
327	union VMCPUUNIONPGM
328	{
329	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
330	struct PGMCPU s;
331	#endif
332	uint8_t padding[36864]; /* multiple of 4096 */
333	} pgm;
334
335	/** CPUM part. */
336	union VMCPUUNIONCPUM
337	{
338	#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
339	struct CPUMCPU s;
340	#endif
341	#ifdef VMCPU_INCL_CPUM_GST_CTX
342	/** The guest CPUM context for direct use by execution engines.
343	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
344	* others. The rest will use the function based CPUM API. */
345	CPUMCTX GstCtx;
346	#endif
347	uint8_t padding[102400]; /* multiple of 4096 */
348	} cpum;
349
350	/** EM part. */
351	union VMCPUUNIONEM
352	{
353	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
354	struct EMCPU s;
355	#endif
356	uint8_t padding[40960]; /* multiple of 4096 */
357	} em;
358	uint8_t abPadding[12288];
359	} VMCPU;
360
361
362	#ifndef VBOX_FOR_DTRACE_LIB
363	# ifndef IN_TSTVMSTRUCT
364	/* Make sure the structure size is aligned on a 16384 boundary for arm64 purposes. */
365	AssertCompileSizeAlignment(VMCPU, 16384);
366	# endif
367
368	/** @name Operations on VMCPU::enmState
369	* @{ */
370	/** Gets the VMCPU state. */
371	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
372	/** Sets the VMCPU state. */
373	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
374	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
375	/** Cmpares and sets the VMCPU state. */
376	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
377	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
378	/** Checks the VMCPU state. */
379	#ifdef VBOX_STRICT
380	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
381	do { \
382	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
383	AssertMsg(enmState == (enmExpectedState), \
384	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
385	enmState, enmExpectedState, (pVCpu)->idCpu)); \
386	} while (0)
387
388	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
389	do { \
390	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
391	AssertMsg( enmState == (enmExpectedState) \
392	\|\| enmState == (a_enmExpectedState2), \
393	("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
394	enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
395	} while (0)
396	#else
397	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
398	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
399	#endif
400	/** Tests if the state means that the CPU is started. */
401	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
402	/** Tests if the state means that the CPU is stopped. */
403	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
404	/** @} */
405
406
407	/** The name of the raw-mode context VMM Core module. */
408	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
409	/** The name of the ring-0 context VMM Core module. */
410	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
411
412
413	/** VM Forced Action Flags.
414	*
415	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
416	* action mask of a VM.
417	*
418	* Available VM bits:
419	* 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
420	*
421	*
422	* Available VMCPU bits:
423	* 14, 15, 36 to 63
424	*
425	* @todo If we run low on VMCPU, we may consider merging the SELM bits
426	*
427	* @{
428	*/
429	/* Bit 0, bit 1: Reserved and must not be reused. The recompiler ASSUMES it
430	can OR the local and global FFs together and keept the two
431	VMCPU_FF_INTERRUPT_XXX flags uncorrupted. */
432	/** The virtual sync clock has been stopped, go to TM until it has been
433	* restarted... */
434	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
435	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
436	/** PDM Queues are pending. */
437	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
438	/** The bit number for VM_FF_PDM_QUEUES. */
439	#define VM_FF_PDM_QUEUES_BIT 3
440	/** PDM DMA transfers are pending. */
441	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
442	/** The bit number for VM_FF_PDM_DMA. */
443	#define VM_FF_PDM_DMA_BIT 4
444	/** This action forces the VM to call DBGF so DBGF can service debugger
445	* requests in the emulation thread.
446	* This action flag stays asserted till DBGF clears it.*/
447	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
448	/** The bit number for VM_FF_DBGF. */
449	#define VM_FF_DBGF_BIT 8
450	/** This action forces the VM to service pending requests from other
451	* thread or requests which must be executed in another context. */
452	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
453	#define VM_FF_REQUEST_BIT 9
454	/** Check for VM state changes and take appropriate action. */
455	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
456	/** The bit number for VM_FF_CHECK_VM_STATE. */
457	#define VM_FF_CHECK_VM_STATE_BIT 10
458	/** Reset the VM. (postponed) */
459	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
460	/** The bit number for VM_FF_RESET. */
461	#define VM_FF_RESET_BIT 11
462	/** EMT rendezvous in VMM. */
463	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
464	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
465	#define VM_FF_EMT_RENDEZVOUS_BIT 12
466
467	/** PGM needs to allocate handy pages. */
468	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
469	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
470	/** PGM is out of memory.
471	* Abandon all loops and code paths which can be resumed and get up to the EM
472	* loops. */
473	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
474	#define VM_FF_PGM_NO_MEMORY_BIT 19
475	/** PGM is about to perform a lightweight pool flush
476	* Guest SMP: all EMT threads should return to ring 3
477	*/
478	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
479	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
480	/** Suspend the VM - debug only. */
481	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
482	#define VM_FF_DEBUG_SUSPEND_BIT 31
483
484
485	#if defined(VBOX_VMM_TARGET_ARMV8)
486	/** This action forces the VM to inject an IRQ into the guest. */
487	# define VMCPU_FF_INTERRUPT_IRQ RT_BIT_64(VMCPU_FF_INTERRUPT_IRQ_BIT)
488	# define VMCPU_FF_INTERRUPT_IRQ_BIT 0
489	/** This action forces the VM to inject an FIQ into the guest. */
490	# define VMCPU_FF_INTERRUPT_FIQ RT_BIT_64(VMCPU_FF_INTERRUPT_FIQ_BIT)
491	# define VMCPU_FF_INTERRUPT_FIQ_BIT 1
492	#else
493	/** This action forces the VM to check any pending interrupts on the APIC. */
494	# define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
495	# define VMCPU_FF_INTERRUPT_APIC_BIT 0
496	/** This action forces the VM to check any pending interrups on the PIC. */
497	# define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
498	# define VMCPU_FF_INTERRUPT_PIC_BIT 1
499	#endif
500	/** This action forces the VM to schedule and run pending timer (TM).
501	* @remarks Don't move - PATM compatibility. */
502	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
503	#define VMCPU_FF_TIMER_BIT 2
504	/** This action forces the VM to check any pending NMIs. */
505	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
506	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
507	/** This action forces the VM to check any pending SMIs. */
508	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
509	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
510	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
511	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
512	#define VMCPU_FF_PDM_CRITSECT_BIT 5
513	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
514	* the virtual CPU out of the next (/current) halted state. It is not processed
515	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
516	* is cleared the next time EM leaves the HALTED state. */
517	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
518	#define VMCPU_FF_UNHALT_BIT 6
519	/** Pending IEM action (mask). */
520	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
521	/** Pending IEM action (bit number). */
522	#define VMCPU_FF_IEM_BIT 7
523	/** Pending APIC action (bit number). */
524	#define VMCPU_FF_UPDATE_APIC_BIT 8
525	/** This action forces the VM to update APIC's asynchronously arrived
526	* interrupts as pending interrupts. */
527	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
528	/** This action forces the VM to service pending requests from other
529	* thread or requests which must be executed in another context. */
530	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
531	#define VMCPU_FF_REQUEST_BIT 9
532	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
533	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
534	/** The bit number for VMCPU_FF_DBGF. */
535	#define VMCPU_FF_DBGF_BIT 10
536	/** Hardware virtualized nested-guest interrupt pending. */
537	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
538	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
539	/** This action forces PGM to update changes to CR3 when the guest was in HM mode
540	* (when using nested paging). */
541	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
542	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
543	#if defined(VBOX_VMM_TARGET_ARMV8)
544	# define VMCPU_FF_VTIMER_ACTIVATED RT_BIT_64(VMCPU_FF_VTIMER_ACTIVATED_BIT)
545	# define VMCPU_FF_VTIMER_ACTIVATED_BIT 13
546	#else
547	/* Bit 13 used to be VMCPU_FF_HM_UPDATE_PAE_PDPES. */
548	#endif
549	/** This action forces the VM to resync the page tables before going
550	* back to execute guest code. (GLOBAL FLUSH) */
551	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
552	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
553	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
554	* (NON-GLOBAL FLUSH) */
555	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
556	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
557	/** Check for pending TLB shootdown actions (deprecated)
558	* Reserved for future HM re-use if necessary / safe.
559	* Consumer: HM */
560	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
561	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
562	/** Check for pending TLB flush action.
563	* Consumer: HM
564	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
565	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
566	/** The bit number for VMCPU_FF_TLB_FLUSH. */
567	#define VMCPU_FF_TLB_FLUSH_BIT 19
568	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
569	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
570	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
571	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
572	/* 24 used to be VMCPU_FF_INHIBIT_INTERRUPTS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
573	/* 25 used to be VMCPU_FF_BLOCK_NMIS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
574	/** Force return to Ring-3. */
575	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
576	#define VMCPU_FF_TO_R3_BIT 28
577	/** Force return to ring-3 to service pending I/O or MMIO write.
578	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
579	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
580	* status codes to be propagated at the same time without loss. */
581	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
582	#define VMCPU_FF_IOM_BIT 29
583	/* 30 used to be VMCPU_FF_CPUM */
584	/** VMX-preemption timer expired. */
585	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
586	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
587	/** Pending MTF (Monitor Trap Flag) event. */
588	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
589	#define VMCPU_FF_VMX_MTF_BIT 32
590	/** VMX APIC-write emulation pending.
591	* @todo possible candidate for internal EFLAGS, or maybe just a summary bit
592	* (see also VMCPU_FF_VMX_INT_WINDOW). */
593	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
594	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
595	/** VMX interrupt-window event pending.
596	*
597	* "Pending" is misleading here, it would be better to say that the event need
598	* to be generated at the next opportunity and that this flag causes it to be
599	* polled for on every instruction boundrary and such.
600	*
601	* @todo Change the IEM side of this to not poll but to track down the places
602	* where it can be generated and set an internal EFLAGS bit that causes it
603	* to be checked out when finishing the current instruction. */
604	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
605	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
606	/** VMX NMI-window event pending.
607	* Same "pending" comment and todo in VMCPU_FF_VMX_INT_WINDOW. */
608	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
609	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
610
611
612	/** Externally VM forced actions. Used to quit the idle/wait loop. */
613	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
614	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
615	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
616
617	/** Externally forced VM actions. Used to quit the idle/wait loop. */
618	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
619	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
620	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
621	#if defined(VBOX_VMM_TARGET_ARMV8)
622	# define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_IRQ \| VMCPU_FF_INTERRUPT_FIQ \
623	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
624	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
625	\| VMCPU_FF_VTIMER_ACTIVATED)
626	#else
627	# define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
628	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
629	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
630	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
631	#endif
632
633	/** High priority VM pre-execution actions. */
634	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
635	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
636	\| VM_FF_EMT_RENDEZVOUS )
637	/** High priority VMCPU pre-execution actions. */
638	#if defined(VBOX_VMM_TARGET_ARMV8)
639	# define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_IRQ \| VMCPU_FF_INTERRUPT_FIQ \
640	\| VMCPU_FF_DBGF )
641	#else
642	# define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
643	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_DBGF \
644	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
645	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
646	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
647	#endif
648
649	/** High priority VM pre raw-mode execution mask. */
650	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
651	/** High priority VMCPU pre raw-mode execution mask. */
652	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL )
653
654	/** High priority post-execution actions. */
655	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
656	/** High priority post-execution actions. */
657	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM )
658
659	/** Normal priority VM post-execution actions. */
660	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
661	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
662	/** Normal priority VMCPU post-execution actions. */
663	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
664
665	/** Normal priority VM actions. */
666	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
667	/** Normal priority VMCPU actions. */
668	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
669
670	/** Flags to clear before resuming guest execution. */
671	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
672
673
674	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
675	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
676	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
677	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
678	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
679	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
680	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
681	#ifdef IN_RING3
682	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK (VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF)
683	#else
684	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF)
685	#endif
686
687	#if !defined(VBOX_VMM_TARGET_ARMV8)
688	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
689	* enabled. */
690	# define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
691	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
692	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
693	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
694	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
695	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
696	* disabled. */
697	# define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
698	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
699	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
700	#endif
701
702	/** VM Flags that cause the HM loops to go back to ring-3. */
703	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
704	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
705	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
706	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
707	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
708
709	/** High priority ring-0 VM pre HM-mode execution mask. */
710	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
711	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
712	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
713	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
714	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
715	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
716	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
717	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
718	\| VM_FF_PDM_DMA) )
719	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
720	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
721	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
722
723	/** All the VMX nested-guest flags. */
724	#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
725	\| VMCPU_FF_VMX_INT_WINDOW \| VMCPU_FF_VMX_NMI_WINDOW )
726
727	/** All the forced VM flags. */
728	#define VM_FF_ALL_MASK (UINT32_MAX)
729	/** All the forced VMCPU flags. */
730	#define VMCPU_FF_ALL_MASK ( UINT32_MAX \
731	\| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_INT_WINDOW \
732	\| VMCPU_FF_VMX_NMI_WINDOW )
733
734	/** All the forced VM flags except those related to raw-mode and hardware
735	* assisted execution. */
736	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
737	/** All the forced VMCPU flags except those related to raw-mode and hardware
738	* assisted execution. */
739	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
740
741	#ifndef VBOX_FOR_DTRACE_LIB
742	AssertCompile( ((VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \| VM_FF_YIELD_REPSTR_MASK)
743	& (VM_FF_HIGH_PRIORITY_PRE_RAW_MASK & ~VM_FF_ALL_REM_MASK)) == 0);
744	AssertCompile((VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK & (VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK & ~VMCPU_FF_ALL_REM_MASK)) == 0);
745	#endif
746
747	/** @} */
748
749	/** @def VM_FF_SET
750	* Sets a single force action flag.
751	*
752	* @param pVM The cross context VM structure.
753	* @param fFlag The flag to set.
754	*/
755	#define VM_FF_SET(pVM, fFlag) do { \
756	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
757	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
758	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
759	} while (0)
760
761	/** @def VMCPU_FF_SET
762	* Sets a single force action flag for the given VCPU.
763	*
764	* @param pVCpu The cross context virtual CPU structure.
765	* @param fFlag The flag to set.
766	* @sa VMCPU_FF_SET_MASK
767	*/
768	#ifdef VMCPU_WITH_64_BIT_FFS
769	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
770	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
771	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
772	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
773	} while (0)
774	#else
775	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
776	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
777	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
778	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
779	} while (0)
780	#endif
781
782	/** @def VMCPU_FF_SET_MASK
783	* Sets a two or more force action flag for the given VCPU.
784	*
785	* @param pVCpu The cross context virtual CPU structure.
786	* @param fFlags The flags to set.
787	* @sa VMCPU_FF_SET
788	*/
789	#ifdef VMCPU_WITH_64_BIT_FFS
790	# if ARCH_BITS > 32
791	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
792	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
793	# else
794	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
795	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
796	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
797	} while (0)
798	# endif
799	#else
800	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
801	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
802	#endif
803
804	/** @def VM_FF_CLEAR
805	* Clears a single force action flag.
806	*
807	* @param pVM The cross context VM structure.
808	* @param fFlag The flag to clear.
809	*/
810	#define VM_FF_CLEAR(pVM, fFlag) do { \
811	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
812	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
813	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
814	} while (0)
815
816	/** @def VMCPU_FF_CLEAR
817	* Clears a single force action flag for the given VCPU.
818	*
819	* @param pVCpu The cross context virtual CPU structure.
820	* @param fFlag The flag to clear.
821	*/
822	#ifdef VMCPU_WITH_64_BIT_FFS
823	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
824	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
825	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
826	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
827	} while (0)
828	#else
829	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
830	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
831	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
832	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
833	} while (0)
834	#endif
835
836	/** @def VMCPU_FF_CLEAR_MASK
837	* Clears two or more force action flags for the given VCPU.
838	*
839	* @param pVCpu The cross context virtual CPU structure.
840	* @param fFlags The flags to clear.
841	*/
842	#ifdef VMCPU_WITH_64_BIT_FFS
843	# if ARCH_BITS > 32
844	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
845	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
846	# else
847	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
848	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
849	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
850	} while (0)
851	# endif
852	#else
853	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
854	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
855	#endif
856
857	/** @def VM_FF_IS_SET
858	* Checks if single a force action flag is set.
859	*
860	* @param pVM The cross context VM structure.
861	* @param fFlag The flag to check.
862	* @sa VM_FF_IS_ANY_SET
863	*/
864	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
865	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
866	#else
867	# define VM_FF_IS_SET(pVM, fFlag) \
868	([](PVM a_pVM) -> bool \
869	{ \
870	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
871	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
872	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
873	}(pVM))
874	#endif
875
876	/** @def VMCPU_FF_IS_SET
877	* Checks if a single force action flag is set for the given VCPU.
878	*
879	* @param pVCpu The cross context virtual CPU structure.
880	* @param fFlag The flag to check.
881	* @sa VMCPU_FF_IS_ANY_SET
882	*/
883	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
884	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
885	#else
886	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
887	([](PCVMCPU a_pVCpu) -> bool \
888	{ \
889	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
890	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
891	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
892	}(pVCpu))
893	#endif
894
895	/** @def VM_FF_IS_ANY_SET
896	* Checks if one or more force action in the specified set is pending.
897	*
898	* @param pVM The cross context VM structure.
899	* @param fFlags The flags to check for.
900	* @sa VM_FF_IS_SET
901	*/
902	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
903
904	/** @def VMCPU_FF_IS_ANY_SET
905	* Checks if two or more force action flags in the specified set is set for the given VCPU.
906	*
907	* @param pVCpu The cross context virtual CPU structure.
908	* @param fFlags The flags to check for.
909	* @sa VMCPU_FF_IS_SET
910	*/
911	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
912
913	/** @def VM_FF_TEST_AND_CLEAR
914	* Checks if one (!) force action in the specified set is pending and clears it atomically
915	*
916	* @returns true if the bit was set.
917	* @returns false if the bit was clear.
918	* @param pVM The cross context VM structure.
919	* @param fFlag Flag constant to check and clear (_BIT is appended).
920	*/
921	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
922
923	/** @def VMCPU_FF_TEST_AND_CLEAR
924	* Checks if one (!) force action in the specified set is pending and clears it atomically
925	*
926	* @returns true if the bit was set.
927	* @returns false if the bit was clear.
928	* @param pVCpu The cross context virtual CPU structure.
929	* @param fFlag Flag constant to check and clear (_BIT is appended).
930	*/
931	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
932
933	/** @def VM_FF_IS_PENDING_EXCEPT
934	* Checks if one or more force action in the specified set is pending while one
935	* or more other ones are not.
936	*
937	* @param pVM The cross context VM structure.
938	* @param fFlags The flags to check for.
939	* @param fExcpt The flags that should not be set.
940	*/
941	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
942	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
943
944	/** @def VM_IS_EMT
945	* Checks if the current thread is the emulation thread (EMT).
946	*
947	* @remark The ring-0 variation will need attention if we expand the ring-0
948	* code to let threads other than EMT mess around with the VM.
949	*/
950	#ifdef IN_RC
951	# define VM_IS_EMT(pVM) true
952	#else
953	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
954	#endif
955
956	/** @def VMCPU_IS_EMT
957	* Checks if the current thread is the emulation thread (EMT) for the specified
958	* virtual CPU.
959	*/
960	#ifdef IN_RC
961	# define VMCPU_IS_EMT(pVCpu) true
962	#else
963	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
964	#endif
965
966	/** @def VM_ASSERT_EMT
967	* Asserts that the current thread IS the emulation thread (EMT).
968	*/
969	#ifdef IN_RC
970	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
971	#elif defined(IN_RING0)
972	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
973	#else
974	# define VM_ASSERT_EMT(pVM) \
975	AssertMsg(VM_IS_EMT(pVM), \
976	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
977	#endif
978
979	/** @def VMCPU_ASSERT_EMT
980	* Asserts that the current thread IS the emulation thread (EMT) of the
981	* specified virtual CPU.
982	*/
983	#ifdef IN_RC
984	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
985	#elif defined(IN_RING0)
986	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
987	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
988	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
989	(pVCpu) ? (pVCpu)->idCpu : 0))
990	#else
991	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
992	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
993	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
994	#endif
995
996	/** @def VM_ASSERT_EMT_RETURN
997	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
998	*/
999	#ifdef IN_RC
1000	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
1001	#elif defined(IN_RING0)
1002	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
1003	#else
1004	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
1005	AssertMsgReturn(VM_IS_EMT(pVM), \
1006	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
1007	(rc))
1008	#endif
1009
1010	/** @def VMCPU_ASSERT_EMT_RETURN
1011	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
1012	*/
1013	#ifdef IN_RC
1014	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
1015	#elif defined(IN_RING0)
1016	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
1017	#else
1018	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
1019	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
1020	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1021	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
1022	(rc))
1023	#endif
1024
1025	/** @def VMCPU_ASSERT_EMT_OR_GURU
1026	* Asserts that the current thread IS the emulation thread (EMT) of the
1027	* specified virtual CPU.
1028	*/
1029	#if defined(IN_RC) \|\| defined(IN_RING0)
1030	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
1031	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
1032	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
1033	#else
1034	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
1035	AssertMsg( VMCPU_IS_EMT(pVCpu) \
1036	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
1037	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
1038	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1039	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
1040	#endif
1041
1042	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
1043	* Asserts that the current thread IS the emulation thread (EMT) of the
1044	* specified virtual CPU or the VM is not running.
1045	*/
1046	#if defined(IN_RC) \|\| defined(IN_RING0)
1047	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
1048	Assert( VMCPU_IS_EMT(pVCpu) \
1049	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
1050	#else
1051	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
1052	AssertMsg( VMCPU_IS_EMT(pVCpu) \
1053	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
1054	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
1055	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
1056	#endif
1057
1058	/** @def VMSTATE_IS_RUNNING
1059	* Checks if the given state indicates a running VM.
1060	*/
1061	#define VMSTATE_IS_RUNNING(a_enmVMState) \
1062	( (a_enmVMState) == VMSTATE_RUNNING \
1063	\|\| (a_enmVMState) == VMSTATE_RUNNING_LS )
1064
1065	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
1066	* Checks if the VM is running.
1067	* @note This is only for pure debug assertions. No AssertReturn or similar!
1068	* @sa VMSTATE_IS_RUNNING
1069	*/
1070	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
1071	( (pVM)->enmVMState == VMSTATE_RUNNING \
1072	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
1073
1074
1075	/** @def VMSTATE_IS_POWERED_ON
1076	* Checks if the given state indicates the VM is powered on.
1077	*
1078	* @note Excludes all error states, so a powered on VM that hit a fatal error,
1079	* guru meditation, state load failure or similar will not be considered
1080	* powered on by this test.
1081	*/
1082	#define VMSTATE_IS_POWERED_ON(a_enmVMState) \
1083	( (a_enmVMState) >= VMSTATE_RESUMING && (a_enmVMState) < VMSTATE_POWERING_OFF )
1084
1085	/** @def VM_ASSERT_IS_NOT_RUNNING
1086	* Asserts that the VM is not running.
1087	*/
1088	#if defined(IN_RC) \|\| defined(IN_RING0)
1089	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
1090	#else
1091	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
1092	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
1093	#endif
1094
1095	/** @def VM_ASSERT_EMT0
1096	* Asserts that the current thread IS emulation thread \#0 (EMT0).
1097	*/
1098	#ifdef IN_RING3
1099	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1100	#else
1101	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1102	#endif
1103
1104	/** @def VM_ASSERT_EMT0_RETURN
1105	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1106	* it isn't.
1107	*/
1108	#ifdef IN_RING3
1109	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1110	#else
1111	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1112	#endif
1113
1114
1115	/**
1116	* Asserts that the current thread is NOT the emulation thread.
1117	*/
1118	#define VM_ASSERT_OTHER_THREAD(pVM) \
1119	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1120
1121
1122	/** @def VM_ASSERT_STATE
1123	* Asserts a certain VM state.
1124	*/
1125	#define VM_ASSERT_STATE(pVM, _enmState) \
1126	AssertMsg((pVM)->enmVMState == (_enmState), \
1127	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1128
1129	/** @def VM_ASSERT_STATE_RETURN
1130	* Asserts a certain VM state and returns if it doesn't match.
1131	*/
1132	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1133	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1134	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1135	(rc))
1136
1137	/** @def VM_IS_VALID_EXT
1138	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1139	* or terminated. */
1140	#define VM_IS_VALID_EXT(pVM) \
1141	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1142	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1143	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1144	&& VM_IS_EMT(pVM))) )
1145
1146	/** @def VM_ASSERT_VALID_EXT_RETURN
1147	* Asserts a the VM handle is valid for external access, i.e. not being
1148	* destroy or terminated.
1149	*/
1150	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1151	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1152	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1153	? VMGetStateName(pVM->enmVMState) : ""), \
1154	(rc))
1155
1156	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1157	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1158	* destroy or terminated.
1159	*/
1160	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1161	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1162	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1163	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1164	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1165	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1166	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1167	(rc))
1168
1169	#endif /* !VBOX_FOR_DTRACE_LIB */
1170
1171
1172	/**
1173	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1174	*
1175	* ONLY HM and NEM MAY USE THIS!
1176	*
1177	* @param a_pVM The cross context VM structure.
1178	* @param a_bValue The new value.
1179	* @internal
1180	*/
1181	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1182	do { \
1183	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1184	ASMCompilerBarrier(); /* just to be on the safe side */ \
1185	} while (0)
1186
1187	/**
1188	* Checks whether iem-executes-all-mode is used.
1189	*
1190	* @retval true if IEM is used.
1191	* @retval false if not.
1192	*
1193	* @param a_pVM The cross context VM structure.
1194	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1195	* @internal
1196	*/
1197	#define VM_IS_EXEC_ENGINE_IEM(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_IEM)
1198
1199	/**
1200	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1201	*
1202	* @retval true if either is used.
1203	* @retval false if software virtualization (raw-mode) is used.
1204	*
1205	* @param a_pVM The cross context VM structure.
1206	* @sa VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1207	* @internal
1208	*/
1209	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_IEM)
1210
1211	/**
1212	* Checks whether HM is being used by this VM.
1213	*
1214	* @retval true if HM (VT-x/AMD-v) is used.
1215	* @retval false if not.
1216	*
1217	* @param a_pVM The cross context VM structure.
1218	* @sa VM_IS_NEM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
1219	* @internal
1220	*/
1221	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1222
1223	/**
1224	* Checks whether NEM is being used by this VM.
1225	*
1226	* @retval true if a native hypervisor API is used.
1227	* @retval false if not.
1228	*
1229	* @param a_pVM The cross context VM structure.
1230	* @sa VM_IS_HM_ENABLED, VM_IS_EXEC_ENGINE_IEM, VM_IS_HM_OR_NEM_ENABLED.
1231	* @internal
1232	*/
1233	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1234
1235
1236	/**
1237	* The cross context VM structure.
1238	*
1239	* It contains all the VM data which have to be available in all contexts.
1240	* Even if it contains all the data the idea is to use APIs not to modify all
1241	* the members all around the place. Therefore we make use of unions to hide
1242	* everything which isn't local to the current source module. This means we'll
1243	* have to pay a little bit of attention when adding new members to structures
1244	* in the unions and make sure to keep the padding sizes up to date.
1245	*
1246	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1247	*/
1248	typedef struct VM
1249	{
1250	/** The state of the VM.
1251	* This field is read only to everyone except the VM and EM. */
1252	VMSTATE volatile enmVMState;
1253	/** Forced action flags.
1254	* See the VM_FF_* \#defines. Updated atomically.
1255	*/
1256	volatile uint32_t fGlobalForcedActions;
1257	/** Pointer to the array of page descriptors for the VM structure allocation. */
1258	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1259	/** Session handle. For use when calling SUPR0 APIs. */
1260	#ifdef IN_RING0
1261	PSUPDRVSESSION pSessionUnsafe;
1262	#else
1263	PSUPDRVSESSION pSession;
1264	#endif
1265	/** Pointer to the ring-3 VM structure. */
1266	PUVM pUVM;
1267	/** Ring-3 Host Context VM Pointer. */
1268	#ifdef IN_RING0
1269	R3PTRTYPE(struct VM *) pVMR3Unsafe;
1270	#else
1271	R3PTRTYPE(struct VM *) pVMR3;
1272	#endif
1273	/** Ring-0 Host Context VM pointer for making ring-0 calls. */
1274	R0PTRTYPE(struct VM *) pVMR0ForCall;
1275	/** Raw-mode Context VM Pointer. */
1276	uint32_t pVMRC;
1277	/** Padding for new raw-mode (long mode). */
1278	uint32_t pVMRCPadding;
1279
1280	/** The GVM VM handle. Only the GVM should modify this field. */
1281	#ifdef IN_RING0
1282	uint32_t hSelfUnsafe;
1283	#else
1284	uint32_t hSelf;
1285	#endif
1286	/** Number of virtual CPUs. */
1287	#ifdef IN_RING0
1288	uint32_t cCpusUnsafe;
1289	#else
1290	uint32_t cCpus;
1291	#endif
1292	/** CPU excution cap (1-100) */
1293	uint32_t uCpuExecutionCap;
1294
1295	/** Size of the VM structure. */
1296	uint32_t cbSelf;
1297	/** Size of the VMCPU structure. */
1298	uint32_t cbVCpu;
1299	/** Structure version number (TBD). */
1300	uint32_t uStructVersion;
1301
1302	/** @name Various items that are frequently accessed.
1303	* @{ */
1304	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1305	* This is set early during vmR3InitRing3 by HM or NEM. */
1306	uint8_t const bMainExecutionEngine;
1307
1308	/** Hardware VM support is available and enabled.
1309	* Determined very early during init.
1310	* This is placed here for performance reasons.
1311	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1312	bool fHMEnabled;
1313	/** @} */
1314
1315	/** Alignment padding. */
1316	uint8_t uPadding1[6];
1317
1318	/** @name Debugging
1319	* @{ */
1320	/** Ring-3 Host Context VM Pointer. */
1321	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1322	/** Ring-0 Host Context VM Pointer. */
1323	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1324	/** @} */
1325
1326	/** Max EMT hash lookup collisions (in GVMM). */
1327	uint8_t cMaxEmtHashCollisions;
1328
1329	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1330	uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
1331
1332	/** CPUM part. */
1333	union
1334	{
1335	#if defined(VMM_INCLUDED_SRC_include_CPUMInternal_h) \|\| defined(VMM_INCLUDED_SRC_include_CPUMInternal_armv8_h)
1336	struct CPUM s;
1337	#endif
1338	#ifdef VBOX_INCLUDED_vmm_cpum_h
1339	/** Read only info exposed about the host and guest CPUs. */
1340	struct
1341	{
1342	/** Padding for hidden fields. */
1343	uint8_t abHidden0[64 + 48];
1344	/** Guest CPU feature information. */
1345	CPUMFEATURES GuestFeatures;
1346	} const ro;
1347	#endif
1348	/** @todo this is rather bloated because of static MSR range allocation.
1349	* Probably a good idea to move it to a separate R0 allocation... */
1350	uint8_t padding[8832 + 1288192 + 0x1d00]; / multiple of 64 */
1351	} cpum;
1352
1353	/** PGM part.
1354	* @note Aligned on 16384 boundrary for zero and mmio page storage. */
1355	union
1356	{
1357	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1358	struct PGM s;
1359	#endif
1360	uint8_t padding[129728]; /* multiple of 64 */
1361	} pgm;
1362
1363	/** VMM part. */
1364	union
1365	{
1366	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1367	struct VMM s;
1368	#endif
1369	uint8_t padding[1600]; /* multiple of 64 */
1370	} vmm;
1371
1372	/** HM part. */
1373	union
1374	{
1375	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1376	struct HM s;
1377	#endif
1378	uint8_t padding[5504]; /* multiple of 64 */
1379	} hm;
1380
1381	/** TRPM part. */
1382	union
1383	{
1384	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1385	struct TRPM s;
1386	#endif
1387	uint8_t padding[2048]; /* multiple of 64 */
1388	} trpm;
1389
1390	/** SELM part. */
1391	union
1392	{
1393	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1394	struct SELM s;
1395	#endif
1396	uint8_t padding[768]; /* multiple of 64 */
1397	} selm;
1398
1399	/** MM part. */
1400	union
1401	{
1402	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1403	struct MM s;
1404	#endif
1405	uint8_t padding[192]; /* multiple of 64 */
1406	} mm;
1407
1408	/** PDM part. */
1409	union
1410	{
1411	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1412	struct PDM s;
1413	#endif
1414	uint8_t padding[22400]; /* multiple of 64 */
1415	} pdm;
1416
1417	/** IOM part. */
1418	union
1419	{
1420	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1421	struct IOM s;
1422	#endif
1423	uint8_t padding[1152]; /* multiple of 64 */
1424	} iom;
1425
1426	/** EM part. */
1427	union
1428	{
1429	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1430	struct EM s;
1431	#endif
1432	uint8_t padding[256]; /* multiple of 64 */
1433	} em;
1434
1435	/** NEM part. */
1436	union
1437	{
1438	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1439	struct NEM s;
1440	#endif
1441	uint8_t padding[4608]; /* multiple of 64 */
1442	} nem;
1443
1444	/** TM part. */
1445	union
1446	{
1447	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1448	struct TM s;
1449	#endif
1450	uint8_t padding[10112]; /* multiple of 64 */
1451	} tm;
1452
1453	/** DBGF part. */
1454	union
1455	{
1456	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1457	struct DBGF s;
1458	#endif
1459	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1460	/** Read only info exposed about interrupt breakpoints and selected events. */
1461	struct
1462	{
1463	/** Bitmap of enabled hardware interrupt breakpoints. */
1464	uint32_t bmHardIntBreakpoints[256 / 32];
1465	/** Bitmap of enabled software interrupt breakpoints. */
1466	uint32_t bmSoftIntBreakpoints[256 / 32];
1467	/** Bitmap of selected events.
1468	* This includes non-selectable events too for simplicity, we maintain the
1469	* state for some of these, as it may come in handy. */
1470	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1471	/** Enabled hardware interrupt breakpoints. */
1472	uint32_t cHardIntBreakpoints;
1473	/** Enabled software interrupt breakpoints. */
1474	uint32_t cSoftIntBreakpoints;
1475	/** The number of selected events. */
1476	uint32_t cSelectedEvents;
1477	/** The number of enabled hardware breakpoints. */
1478	uint8_t cEnabledHwBreakpoints;
1479	/** The number of enabled hardware I/O breakpoints. */
1480	uint8_t cEnabledHwIoBreakpoints;
1481	uint8_t au8Alignment1[2]; /*< Alignment padding. /
1482	/** The number of enabled INT3 breakpoints. */
1483	uint32_t volatile cEnabledInt3Breakpoints;
1484	} const ro;
1485	#endif
1486	uint8_t padding[2432]; /* multiple of 64 */
1487	} dbgf;
1488
1489	/** SSM part. */
1490	union
1491	{
1492	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1493	struct SSM s;
1494	#endif
1495	uint8_t padding[128]; /* multiple of 64 */
1496	} ssm;
1497
1498	union
1499	{
1500	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1501	struct GIM s;
1502	#endif
1503	uint8_t padding[448]; /* multiple of 64 */
1504	} gim;
1505
1506	#if defined(VBOX_VMM_TARGET_ARMV8)
1507	union
1508	{
1509	# ifdef VMM_INCLUDED_SRC_include_GICInternal_h
1510	struct GIC s;
1511	# endif
1512	uint8_t padding[128]; /* multiple of 8 */
1513	} gic;
1514	#else
1515	union
1516	{
1517	# ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1518	struct APIC s;
1519	# endif
1520	uint8_t padding[128]; /* multiple of 8 */
1521	} apic;
1522	#endif
1523
1524	/* ---- begin small stuff ---- */
1525
1526	/** VM part. */
1527	union
1528	{
1529	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1530	struct VMINT s;
1531	#endif
1532	uint8_t padding[32]; /* multiple of 8 */
1533	} vm;
1534
1535	/** CFGM part. */
1536	union
1537	{
1538	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1539	struct CFGM s;
1540	#endif
1541	uint8_t padding[8]; /* multiple of 8 */
1542	} cfgm;
1543
1544	/** IEM part. */
1545	union
1546	{
1547	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
1548	struct IEM s;
1549	#endif
1550	uint8_t padding[16]; /* multiple of 8 */
1551	} iem;
1552
1553	/** Statistics for ring-0 only components. */
1554	struct
1555	{
1556	/** GMMR0 stats. */
1557	struct
1558	{
1559	/** Chunk TLB hits. */
1560	uint64_t cChunkTlbHits;
1561	/** Chunk TLB misses. */
1562	uint64_t cChunkTlbMisses;
1563	} gmm;
1564	uint64_t au64Padding[6]; /* probably more comming here... */
1565	} R0Stats;
1566
1567	union
1568	{
1569	#ifdef VMM_INCLUDED_SRC_include_GCMInternal_h
1570	struct GCM s;
1571	#endif
1572	uint8_t padding[8]; /* multiple of 8 */
1573	} gcm;
1574
1575	/** Padding for aligning the structure size on a page boundrary. */
1576	uint8_t abAlignment2[0x3A80 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1577
1578	/* ---- end small stuff ---- */
1579
1580	/** Array of VMCPU ring-3 pointers. */
1581	PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1582
1583	/* This point is aligned on a 16384 boundrary (for arm64 purposes). */
1584	} VM;
1585	#ifndef VBOX_FOR_DTRACE_LIB
1586	//AssertCompileSizeAlignment(VM, 16384);
1587	#endif
1588
1589
1590	#ifdef IN_RC
1591	RT_C_DECLS_BEGIN
1592
1593	/** The VM structure.
1594	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1595	* globals which we should avoid using.
1596	*/
1597	extern DECLIMPORT(VM) g_VM;
1598
1599	/** The VMCPU structure for virtual CPU \#0.
1600	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1601	* globals which we should avoid using.
1602	*/
1603	extern DECLIMPORT(VMCPU) g_VCpu0;
1604
1605	RT_C_DECLS_END
1606	#endif
1607
1608	/** @} */
1609
1610	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1611

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/include/VBox/vmm/vm.h@ 105698

Download in other formats: