vm.h@ 41943

Last change on this file since 41943 was 41933, checked in by vboxsync, 12 years ago
VMMSwitcher: Drop the unused assembly switcher functions taking guest or host contexts as arguments.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2012 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** Executing guest code and can be poked. */
72	VMCPUSTATE_STARTED_EXEC,
73	/** Executing guest code in the recompiler. */
74	VMCPUSTATE_STARTED_EXEC_REM,
75	/** Halted. */
76	VMCPUSTATE_STARTED_HALTED,
77
78	/** The end of valid virtual CPU states. */
79	VMCPUSTATE_END,
80
81	/** Ensure 32-bit type. */
82	VMCPUSTATE_32BIT_HACK = 0x7fffffff
83	} VMCPUSTATE;
84
85
86	/**
87	* Per virtual CPU data.
88	*/
89	typedef struct VMCPU
90	{
91	/** Per CPU forced action.
92	* See the VMCPU_FF_* \#defines. Updated atomically. */
93	uint32_t volatile fLocalForcedActions; /* 0 */
94	/** The CPU state. */
95	VMCPUSTATE volatile enmState; /* 4 */
96
97	/** Pointer to the ring-3 UVMCPU structure. */
98	PUVMCPU pUVCpu; /* 8 */
99	/** Ring-3 Host Context VM Pointer. */
100	PVMR3 pVMR3; /* 16 / 12 */
101	/** Ring-0 Host Context VM Pointer. */
102	PVMR0 pVMR0; /* 24 / 16 */
103	/** Raw-mode Context VM Pointer. */
104	PVMRC pVMRC; /* 32 / 20 */
105	/** The CPU ID.
106	* This is the index into the VM::aCpu array. */
107	VMCPUID idCpu; /* 36 / 24 */
108	/** The native thread handle. */
109	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
110	/** The native R0 thread handle. (different from the R3 handle!) */
111	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
112	/** Which host CPU ID is this EMT running on.
113	* Only valid when in RC or HWACCMR0 with scheduling disabled. */
114	RTCPUID volatile idHostCpu; /* 56 / 36 */
115
116	/** Trace groups enable flags. */
117	uint32_t fTraceGroups; /* 60 / 40 */
118	/** Align the structures below bit on a 64-byte boundary and make sure it starts
119	* at the same offset in both 64-bit and 32-bit builds.
120	*
121	* @remarks The alignments of the members that are larger than 48 bytes should be
122	* 64-byte for cache line reasons. structs containing small amounts of
123	* data could be lumped together at the end with a < 64 byte padding
124	* following it (to grow into and align the struct size).
125	* */
126	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
127	/** State data for use by ad hoc profiling. */
128	uint32_t uAdHoc;
129	/** Profiling samples for use by ad hoc profiling. */
130	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
131
132	/** CPUM part. */
133	union
134	{
135	#ifdef ___CPUMInternal_h
136	struct CPUMCPU s;
137	#endif
138	uint8_t padding[3584]; /* multiple of 64 */
139	} cpum;
140
141	/** HWACCM part. */
142	union
143	{
144	#ifdef ___HWACCMInternal_h
145	struct HWACCMCPU s;
146	#endif
147	uint8_t padding[5376]; /* multiple of 64 */
148	} hwaccm;
149
150	/** EM part. */
151	union
152	{
153	#ifdef ___EMInternal_h
154	struct EMCPU s;
155	#endif
156	uint8_t padding[1472]; /* multiple of 64 */
157	} em;
158
159	/** IEM part. */
160	union
161	{
162	#ifdef ___IEMInternal_h
163	struct IEMCPU s;
164	#endif
165	uint8_t padding[3072]; /* multiple of 64 */
166	} iem;
167
168	/** TRPM part. */
169	union
170	{
171	#ifdef ___TRPMInternal_h
172	struct TRPMCPU s;
173	#endif
174	uint8_t padding[128]; /* multiple of 64 */
175	} trpm;
176
177	/** TM part. */
178	union
179	{
180	#ifdef ___TMInternal_h
181	struct TMCPU s;
182	#endif
183	uint8_t padding[384]; /* multiple of 64 */
184	} tm;
185
186	/** VMM part. */
187	union
188	{
189	#ifdef ___VMMInternal_h
190	struct VMMCPU s;
191	#endif
192	uint8_t padding[640]; /* multiple of 64 */
193	} vmm;
194
195	/** PDM part. */
196	union
197	{
198	#ifdef ___PDMInternal_h
199	struct PDMCPU s;
200	#endif
201	uint8_t padding[128]; /* multiple of 64 */
202	} pdm;
203
204	/** IOM part. */
205	union
206	{
207	#ifdef ___IOMInternal_h
208	struct IOMCPU s;
209	#endif
210	uint8_t padding[512]; /* multiple of 64 */
211	} iom;
212
213	/** DBGF part.
214	* @todo Combine this with other tiny structures. */
215	union
216	{
217	#ifdef ___DBGFInternal_h
218	struct DBGFCPU s;
219	#endif
220	uint8_t padding[64]; /* multiple of 64 */
221	} dbgf;
222
223	/** Align the following members on page boundary. */
224	uint8_t abAlignment2[1024 - 320 - 128];
225
226	/** PGM part. */
227	union
228	{
229	#ifdef ___PGMInternal_h
230	struct PGMCPU s;
231	#endif
232	uint8_t padding[4096]; /* multiple of 4096 */
233	} pgm;
234
235	} VMCPU;
236
237
238	#ifndef VBOX_FOR_DTRACE_LIB
239
240	/** @name Operations on VMCPU::enmState
241	* @{ */
242	/** Gets the VMCPU state. */
243	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
244	/** Sets the VMCPU state. */
245	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
246	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
247	/** Cmpares and sets the VMCPU state. */
248	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
249	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
250	/** Checks the VMCPU state. */
251	#ifdef VBOX_STRICT
252	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
253	do { \
254	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
255	AssertMsg(enmState == (enmExpectedState), \
256	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
257	enmState, enmExpectedState, (pVCpu)->idCpu)); \
258	} while (0)
259	#else
260	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
261	#endif
262	/** Tests if the state means that the CPU is started. */
263	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
264	/** Tests if the state means that the CPU is stopped. */
265	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
266	/** @} */
267
268
269	/** The name of the Guest Context VMM Core module. */
270	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
271	/** The name of the Ring 0 Context VMM Core module. */
272	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
273
274	/** VM Forced Action Flags.
275	*
276	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
277	* action mask of a VM.
278	*
279	* @{
280	*/
281	/** The virtual sync clock has been stopped, go to TM until it has been
282	* restarted... */
283	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
284	/** PDM Queues are pending. */
285	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
286	/** The bit number for VM_FF_PDM_QUEUES. */
287	#define VM_FF_PDM_QUEUES_BIT 3
288	/** PDM DMA transfers are pending. */
289	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
290	/** The bit number for VM_FF_PDM_DMA. */
291	#define VM_FF_PDM_DMA_BIT 4
292	/** This action forces the VM to call DBGF so DBGF can service debugger
293	* requests in the emulation thread.
294	* This action flag stays asserted till DBGF clears it.*/
295	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
296	/** The bit number for VM_FF_DBGF. */
297	#define VM_FF_DBGF_BIT 8
298	/** This action forces the VM to service pending requests from other
299	* thread or requests which must be executed in another context. */
300	#define VM_FF_REQUEST RT_BIT_32(9)
301	/** Check for VM state changes and take appropriate action. */
302	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
303	/** The bit number for VM_FF_CHECK_VM_STATE. */
304	#define VM_FF_CHECK_VM_STATE_BIT 10
305	/** Reset the VM. (postponed) */
306	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
307	/** The bit number for VM_FF_RESET. */
308	#define VM_FF_RESET_BIT 11
309	/** EMT rendezvous in VMM. */
310	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
311	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
312	#define VM_FF_EMT_RENDEZVOUS_BIT 12
313
314	/** PGM needs to allocate handy pages. */
315	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
316	/** PGM is out of memory.
317	* Abandon all loops and code paths which can be resumed and get up to the EM
318	* loops. */
319	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
320	/** PGM is about to perform a lightweight pool flush
321	* Guest SMP: all EMT threads should return to ring 3
322	*/
323	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
324	/** REM needs to be informed about handler changes. */
325	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
326	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
327	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
328	/** Suspend the VM - debug only. */
329	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
330
331
332	/** This action forces the VM to check any pending interrups on the APIC. */
333	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
334	/** This action forces the VM to check any pending interrups on the PIC. */
335	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
336	/** This action forces the VM to schedule and run pending timer (TM).
337	* @remarks Don't move - PATM compatibility. */
338	#define VMCPU_FF_TIMER RT_BIT_32(2)
339	/** This action forces the VM to check any pending NMIs. */
340	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
341	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
342	/** This action forces the VM to check any pending SMIs. */
343	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
344	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
345	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
346	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
347	/** This action forces the VM to service pending requests from other
348	* thread or requests which must be executed in another context. */
349	#define VMCPU_FF_REQUEST RT_BIT_32(9)
350	/** This action forces the VM to resync the page tables before going
351	* back to execute guest code. (GLOBAL FLUSH) */
352	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
353	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
354	* (NON-GLOBAL FLUSH) */
355	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
356	/** Check for pending TLB shootdown actions.
357	* Consumer: HWACCM
358	* @todo rename to VMCPU_FF_HWACCM_TLB_SHOOTDOWN */
359	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
360	/** Check for pending TLB flush action.
361	* Consumer: HWACCM
362	* @todo rename to VMCPU_FF_HWACCM_TLB_FLUSH */
363	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
364	/** The bit number for VMCPU_FF_TLB_FLUSH. */
365	#define VMCPU_FF_TLB_FLUSH_BIT 19
366	/** Check the interrupt and trap gates */
367	#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
368	/** Check Guest's TSS ring 0 stack */
369	#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
370	/** Check Guest's GDT table */
371	#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
372	/** Check Guest's LDT table */
373	#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
374	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
375	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
376	/** CSAM needs to scan the page that's being executed */
377	#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
378	/** CSAM needs to do some homework. */
379	#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
380	/** Force return to Ring-3. */
381	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
382
383	/** Externally VM forced actions. Used to quit the idle/wait loop. */
384	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
385	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
386	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
387
388	/** Externally forced VM actions. Used to quit the idle/wait loop. */
389	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
390	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
391	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
392	#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \| VMCPU_FF_TIMER)
393
394	/** High priority VM pre-execution actions. */
395	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
396	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
397	/** High priority VMCPU pre-execution actions. */
398	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_PGM_SYNC_CR3 \
399	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
400	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
401
402	/** High priority VM pre raw-mode execution mask. */
403	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
404	/** High priority VMCPU pre raw-mode execution mask. */
405	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
406	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT \| VMCPU_FF_INHIBIT_INTERRUPTS)
407
408	/** High priority post-execution actions. */
409	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
410	/** High priority post-execution actions. */
411	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK (VMCPU_FF_PDM_CRITSECT\|VMCPU_FF_CSAM_PENDING_ACTION)
412
413	/** Normal priority VM post-execution actions. */
414	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
415	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
416	/** Normal priority VMCPU post-execution actions. */
417	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE)
418
419	/** Normal priority VM actions. */
420	#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
421	/** Normal priority VMCPU actions. */
422	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
423
424	/** Flags to clear before resuming guest execution. */
425	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
426
427	/** VM Flags that cause the HWACCM loops to go back to ring-3. */
428	#define VM_FF_HWACCM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
429	/** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
430	#define VMCPU_FF_HWACCM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
431
432	/** All the forced VM flags. */
433	#define VM_FF_ALL_MASK (~0U)
434	/** All the forced VMCPU flags. */
435	#define VMCPU_FF_ALL_MASK (~0U)
436
437	/** All the forced VM flags except those related to raw-mode and hardware
438	* assisted execution. */
439	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
440	/** All the forced VMCPU flags except those related to raw-mode and hardware
441	* assisted execution. */
442	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_CSAM_PENDING_ACTION \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN))
443
444	/** @} */
445
446	/** @def VM_FF_SET
447	* Sets a force action flag.
448	*
449	* @param pVM VM Handle.
450	* @param fFlag The flag to set.
451	*/
452	#if 1
453	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
454	#else
455	# define VM_FF_SET(pVM, fFlag) \
456	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
457	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
458	} while (0)
459	#endif
460
461	/** @def VMCPU_FF_SET
462	* Sets a force action flag for the given VCPU.
463	*
464	* @param pVCpu VMCPU Handle.
465	* @param fFlag The flag to set.
466	*/
467	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
468
469	/** @def VM_FF_CLEAR
470	* Clears a force action flag.
471	*
472	* @param pVM VM Handle.
473	* @param fFlag The flag to clear.
474	*/
475	#if 1
476	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
477	#else
478	# define VM_FF_CLEAR(pVM, fFlag) \
479	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
480	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
481	} while (0)
482	#endif
483
484	/** @def VMCPU_FF_CLEAR
485	* Clears a force action flag for the given VCPU.
486	*
487	* @param pVCpu VMCPU Handle.
488	* @param fFlag The flag to clear.
489	*/
490	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
491
492	/** @def VM_FF_ISSET
493	* Checks if a force action flag is set.
494	*
495	* @param pVM VM Handle.
496	* @param fFlag The flag to check.
497	*/
498	#define VM_FF_ISSET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
499
500	/** @def VMCPU_FF_ISSET
501	* Checks if a force action flag is set for the given VCPU.
502	*
503	* @param pVCpu VMCPU Handle.
504	* @param fFlag The flag to check.
505	*/
506	#define VMCPU_FF_ISSET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
507
508	/** @def VM_FF_ISPENDING
509	* Checks if one or more force action in the specified set is pending.
510	*
511	* @param pVM VM Handle.
512	* @param fFlags The flags to check for.
513	*/
514	#define VM_FF_ISPENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
515
516	/** @def VM_FF_TESTANDCLEAR
517	* Checks if one (!) force action in the specified set is pending and clears it atomically
518	*
519	* @returns true if the bit was set.
520	* @returns false if the bit was clear.
521	* @param pVM VM Handle.
522	* @param iBit Bit position to check and clear
523	*/
524	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
525
526	/** @def VMCPU_FF_TESTANDCLEAR
527	* Checks if one (!) force action in the specified set is pending and clears it atomically
528	*
529	* @returns true if the bit was set.
530	* @returns false if the bit was clear.
531	* @param pVCpu VMCPU Handle.
532	* @param iBit Bit position to check and clear
533	*/
534	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
535
536	/** @def VMCPU_FF_ISPENDING
537	* Checks if one or more force action in the specified set is pending for the given VCPU.
538	*
539	* @param pVCpu VMCPU Handle.
540	* @param fFlags The flags to check for.
541	*/
542	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
543
544	/** @def VM_FF_ISPENDING
545	* Checks if one or more force action in the specified set is pending while one
546	* or more other ones are not.
547	*
548	* @param pVM VM Handle.
549	* @param fFlags The flags to check for.
550	* @param fExcpt The flags that should not be set.
551	*/
552	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
553
554	/** @def VMCPU_FF_IS_PENDING_EXCEPT
555	* Checks if one or more force action in the specified set is pending for the given
556	* VCPU while one or more other ones are not.
557	*
558	* @param pVCpu VMCPU Handle.
559	* @param fFlags The flags to check for.
560	* @param fExcpt The flags that should not be set.
561	*/
562	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
563
564	/** @def VM_IS_EMT
565	* Checks if the current thread is the emulation thread (EMT).
566	*
567	* @remark The ring-0 variation will need attention if we expand the ring-0
568	* code to let threads other than EMT mess around with the VM.
569	*/
570	#ifdef IN_RC
571	# define VM_IS_EMT(pVM) true
572	#else
573	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
574	#endif
575
576	/** @def VMCPU_IS_EMT
577	* Checks if the current thread is the emulation thread (EMT) for the specified
578	* virtual CPU.
579	*/
580	#ifdef IN_RC
581	# define VMCPU_IS_EMT(pVCpu) true
582	#else
583	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
584	#endif
585
586	/** @def VM_ASSERT_EMT
587	* Asserts that the current thread IS the emulation thread (EMT).
588	*/
589	#ifdef IN_RC
590	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
591	#elif defined(IN_RING0)
592	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
593	#else
594	# define VM_ASSERT_EMT(pVM) \
595	AssertMsg(VM_IS_EMT(pVM), \
596	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
597	#endif
598
599	/** @def VMCPU_ASSERT_EMT
600	* Asserts that the current thread IS the emulation thread (EMT) of the
601	* specified virtual CPU.
602	*/
603	#ifdef IN_RC
604	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
605	#elif defined(IN_RING0)
606	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
607	#else
608	# define VMCPU_ASSERT_EMT(pVCpu) \
609	AssertMsg(VMCPU_IS_EMT(pVCpu), \
610	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
611	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
612	#endif
613
614	/** @def VM_ASSERT_EMT_RETURN
615	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
616	*/
617	#ifdef IN_RC
618	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
619	#elif defined(IN_RING0)
620	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
621	#else
622	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
623	AssertMsgReturn(VM_IS_EMT(pVM), \
624	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
625	(rc))
626	#endif
627
628	/** @def VMCPU_ASSERT_EMT_RETURN
629	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
630	*/
631	#ifdef IN_RC
632	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
633	#elif defined(IN_RING0)
634	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
635	#else
636	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
637	AssertMsg(VMCPU_IS_EMT(pVCpu), \
638	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
639	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
640	(rc))
641	#endif
642
643	/** @def VMCPU_ASSERT_EMT_OR_GURU
644	* Asserts that the current thread IS the emulation thread (EMT) of the
645	* specified virtual CPU.
646	*/
647	#if defined(IN_RC) \|\| defined(IN_RING0)
648	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
649	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
650	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
651	#else
652	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
653	AssertMsg( VMCPU_IS_EMT(pVCpu) \
654	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
655	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
656	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
657	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
658	#endif
659
660	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
661	* Asserts that the current thread IS the emulation thread (EMT) of the
662	* specified virtual CPU when the VM is running.
663	*/
664	#if defined(IN_RC) \|\| defined(IN_RING0)
665	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
666	Assert( VMCPU_IS_EMT(pVCpu) \
667	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
668	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
669	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
670	#else
671	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
672	AssertMsg( VMCPU_IS_EMT(pVCpu) \
673	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
674	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
675	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
676	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
677	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
678	#endif
679
680	/** @def VM_ASSERT_EMT0
681	* Asserts that the current thread IS emulation thread \#0 (EMT0).
682	*/
683	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
684
685	/** @def VM_ASSERT_EMT0_RETURN
686	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
687	* it isn't.
688	*/
689	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
690
691
692	/**
693	* Asserts that the current thread is NOT the emulation thread.
694	*/
695	#define VM_ASSERT_OTHER_THREAD(pVM) \
696	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
697
698
699	/** @def VM_ASSERT_STATE_RETURN
700	* Asserts a certain VM state.
701	*/
702	#define VM_ASSERT_STATE(pVM, _enmState) \
703	AssertMsg((pVM)->enmVMState == (_enmState), \
704	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
705
706	/** @def VM_ASSERT_STATE_RETURN
707	* Asserts a certain VM state and returns if it doesn't match.
708	*/
709	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
710	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
711	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
712	(rc))
713
714	/** @def VM_ASSERT_VALID_EXT_RETURN
715	* Asserts a the VM handle is valid for external access, i.e. not being
716	* destroy or terminated.
717	*/
718	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
719	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
720	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
721	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
722	&& VM_IS_EMT(pVM))), \
723	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
724	? VMGetStateName(pVM->enmVMState) : ""), \
725	(rc))
726
727	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
728	* Asserts a the VMCPU handle is valid for external access, i.e. not being
729	* destroy or terminated.
730	*/
731	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
732	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
733	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
734	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
735	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
736	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
737	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
738	(rc))
739
740	#endif /* !VBOX_FOR_DTRACE_LIB */
741
742
743
744	/** This is the VM structure.
745	*
746	* It contains (nearly?) all the VM data which have to be available in all
747	* contexts. Even if it contains all the data the idea is to use APIs not
748	* to modify all the members all around the place. Therefore we make use of
749	* unions to hide everything which isn't local to the current source module.
750	* This means we'll have to pay a little bit of attention when adding new
751	* members to structures in the unions and make sure to keep the padding sizes
752	* up to date.
753	*
754	* Run tstVMStructSize after update!
755	*/
756	typedef struct VM
757	{
758	/** The state of the VM.
759	* This field is read only to everyone except the VM and EM. */
760	VMSTATE volatile enmVMState;
761	/** Forced action flags.
762	* See the VM_FF_* \#defines. Updated atomically.
763	*/
764	volatile uint32_t fGlobalForcedActions;
765	/** Pointer to the array of page descriptors for the VM structure allocation. */
766	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
767	/** Session handle. For use when calling SUPR0 APIs. */
768	PSUPDRVSESSION pSession;
769	/** Pointer to the ring-3 VM structure. */
770	PUVM pUVM;
771	/** Ring-3 Host Context VM Pointer. */
772	R3PTRTYPE(struct VM *) pVMR3;
773	/** Ring-0 Host Context VM Pointer. */
774	R0PTRTYPE(struct VM *) pVMR0;
775	/** Raw-mode Context VM Pointer. */
776	RCPTRTYPE(struct VM *) pVMRC;
777
778	/** The GVM VM handle. Only the GVM should modify this field. */
779	uint32_t hSelf;
780	/** Number of virtual CPUs. */
781	uint32_t cCpus;
782	/** CPU excution cap (1-100) */
783	uint32_t uCpuExecutionCap;
784
785	/** Size of the VM structure including the VMCPU array. */
786	uint32_t cbSelf;
787
788	/** Offset to the VMCPU array starting from beginning of this structure. */
789	uint32_t offVMCPU;
790
791	/**
792	* VMMSwitcher assembly entry point returning to host context.
793	*
794	* Depending on how the host handles the rc status given in @a eax, this may
795	* return and let the caller resume whatever it was doing prior to the call.
796	* This method pointer lives here because TRPM needs it.
797	*
798	* @param eax The return code, register.
799	* @remark Assume interrupts disabled.
800	*/
801	RTRCPTR pfnVMMGCGuestToHostAsm/(int32_t eax)/;
802
803	/** @name Various items that are frequently accessed.
804	* @{ */
805	/** Whether to recompile user mode code or run it raw/hm. */
806	bool fRecompileUser;
807	/** Whether to recompile supervisor mode code or run it raw/hm. */
808	bool fRecompileSupervisor;
809	/** PATM enabled flag.
810	* This is placed here for performance reasons. */
811	bool fPATMEnabled;
812	/** CSAM enabled flag.
813	* This is placed here for performance reasons. */
814	bool fCSAMEnabled;
815	/** Hardware VM support is available and enabled.
816	* This is placed here for performance reasons. */
817	bool fHWACCMEnabled;
818	/** Hardware VM support is required and non-optional.
819	* This is initialized together with the rest of the VM structure. */
820	bool fHwVirtExtForced;
821	/** Set when this VM is the master FT node. */
822	bool fFaultTolerantMaster;
823	/** Large page enabled flag. */
824	bool fUseLargePages;
825	/** @} */
826
827	/** @name Debugging
828	* @{ */
829	/** Raw-mode Context VM Pointer. */
830	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
831	/** Ring-3 Host Context VM Pointer. */
832	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
833	/** Ring-0 Host Context VM Pointer. */
834	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
835	/** @} */
836
837	#if HC_ARCH_BITS == 32
838	/** Alignment padding.. */
839	uint32_t uPadding2;
840	#endif
841
842	/** @name Switcher statistics (remove)
843	* @{ */
844	/** Profiling the total time from Qemu to GC. */
845	STAMPROFILEADV StatTotalQemuToGC;
846	/** Profiling the total time from GC to Qemu. */
847	STAMPROFILEADV StatTotalGCToQemu;
848	/** Profiling the total time spent in GC. */
849	STAMPROFILEADV StatTotalInGC;
850	/** Profiling the total time spent not in Qemu. */
851	STAMPROFILEADV StatTotalInQemu;
852	/** Profiling the VMMSwitcher code for going to GC. */
853	STAMPROFILEADV StatSwitcherToGC;
854	/** Profiling the VMMSwitcher code for going to HC. */
855	STAMPROFILEADV StatSwitcherToHC;
856	STAMPROFILEADV StatSwitcherSaveRegs;
857	STAMPROFILEADV StatSwitcherSysEnter;
858	STAMPROFILEADV StatSwitcherDebug;
859	STAMPROFILEADV StatSwitcherCR0;
860	STAMPROFILEADV StatSwitcherCR4;
861	STAMPROFILEADV StatSwitcherJmpCR3;
862	STAMPROFILEADV StatSwitcherRstrRegs;
863	STAMPROFILEADV StatSwitcherLgdt;
864	STAMPROFILEADV StatSwitcherLidt;
865	STAMPROFILEADV StatSwitcherLldt;
866	STAMPROFILEADV StatSwitcherTSS;
867	/** @} */
868
869	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
870	* must start at the same offset on both 64-bit and 32-bit hosts. */
871	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 48];
872
873	/** CPUM part. */
874	union
875	{
876	#ifdef ___CPUMInternal_h
877	struct CPUM s;
878	#endif
879	uint8_t padding[1536]; /* multiple of 64 */
880	} cpum;
881
882	/** VMM part. */
883	union
884	{
885	#ifdef ___VMMInternal_h
886	struct VMM s;
887	#endif
888	uint8_t padding[1600]; /* multiple of 64 */
889	} vmm;
890
891	/** PGM part. */
892	union
893	{
894	#ifdef ___PGMInternal_h
895	struct PGM s;
896	#endif
897	uint8_t padding[40962+6080]; / multiple of 64 */
898	} pgm;
899
900	/** HWACCM part. */
901	union
902	{
903	#ifdef ___HWACCMInternal_h
904	struct HWACCM s;
905	#endif
906	uint8_t padding[5376]; /* multiple of 64 */
907	} hwaccm;
908
909	/** TRPM part. */
910	union
911	{
912	#ifdef ___TRPMInternal_h
913	struct TRPM s;
914	#endif
915	uint8_t padding[5248]; /* multiple of 64 */
916	} trpm;
917
918	/** SELM part. */
919	union
920	{
921	#ifdef ___SELMInternal_h
922	struct SELM s;
923	#endif
924	uint8_t padding[576]; /* multiple of 64 */
925	} selm;
926
927	/** MM part. */
928	union
929	{
930	#ifdef ___MMInternal_h
931	struct MM s;
932	#endif
933	uint8_t padding[192]; /* multiple of 64 */
934	} mm;
935
936	/** PDM part. */
937	union
938	{
939	#ifdef ___PDMInternal_h
940	struct PDM s;
941	#endif
942	uint8_t padding[1920]; /* multiple of 64 */
943	} pdm;
944
945	/** IOM part. */
946	union
947	{
948	#ifdef ___IOMInternal_h
949	struct IOM s;
950	#endif
951	uint8_t padding[832]; /* multiple of 64 */
952	} iom;
953
954	/** PATM part. */
955	union
956	{
957	#ifdef ___PATMInternal_h
958	struct PATM s;
959	#endif
960	uint8_t padding[768]; /* multiple of 64 */
961	} patm;
962
963	/** CSAM part. */
964	union
965	{
966	#ifdef ___CSAMInternal_h
967	struct CSAM s;
968	#endif
969	uint8_t padding[1088]; /* multiple of 64 */
970	} csam;
971
972	/** EM part. */
973	union
974	{
975	#ifdef ___EMInternal_h
976	struct EM s;
977	#endif
978	uint8_t padding[256]; /* multiple of 64 */
979	} em;
980
981	/** TM part. */
982	union
983	{
984	#ifdef ___TMInternal_h
985	struct TM s;
986	#endif
987	uint8_t padding[2432]; /* multiple of 64 */
988	} tm;
989
990	/** DBGF part. */
991	union
992	{
993	#ifdef ___DBGFInternal_h
994	struct DBGF s;
995	#endif
996	uint8_t padding[2368]; /* multiple of 64 */
997	} dbgf;
998
999	/** SSM part. */
1000	union
1001	{
1002	#ifdef ___SSMInternal_h
1003	struct SSM s;
1004	#endif
1005	uint8_t padding[128]; /* multiple of 64 */
1006	} ssm;
1007
1008	/** FTM part. */
1009	union
1010	{
1011	#ifdef ___FTMInternal_h
1012	struct FTM s;
1013	#endif
1014	uint8_t padding[512]; /* multiple of 64 */
1015	} ftm;
1016
1017	/** REM part. */
1018	union
1019	{
1020	#ifdef ___REMInternal_h
1021	struct REM s;
1022	#endif
1023	uint8_t padding[0x11100]; /* multiple of 64 */
1024	} rem;
1025
1026	/* ---- begin small stuff ---- */
1027
1028	/** VM part. */
1029	union
1030	{
1031	#ifdef ___VMInternal_h
1032	struct VMINT s;
1033	#endif
1034	uint8_t padding[24]; /* multiple of 8 */
1035	} vm;
1036
1037	/** CFGM part. */
1038	union
1039	{
1040	#ifdef ___CFGMInternal_h
1041	struct CFGM s;
1042	#endif
1043	uint8_t padding[8]; /* multiple of 8 */
1044	} cfgm;
1045
1046
1047	/** Padding for aligning the cpu array on a page boundary. */
1048	uint8_t abAlignment2[734];
1049
1050	/* ---- end small stuff ---- */
1051
1052	/** VMCPU array for the configured number of virtual CPUs.
1053	* Must be aligned on a page boundary for TLB hit reasons as well as
1054	* alignment of VMCPU members. */
1055	VMCPU aCpus[1];
1056	} VM;
1057
1058
1059	#ifdef IN_RC
1060	RT_C_DECLS_BEGIN
1061
1062	/** The VM structure.
1063	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1064	* of those magic globals which we should avoid using.
1065	*/
1066	extern DECLIMPORT(VM) g_VM;
1067
1068	RT_C_DECLS_END
1069	#endif
1070
1071	/** @} */
1072
1073	#endif
1074

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source: vbox/trunk/include/VBox/vmm/vm.h@ 41943

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