vm.h@ 46197

Last change on this file since 46197 was 46155, checked in by vboxsync, 12 years ago
List near, unassemble, hyper register and more tiny debugger fixes.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2013 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** CPU started in HM context. */
72	VMCPUSTATE_STARTED_HM,
73	/** Executing guest code and can be poked (RC or STI bits of HM). */
74	VMCPUSTATE_STARTED_EXEC,
75	/** Executing guest code in the recompiler. */
76	VMCPUSTATE_STARTED_EXEC_REM,
77	/** Halted. */
78	VMCPUSTATE_STARTED_HALTED,
79
80	/** The end of valid virtual CPU states. */
81	VMCPUSTATE_END,
82
83	/** Ensure 32-bit type. */
84	VMCPUSTATE_32BIT_HACK = 0x7fffffff
85	} VMCPUSTATE;
86
87
88	/**
89	* The cross context virtual CPU structure.
90	*
91	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
92	*/
93	typedef struct VMCPU
94	{
95	/** Per CPU forced action.
96	* See the VMCPU_FF_* \#defines. Updated atomically. */
97	uint32_t volatile fLocalForcedActions; /* 0 */
98	/** The CPU state. */
99	VMCPUSTATE volatile enmState; /* 4 */
100
101	/** Pointer to the ring-3 UVMCPU structure. */
102	PUVMCPU pUVCpu; /* 8 */
103	/** Ring-3 Host Context VM Pointer. */
104	PVMR3 pVMR3; /* 16 / 12 */
105	/** Ring-0 Host Context VM Pointer. */
106	PVMR0 pVMR0; /* 24 / 16 */
107	/** Raw-mode Context VM Pointer. */
108	PVMRC pVMRC; /* 32 / 20 */
109	/** The CPU ID.
110	* This is the index into the VM::aCpu array. */
111	VMCPUID idCpu; /* 36 / 24 */
112	/** The native thread handle. */
113	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
114	/** The native R0 thread handle. (different from the R3 handle!) */
115	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
116	/** Which host CPU ID is this EMT running on.
117	* Only valid when in RC or HMR0 with scheduling disabled. */
118	RTCPUID volatile idHostCpu; /* 56 / 36 */
119
120	/** Trace groups enable flags. */
121	uint32_t fTraceGroups; /* 60 / 40 */
122	/** Align the structures below bit on a 64-byte boundary and make sure it starts
123	* at the same offset in both 64-bit and 32-bit builds.
124	*
125	* @remarks The alignments of the members that are larger than 48 bytes should be
126	* 64-byte for cache line reasons. structs containing small amounts of
127	* data could be lumped together at the end with a < 64 byte padding
128	* following it (to grow into and align the struct size).
129	* */
130	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
131	/** State data for use by ad hoc profiling. */
132	uint32_t uAdHoc;
133	/** Profiling samples for use by ad hoc profiling. */
134	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
135
136	/** CPUM part. */
137	union
138	{
139	#ifdef ___CPUMInternal_h
140	struct CPUMCPU s;
141	#endif
142	uint8_t padding[3584]; /* multiple of 64 */
143	} cpum;
144
145	/** HM part. */
146	union
147	{
148	#ifdef ___HMInternal_h
149	struct HMCPU s;
150	#endif
151	uint8_t padding[5440]; /* multiple of 64 */
152	} hm;
153
154	/** EM part. */
155	union
156	{
157	#ifdef ___EMInternal_h
158	struct EMCPU s;
159	#endif
160	uint8_t padding[1472]; /* multiple of 64 */
161	} em;
162
163	/** IEM part. */
164	union
165	{
166	#ifdef ___IEMInternal_h
167	struct IEMCPU s;
168	#endif
169	uint8_t padding[3072]; /* multiple of 64 */
170	} iem;
171
172	/** TRPM part. */
173	union
174	{
175	#ifdef ___TRPMInternal_h
176	struct TRPMCPU s;
177	#endif
178	uint8_t padding[128]; /* multiple of 64 */
179	} trpm;
180
181	/** TM part. */
182	union
183	{
184	#ifdef ___TMInternal_h
185	struct TMCPU s;
186	#endif
187	uint8_t padding[384]; /* multiple of 64 */
188	} tm;
189
190	/** VMM part. */
191	union
192	{
193	#ifdef ___VMMInternal_h
194	struct VMMCPU s;
195	#endif
196	uint8_t padding[704]; /* multiple of 64 */
197	} vmm;
198
199	/** PDM part. */
200	union
201	{
202	#ifdef ___PDMInternal_h
203	struct PDMCPU s;
204	#endif
205	uint8_t padding[256]; /* multiple of 64 */
206	} pdm;
207
208	/** IOM part. */
209	union
210	{
211	#ifdef ___IOMInternal_h
212	struct IOMCPU s;
213	#endif
214	uint8_t padding[512]; /* multiple of 64 */
215	} iom;
216
217	/** DBGF part.
218	* @todo Combine this with other tiny structures. */
219	union
220	{
221	#ifdef ___DBGFInternal_h
222	struct DBGFCPU s;
223	#endif
224	uint8_t padding[64]; /* multiple of 64 */
225	} dbgf;
226
227	/** Align the following members on page boundary. */
228	uint8_t abAlignment2[320];
229
230	/** PGM part. */
231	union
232	{
233	#ifdef ___PGMInternal_h
234	struct PGMCPU s;
235	#endif
236	uint8_t padding[4096]; /* multiple of 4096 */
237	} pgm;
238
239	} VMCPU;
240
241
242	#ifndef VBOX_FOR_DTRACE_LIB
243
244	/** @name Operations on VMCPU::enmState
245	* @{ */
246	/** Gets the VMCPU state. */
247	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
248	/** Sets the VMCPU state. */
249	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
250	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
251	/** Cmpares and sets the VMCPU state. */
252	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
253	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
254	/** Checks the VMCPU state. */
255	#ifdef VBOX_STRICT
256	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
257	do { \
258	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
259	AssertMsg(enmState == (enmExpectedState), \
260	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
261	enmState, enmExpectedState, (pVCpu)->idCpu)); \
262	} while (0)
263	#else
264	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
265	#endif
266	/** Tests if the state means that the CPU is started. */
267	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
268	/** Tests if the state means that the CPU is stopped. */
269	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
270	/** @} */
271
272
273	/** The name of the Guest Context VMM Core module. */
274	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
275	/** The name of the Ring 0 Context VMM Core module. */
276	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
277
278	/**
279	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
280	*/
281	#ifdef VBOX_WITH_RAW_MODE
282	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
283	#else
284	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
285	#endif
286
287
288	/** VM Forced Action Flags.
289	*
290	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
291	* action mask of a VM.
292	*
293	* @{
294	*/
295	/** The virtual sync clock has been stopped, go to TM until it has been
296	* restarted... */
297	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
298	/** PDM Queues are pending. */
299	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
300	/** The bit number for VM_FF_PDM_QUEUES. */
301	#define VM_FF_PDM_QUEUES_BIT 3
302	/** PDM DMA transfers are pending. */
303	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
304	/** The bit number for VM_FF_PDM_DMA. */
305	#define VM_FF_PDM_DMA_BIT 4
306	/** This action forces the VM to call DBGF so DBGF can service debugger
307	* requests in the emulation thread.
308	* This action flag stays asserted till DBGF clears it.*/
309	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
310	/** The bit number for VM_FF_DBGF. */
311	#define VM_FF_DBGF_BIT 8
312	/** This action forces the VM to service pending requests from other
313	* thread or requests which must be executed in another context. */
314	#define VM_FF_REQUEST RT_BIT_32(9)
315	/** Check for VM state changes and take appropriate action. */
316	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
317	/** The bit number for VM_FF_CHECK_VM_STATE. */
318	#define VM_FF_CHECK_VM_STATE_BIT 10
319	/** Reset the VM. (postponed) */
320	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
321	/** The bit number for VM_FF_RESET. */
322	#define VM_FF_RESET_BIT 11
323	/** EMT rendezvous in VMM. */
324	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
325	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
326	#define VM_FF_EMT_RENDEZVOUS_BIT 12
327
328	/** PGM needs to allocate handy pages. */
329	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
330	/** PGM is out of memory.
331	* Abandon all loops and code paths which can be resumed and get up to the EM
332	* loops. */
333	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
334	/** PGM is about to perform a lightweight pool flush
335	* Guest SMP: all EMT threads should return to ring 3
336	*/
337	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
338	/** REM needs to be informed about handler changes. */
339	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
340	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
341	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
342	/** Suspend the VM - debug only. */
343	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
344
345
346	/** This action forces the VM to check any pending interrups on the APIC. */
347	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
348	/** This action forces the VM to check any pending interrups on the PIC. */
349	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
350	/** This action forces the VM to schedule and run pending timer (TM).
351	* @remarks Don't move - PATM compatibility. */
352	#define VMCPU_FF_TIMER RT_BIT_32(2)
353	/** This action forces the VM to check any pending NMIs. */
354	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
355	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
356	/** This action forces the VM to check any pending SMIs. */
357	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
358	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
359	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
360	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
361	/** This action forces the VM to service pending requests from other
362	* thread or requests which must be executed in another context. */
363	#define VMCPU_FF_REQUEST RT_BIT_32(9)
364	/** This action forces the VM to service any pending updates to CR3 (used only
365	* by HM). */
366	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
367	/** This action forces the VM to service any pending updates to PAE PDPEs (used
368	* only by HM). */
369	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
370	/** This action forces the VM to resync the page tables before going
371	* back to execute guest code. (GLOBAL FLUSH) */
372	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
373	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
374	* (NON-GLOBAL FLUSH) */
375	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
376	/** Check for pending TLB shootdown actions.
377	* Consumer: HM
378	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
379	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
380	/** Check for pending TLB flush action.
381	* Consumer: HM
382	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
383	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
384	/** The bit number for VMCPU_FF_TLB_FLUSH. */
385	#define VMCPU_FF_TLB_FLUSH_BIT 19
386	#ifdef VBOX_WITH_RAW_MODE
387	/** Check the interrupt and trap gates */
388	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
389	/** Check Guest's TSS ring 0 stack */
390	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
391	/** Check Guest's GDT table */
392	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
393	/** Check Guest's LDT table */
394	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
395	#endif /* VBOX_WITH_RAW_MODE */
396	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
397	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
398	#ifdef VBOX_WITH_RAW_MODE
399	/** CSAM needs to scan the page that's being executed */
400	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
401	/** CSAM needs to do some homework. */
402	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
403	#endif /* VBOX_WITH_RAW_MODE */
404	/** Force return to Ring-3. */
405	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
406
407	/** Externally VM forced actions. Used to quit the idle/wait loop. */
408	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
409	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
410	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
411
412	/** Externally forced VM actions. Used to quit the idle/wait loop. */
413	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
414	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
415	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
416	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
417	\| VMCPU_FF_TIMER)
418
419	/** High priority VM pre-execution actions. */
420	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
421	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
422	\| VM_FF_EMT_RENDEZVOUS)
423	/** High priority VMCPU pre-execution actions. */
424	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
425	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
426	\| VMCPU_FF_INHIBIT_INTERRUPTS \
427	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
428	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
429
430	/** High priority VM pre raw-mode execution mask. */
431	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
432	/** High priority VMCPU pre raw-mode execution mask. */
433	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
434	\| VMCPU_FF_INHIBIT_INTERRUPTS \
435	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
436	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
437
438	/** High priority post-execution actions. */
439	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
440	/** High priority post-execution actions. */
441	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
442	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
443
444	/** Normal priority VM post-execution actions. */
445	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
446	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
447	/** Normal priority VMCPU post-execution actions. */
448	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
449
450	/** Normal priority VM actions. */
451	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
452	\| VM_FF_EMT_RENDEZVOUS)
453	/** Normal priority VMCPU actions. */
454	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
455
456	/** Flags to clear before resuming guest execution. */
457	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
458
459	/** VM Flags that cause the HM loops to go back to ring-3. */
460	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
461	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
462	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
463	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
464
465	/** All the forced VM flags. */
466	#define VM_FF_ALL_MASK (~0U)
467	/** All the forced VMCPU flags. */
468	#define VMCPU_FF_ALL_MASK (~0U)
469
470	/** All the forced VM flags except those related to raw-mode and hardware
471	* assisted execution. */
472	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
473	/** All the forced VMCPU flags except those related to raw-mode and hardware
474	* assisted execution. */
475	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
476	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
477	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
478	/** @} */
479
480	/** @def VM_FF_SET
481	* Sets a force action flag.
482	*
483	* @param pVM VM Handle.
484	* @param fFlag The flag to set.
485	*/
486	#if 1
487	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
488	#else
489	# define VM_FF_SET(pVM, fFlag) \
490	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
491	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
492	} while (0)
493	#endif
494
495	/** @def VMCPU_FF_SET
496	* Sets a force action flag for the given VCPU.
497	*
498	* @param pVCpu VMCPU Handle.
499	* @param fFlag The flag to set.
500	*/
501	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
502
503	/** @def VM_FF_CLEAR
504	* Clears a force action flag.
505	*
506	* @param pVM VM Handle.
507	* @param fFlag The flag to clear.
508	*/
509	#if 1
510	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
511	#else
512	# define VM_FF_CLEAR(pVM, fFlag) \
513	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
514	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
515	} while (0)
516	#endif
517
518	/** @def VMCPU_FF_CLEAR
519	* Clears a force action flag for the given VCPU.
520	*
521	* @param pVCpu VMCPU Handle.
522	* @param fFlag The flag to clear.
523	*/
524	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
525
526	/** @def VM_FF_ISSET
527	* Checks if a force action flag is set.
528	*
529	* @param pVM VM Handle.
530	* @param fFlag The flag to check.
531	*/
532	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
533	/** @deprecated */
534	#define VM_FF_ISSET(pVM, fFlag) VM_FF_IS_SET(pVM, fFlag)
535
536	/** @def VMCPU_FF_ISSET
537	* Checks if a force action flag is set for the given VCPU.
538	*
539	* @param pVCpu VMCPU Handle.
540	* @param fFlag The flag to check.
541	*/
542	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
543	/** @deprecated */
544	#define VMCPU_FF_ISSET(pVCpu, fFlag) VMCPU_FF_IS_SET(pVCpu, fFlag)
545
546	/** @def VM_FF_ISPENDING
547	* Checks if one or more force action in the specified set is pending.
548	*
549	* @param pVM VM Handle.
550	* @param fFlags The flags to check for.
551	*/
552	#define VM_FF_IS_PENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
553	/** @deprecated */
554	#define VM_FF_ISPENDING(pVM, fFlags) VM_FF_IS_PENDING(pVM, fFlags)
555
556	/** @def VM_FF_TESTANDCLEAR
557	* Checks if one (!) force action in the specified set is pending and clears it atomically
558	*
559	* @returns true if the bit was set.
560	* @returns false if the bit was clear.
561	* @param pVM VM Handle.
562	* @param iBit Bit position to check and clear
563	*/
564	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
565	/** @deprecated */
566	#define VM_FF_TESTANDCLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
567
568	/** @def VMCPU_FF_TESTANDCLEAR
569	* Checks if one (!) force action in the specified set is pending and clears it atomically
570	*
571	* @returns true if the bit was set.
572	* @returns false if the bit was clear.
573	* @param pVCpu VMCPU Handle.
574	* @param iBit Bit position to check and clear
575	*/
576	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
577	/** @deprecated */
578	#define VMCPU_FF_TESTANDCLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
579
580	/** @def VMCPU_FF_ISPENDING
581	* Checks if one or more force action in the specified set is pending for the given VCPU.
582	*
583	* @param pVCpu VMCPU Handle.
584	* @param fFlags The flags to check for.
585	*/
586	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
587	/** @deprecated */
588	#define VMCPU_FF_ISPENDING(pVCpu, fFlags) VMCPU_FF_IS_PENDING(pVCpu, fFlags)
589
590	/** @def VM_FF_ISPENDING
591	* Checks if one or more force action in the specified set is pending while one
592	* or more other ones are not.
593	*
594	* @param pVM VM Handle.
595	* @param fFlags The flags to check for.
596	* @param fExcpt The flags that should not be set.
597	*/
598	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
599
600	/** @def VMCPU_FF_IS_PENDING_EXCEPT
601	* Checks if one or more force action in the specified set is pending for the given
602	* VCPU while one or more other ones are not.
603	*
604	* @param pVCpu VMCPU Handle.
605	* @param fFlags The flags to check for.
606	* @param fExcpt The flags that should not be set.
607	*/
608	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
609
610	/** @def VM_IS_EMT
611	* Checks if the current thread is the emulation thread (EMT).
612	*
613	* @remark The ring-0 variation will need attention if we expand the ring-0
614	* code to let threads other than EMT mess around with the VM.
615	*/
616	#ifdef IN_RC
617	# define VM_IS_EMT(pVM) true
618	#else
619	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
620	#endif
621
622	/** @def VMCPU_IS_EMT
623	* Checks if the current thread is the emulation thread (EMT) for the specified
624	* virtual CPU.
625	*/
626	#ifdef IN_RC
627	# define VMCPU_IS_EMT(pVCpu) true
628	#else
629	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
630	#endif
631
632	/** @def VM_ASSERT_EMT
633	* Asserts that the current thread IS the emulation thread (EMT).
634	*/
635	#ifdef IN_RC
636	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
637	#elif defined(IN_RING0)
638	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
639	#else
640	# define VM_ASSERT_EMT(pVM) \
641	AssertMsg(VM_IS_EMT(pVM), \
642	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
643	#endif
644
645	/** @def VMCPU_ASSERT_EMT
646	* Asserts that the current thread IS the emulation thread (EMT) of the
647	* specified virtual CPU.
648	*/
649	#ifdef IN_RC
650	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
651	#elif defined(IN_RING0)
652	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
653	#else
654	# define VMCPU_ASSERT_EMT(pVCpu) \
655	AssertMsg(VMCPU_IS_EMT(pVCpu), \
656	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
657	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
658	#endif
659
660	/** @def VM_ASSERT_EMT_RETURN
661	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
662	*/
663	#ifdef IN_RC
664	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
665	#elif defined(IN_RING0)
666	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
667	#else
668	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
669	AssertMsgReturn(VM_IS_EMT(pVM), \
670	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
671	(rc))
672	#endif
673
674	/** @def VMCPU_ASSERT_EMT_RETURN
675	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
676	*/
677	#ifdef IN_RC
678	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
679	#elif defined(IN_RING0)
680	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
681	#else
682	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
683	AssertMsg(VMCPU_IS_EMT(pVCpu), \
684	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
685	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
686	(rc))
687	#endif
688
689	/** @def VMCPU_ASSERT_EMT_OR_GURU
690	* Asserts that the current thread IS the emulation thread (EMT) of the
691	* specified virtual CPU.
692	*/
693	#if defined(IN_RC) \|\| defined(IN_RING0)
694	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
695	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
696	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
697	#else
698	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
699	AssertMsg( VMCPU_IS_EMT(pVCpu) \
700	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
701	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
702	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
703	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
704	#endif
705
706	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
707	* Asserts that the current thread IS the emulation thread (EMT) of the
708	* specified virtual CPU when the VM is running.
709	*/
710	#if defined(IN_RC) \|\| defined(IN_RING0)
711	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
712	Assert( VMCPU_IS_EMT(pVCpu) \
713	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
714	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
715	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
716	#else
717	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
718	AssertMsg( VMCPU_IS_EMT(pVCpu) \
719	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
720	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
721	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
722	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
723	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
724	#endif
725
726	/** @def VM_ASSERT_EMT0
727	* Asserts that the current thread IS emulation thread \#0 (EMT0).
728	*/
729	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
730
731	/** @def VM_ASSERT_EMT0_RETURN
732	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
733	* it isn't.
734	*/
735	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
736
737
738	/**
739	* Asserts that the current thread is NOT the emulation thread.
740	*/
741	#define VM_ASSERT_OTHER_THREAD(pVM) \
742	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
743
744
745	/** @def VM_ASSERT_STATE_RETURN
746	* Asserts a certain VM state.
747	*/
748	#define VM_ASSERT_STATE(pVM, _enmState) \
749	AssertMsg((pVM)->enmVMState == (_enmState), \
750	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
751
752	/** @def VM_ASSERT_STATE_RETURN
753	* Asserts a certain VM state and returns if it doesn't match.
754	*/
755	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
756	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
757	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
758	(rc))
759
760	/** @def VM_IS_VALID_EXT
761	* Asserts a the VM handle is valid for external access, i.e. not being destroy
762	* or terminated. */
763	#define VM_IS_VALID_EXT(pVM) \
764	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
765	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
766	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
767	&& VM_IS_EMT(pVM))) )
768
769	/** @def VM_ASSERT_VALID_EXT_RETURN
770	* Asserts a the VM handle is valid for external access, i.e. not being
771	* destroy or terminated.
772	*/
773	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
774	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
775	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
776	? VMGetStateName(pVM->enmVMState) : ""), \
777	(rc))
778
779	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
780	* Asserts a the VMCPU handle is valid for external access, i.e. not being
781	* destroy or terminated.
782	*/
783	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
784	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
785	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
786	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
787	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
788	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
789	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
790	(rc))
791
792	#endif /* !VBOX_FOR_DTRACE_LIB */
793
794
795
796	/**
797	* The cross context VM structure.
798	*
799	* It contains all the VM data which have to be available in all contexts.
800	* Even if it contains all the data the idea is to use APIs not to modify all
801	* the members all around the place. Therefore we make use of unions to hide
802	* everything which isn't local to the current source module. This means we'll
803	* have to pay a little bit of attention when adding new members to structures
804	* in the unions and make sure to keep the padding sizes up to date.
805	*
806	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
807	*/
808	typedef struct VM
809	{
810	/** The state of the VM.
811	* This field is read only to everyone except the VM and EM. */
812	VMSTATE volatile enmVMState;
813	/** Forced action flags.
814	* See the VM_FF_* \#defines. Updated atomically.
815	*/
816	volatile uint32_t fGlobalForcedActions;
817	/** Pointer to the array of page descriptors for the VM structure allocation. */
818	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
819	/** Session handle. For use when calling SUPR0 APIs. */
820	PSUPDRVSESSION pSession;
821	/** Pointer to the ring-3 VM structure. */
822	PUVM pUVM;
823	/** Ring-3 Host Context VM Pointer. */
824	R3PTRTYPE(struct VM *) pVMR3;
825	/** Ring-0 Host Context VM Pointer. */
826	R0PTRTYPE(struct VM *) pVMR0;
827	/** Raw-mode Context VM Pointer. */
828	RCPTRTYPE(struct VM *) pVMRC;
829
830	/** The GVM VM handle. Only the GVM should modify this field. */
831	uint32_t hSelf;
832	/** Number of virtual CPUs. */
833	uint32_t cCpus;
834	/** CPU excution cap (1-100) */
835	uint32_t uCpuExecutionCap;
836
837	/** Size of the VM structure including the VMCPU array. */
838	uint32_t cbSelf;
839
840	/** Offset to the VMCPU array starting from beginning of this structure. */
841	uint32_t offVMCPU;
842
843	/**
844	* VMMSwitcher assembly entry point returning to host context.
845	*
846	* Depending on how the host handles the rc status given in @a eax, this may
847	* return and let the caller resume whatever it was doing prior to the call.
848	*
849	*
850	* @param eax The return code, register.
851	* @remark Assume interrupts disabled.
852	* @remark This method pointer lives here because TRPM needs it.
853	*/
854	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
855
856	/**
857	* VMMSwitcher assembly entry point returning to host context without saving the
858	* raw-mode context (hyper) registers.
859	*
860	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
861	* expects the caller to save a RC context in CPUM where one might return if the
862	* return code indicate that this is possible.
863	*
864	* This method pointer lives here because TRPM needs it.
865	*
866	* @param eax The return code, register.
867	* @remark Assume interrupts disabled.
868	* @remark This method pointer lives here because TRPM needs it.
869	*/
870	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
871
872	/** @name Various items that are frequently accessed.
873	* @{ */
874	/** Whether to recompile user mode code or run it raw/hm. */
875	bool fRecompileUser;
876	/** Whether to recompile supervisor mode code or run it raw/hm. */
877	bool fRecompileSupervisor;
878	/** Whether raw mode supports ring-1 code or not. */
879	bool fRawRing1Enabled;
880	/** PATM enabled flag.
881	* This is placed here for performance reasons. */
882	bool fPATMEnabled;
883	/** CSAM enabled flag.
884	* This is placed here for performance reasons. */
885	bool fCSAMEnabled;
886	/** Hardware VM support is available and enabled.
887	* Determined very early during init.
888	* This is placed here for performance reasons. */
889	bool fHMEnabled;
890	/** For asserting on fHMEnable usage. */
891	bool fHMEnabledFixed;
892	/** Hardware VM support requires a minimal raw-mode context.
893	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
894	bool fHMNeedRawModeCtx;
895	/** Set when this VM is the master FT node.
896	* @todo This doesn't need to be here, FTM should store it in it's own
897	* structures instead. */
898	bool fFaultTolerantMaster;
899	/** Large page enabled flag.
900	* @todo This doesn't need to be here, PGM should store it in it's own
901	* structures instead. */
902	bool fUseLargePages;
903	/** @} */
904
905	/** Alignment padding.. */
906	uint8_t uPadding1[2];
907
908	/** @name Debugging
909	* @{ */
910	/** Raw-mode Context VM Pointer. */
911	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
912	/** Ring-3 Host Context VM Pointer. */
913	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
914	/** Ring-0 Host Context VM Pointer. */
915	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
916	/** @} */
917
918	#if HC_ARCH_BITS == 32
919	/** Alignment padding.. */
920	uint32_t uPadding2;
921	#endif
922
923	/** @name Switcher statistics (remove)
924	* @{ */
925	/** Profiling the total time from Qemu to GC. */
926	STAMPROFILEADV StatTotalQemuToGC;
927	/** Profiling the total time from GC to Qemu. */
928	STAMPROFILEADV StatTotalGCToQemu;
929	/** Profiling the total time spent in GC. */
930	STAMPROFILEADV StatTotalInGC;
931	/** Profiling the total time spent not in Qemu. */
932	STAMPROFILEADV StatTotalInQemu;
933	/** Profiling the VMMSwitcher code for going to GC. */
934	STAMPROFILEADV StatSwitcherToGC;
935	/** Profiling the VMMSwitcher code for going to HC. */
936	STAMPROFILEADV StatSwitcherToHC;
937	STAMPROFILEADV StatSwitcherSaveRegs;
938	STAMPROFILEADV StatSwitcherSysEnter;
939	STAMPROFILEADV StatSwitcherDebug;
940	STAMPROFILEADV StatSwitcherCR0;
941	STAMPROFILEADV StatSwitcherCR4;
942	STAMPROFILEADV StatSwitcherJmpCR3;
943	STAMPROFILEADV StatSwitcherRstrRegs;
944	STAMPROFILEADV StatSwitcherLgdt;
945	STAMPROFILEADV StatSwitcherLidt;
946	STAMPROFILEADV StatSwitcherLldt;
947	STAMPROFILEADV StatSwitcherTSS;
948	/** @} */
949
950	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
951	* must start at the same offset on both 64-bit and 32-bit hosts. */
952	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
953
954	/** CPUM part. */
955	union
956	{
957	#ifdef ___CPUMInternal_h
958	struct CPUM s;
959	#endif
960	uint8_t padding[1536]; /* multiple of 64 */
961	} cpum;
962
963	/** VMM part. */
964	union
965	{
966	#ifdef ___VMMInternal_h
967	struct VMM s;
968	#endif
969	uint8_t padding[1600]; /* multiple of 64 */
970	} vmm;
971
972	/** PGM part. */
973	union
974	{
975	#ifdef ___PGMInternal_h
976	struct PGM s;
977	#endif
978	uint8_t padding[40962+6080]; / multiple of 64 */
979	} pgm;
980
981	/** HM part. */
982	union
983	{
984	#ifdef ___HMInternal_h
985	struct HM s;
986	#endif
987	uint8_t padding[5440]; /* multiple of 64 */
988	} hm;
989
990	/** TRPM part. */
991	union
992	{
993	#ifdef ___TRPMInternal_h
994	struct TRPM s;
995	#endif
996	uint8_t padding[5248]; /* multiple of 64 */
997	} trpm;
998
999	/** SELM part. */
1000	union
1001	{
1002	#ifdef ___SELMInternal_h
1003	struct SELM s;
1004	#endif
1005	uint8_t padding[768]; /* multiple of 64 */
1006	} selm;
1007
1008	/** MM part. */
1009	union
1010	{
1011	#ifdef ___MMInternal_h
1012	struct MM s;
1013	#endif
1014	uint8_t padding[192]; /* multiple of 64 */
1015	} mm;
1016
1017	/** PDM part. */
1018	union
1019	{
1020	#ifdef ___PDMInternal_h
1021	struct PDM s;
1022	#endif
1023	uint8_t padding[1920]; /* multiple of 64 */
1024	} pdm;
1025
1026	/** IOM part. */
1027	union
1028	{
1029	#ifdef ___IOMInternal_h
1030	struct IOM s;
1031	#endif
1032	uint8_t padding[896]; /* multiple of 64 */
1033	} iom;
1034
1035	/** PATM part. */
1036	union
1037	{
1038	#ifdef ___PATMInternal_h
1039	struct PATM s;
1040	#endif
1041	uint8_t padding[768]; /* multiple of 64 */
1042	} patm;
1043
1044	/** CSAM part. */
1045	union
1046	{
1047	#ifdef ___CSAMInternal_h
1048	struct CSAM s;
1049	#endif
1050	uint8_t padding[1088]; /* multiple of 64 */
1051	} csam;
1052
1053	/** EM part. */
1054	union
1055	{
1056	#ifdef ___EMInternal_h
1057	struct EM s;
1058	#endif
1059	uint8_t padding[256]; /* multiple of 64 */
1060	} em;
1061
1062	/** TM part. */
1063	union
1064	{
1065	#ifdef ___TMInternal_h
1066	struct TM s;
1067	#endif
1068	uint8_t padding[2432]; /* multiple of 64 */
1069	} tm;
1070
1071	/** DBGF part. */
1072	union
1073	{
1074	#ifdef ___DBGFInternal_h
1075	struct DBGF s;
1076	#endif
1077	uint8_t padding[2368]; /* multiple of 64 */
1078	} dbgf;
1079
1080	/** SSM part. */
1081	union
1082	{
1083	#ifdef ___SSMInternal_h
1084	struct SSM s;
1085	#endif
1086	uint8_t padding[128]; /* multiple of 64 */
1087	} ssm;
1088
1089	/** FTM part. */
1090	union
1091	{
1092	#ifdef ___FTMInternal_h
1093	struct FTM s;
1094	#endif
1095	uint8_t padding[512]; /* multiple of 64 */
1096	} ftm;
1097
1098	/** REM part. */
1099	union
1100	{
1101	#ifdef ___REMInternal_h
1102	struct REM s;
1103	#endif
1104	uint8_t padding[0x11100]; /* multiple of 64 */
1105	} rem;
1106
1107	/* ---- begin small stuff ---- */
1108
1109	/** VM part. */
1110	union
1111	{
1112	#ifdef ___VMInternal_h
1113	struct VMINT s;
1114	#endif
1115	uint8_t padding[24]; /* multiple of 8 */
1116	} vm;
1117
1118	/** CFGM part. */
1119	union
1120	{
1121	#ifdef ___CFGMInternal_h
1122	struct CFGM s;
1123	#endif
1124	uint8_t padding[8]; /* multiple of 8 */
1125	} cfgm;
1126
1127
1128	/** Padding for aligning the cpu array on a page boundary. */
1129	uint8_t abAlignment2[414];
1130
1131	/* ---- end small stuff ---- */
1132
1133	/** VMCPU array for the configured number of virtual CPUs.
1134	* Must be aligned on a page boundary for TLB hit reasons as well as
1135	* alignment of VMCPU members. */
1136	VMCPU aCpus[1];
1137	} VM;
1138
1139
1140	#ifdef IN_RC
1141	RT_C_DECLS_BEGIN
1142
1143	/** The VM structure.
1144	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1145	* of those magic globals which we should avoid using.
1146	*/
1147	extern DECLIMPORT(VM) g_VM;
1148
1149	RT_C_DECLS_END
1150	#endif
1151
1152	/** @} */
1153
1154	#endif
1155

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source: vbox/trunk/include/VBox/vmm/vm.h@ 46197

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