vm.h@ 46512

Last change on this file since 46512 was 46420, checked in by vboxsync, 11 years ago
VMM, recompiler: Purge deprecated macros.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2013 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** CPU started in HM context. */
72	VMCPUSTATE_STARTED_HM,
73	/** Executing guest code and can be poked (RC or STI bits of HM). */
74	VMCPUSTATE_STARTED_EXEC,
75	/** Executing guest code in the recompiler. */
76	VMCPUSTATE_STARTED_EXEC_REM,
77	/** Halted. */
78	VMCPUSTATE_STARTED_HALTED,
79
80	/** The end of valid virtual CPU states. */
81	VMCPUSTATE_END,
82
83	/** Ensure 32-bit type. */
84	VMCPUSTATE_32BIT_HACK = 0x7fffffff
85	} VMCPUSTATE;
86
87
88	/**
89	* The cross context virtual CPU structure.
90	*
91	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
92	*/
93	typedef struct VMCPU
94	{
95	/** Per CPU forced action.
96	* See the VMCPU_FF_* \#defines. Updated atomically. */
97	uint32_t volatile fLocalForcedActions; /* 0 */
98	/** The CPU state. */
99	VMCPUSTATE volatile enmState; /* 4 */
100
101	/** Pointer to the ring-3 UVMCPU structure. */
102	PUVMCPU pUVCpu; /* 8 */
103	/** Ring-3 Host Context VM Pointer. */
104	PVMR3 pVMR3; /* 16 / 12 */
105	/** Ring-0 Host Context VM Pointer. */
106	PVMR0 pVMR0; /* 24 / 16 */
107	/** Raw-mode Context VM Pointer. */
108	PVMRC pVMRC; /* 32 / 20 */
109	/** The CPU ID.
110	* This is the index into the VM::aCpu array. */
111	VMCPUID idCpu; /* 36 / 24 */
112	/** The native thread handle. */
113	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
114	/** The native R0 thread handle. (different from the R3 handle!) */
115	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
116	/** Which host CPU ID is this EMT running on.
117	* Only valid when in RC or HMR0 with scheduling disabled. */
118	RTCPUID volatile idHostCpu; /* 56 / 36 */
119
120	/** Trace groups enable flags. */
121	uint32_t fTraceGroups; /* 60 / 40 */
122	/** Align the structures below bit on a 64-byte boundary and make sure it starts
123	* at the same offset in both 64-bit and 32-bit builds.
124	*
125	* @remarks The alignments of the members that are larger than 48 bytes should be
126	* 64-byte for cache line reasons. structs containing small amounts of
127	* data could be lumped together at the end with a < 64 byte padding
128	* following it (to grow into and align the struct size).
129	* */
130	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
131	/** State data for use by ad hoc profiling. */
132	uint32_t uAdHoc;
133	/** Profiling samples for use by ad hoc profiling. */
134	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
135
136	/** CPUM part. */
137	union
138	{
139	#ifdef ___CPUMInternal_h
140	struct CPUMCPU s;
141	#endif
142	uint8_t padding[3584]; /* multiple of 64 */
143	} cpum;
144
145	/** HM part. */
146	union
147	{
148	#ifdef ___HMInternal_h
149	struct HMCPU s;
150	#endif
151	uint8_t padding[5504]; /* multiple of 64 */
152	} hm;
153
154	/** EM part. */
155	union
156	{
157	#ifdef ___EMInternal_h
158	struct EMCPU s;
159	#endif
160	uint8_t padding[1472]; /* multiple of 64 */
161	} em;
162
163	/** IEM part. */
164	union
165	{
166	#ifdef ___IEMInternal_h
167	struct IEMCPU s;
168	#endif
169	uint8_t padding[3072]; /* multiple of 64 */
170	} iem;
171
172	/** TRPM part. */
173	union
174	{
175	#ifdef ___TRPMInternal_h
176	struct TRPMCPU s;
177	#endif
178	uint8_t padding[128]; /* multiple of 64 */
179	} trpm;
180
181	/** TM part. */
182	union
183	{
184	#ifdef ___TMInternal_h
185	struct TMCPU s;
186	#endif
187	uint8_t padding[384]; /* multiple of 64 */
188	} tm;
189
190	/** VMM part. */
191	union
192	{
193	#ifdef ___VMMInternal_h
194	struct VMMCPU s;
195	#endif
196	uint8_t padding[704]; /* multiple of 64 */
197	} vmm;
198
199	/** PDM part. */
200	union
201	{
202	#ifdef ___PDMInternal_h
203	struct PDMCPU s;
204	#endif
205	uint8_t padding[256]; /* multiple of 64 */
206	} pdm;
207
208	/** IOM part. */
209	union
210	{
211	#ifdef ___IOMInternal_h
212	struct IOMCPU s;
213	#endif
214	uint8_t padding[512]; /* multiple of 64 */
215	} iom;
216
217	/** DBGF part.
218	* @todo Combine this with other tiny structures. */
219	union
220	{
221	#ifdef ___DBGFInternal_h
222	struct DBGFCPU s;
223	#endif
224	uint8_t padding[64]; /* multiple of 64 */
225	} dbgf;
226
227	/** Align the following members on page boundary. */
228	uint8_t abAlignment2[256];
229
230	/** PGM part. */
231	union
232	{
233	#ifdef ___PGMInternal_h
234	struct PGMCPU s;
235	#endif
236	uint8_t padding[4096]; /* multiple of 4096 */
237	} pgm;
238
239	} VMCPU;
240
241
242	#ifndef VBOX_FOR_DTRACE_LIB
243
244	/** @name Operations on VMCPU::enmState
245	* @{ */
246	/** Gets the VMCPU state. */
247	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
248	/** Sets the VMCPU state. */
249	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
250	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
251	/** Cmpares and sets the VMCPU state. */
252	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
253	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
254	/** Checks the VMCPU state. */
255	#ifdef VBOX_STRICT
256	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
257	do { \
258	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
259	AssertMsg(enmState == (enmExpectedState), \
260	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
261	enmState, enmExpectedState, (pVCpu)->idCpu)); \
262	} while (0)
263	#else
264	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
265	#endif
266	/** Tests if the state means that the CPU is started. */
267	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
268	/** Tests if the state means that the CPU is stopped. */
269	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
270	/** @} */
271
272
273	/** The name of the Guest Context VMM Core module. */
274	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
275	/** The name of the Ring 0 Context VMM Core module. */
276	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
277
278	/**
279	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
280	*/
281	#ifdef VBOX_WITH_RAW_MODE
282	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
283	#else
284	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
285	#endif
286
287
288	/** VM Forced Action Flags.
289	*
290	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
291	* action mask of a VM.
292	*
293	* @{
294	*/
295	/** The virtual sync clock has been stopped, go to TM until it has been
296	* restarted... */
297	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
298	/** PDM Queues are pending. */
299	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
300	/** The bit number for VM_FF_PDM_QUEUES. */
301	#define VM_FF_PDM_QUEUES_BIT 3
302	/** PDM DMA transfers are pending. */
303	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
304	/** The bit number for VM_FF_PDM_DMA. */
305	#define VM_FF_PDM_DMA_BIT 4
306	/** This action forces the VM to call DBGF so DBGF can service debugger
307	* requests in the emulation thread.
308	* This action flag stays asserted till DBGF clears it.*/
309	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
310	/** The bit number for VM_FF_DBGF. */
311	#define VM_FF_DBGF_BIT 8
312	/** This action forces the VM to service pending requests from other
313	* thread or requests which must be executed in another context. */
314	#define VM_FF_REQUEST RT_BIT_32(9)
315	/** Check for VM state changes and take appropriate action. */
316	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
317	/** The bit number for VM_FF_CHECK_VM_STATE. */
318	#define VM_FF_CHECK_VM_STATE_BIT 10
319	/** Reset the VM. (postponed) */
320	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
321	/** The bit number for VM_FF_RESET. */
322	#define VM_FF_RESET_BIT 11
323	/** EMT rendezvous in VMM. */
324	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
325	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
326	#define VM_FF_EMT_RENDEZVOUS_BIT 12
327
328	/** PGM needs to allocate handy pages. */
329	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
330	/** PGM is out of memory.
331	* Abandon all loops and code paths which can be resumed and get up to the EM
332	* loops. */
333	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
334	/** PGM is about to perform a lightweight pool flush
335	* Guest SMP: all EMT threads should return to ring 3
336	*/
337	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
338	/** REM needs to be informed about handler changes. */
339	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
340	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
341	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
342	/** Suspend the VM - debug only. */
343	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
344
345
346	/** This action forces the VM to check any pending interrups on the APIC. */
347	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
348	/** This action forces the VM to check any pending interrups on the PIC. */
349	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
350	/** This action forces the VM to schedule and run pending timer (TM).
351	* @remarks Don't move - PATM compatibility. */
352	#define VMCPU_FF_TIMER RT_BIT_32(2)
353	/** This action forces the VM to check any pending NMIs. */
354	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
355	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
356	/** This action forces the VM to check any pending SMIs. */
357	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
358	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
359	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
360	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
361	/** This action forces the VM to service pending requests from other
362	* thread or requests which must be executed in another context. */
363	#define VMCPU_FF_REQUEST RT_BIT_32(9)
364	/** This action forces the VM to service any pending updates to CR3 (used only
365	* by HM). */
366	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
367	/** This action forces the VM to service any pending updates to PAE PDPEs (used
368	* only by HM). */
369	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
370	/** This action forces the VM to resync the page tables before going
371	* back to execute guest code. (GLOBAL FLUSH) */
372	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
373	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
374	* (NON-GLOBAL FLUSH) */
375	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
376	/** Check for pending TLB shootdown actions.
377	* Consumer: HM
378	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
379	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
380	/** Check for pending TLB flush action.
381	* Consumer: HM
382	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
383	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
384	/** The bit number for VMCPU_FF_TLB_FLUSH. */
385	#define VMCPU_FF_TLB_FLUSH_BIT 19
386	#ifdef VBOX_WITH_RAW_MODE
387	/** Check the interrupt and trap gates */
388	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
389	/** Check Guest's TSS ring 0 stack */
390	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
391	/** Check Guest's GDT table */
392	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
393	/** Check Guest's LDT table */
394	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
395	#endif /* VBOX_WITH_RAW_MODE */
396	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
397	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
398	#ifdef VBOX_WITH_RAW_MODE
399	/** CSAM needs to scan the page that's being executed */
400	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
401	/** CSAM needs to do some homework. */
402	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
403	#endif /* VBOX_WITH_RAW_MODE */
404	/** Force return to Ring-3. */
405	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
406
407	/** Externally VM forced actions. Used to quit the idle/wait loop. */
408	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
409	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
410	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
411
412	/** Externally forced VM actions. Used to quit the idle/wait loop. */
413	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
414	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
415	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
416	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
417	\| VMCPU_FF_TIMER)
418
419	/** High priority VM pre-execution actions. */
420	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
421	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
422	\| VM_FF_EMT_RENDEZVOUS)
423	/** High priority VMCPU pre-execution actions. */
424	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
425	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
426	\| VMCPU_FF_INHIBIT_INTERRUPTS \
427	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
428	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
429
430	/** High priority VM pre raw-mode execution mask. */
431	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
432	/** High priority VMCPU pre raw-mode execution mask. */
433	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
434	\| VMCPU_FF_INHIBIT_INTERRUPTS \
435	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
436	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
437
438	/** High priority post-execution actions. */
439	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
440	/** High priority post-execution actions. */
441	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
442	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
443
444	/** Normal priority VM post-execution actions. */
445	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
446	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
447	/** Normal priority VMCPU post-execution actions. */
448	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
449
450	/** Normal priority VM actions. */
451	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
452	\| VM_FF_EMT_RENDEZVOUS)
453	/** Normal priority VMCPU actions. */
454	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
455
456	/** Flags to clear before resuming guest execution. */
457	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
458
459	/** VM Flags that cause the HM loops to go back to ring-3. */
460	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
461	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
462	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
463	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
464
465	/** All the forced VM flags. */
466	#define VM_FF_ALL_MASK (~0U)
467	/** All the forced VMCPU flags. */
468	#define VMCPU_FF_ALL_MASK (~0U)
469
470	/** All the forced VM flags except those related to raw-mode and hardware
471	* assisted execution. */
472	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
473	/** All the forced VMCPU flags except those related to raw-mode and hardware
474	* assisted execution. */
475	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
476	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
477	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
478	/** @} */
479
480	/** @def VM_FF_SET
481	* Sets a force action flag.
482	*
483	* @param pVM VM Handle.
484	* @param fFlag The flag to set.
485	*/
486	#if 1
487	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
488	#else
489	# define VM_FF_SET(pVM, fFlag) \
490	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
491	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
492	} while (0)
493	#endif
494
495	/** @def VMCPU_FF_SET
496	* Sets a force action flag for the given VCPU.
497	*
498	* @param pVCpu VMCPU Handle.
499	* @param fFlag The flag to set.
500	*/
501	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
502
503	/** @def VM_FF_CLEAR
504	* Clears a force action flag.
505	*
506	* @param pVM VM Handle.
507	* @param fFlag The flag to clear.
508	*/
509	#if 1
510	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
511	#else
512	# define VM_FF_CLEAR(pVM, fFlag) \
513	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
514	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
515	} while (0)
516	#endif
517
518	/** @def VMCPU_FF_CLEAR
519	* Clears a force action flag for the given VCPU.
520	*
521	* @param pVCpu VMCPU Handle.
522	* @param fFlag The flag to clear.
523	*/
524	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
525
526	/** @def VM_FF_ISSET
527	* Checks if a force action flag is set.
528	*
529	* @param pVM VM Handle.
530	* @param fFlag The flag to check.
531	*/
532	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
533
534	/** @def VMCPU_FF_IS_SET
535	* Checks if a force action flag is set for the given VCPU.
536	*
537	* @param pVCpu VMCPU Handle.
538	* @param fFlag The flag to check.
539	*/
540	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
541
542	/** @def VM_FF_ISPENDING
543	* Checks if one or more force action in the specified set is pending.
544	*
545	* @param pVM VM Handle.
546	* @param fFlags The flags to check for.
547	*/
548	#define VM_FF_IS_PENDING(pVM, fFlags) ((pVM)->fGlobalForcedActions & (fFlags))
549
550	/** @def VM_FF_TESTANDCLEAR
551	* Checks if one (!) force action in the specified set is pending and clears it atomically
552	*
553	* @returns true if the bit was set.
554	* @returns false if the bit was clear.
555	* @param pVM VM Handle.
556	* @param iBit Bit position to check and clear
557	*/
558	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
559
560	/** @def VMCPU_FF_TESTANDCLEAR
561	* Checks if one (!) force action in the specified set is pending and clears it atomically
562	*
563	* @returns true if the bit was set.
564	* @returns false if the bit was clear.
565	* @param pVCpu VMCPU Handle.
566	* @param iBit Bit position to check and clear
567	*/
568	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
569
570	/** @def VMCPU_FF_ISPENDING
571	* Checks if one or more force action in the specified set is pending for the given VCPU.
572	*
573	* @param pVCpu VMCPU Handle.
574	* @param fFlags The flags to check for.
575	*/
576	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) ((pVCpu)->fLocalForcedActions & (fFlags))
577
578	/** @def VM_FF_ISPENDING
579	* Checks if one or more force action in the specified set is pending while one
580	* or more other ones are not.
581	*
582	* @param pVM VM Handle.
583	* @param fFlags The flags to check for.
584	* @param fExcpt The flags that should not be set.
585	*/
586	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
587
588	/** @def VMCPU_FF_IS_PENDING_EXCEPT
589	* Checks if one or more force action in the specified set is pending for the given
590	* VCPU while one or more other ones are not.
591	*
592	* @param pVCpu VMCPU Handle.
593	* @param fFlags The flags to check for.
594	* @param fExcpt The flags that should not be set.
595	*/
596	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
597
598	/** @def VM_IS_EMT
599	* Checks if the current thread is the emulation thread (EMT).
600	*
601	* @remark The ring-0 variation will need attention if we expand the ring-0
602	* code to let threads other than EMT mess around with the VM.
603	*/
604	#ifdef IN_RC
605	# define VM_IS_EMT(pVM) true
606	#else
607	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
608	#endif
609
610	/** @def VMCPU_IS_EMT
611	* Checks if the current thread is the emulation thread (EMT) for the specified
612	* virtual CPU.
613	*/
614	#ifdef IN_RC
615	# define VMCPU_IS_EMT(pVCpu) true
616	#else
617	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
618	#endif
619
620	/** @def VM_ASSERT_EMT
621	* Asserts that the current thread IS the emulation thread (EMT).
622	*/
623	#ifdef IN_RC
624	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
625	#elif defined(IN_RING0)
626	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
627	#else
628	# define VM_ASSERT_EMT(pVM) \
629	AssertMsg(VM_IS_EMT(pVM), \
630	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
631	#endif
632
633	/** @def VMCPU_ASSERT_EMT
634	* Asserts that the current thread IS the emulation thread (EMT) of the
635	* specified virtual CPU.
636	*/
637	#ifdef IN_RC
638	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
639	#elif defined(IN_RING0)
640	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
641	#else
642	# define VMCPU_ASSERT_EMT(pVCpu) \
643	AssertMsg(VMCPU_IS_EMT(pVCpu), \
644	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
645	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
646	#endif
647
648	/** @def VM_ASSERT_EMT_RETURN
649	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
650	*/
651	#ifdef IN_RC
652	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
653	#elif defined(IN_RING0)
654	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
655	#else
656	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
657	AssertMsgReturn(VM_IS_EMT(pVM), \
658	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
659	(rc))
660	#endif
661
662	/** @def VMCPU_ASSERT_EMT_RETURN
663	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
664	*/
665	#ifdef IN_RC
666	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
667	#elif defined(IN_RING0)
668	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
669	#else
670	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
671	AssertMsg(VMCPU_IS_EMT(pVCpu), \
672	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
673	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
674	(rc))
675	#endif
676
677	/** @def VMCPU_ASSERT_EMT_OR_GURU
678	* Asserts that the current thread IS the emulation thread (EMT) of the
679	* specified virtual CPU.
680	*/
681	#if defined(IN_RC) \|\| defined(IN_RING0)
682	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
683	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
684	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
685	#else
686	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
687	AssertMsg( VMCPU_IS_EMT(pVCpu) \
688	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
689	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
690	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
691	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
692	#endif
693
694	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
695	* Asserts that the current thread IS the emulation thread (EMT) of the
696	* specified virtual CPU when the VM is running.
697	*/
698	#if defined(IN_RC) \|\| defined(IN_RING0)
699	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
700	Assert( VMCPU_IS_EMT(pVCpu) \
701	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
702	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
703	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
704	#else
705	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
706	AssertMsg( VMCPU_IS_EMT(pVCpu) \
707	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
708	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
709	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
710	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
711	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
712	#endif
713
714	/** @def VM_ASSERT_EMT0
715	* Asserts that the current thread IS emulation thread \#0 (EMT0).
716	*/
717	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
718
719	/** @def VM_ASSERT_EMT0_RETURN
720	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
721	* it isn't.
722	*/
723	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
724
725
726	/**
727	* Asserts that the current thread is NOT the emulation thread.
728	*/
729	#define VM_ASSERT_OTHER_THREAD(pVM) \
730	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
731
732
733	/** @def VM_ASSERT_STATE_RETURN
734	* Asserts a certain VM state.
735	*/
736	#define VM_ASSERT_STATE(pVM, _enmState) \
737	AssertMsg((pVM)->enmVMState == (_enmState), \
738	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
739
740	/** @def VM_ASSERT_STATE_RETURN
741	* Asserts a certain VM state and returns if it doesn't match.
742	*/
743	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
744	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
745	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
746	(rc))
747
748	/** @def VM_IS_VALID_EXT
749	* Asserts a the VM handle is valid for external access, i.e. not being destroy
750	* or terminated. */
751	#define VM_IS_VALID_EXT(pVM) \
752	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
753	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
754	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
755	&& VM_IS_EMT(pVM))) )
756
757	/** @def VM_ASSERT_VALID_EXT_RETURN
758	* Asserts a the VM handle is valid for external access, i.e. not being
759	* destroy or terminated.
760	*/
761	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
762	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
763	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
764	? VMGetStateName(pVM->enmVMState) : ""), \
765	(rc))
766
767	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
768	* Asserts a the VMCPU handle is valid for external access, i.e. not being
769	* destroy or terminated.
770	*/
771	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
772	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
773	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
774	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
775	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
776	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
777	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
778	(rc))
779
780	#endif /* !VBOX_FOR_DTRACE_LIB */
781
782
783
784	/**
785	* The cross context VM structure.
786	*
787	* It contains all the VM data which have to be available in all contexts.
788	* Even if it contains all the data the idea is to use APIs not to modify all
789	* the members all around the place. Therefore we make use of unions to hide
790	* everything which isn't local to the current source module. This means we'll
791	* have to pay a little bit of attention when adding new members to structures
792	* in the unions and make sure to keep the padding sizes up to date.
793	*
794	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
795	*/
796	typedef struct VM
797	{
798	/** The state of the VM.
799	* This field is read only to everyone except the VM and EM. */
800	VMSTATE volatile enmVMState;
801	/** Forced action flags.
802	* See the VM_FF_* \#defines. Updated atomically.
803	*/
804	volatile uint32_t fGlobalForcedActions;
805	/** Pointer to the array of page descriptors for the VM structure allocation. */
806	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
807	/** Session handle. For use when calling SUPR0 APIs. */
808	PSUPDRVSESSION pSession;
809	/** Pointer to the ring-3 VM structure. */
810	PUVM pUVM;
811	/** Ring-3 Host Context VM Pointer. */
812	R3PTRTYPE(struct VM *) pVMR3;
813	/** Ring-0 Host Context VM Pointer. */
814	R0PTRTYPE(struct VM *) pVMR0;
815	/** Raw-mode Context VM Pointer. */
816	RCPTRTYPE(struct VM *) pVMRC;
817
818	/** The GVM VM handle. Only the GVM should modify this field. */
819	uint32_t hSelf;
820	/** Number of virtual CPUs. */
821	uint32_t cCpus;
822	/** CPU excution cap (1-100) */
823	uint32_t uCpuExecutionCap;
824
825	/** Size of the VM structure including the VMCPU array. */
826	uint32_t cbSelf;
827
828	/** Offset to the VMCPU array starting from beginning of this structure. */
829	uint32_t offVMCPU;
830
831	/**
832	* VMMSwitcher assembly entry point returning to host context.
833	*
834	* Depending on how the host handles the rc status given in @a eax, this may
835	* return and let the caller resume whatever it was doing prior to the call.
836	*
837	*
838	* @param eax The return code, register.
839	* @remark Assume interrupts disabled.
840	* @remark This method pointer lives here because TRPM needs it.
841	*/
842	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
843
844	/**
845	* VMMSwitcher assembly entry point returning to host context without saving the
846	* raw-mode context (hyper) registers.
847	*
848	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
849	* expects the caller to save a RC context in CPUM where one might return if the
850	* return code indicate that this is possible.
851	*
852	* This method pointer lives here because TRPM needs it.
853	*
854	* @param eax The return code, register.
855	* @remark Assume interrupts disabled.
856	* @remark This method pointer lives here because TRPM needs it.
857	*/
858	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
859
860	/** @name Various items that are frequently accessed.
861	* @{ */
862	/** Whether to recompile user mode code or run it raw/hm. */
863	bool fRecompileUser;
864	/** Whether to recompile supervisor mode code or run it raw/hm. */
865	bool fRecompileSupervisor;
866	/** Whether raw mode supports ring-1 code or not. */
867	bool fRawRing1Enabled;
868	/** PATM enabled flag.
869	* This is placed here for performance reasons. */
870	bool fPATMEnabled;
871	/** CSAM enabled flag.
872	* This is placed here for performance reasons. */
873	bool fCSAMEnabled;
874	/** Hardware VM support is available and enabled.
875	* Determined very early during init.
876	* This is placed here for performance reasons. */
877	bool fHMEnabled;
878	/** For asserting on fHMEnable usage. */
879	bool fHMEnabledFixed;
880	/** Hardware VM support requires a minimal raw-mode context.
881	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
882	bool fHMNeedRawModeCtx;
883	/** Set when this VM is the master FT node.
884	* @todo This doesn't need to be here, FTM should store it in it's own
885	* structures instead. */
886	bool fFaultTolerantMaster;
887	/** Large page enabled flag.
888	* @todo This doesn't need to be here, PGM should store it in it's own
889	* structures instead. */
890	bool fUseLargePages;
891	/** @} */
892
893	/** Alignment padding.. */
894	uint8_t uPadding1[2];
895
896	/** @name Debugging
897	* @{ */
898	/** Raw-mode Context VM Pointer. */
899	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
900	/** Ring-3 Host Context VM Pointer. */
901	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
902	/** Ring-0 Host Context VM Pointer. */
903	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
904	/** @} */
905
906	#if HC_ARCH_BITS == 32
907	/** Alignment padding.. */
908	uint32_t uPadding2;
909	#endif
910
911	/** @name Switcher statistics (remove)
912	* @{ */
913	/** Profiling the total time from Qemu to GC. */
914	STAMPROFILEADV StatTotalQemuToGC;
915	/** Profiling the total time from GC to Qemu. */
916	STAMPROFILEADV StatTotalGCToQemu;
917	/** Profiling the total time spent in GC. */
918	STAMPROFILEADV StatTotalInGC;
919	/** Profiling the total time spent not in Qemu. */
920	STAMPROFILEADV StatTotalInQemu;
921	/** Profiling the VMMSwitcher code for going to GC. */
922	STAMPROFILEADV StatSwitcherToGC;
923	/** Profiling the VMMSwitcher code for going to HC. */
924	STAMPROFILEADV StatSwitcherToHC;
925	STAMPROFILEADV StatSwitcherSaveRegs;
926	STAMPROFILEADV StatSwitcherSysEnter;
927	STAMPROFILEADV StatSwitcherDebug;
928	STAMPROFILEADV StatSwitcherCR0;
929	STAMPROFILEADV StatSwitcherCR4;
930	STAMPROFILEADV StatSwitcherJmpCR3;
931	STAMPROFILEADV StatSwitcherRstrRegs;
932	STAMPROFILEADV StatSwitcherLgdt;
933	STAMPROFILEADV StatSwitcherLidt;
934	STAMPROFILEADV StatSwitcherLldt;
935	STAMPROFILEADV StatSwitcherTSS;
936	/** @} */
937
938	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
939	* must start at the same offset on both 64-bit and 32-bit hosts. */
940	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
941
942	/** CPUM part. */
943	union
944	{
945	#ifdef ___CPUMInternal_h
946	struct CPUM s;
947	#endif
948	uint8_t padding[1536]; /* multiple of 64 */
949	} cpum;
950
951	/** VMM part. */
952	union
953	{
954	#ifdef ___VMMInternal_h
955	struct VMM s;
956	#endif
957	uint8_t padding[1600]; /* multiple of 64 */
958	} vmm;
959
960	/** PGM part. */
961	union
962	{
963	#ifdef ___PGMInternal_h
964	struct PGM s;
965	#endif
966	uint8_t padding[40962+6080]; / multiple of 64 */
967	} pgm;
968
969	/** HM part. */
970	union
971	{
972	#ifdef ___HMInternal_h
973	struct HM s;
974	#endif
975	uint8_t padding[5440]; /* multiple of 64 */
976	} hm;
977
978	/** TRPM part. */
979	union
980	{
981	#ifdef ___TRPMInternal_h
982	struct TRPM s;
983	#endif
984	uint8_t padding[5248]; /* multiple of 64 */
985	} trpm;
986
987	/** SELM part. */
988	union
989	{
990	#ifdef ___SELMInternal_h
991	struct SELM s;
992	#endif
993	uint8_t padding[768]; /* multiple of 64 */
994	} selm;
995
996	/** MM part. */
997	union
998	{
999	#ifdef ___MMInternal_h
1000	struct MM s;
1001	#endif
1002	uint8_t padding[192]; /* multiple of 64 */
1003	} mm;
1004
1005	/** PDM part. */
1006	union
1007	{
1008	#ifdef ___PDMInternal_h
1009	struct PDM s;
1010	#endif
1011	uint8_t padding[1920]; /* multiple of 64 */
1012	} pdm;
1013
1014	/** IOM part. */
1015	union
1016	{
1017	#ifdef ___IOMInternal_h
1018	struct IOM s;
1019	#endif
1020	uint8_t padding[896]; /* multiple of 64 */
1021	} iom;
1022
1023	/** PATM part. */
1024	union
1025	{
1026	#ifdef ___PATMInternal_h
1027	struct PATM s;
1028	#endif
1029	uint8_t padding[768]; /* multiple of 64 */
1030	} patm;
1031
1032	/** CSAM part. */
1033	union
1034	{
1035	#ifdef ___CSAMInternal_h
1036	struct CSAM s;
1037	#endif
1038	uint8_t padding[1088]; /* multiple of 64 */
1039	} csam;
1040
1041	/** EM part. */
1042	union
1043	{
1044	#ifdef ___EMInternal_h
1045	struct EM s;
1046	#endif
1047	uint8_t padding[256]; /* multiple of 64 */
1048	} em;
1049
1050	/** TM part. */
1051	union
1052	{
1053	#ifdef ___TMInternal_h
1054	struct TM s;
1055	#endif
1056	uint8_t padding[2432]; /* multiple of 64 */
1057	} tm;
1058
1059	/** DBGF part. */
1060	union
1061	{
1062	#ifdef ___DBGFInternal_h
1063	struct DBGF s;
1064	#endif
1065	uint8_t padding[2368]; /* multiple of 64 */
1066	} dbgf;
1067
1068	/** SSM part. */
1069	union
1070	{
1071	#ifdef ___SSMInternal_h
1072	struct SSM s;
1073	#endif
1074	uint8_t padding[128]; /* multiple of 64 */
1075	} ssm;
1076
1077	/** FTM part. */
1078	union
1079	{
1080	#ifdef ___FTMInternal_h
1081	struct FTM s;
1082	#endif
1083	uint8_t padding[512]; /* multiple of 64 */
1084	} ftm;
1085
1086	/** REM part. */
1087	union
1088	{
1089	#ifdef ___REMInternal_h
1090	struct REM s;
1091	#endif
1092	uint8_t padding[0x11100]; /* multiple of 64 */
1093	} rem;
1094
1095	/* ---- begin small stuff ---- */
1096
1097	/** VM part. */
1098	union
1099	{
1100	#ifdef ___VMInternal_h
1101	struct VMINT s;
1102	#endif
1103	uint8_t padding[24]; /* multiple of 8 */
1104	} vm;
1105
1106	/** CFGM part. */
1107	union
1108	{
1109	#ifdef ___CFGMInternal_h
1110	struct CFGM s;
1111	#endif
1112	uint8_t padding[8]; /* multiple of 8 */
1113	} cfgm;
1114
1115
1116	/** Padding for aligning the cpu array on a page boundary. */
1117	uint8_t abAlignment2[414];
1118
1119	/* ---- end small stuff ---- */
1120
1121	/** VMCPU array for the configured number of virtual CPUs.
1122	* Must be aligned on a page boundary for TLB hit reasons as well as
1123	* alignment of VMCPU members. */
1124	VMCPU aCpus[1];
1125	} VM;
1126
1127
1128	#ifdef IN_RC
1129	RT_C_DECLS_BEGIN
1130
1131	/** The VM structure.
1132	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1133	* of those magic globals which we should avoid using.
1134	*/
1135	extern DECLIMPORT(VM) g_VM;
1136
1137	RT_C_DECLS_END
1138	#endif
1139
1140	/** @} */
1141
1142	#endif
1143

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source: vbox/trunk/include/VBox/vmm/vm.h@ 46512

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