vm.h@ 50848

Last change on this file since 50848 was 49664, checked in by vboxsync, 11 years ago
VMM/HMVMXR0: MSR optimizations for world-switch of 64-bit guests.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2013 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** CPU started in HM context. */
72	VMCPUSTATE_STARTED_HM,
73	/** Executing guest code and can be poked (RC or STI bits of HM). */
74	VMCPUSTATE_STARTED_EXEC,
75	/** Executing guest code in the recompiler. */
76	VMCPUSTATE_STARTED_EXEC_REM,
77	/** Halted. */
78	VMCPUSTATE_STARTED_HALTED,
79
80	/** The end of valid virtual CPU states. */
81	VMCPUSTATE_END,
82
83	/** Ensure 32-bit type. */
84	VMCPUSTATE_32BIT_HACK = 0x7fffffff
85	} VMCPUSTATE;
86
87
88	/**
89	* The cross context virtual CPU structure.
90	*
91	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
92	*/
93	typedef struct VMCPU
94	{
95	/** Per CPU forced action.
96	* See the VMCPU_FF_* \#defines. Updated atomically. */
97	uint32_t volatile fLocalForcedActions; /* 0 */
98	/** The CPU state. */
99	VMCPUSTATE volatile enmState; /* 4 */
100
101	/** Pointer to the ring-3 UVMCPU structure. */
102	PUVMCPU pUVCpu; /* 8 */
103	/** Ring-3 Host Context VM Pointer. */
104	PVMR3 pVMR3; /* 16 / 12 */
105	/** Ring-0 Host Context VM Pointer. */
106	PVMR0 pVMR0; /* 24 / 16 */
107	/** Raw-mode Context VM Pointer. */
108	PVMRC pVMRC; /* 32 / 20 */
109	/** The CPU ID.
110	* This is the index into the VM::aCpu array. */
111	VMCPUID idCpu; /* 36 / 24 */
112	/** The native thread handle. */
113	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
114	/** The native R0 thread handle. (different from the R3 handle!) */
115	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
116	/** Which host CPU ID is this EMT running on.
117	* Only valid when in RC or HMR0 with scheduling disabled. */
118	RTCPUID volatile idHostCpu; /* 56 / 36 */
119
120	/** Trace groups enable flags. */
121	uint32_t fTraceGroups; /* 60 / 40 */
122	/** Align the structures below bit on a 64-byte boundary and make sure it starts
123	* at the same offset in both 64-bit and 32-bit builds.
124	*
125	* @remarks The alignments of the members that are larger than 48 bytes should be
126	* 64-byte for cache line reasons. structs containing small amounts of
127	* data could be lumped together at the end with a < 64 byte padding
128	* following it (to grow into and align the struct size).
129	* */
130	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
131	/** State data for use by ad hoc profiling. */
132	uint32_t uAdHoc;
133	/** Profiling samples for use by ad hoc profiling. */
134	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
135
136	/** CPUM part. */
137	union
138	{
139	#ifdef ___CPUMInternal_h
140	struct CPUMCPU s;
141	#endif
142	uint8_t padding[3584]; /* multiple of 64 */
143	} cpum;
144
145	/** HM part. */
146	union
147	{
148	#ifdef ___HMInternal_h
149	struct HMCPU s;
150	#endif
151	uint8_t padding[5632]; /* multiple of 64 */
152	} hm;
153
154	/** EM part. */
155	union
156	{
157	#ifdef ___EMInternal_h
158	struct EMCPU s;
159	#endif
160	uint8_t padding[1472]; /* multiple of 64 */
161	} em;
162
163	/** IEM part. */
164	union
165	{
166	#ifdef ___IEMInternal_h
167	struct IEMCPU s;
168	#endif
169	uint8_t padding[3072]; /* multiple of 64 */
170	} iem;
171
172	/** TRPM part. */
173	union
174	{
175	#ifdef ___TRPMInternal_h
176	struct TRPMCPU s;
177	#endif
178	uint8_t padding[128]; /* multiple of 64 */
179	} trpm;
180
181	/** TM part. */
182	union
183	{
184	#ifdef ___TMInternal_h
185	struct TMCPU s;
186	#endif
187	uint8_t padding[384]; /* multiple of 64 */
188	} tm;
189
190	/** VMM part. */
191	union
192	{
193	#ifdef ___VMMInternal_h
194	struct VMMCPU s;
195	#endif
196	uint8_t padding[704]; /* multiple of 64 */
197	} vmm;
198
199	/** PDM part. */
200	union
201	{
202	#ifdef ___PDMInternal_h
203	struct PDMCPU s;
204	#endif
205	uint8_t padding[256]; /* multiple of 64 */
206	} pdm;
207
208	/** IOM part. */
209	union
210	{
211	#ifdef ___IOMInternal_h
212	struct IOMCPU s;
213	#endif
214	uint8_t padding[512]; /* multiple of 64 */
215	} iom;
216
217	/** DBGF part.
218	* @todo Combine this with other tiny structures. */
219	union
220	{
221	#ifdef ___DBGFInternal_h
222	struct DBGFCPU s;
223	#endif
224	uint8_t padding[64]; /* multiple of 64 */
225	} dbgf;
226
227	/** Align the following members on page boundary. */
228	uint8_t abAlignment2[128];
229
230	/** PGM part. */
231	union
232	{
233	#ifdef ___PGMInternal_h
234	struct PGMCPU s;
235	#endif
236	uint8_t padding[4096]; /* multiple of 4096 */
237	} pgm;
238
239	} VMCPU;
240
241
242	#ifndef VBOX_FOR_DTRACE_LIB
243
244	/** @name Operations on VMCPU::enmState
245	* @{ */
246	/** Gets the VMCPU state. */
247	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
248	/** Sets the VMCPU state. */
249	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
250	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
251	/** Cmpares and sets the VMCPU state. */
252	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
253	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
254	/** Checks the VMCPU state. */
255	#ifdef VBOX_STRICT
256	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
257	do { \
258	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
259	AssertMsg(enmState == (enmExpectedState), \
260	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
261	enmState, enmExpectedState, (pVCpu)->idCpu)); \
262	} while (0)
263	#else
264	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
265	#endif
266	/** Tests if the state means that the CPU is started. */
267	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
268	/** Tests if the state means that the CPU is stopped. */
269	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
270	/** @} */
271
272
273	/** The name of the Guest Context VMM Core module. */
274	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
275	/** The name of the Ring 0 Context VMM Core module. */
276	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
277
278	/**
279	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
280	*/
281	#ifdef VBOX_WITH_RAW_MODE
282	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
283	#else
284	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
285	#endif
286
287
288	/** VM Forced Action Flags.
289	*
290	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
291	* action mask of a VM.
292	*
293	* @{
294	*/
295	/** The virtual sync clock has been stopped, go to TM until it has been
296	* restarted... */
297	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
298	/** PDM Queues are pending. */
299	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
300	/** The bit number for VM_FF_PDM_QUEUES. */
301	#define VM_FF_PDM_QUEUES_BIT 3
302	/** PDM DMA transfers are pending. */
303	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
304	/** The bit number for VM_FF_PDM_DMA. */
305	#define VM_FF_PDM_DMA_BIT 4
306	/** This action forces the VM to call DBGF so DBGF can service debugger
307	* requests in the emulation thread.
308	* This action flag stays asserted till DBGF clears it.*/
309	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
310	/** The bit number for VM_FF_DBGF. */
311	#define VM_FF_DBGF_BIT 8
312	/** This action forces the VM to service pending requests from other
313	* thread or requests which must be executed in another context. */
314	#define VM_FF_REQUEST RT_BIT_32(9)
315	/** Check for VM state changes and take appropriate action. */
316	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
317	/** The bit number for VM_FF_CHECK_VM_STATE. */
318	#define VM_FF_CHECK_VM_STATE_BIT 10
319	/** Reset the VM. (postponed) */
320	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
321	/** The bit number for VM_FF_RESET. */
322	#define VM_FF_RESET_BIT 11
323	/** EMT rendezvous in VMM. */
324	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
325	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
326	#define VM_FF_EMT_RENDEZVOUS_BIT 12
327
328	/** PGM needs to allocate handy pages. */
329	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
330	/** PGM is out of memory.
331	* Abandon all loops and code paths which can be resumed and get up to the EM
332	* loops. */
333	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
334	/** PGM is about to perform a lightweight pool flush
335	* Guest SMP: all EMT threads should return to ring 3
336	*/
337	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
338	/** REM needs to be informed about handler changes. */
339	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
340	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
341	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
342	/** Suspend the VM - debug only. */
343	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
344
345
346	/** This action forces the VM to check any pending interrups on the APIC. */
347	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
348	/** This action forces the VM to check any pending interrups on the PIC. */
349	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
350	/** This action forces the VM to schedule and run pending timer (TM).
351	* @remarks Don't move - PATM compatibility. */
352	#define VMCPU_FF_TIMER RT_BIT_32(2)
353	/** This action forces the VM to check any pending NMIs. */
354	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
355	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
356	/** This action forces the VM to check any pending SMIs. */
357	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
358	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
359	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
360	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
361	/** This action forces the VM to service pending requests from other
362	* thread or requests which must be executed in another context. */
363	#define VMCPU_FF_REQUEST RT_BIT_32(9)
364	/** This action forces the VM to service any pending updates to CR3 (used only
365	* by HM). */
366	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
367	/** This action forces the VM to service any pending updates to PAE PDPEs (used
368	* only by HM). */
369	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
370	/** This action forces the VM to resync the page tables before going
371	* back to execute guest code. (GLOBAL FLUSH) */
372	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
373	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
374	* (NON-GLOBAL FLUSH) */
375	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
376	/** Check for pending TLB shootdown actions.
377	* Consumer: HM
378	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
379	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
380	/** Check for pending TLB flush action.
381	* Consumer: HM
382	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
383	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
384	/** The bit number for VMCPU_FF_TLB_FLUSH. */
385	#define VMCPU_FF_TLB_FLUSH_BIT 19
386	#ifdef VBOX_WITH_RAW_MODE
387	/** Check the interrupt and trap gates */
388	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
389	/** Check Guest's TSS ring 0 stack */
390	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
391	/** Check Guest's GDT table */
392	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
393	/** Check Guest's LDT table */
394	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
395	#endif /* VBOX_WITH_RAW_MODE */
396	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
397	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
398	#ifdef VBOX_WITH_RAW_MODE
399	/** CSAM needs to scan the page that's being executed */
400	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
401	/** CSAM needs to do some homework. */
402	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
403	#endif /* VBOX_WITH_RAW_MODE */
404	/** Force return to Ring-3. */
405	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
406
407	/** Externally VM forced actions. Used to quit the idle/wait loop. */
408	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
409	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
410	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
411
412	/** Externally forced VM actions. Used to quit the idle/wait loop. */
413	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
414	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
415	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
416	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
417	\| VMCPU_FF_TIMER)
418
419	/** High priority VM pre-execution actions. */
420	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
421	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
422	\| VM_FF_EMT_RENDEZVOUS)
423	/** High priority VMCPU pre-execution actions. */
424	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
425	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
426	\| VMCPU_FF_INHIBIT_INTERRUPTS \
427	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
428	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
429
430	/** High priority VM pre raw-mode execution mask. */
431	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
432	/** High priority VMCPU pre raw-mode execution mask. */
433	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
434	\| VMCPU_FF_INHIBIT_INTERRUPTS \
435	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
436	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
437
438	/** High priority post-execution actions. */
439	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
440	/** High priority post-execution actions. */
441	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
442	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
443
444	/** Normal priority VM post-execution actions. */
445	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
446	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
447	/** Normal priority VMCPU post-execution actions. */
448	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
449
450	/** Normal priority VM actions. */
451	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
452	\| VM_FF_EMT_RENDEZVOUS)
453	/** Normal priority VMCPU actions. */
454	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
455
456	/** Flags to clear before resuming guest execution. */
457	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
458
459	/** VM Flags that cause the HM loops to go back to ring-3. */
460	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
461	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
462	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
463	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
464
465	/** High priority ring-0 VM pre HM-mode execution mask. */
466	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
467	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
468	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
469	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
470	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
471	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
472	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
473	\| VM_FF_PDM_DMA) )
474	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
475	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
476	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
477
478	/** All the forced VM flags. */
479	#define VM_FF_ALL_MASK (~0U)
480	/** All the forced VMCPU flags. */
481	#define VMCPU_FF_ALL_MASK (~0U)
482
483	/** All the forced VM flags except those related to raw-mode and hardware
484	* assisted execution. */
485	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
486	/** All the forced VMCPU flags except those related to raw-mode and hardware
487	* assisted execution. */
488	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
489	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
490	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
491	/** @} */
492
493	/** @def VM_FF_SET
494	* Sets a force action flag.
495	*
496	* @param pVM Pointer to the VM.
497	* @param fFlag The flag to set.
498	*/
499	#if 1
500	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
501	#else
502	# define VM_FF_SET(pVM, fFlag) \
503	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
504	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
505	} while (0)
506	#endif
507
508	/** @def VMCPU_FF_SET
509	* Sets a force action flag for the given VCPU.
510	*
511	* @param pVCpu Pointer to the VMCPU.
512	* @param fFlag The flag to set.
513	*/
514	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
515
516	/** @def VM_FF_CLEAR
517	* Clears a force action flag.
518	*
519	* @param pVM Pointer to the VM.
520	* @param fFlag The flag to clear.
521	*/
522	#if 1
523	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
524	#else
525	# define VM_FF_CLEAR(pVM, fFlag) \
526	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
527	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
528	} while (0)
529	#endif
530
531	/** @def VMCPU_FF_CLEAR
532	* Clears a force action flag for the given VCPU.
533	*
534	* @param pVCpu Pointer to the VMCPU.
535	* @param fFlag The flag to clear.
536	*/
537	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
538
539	/** @def VM_FF_IS_SET
540	* Checks if a force action flag is set.
541	*
542	* @param pVM Pointer to the VM.
543	* @param fFlag The flag to check.
544	*/
545	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
546
547	/** @def VMCPU_FF_IS_SET
548	* Checks if a force action flag is set for the given VCPU.
549	*
550	* @param pVCpu Pointer to the VMCPU.
551	* @param fFlag The flag to check.
552	*/
553	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
554
555	/** @def VM_FF_IS_PENDING
556	* Checks if one or more force action in the specified set is pending.
557	*
558	* @param pVM Pointer to the VM.
559	* @param fFlags The flags to check for.
560	*/
561	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
562
563	/** @def VM_FF_TESTANDCLEAR
564	* Checks if one (!) force action in the specified set is pending and clears it atomically
565	*
566	* @returns true if the bit was set.
567	* @returns false if the bit was clear.
568	* @param pVM Pointer to the VM.
569	* @param iBit Bit position to check and clear
570	*/
571	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
572
573	/** @def VMCPU_FF_TESTANDCLEAR
574	* Checks if one (!) force action in the specified set is pending and clears it atomically
575	*
576	* @returns true if the bit was set.
577	* @returns false if the bit was clear.
578	* @param pVCpu Pointer to the VMCPU.
579	* @param iBit Bit position to check and clear
580	*/
581	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
582
583	/** @def VMCPU_FF_IS_PENDING
584	* Checks if one or more force action in the specified set is pending for the given VCPU.
585	*
586	* @param pVCpu Pointer to the VMCPU.
587	* @param fFlags The flags to check for.
588	*/
589	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
590
591	/** @def VM_FF_IS_PENDING_EXCEPT
592	* Checks if one or more force action in the specified set is pending while one
593	* or more other ones are not.
594	*
595	* @param pVM Pointer to the VM.
596	* @param fFlags The flags to check for.
597	* @param fExcpt The flags that should not be set.
598	*/
599	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
600
601	/** @def VMCPU_FF_IS_PENDING_EXCEPT
602	* Checks if one or more force action in the specified set is pending for the given
603	* VCPU while one or more other ones are not.
604	*
605	* @param pVCpu Pointer to the VMCPU.
606	* @param fFlags The flags to check for.
607	* @param fExcpt The flags that should not be set.
608	*/
609	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
610
611	/** @def VM_IS_EMT
612	* Checks if the current thread is the emulation thread (EMT).
613	*
614	* @remark The ring-0 variation will need attention if we expand the ring-0
615	* code to let threads other than EMT mess around with the VM.
616	*/
617	#ifdef IN_RC
618	# define VM_IS_EMT(pVM) true
619	#else
620	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
621	#endif
622
623	/** @def VMCPU_IS_EMT
624	* Checks if the current thread is the emulation thread (EMT) for the specified
625	* virtual CPU.
626	*/
627	#ifdef IN_RC
628	# define VMCPU_IS_EMT(pVCpu) true
629	#else
630	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
631	#endif
632
633	/** @def VM_ASSERT_EMT
634	* Asserts that the current thread IS the emulation thread (EMT).
635	*/
636	#ifdef IN_RC
637	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
638	#elif defined(IN_RING0)
639	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
640	#else
641	# define VM_ASSERT_EMT(pVM) \
642	AssertMsg(VM_IS_EMT(pVM), \
643	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
644	#endif
645
646	/** @def VMCPU_ASSERT_EMT
647	* Asserts that the current thread IS the emulation thread (EMT) of the
648	* specified virtual CPU.
649	*/
650	#ifdef IN_RC
651	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
652	#elif defined(IN_RING0)
653	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
654	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
655	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
656	(pVCpu) ? (pVCpu)->idCpu : 0))
657	#else
658	# define VMCPU_ASSERT_EMT(pVCpu) \
659	AssertMsg(VMCPU_IS_EMT(pVCpu), \
660	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
661	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
662	#endif
663
664	/** @def VM_ASSERT_EMT_RETURN
665	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
666	*/
667	#ifdef IN_RC
668	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
669	#elif defined(IN_RING0)
670	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
671	#else
672	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
673	AssertMsgReturn(VM_IS_EMT(pVM), \
674	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
675	(rc))
676	#endif
677
678	/** @def VMCPU_ASSERT_EMT_RETURN
679	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
680	*/
681	#ifdef IN_RC
682	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
683	#elif defined(IN_RING0)
684	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
685	#else
686	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
687	AssertMsg(VMCPU_IS_EMT(pVCpu), \
688	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
689	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
690	(rc))
691	#endif
692
693	/** @def VMCPU_ASSERT_EMT_OR_GURU
694	* Asserts that the current thread IS the emulation thread (EMT) of the
695	* specified virtual CPU.
696	*/
697	#if defined(IN_RC) \|\| defined(IN_RING0)
698	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
699	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
700	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
701	#else
702	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
703	AssertMsg( VMCPU_IS_EMT(pVCpu) \
704	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
705	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
706	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
707	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
708	#endif
709
710	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
711	* Asserts that the current thread IS the emulation thread (EMT) of the
712	* specified virtual CPU when the VM is running.
713	*/
714	#if defined(IN_RC) \|\| defined(IN_RING0)
715	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
716	Assert( VMCPU_IS_EMT(pVCpu) \
717	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
718	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
719	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
720	#else
721	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
722	AssertMsg( VMCPU_IS_EMT(pVCpu) \
723	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
724	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
725	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
726	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
727	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
728	#endif
729
730	/** @def VM_ASSERT_EMT0
731	* Asserts that the current thread IS emulation thread \#0 (EMT0).
732	*/
733	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
734
735	/** @def VM_ASSERT_EMT0_RETURN
736	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
737	* it isn't.
738	*/
739	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
740
741
742	/**
743	* Asserts that the current thread is NOT the emulation thread.
744	*/
745	#define VM_ASSERT_OTHER_THREAD(pVM) \
746	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
747
748
749	/** @def VM_ASSERT_STATE_RETURN
750	* Asserts a certain VM state.
751	*/
752	#define VM_ASSERT_STATE(pVM, _enmState) \
753	AssertMsg((pVM)->enmVMState == (_enmState), \
754	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
755
756	/** @def VM_ASSERT_STATE_RETURN
757	* Asserts a certain VM state and returns if it doesn't match.
758	*/
759	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
760	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
761	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
762	(rc))
763
764	/** @def VM_IS_VALID_EXT
765	* Asserts a the VM handle is valid for external access, i.e. not being destroy
766	* or terminated. */
767	#define VM_IS_VALID_EXT(pVM) \
768	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
769	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
770	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
771	&& VM_IS_EMT(pVM))) )
772
773	/** @def VM_ASSERT_VALID_EXT_RETURN
774	* Asserts a the VM handle is valid for external access, i.e. not being
775	* destroy or terminated.
776	*/
777	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
778	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
779	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
780	? VMGetStateName(pVM->enmVMState) : ""), \
781	(rc))
782
783	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
784	* Asserts a the VMCPU handle is valid for external access, i.e. not being
785	* destroy or terminated.
786	*/
787	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
788	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
789	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
790	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
791	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
792	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
793	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
794	(rc))
795
796	#endif /* !VBOX_FOR_DTRACE_LIB */
797
798
799
800	/**
801	* The cross context VM structure.
802	*
803	* It contains all the VM data which have to be available in all contexts.
804	* Even if it contains all the data the idea is to use APIs not to modify all
805	* the members all around the place. Therefore we make use of unions to hide
806	* everything which isn't local to the current source module. This means we'll
807	* have to pay a little bit of attention when adding new members to structures
808	* in the unions and make sure to keep the padding sizes up to date.
809	*
810	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
811	*/
812	typedef struct VM
813	{
814	/** The state of the VM.
815	* This field is read only to everyone except the VM and EM. */
816	VMSTATE volatile enmVMState;
817	/** Forced action flags.
818	* See the VM_FF_* \#defines. Updated atomically.
819	*/
820	volatile uint32_t fGlobalForcedActions;
821	/** Pointer to the array of page descriptors for the VM structure allocation. */
822	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
823	/** Session handle. For use when calling SUPR0 APIs. */
824	PSUPDRVSESSION pSession;
825	/** Pointer to the ring-3 VM structure. */
826	PUVM pUVM;
827	/** Ring-3 Host Context VM Pointer. */
828	R3PTRTYPE(struct VM *) pVMR3;
829	/** Ring-0 Host Context VM Pointer. */
830	R0PTRTYPE(struct VM *) pVMR0;
831	/** Raw-mode Context VM Pointer. */
832	RCPTRTYPE(struct VM *) pVMRC;
833
834	/** The GVM VM handle. Only the GVM should modify this field. */
835	uint32_t hSelf;
836	/** Number of virtual CPUs. */
837	uint32_t cCpus;
838	/** CPU excution cap (1-100) */
839	uint32_t uCpuExecutionCap;
840
841	/** Size of the VM structure including the VMCPU array. */
842	uint32_t cbSelf;
843
844	/** Offset to the VMCPU array starting from beginning of this structure. */
845	uint32_t offVMCPU;
846
847	/**
848	* VMMSwitcher assembly entry point returning to host context.
849	*
850	* Depending on how the host handles the rc status given in @a eax, this may
851	* return and let the caller resume whatever it was doing prior to the call.
852	*
853	*
854	* @param eax The return code, register.
855	* @remark Assume interrupts disabled.
856	* @remark This method pointer lives here because TRPM needs it.
857	*/
858	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
859
860	/**
861	* VMMSwitcher assembly entry point returning to host context without saving the
862	* raw-mode context (hyper) registers.
863	*
864	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
865	* expects the caller to save a RC context in CPUM where one might return if the
866	* return code indicate that this is possible.
867	*
868	* This method pointer lives here because TRPM needs it.
869	*
870	* @param eax The return code, register.
871	* @remark Assume interrupts disabled.
872	* @remark This method pointer lives here because TRPM needs it.
873	*/
874	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
875
876	/** @name Various items that are frequently accessed.
877	* @{ */
878	/** Whether to recompile user mode code or run it raw/hm. */
879	bool fRecompileUser;
880	/** Whether to recompile supervisor mode code or run it raw/hm. */
881	bool fRecompileSupervisor;
882	/** Whether raw mode supports ring-1 code or not. */
883	bool fRawRing1Enabled;
884	/** PATM enabled flag.
885	* This is placed here for performance reasons. */
886	bool fPATMEnabled;
887	/** CSAM enabled flag.
888	* This is placed here for performance reasons. */
889	bool fCSAMEnabled;
890	/** Hardware VM support is available and enabled.
891	* Determined very early during init.
892	* This is placed here for performance reasons. */
893	bool fHMEnabled;
894	/** For asserting on fHMEnable usage. */
895	bool fHMEnabledFixed;
896	/** Hardware VM support requires a minimal raw-mode context.
897	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
898	bool fHMNeedRawModeCtx;
899	/** Set when this VM is the master FT node.
900	* @todo This doesn't need to be here, FTM should store it in it's own
901	* structures instead. */
902	bool fFaultTolerantMaster;
903	/** Large page enabled flag.
904	* @todo This doesn't need to be here, PGM should store it in it's own
905	* structures instead. */
906	bool fUseLargePages;
907	/** @} */
908
909	/** Alignment padding.. */
910	uint8_t uPadding1[2];
911
912	/** @name Debugging
913	* @{ */
914	/** Raw-mode Context VM Pointer. */
915	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
916	/** Ring-3 Host Context VM Pointer. */
917	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
918	/** Ring-0 Host Context VM Pointer. */
919	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
920	/** @} */
921
922	#if HC_ARCH_BITS == 32
923	/** Alignment padding.. */
924	uint32_t uPadding2;
925	#endif
926
927	/** @name Switcher statistics (remove)
928	* @{ */
929	/** Profiling the total time from Qemu to GC. */
930	STAMPROFILEADV StatTotalQemuToGC;
931	/** Profiling the total time from GC to Qemu. */
932	STAMPROFILEADV StatTotalGCToQemu;
933	/** Profiling the total time spent in GC. */
934	STAMPROFILEADV StatTotalInGC;
935	/** Profiling the total time spent not in Qemu. */
936	STAMPROFILEADV StatTotalInQemu;
937	/** Profiling the VMMSwitcher code for going to GC. */
938	STAMPROFILEADV StatSwitcherToGC;
939	/** Profiling the VMMSwitcher code for going to HC. */
940	STAMPROFILEADV StatSwitcherToHC;
941	STAMPROFILEADV StatSwitcherSaveRegs;
942	STAMPROFILEADV StatSwitcherSysEnter;
943	STAMPROFILEADV StatSwitcherDebug;
944	STAMPROFILEADV StatSwitcherCR0;
945	STAMPROFILEADV StatSwitcherCR4;
946	STAMPROFILEADV StatSwitcherJmpCR3;
947	STAMPROFILEADV StatSwitcherRstrRegs;
948	STAMPROFILEADV StatSwitcherLgdt;
949	STAMPROFILEADV StatSwitcherLidt;
950	STAMPROFILEADV StatSwitcherLldt;
951	STAMPROFILEADV StatSwitcherTSS;
952	/** @} */
953
954	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
955	* must start at the same offset on both 64-bit and 32-bit hosts. */
956	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
957
958	/** CPUM part. */
959	union
960	{
961	#ifdef ___CPUMInternal_h
962	struct CPUM s;
963	#endif
964	uint8_t padding[1536]; /* multiple of 64 */
965	} cpum;
966
967	/** VMM part. */
968	union
969	{
970	#ifdef ___VMMInternal_h
971	struct VMM s;
972	#endif
973	uint8_t padding[1600]; /* multiple of 64 */
974	} vmm;
975
976	/** PGM part. */
977	union
978	{
979	#ifdef ___PGMInternal_h
980	struct PGM s;
981	#endif
982	uint8_t padding[40962+6080]; / multiple of 64 */
983	} pgm;
984
985	/** HM part. */
986	union
987	{
988	#ifdef ___HMInternal_h
989	struct HM s;
990	#endif
991	uint8_t padding[5440]; /* multiple of 64 */
992	} hm;
993
994	/** TRPM part. */
995	union
996	{
997	#ifdef ___TRPMInternal_h
998	struct TRPM s;
999	#endif
1000	uint8_t padding[5248]; /* multiple of 64 */
1001	} trpm;
1002
1003	/** SELM part. */
1004	union
1005	{
1006	#ifdef ___SELMInternal_h
1007	struct SELM s;
1008	#endif
1009	uint8_t padding[768]; /* multiple of 64 */
1010	} selm;
1011
1012	/** MM part. */
1013	union
1014	{
1015	#ifdef ___MMInternal_h
1016	struct MM s;
1017	#endif
1018	uint8_t padding[192]; /* multiple of 64 */
1019	} mm;
1020
1021	/** PDM part. */
1022	union
1023	{
1024	#ifdef ___PDMInternal_h
1025	struct PDM s;
1026	#endif
1027	uint8_t padding[1920]; /* multiple of 64 */
1028	} pdm;
1029
1030	/** IOM part. */
1031	union
1032	{
1033	#ifdef ___IOMInternal_h
1034	struct IOM s;
1035	#endif
1036	uint8_t padding[896]; /* multiple of 64 */
1037	} iom;
1038
1039	/** PATM part. */
1040	union
1041	{
1042	#ifdef ___PATMInternal_h
1043	struct PATM s;
1044	#endif
1045	uint8_t padding[768]; /* multiple of 64 */
1046	} patm;
1047
1048	/** CSAM part. */
1049	union
1050	{
1051	#ifdef ___CSAMInternal_h
1052	struct CSAM s;
1053	#endif
1054	uint8_t padding[1088]; /* multiple of 64 */
1055	} csam;
1056
1057	/** EM part. */
1058	union
1059	{
1060	#ifdef ___EMInternal_h
1061	struct EM s;
1062	#endif
1063	uint8_t padding[256]; /* multiple of 64 */
1064	} em;
1065
1066	/** TM part. */
1067	union
1068	{
1069	#ifdef ___TMInternal_h
1070	struct TM s;
1071	#endif
1072	uint8_t padding[2432]; /* multiple of 64 */
1073	} tm;
1074
1075	/** DBGF part. */
1076	union
1077	{
1078	#ifdef ___DBGFInternal_h
1079	struct DBGF s;
1080	#endif
1081	uint8_t padding[2368]; /* multiple of 64 */
1082	} dbgf;
1083
1084	/** SSM part. */
1085	union
1086	{
1087	#ifdef ___SSMInternal_h
1088	struct SSM s;
1089	#endif
1090	uint8_t padding[128]; /* multiple of 64 */
1091	} ssm;
1092
1093	/** FTM part. */
1094	union
1095	{
1096	#ifdef ___FTMInternal_h
1097	struct FTM s;
1098	#endif
1099	uint8_t padding[512]; /* multiple of 64 */
1100	} ftm;
1101
1102	/** REM part. */
1103	union
1104	{
1105	#ifdef ___REMInternal_h
1106	struct REM s;
1107	#endif
1108	uint8_t padding[0x11100]; /* multiple of 64 */
1109	} rem;
1110
1111	/* ---- begin small stuff ---- */
1112
1113	/** VM part. */
1114	union
1115	{
1116	#ifdef ___VMInternal_h
1117	struct VMINT s;
1118	#endif
1119	uint8_t padding[24]; /* multiple of 8 */
1120	} vm;
1121
1122	/** CFGM part. */
1123	union
1124	{
1125	#ifdef ___CFGMInternal_h
1126	struct CFGM s;
1127	#endif
1128	uint8_t padding[8]; /* multiple of 8 */
1129	} cfgm;
1130
1131
1132	/** Padding for aligning the cpu array on a page boundary. */
1133	uint8_t abAlignment2[414];
1134
1135	/* ---- end small stuff ---- */
1136
1137	/** VMCPU array for the configured number of virtual CPUs.
1138	* Must be aligned on a page boundary for TLB hit reasons as well as
1139	* alignment of VMCPU members. */
1140	VMCPU aCpus[1];
1141	} VM;
1142
1143
1144	#ifdef IN_RC
1145	RT_C_DECLS_BEGIN
1146
1147	/** The VM structure.
1148	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1149	* of those magic globals which we should avoid using.
1150	*/
1151	extern DECLIMPORT(VM) g_VM;
1152
1153	RT_C_DECLS_END
1154	#endif
1155
1156	/** @} */
1157
1158	#endif
1159

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source: vbox/trunk/include/VBox/vmm/vm.h@ 50848

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