vm.h@ 51560

Last change on this file since 51560 was 51560, checked in by vboxsync, 11 years ago
VMM/GIM: Mapping of GIM MMIO2 regions and Hyper-V provider work.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2014 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** CPU started in HM context. */
72	VMCPUSTATE_STARTED_HM,
73	/** Executing guest code and can be poked (RC or STI bits of HM). */
74	VMCPUSTATE_STARTED_EXEC,
75	/** Executing guest code in the recompiler. */
76	VMCPUSTATE_STARTED_EXEC_REM,
77	/** Halted. */
78	VMCPUSTATE_STARTED_HALTED,
79
80	/** The end of valid virtual CPU states. */
81	VMCPUSTATE_END,
82
83	/** Ensure 32-bit type. */
84	VMCPUSTATE_32BIT_HACK = 0x7fffffff
85	} VMCPUSTATE;
86
87
88	/**
89	* The cross context virtual CPU structure.
90	*
91	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
92	*/
93	typedef struct VMCPU
94	{
95	/** Per CPU forced action.
96	* See the VMCPU_FF_* \#defines. Updated atomically. */
97	uint32_t volatile fLocalForcedActions; /* 0 */
98	/** The CPU state. */
99	VMCPUSTATE volatile enmState; /* 4 */
100
101	/** Pointer to the ring-3 UVMCPU structure. */
102	PUVMCPU pUVCpu; /* 8 */
103	/** Ring-3 Host Context VM Pointer. */
104	PVMR3 pVMR3; /* 16 / 12 */
105	/** Ring-0 Host Context VM Pointer. */
106	PVMR0 pVMR0; /* 24 / 16 */
107	/** Raw-mode Context VM Pointer. */
108	PVMRC pVMRC; /* 32 / 20 */
109	/** The CPU ID.
110	* This is the index into the VM::aCpu array. */
111	VMCPUID idCpu; /* 36 / 24 */
112	/** The native thread handle. */
113	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
114	/** The native R0 thread handle. (different from the R3 handle!) */
115	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
116	/** Which host CPU ID is this EMT running on.
117	* Only valid when in RC or HMR0 with scheduling disabled. */
118	RTCPUID volatile idHostCpu; /* 56 / 36 */
119
120	/** Trace groups enable flags. */
121	uint32_t fTraceGroups; /* 60 / 40 */
122	/** Align the structures below bit on a 64-byte boundary and make sure it starts
123	* at the same offset in both 64-bit and 32-bit builds.
124	*
125	* @remarks The alignments of the members that are larger than 48 bytes should be
126	* 64-byte for cache line reasons. structs containing small amounts of
127	* data could be lumped together at the end with a < 64 byte padding
128	* following it (to grow into and align the struct size).
129	* */
130	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 60 : 16+64];
131	/** State data for use by ad hoc profiling. */
132	uint32_t uAdHoc;
133	/** Profiling samples for use by ad hoc profiling. */
134	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
135
136	/** CPUM part. */
137	union
138	{
139	#ifdef ___CPUMInternal_h
140	struct CPUMCPU s;
141	#endif
142	uint8_t padding[3584]; /* multiple of 64 */
143	} cpum;
144
145	/** HM part. */
146	union
147	{
148	#ifdef ___HMInternal_h
149	struct HMCPU s;
150	#endif
151	uint8_t padding[5632]; /* multiple of 64 */
152	} hm;
153
154	/** EM part. */
155	union
156	{
157	#ifdef ___EMInternal_h
158	struct EMCPU s;
159	#endif
160	uint8_t padding[1472]; /* multiple of 64 */
161	} em;
162
163	/** IEM part. */
164	union
165	{
166	#ifdef ___IEMInternal_h
167	struct IEMCPU s;
168	#endif
169	uint8_t padding[3072]; /* multiple of 64 */
170	} iem;
171
172	/** TRPM part. */
173	union
174	{
175	#ifdef ___TRPMInternal_h
176	struct TRPMCPU s;
177	#endif
178	uint8_t padding[128]; /* multiple of 64 */
179	} trpm;
180
181	/** TM part. */
182	union
183	{
184	#ifdef ___TMInternal_h
185	struct TMCPU s;
186	#endif
187	uint8_t padding[384]; /* multiple of 64 */
188	} tm;
189
190	/** VMM part. */
191	union
192	{
193	#ifdef ___VMMInternal_h
194	struct VMMCPU s;
195	#endif
196	uint8_t padding[704]; /* multiple of 64 */
197	} vmm;
198
199	/** PDM part. */
200	union
201	{
202	#ifdef ___PDMInternal_h
203	struct PDMCPU s;
204	#endif
205	uint8_t padding[256]; /* multiple of 64 */
206	} pdm;
207
208	/** IOM part. */
209	union
210	{
211	#ifdef ___IOMInternal_h
212	struct IOMCPU s;
213	#endif
214	uint8_t padding[512]; /* multiple of 64 */
215	} iom;
216
217	/** DBGF part.
218	* @todo Combine this with other tiny structures. */
219	union
220	{
221	#ifdef ___DBGFInternal_h
222	struct DBGFCPU s;
223	#endif
224	uint8_t padding[64]; /* multiple of 64 */
225	} dbgf;
226
227	/** GIM part. */
228	union
229	{
230	#ifdef ___GIMInternal_h
231	struct GIMCPU s;
232	#endif
233	uint8_t padding[64]; /* multiple of 64 */
234	} gim;
235
236	/** Align the following members on page boundary. */
237	uint8_t abAlignment2[64];
238
239	/** PGM part. */
240	union
241	{
242	#ifdef ___PGMInternal_h
243	struct PGMCPU s;
244	#endif
245	uint8_t padding[4096]; /* multiple of 4096 */
246	} pgm;
247
248	} VMCPU;
249
250
251	#ifndef VBOX_FOR_DTRACE_LIB
252
253	/** @name Operations on VMCPU::enmState
254	* @{ */
255	/** Gets the VMCPU state. */
256	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
257	/** Sets the VMCPU state. */
258	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
259	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
260	/** Cmpares and sets the VMCPU state. */
261	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
262	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
263	/** Checks the VMCPU state. */
264	#ifdef VBOX_STRICT
265	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
266	do { \
267	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
268	AssertMsg(enmState == (enmExpectedState), \
269	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
270	enmState, enmExpectedState, (pVCpu)->idCpu)); \
271	} while (0)
272	#else
273	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
274	#endif
275	/** Tests if the state means that the CPU is started. */
276	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
277	/** Tests if the state means that the CPU is stopped. */
278	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
279	/** @} */
280
281
282	/** The name of the Guest Context VMM Core module. */
283	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
284	/** The name of the Ring 0 Context VMM Core module. */
285	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
286
287	/**
288	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
289	*/
290	#ifdef VBOX_WITH_RAW_MODE
291	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
292	#else
293	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
294	#endif
295
296
297	/** VM Forced Action Flags.
298	*
299	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
300	* action mask of a VM.
301	*
302	* @{
303	*/
304	/** The virtual sync clock has been stopped, go to TM until it has been
305	* restarted... */
306	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
307	/** PDM Queues are pending. */
308	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
309	/** The bit number for VM_FF_PDM_QUEUES. */
310	#define VM_FF_PDM_QUEUES_BIT 3
311	/** PDM DMA transfers are pending. */
312	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
313	/** The bit number for VM_FF_PDM_DMA. */
314	#define VM_FF_PDM_DMA_BIT 4
315	/** This action forces the VM to call DBGF so DBGF can service debugger
316	* requests in the emulation thread.
317	* This action flag stays asserted till DBGF clears it.*/
318	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
319	/** The bit number for VM_FF_DBGF. */
320	#define VM_FF_DBGF_BIT 8
321	/** This action forces the VM to service pending requests from other
322	* thread or requests which must be executed in another context. */
323	#define VM_FF_REQUEST RT_BIT_32(9)
324	/** Check for VM state changes and take appropriate action. */
325	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
326	/** The bit number for VM_FF_CHECK_VM_STATE. */
327	#define VM_FF_CHECK_VM_STATE_BIT 10
328	/** Reset the VM. (postponed) */
329	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
330	/** The bit number for VM_FF_RESET. */
331	#define VM_FF_RESET_BIT 11
332	/** EMT rendezvous in VMM. */
333	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
334	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
335	#define VM_FF_EMT_RENDEZVOUS_BIT 12
336
337	/** PGM needs to allocate handy pages. */
338	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
339	/** PGM is out of memory.
340	* Abandon all loops and code paths which can be resumed and get up to the EM
341	* loops. */
342	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
343	/** PGM is about to perform a lightweight pool flush
344	* Guest SMP: all EMT threads should return to ring 3
345	*/
346	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
347	/** REM needs to be informed about handler changes. */
348	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
349	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
350	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
351	/** Suspend the VM - debug only. */
352	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
353
354
355	/** This action forces the VM to check any pending interrups on the APIC. */
356	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
357	/** This action forces the VM to check any pending interrups on the PIC. */
358	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
359	/** This action forces the VM to schedule and run pending timer (TM).
360	* @remarks Don't move - PATM compatibility. */
361	#define VMCPU_FF_TIMER RT_BIT_32(2)
362	/** This action forces the VM to check any pending NMIs. */
363	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
364	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
365	/** This action forces the VM to check any pending SMIs. */
366	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
367	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
368	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
369	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
370	/** This action forces the VM to service pending requests from other
371	* thread or requests which must be executed in another context. */
372	#define VMCPU_FF_REQUEST RT_BIT_32(9)
373	/** This action forces the VM to service any pending updates to CR3 (used only
374	* by HM). */
375	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
376	/** This action forces the VM to service any pending updates to PAE PDPEs (used
377	* only by HM). */
378	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
379	/** This action forces the VM to resync the page tables before going
380	* back to execute guest code. (GLOBAL FLUSH) */
381	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
382	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
383	* (NON-GLOBAL FLUSH) */
384	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
385	/** Check for pending TLB shootdown actions.
386	* Consumer: HM
387	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
388	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
389	/** Check for pending TLB flush action.
390	* Consumer: HM
391	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
392	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
393	/** The bit number for VMCPU_FF_TLB_FLUSH. */
394	#define VMCPU_FF_TLB_FLUSH_BIT 19
395	#ifdef VBOX_WITH_RAW_MODE
396	/** Check the interrupt and trap gates */
397	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
398	/** Check Guest's TSS ring 0 stack */
399	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
400	/** Check Guest's GDT table */
401	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
402	/** Check Guest's LDT table */
403	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
404	#endif /* VBOX_WITH_RAW_MODE */
405	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
406	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
407	#ifdef VBOX_WITH_RAW_MODE
408	/** CSAM needs to scan the page that's being executed */
409	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
410	/** CSAM needs to do some homework. */
411	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
412	#endif /* VBOX_WITH_RAW_MODE */
413	/** Force return to Ring-3. */
414	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
415
416	/** Externally VM forced actions. Used to quit the idle/wait loop. */
417	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
418	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
419	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
420
421	/** Externally forced VM actions. Used to quit the idle/wait loop. */
422	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
423	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
424	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
425	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
426	\| VMCPU_FF_TIMER)
427
428	/** High priority VM pre-execution actions. */
429	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
430	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
431	\| VM_FF_EMT_RENDEZVOUS)
432	/** High priority VMCPU pre-execution actions. */
433	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
434	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
435	\| VMCPU_FF_INHIBIT_INTERRUPTS \
436	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
437	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
438
439	/** High priority VM pre raw-mode execution mask. */
440	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
441	/** High priority VMCPU pre raw-mode execution mask. */
442	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
443	\| VMCPU_FF_INHIBIT_INTERRUPTS \
444	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
445	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
446
447	/** High priority post-execution actions. */
448	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
449	/** High priority post-execution actions. */
450	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
451	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
452
453	/** Normal priority VM post-execution actions. */
454	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
455	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
456	/** Normal priority VMCPU post-execution actions. */
457	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
458
459	/** Normal priority VM actions. */
460	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
461	\| VM_FF_EMT_RENDEZVOUS)
462	/** Normal priority VMCPU actions. */
463	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST)
464
465	/** Flags to clear before resuming guest execution. */
466	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
467
468	/** VM Flags that cause the HM loops to go back to ring-3. */
469	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
470	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
471	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
472	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
473
474	/** High priority ring-0 VM pre HM-mode execution mask. */
475	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
476	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
477	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
478	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
479	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
480	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
481	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
482	\| VM_FF_PDM_DMA) )
483	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
484	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
485	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
486
487	/** All the forced VM flags. */
488	#define VM_FF_ALL_MASK (~0U)
489	/** All the forced VMCPU flags. */
490	#define VMCPU_FF_ALL_MASK (~0U)
491
492	/** All the forced VM flags except those related to raw-mode and hardware
493	* assisted execution. */
494	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
495	/** All the forced VMCPU flags except those related to raw-mode and hardware
496	* assisted execution. */
497	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
498	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
499	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
500	/** @} */
501
502	/** @def VM_FF_SET
503	* Sets a force action flag.
504	*
505	* @param pVM Pointer to the VM.
506	* @param fFlag The flag to set.
507	*/
508	#if 1
509	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
510	#else
511	# define VM_FF_SET(pVM, fFlag) \
512	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
513	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
514	} while (0)
515	#endif
516
517	/** @def VMCPU_FF_SET
518	* Sets a force action flag for the given VCPU.
519	*
520	* @param pVCpu Pointer to the VMCPU.
521	* @param fFlag The flag to set.
522	*/
523	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
524
525	/** @def VM_FF_CLEAR
526	* Clears a force action flag.
527	*
528	* @param pVM Pointer to the VM.
529	* @param fFlag The flag to clear.
530	*/
531	#if 1
532	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
533	#else
534	# define VM_FF_CLEAR(pVM, fFlag) \
535	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
536	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
537	} while (0)
538	#endif
539
540	/** @def VMCPU_FF_CLEAR
541	* Clears a force action flag for the given VCPU.
542	*
543	* @param pVCpu Pointer to the VMCPU.
544	* @param fFlag The flag to clear.
545	*/
546	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
547
548	/** @def VM_FF_IS_SET
549	* Checks if a force action flag is set.
550	*
551	* @param pVM Pointer to the VM.
552	* @param fFlag The flag to check.
553	*/
554	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
555
556	/** @def VMCPU_FF_IS_SET
557	* Checks if a force action flag is set for the given VCPU.
558	*
559	* @param pVCpu Pointer to the VMCPU.
560	* @param fFlag The flag to check.
561	*/
562	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
563
564	/** @def VM_FF_IS_PENDING
565	* Checks if one or more force action in the specified set is pending.
566	*
567	* @param pVM Pointer to the VM.
568	* @param fFlags The flags to check for.
569	*/
570	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
571
572	/** @def VM_FF_TESTANDCLEAR
573	* Checks if one (!) force action in the specified set is pending and clears it atomically
574	*
575	* @returns true if the bit was set.
576	* @returns false if the bit was clear.
577	* @param pVM Pointer to the VM.
578	* @param iBit Bit position to check and clear
579	*/
580	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
581
582	/** @def VMCPU_FF_TESTANDCLEAR
583	* Checks if one (!) force action in the specified set is pending and clears it atomically
584	*
585	* @returns true if the bit was set.
586	* @returns false if the bit was clear.
587	* @param pVCpu Pointer to the VMCPU.
588	* @param iBit Bit position to check and clear
589	*/
590	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
591
592	/** @def VMCPU_FF_IS_PENDING
593	* Checks if one or more force action in the specified set is pending for the given VCPU.
594	*
595	* @param pVCpu Pointer to the VMCPU.
596	* @param fFlags The flags to check for.
597	*/
598	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
599
600	/** @def VM_FF_IS_PENDING_EXCEPT
601	* Checks if one or more force action in the specified set is pending while one
602	* or more other ones are not.
603	*
604	* @param pVM Pointer to the VM.
605	* @param fFlags The flags to check for.
606	* @param fExcpt The flags that should not be set.
607	*/
608	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
609
610	/** @def VMCPU_FF_IS_PENDING_EXCEPT
611	* Checks if one or more force action in the specified set is pending for the given
612	* VCPU while one or more other ones are not.
613	*
614	* @param pVCpu Pointer to the VMCPU.
615	* @param fFlags The flags to check for.
616	* @param fExcpt The flags that should not be set.
617	*/
618	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
619
620	/** @def VM_IS_EMT
621	* Checks if the current thread is the emulation thread (EMT).
622	*
623	* @remark The ring-0 variation will need attention if we expand the ring-0
624	* code to let threads other than EMT mess around with the VM.
625	*/
626	#ifdef IN_RC
627	# define VM_IS_EMT(pVM) true
628	#else
629	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
630	#endif
631
632	/** @def VMCPU_IS_EMT
633	* Checks if the current thread is the emulation thread (EMT) for the specified
634	* virtual CPU.
635	*/
636	#ifdef IN_RC
637	# define VMCPU_IS_EMT(pVCpu) true
638	#else
639	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
640	#endif
641
642	/** @def VM_ASSERT_EMT
643	* Asserts that the current thread IS the emulation thread (EMT).
644	*/
645	#ifdef IN_RC
646	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
647	#elif defined(IN_RING0)
648	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
649	#else
650	# define VM_ASSERT_EMT(pVM) \
651	AssertMsg(VM_IS_EMT(pVM), \
652	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
653	#endif
654
655	/** @def VMCPU_ASSERT_EMT
656	* Asserts that the current thread IS the emulation thread (EMT) of the
657	* specified virtual CPU.
658	*/
659	#ifdef IN_RC
660	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
661	#elif defined(IN_RING0)
662	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
663	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
664	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
665	(pVCpu) ? (pVCpu)->idCpu : 0))
666	#else
667	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
668	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
669	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
670	#endif
671
672	/** @def VM_ASSERT_EMT_RETURN
673	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
674	*/
675	#ifdef IN_RC
676	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
677	#elif defined(IN_RING0)
678	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
679	#else
680	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
681	AssertMsgReturn(VM_IS_EMT(pVM), \
682	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
683	(rc))
684	#endif
685
686	/** @def VMCPU_ASSERT_EMT_RETURN
687	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
688	*/
689	#ifdef IN_RC
690	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
691	#elif defined(IN_RING0)
692	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
693	#else
694	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
695	AssertMsg(VMCPU_IS_EMT(pVCpu), \
696	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
697	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
698	(rc))
699	#endif
700
701	/** @def VMCPU_ASSERT_EMT_OR_GURU
702	* Asserts that the current thread IS the emulation thread (EMT) of the
703	* specified virtual CPU.
704	*/
705	#if defined(IN_RC) \|\| defined(IN_RING0)
706	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
707	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
708	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
709	#else
710	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
711	AssertMsg( VMCPU_IS_EMT(pVCpu) \
712	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
713	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
714	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
715	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
716	#endif
717
718	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
719	* Asserts that the current thread IS the emulation thread (EMT) of the
720	* specified virtual CPU when the VM is running.
721	*/
722	#if defined(IN_RC) \|\| defined(IN_RING0)
723	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
724	Assert( VMCPU_IS_EMT(pVCpu) \
725	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
726	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
727	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
728	#else
729	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
730	AssertMsg( VMCPU_IS_EMT(pVCpu) \
731	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
732	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
733	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
734	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
735	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
736	#endif
737
738	/** @def VM_ASSERT_EMT0
739	* Asserts that the current thread IS emulation thread \#0 (EMT0).
740	*/
741	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
742
743	/** @def VM_ASSERT_EMT0_RETURN
744	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
745	* it isn't.
746	*/
747	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
748
749
750	/**
751	* Asserts that the current thread is NOT the emulation thread.
752	*/
753	#define VM_ASSERT_OTHER_THREAD(pVM) \
754	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
755
756
757	/** @def VM_ASSERT_STATE_RETURN
758	* Asserts a certain VM state.
759	*/
760	#define VM_ASSERT_STATE(pVM, _enmState) \
761	AssertMsg((pVM)->enmVMState == (_enmState), \
762	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
763
764	/** @def VM_ASSERT_STATE_RETURN
765	* Asserts a certain VM state and returns if it doesn't match.
766	*/
767	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
768	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
769	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
770	(rc))
771
772	/** @def VM_IS_VALID_EXT
773	* Asserts a the VM handle is valid for external access, i.e. not being destroy
774	* or terminated. */
775	#define VM_IS_VALID_EXT(pVM) \
776	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
777	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
778	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
779	&& VM_IS_EMT(pVM))) )
780
781	/** @def VM_ASSERT_VALID_EXT_RETURN
782	* Asserts a the VM handle is valid for external access, i.e. not being
783	* destroy or terminated.
784	*/
785	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
786	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
787	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
788	? VMGetStateName(pVM->enmVMState) : ""), \
789	(rc))
790
791	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
792	* Asserts a the VMCPU handle is valid for external access, i.e. not being
793	* destroy or terminated.
794	*/
795	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
796	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
797	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
798	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
799	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
800	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
801	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
802	(rc))
803
804	#endif /* !VBOX_FOR_DTRACE_LIB */
805
806
807
808	/**
809	* The cross context VM structure.
810	*
811	* It contains all the VM data which have to be available in all contexts.
812	* Even if it contains all the data the idea is to use APIs not to modify all
813	* the members all around the place. Therefore we make use of unions to hide
814	* everything which isn't local to the current source module. This means we'll
815	* have to pay a little bit of attention when adding new members to structures
816	* in the unions and make sure to keep the padding sizes up to date.
817	*
818	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
819	*/
820	typedef struct VM
821	{
822	/** The state of the VM.
823	* This field is read only to everyone except the VM and EM. */
824	VMSTATE volatile enmVMState;
825	/** Forced action flags.
826	* See the VM_FF_* \#defines. Updated atomically.
827	*/
828	volatile uint32_t fGlobalForcedActions;
829	/** Pointer to the array of page descriptors for the VM structure allocation. */
830	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
831	/** Session handle. For use when calling SUPR0 APIs. */
832	PSUPDRVSESSION pSession;
833	/** Pointer to the ring-3 VM structure. */
834	PUVM pUVM;
835	/** Ring-3 Host Context VM Pointer. */
836	R3PTRTYPE(struct VM *) pVMR3;
837	/** Ring-0 Host Context VM Pointer. */
838	R0PTRTYPE(struct VM *) pVMR0;
839	/** Raw-mode Context VM Pointer. */
840	RCPTRTYPE(struct VM *) pVMRC;
841
842	/** The GVM VM handle. Only the GVM should modify this field. */
843	uint32_t hSelf;
844	/** Number of virtual CPUs. */
845	uint32_t cCpus;
846	/** CPU excution cap (1-100) */
847	uint32_t uCpuExecutionCap;
848
849	/** Size of the VM structure including the VMCPU array. */
850	uint32_t cbSelf;
851
852	/** Offset to the VMCPU array starting from beginning of this structure. */
853	uint32_t offVMCPU;
854
855	/**
856	* VMMSwitcher assembly entry point returning to host context.
857	*
858	* Depending on how the host handles the rc status given in @a eax, this may
859	* return and let the caller resume whatever it was doing prior to the call.
860	*
861	*
862	* @param eax The return code, register.
863	* @remark Assume interrupts disabled.
864	* @remark This method pointer lives here because TRPM needs it.
865	*/
866	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
867
868	/**
869	* VMMSwitcher assembly entry point returning to host context without saving the
870	* raw-mode context (hyper) registers.
871	*
872	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
873	* expects the caller to save a RC context in CPUM where one might return if the
874	* return code indicate that this is possible.
875	*
876	* This method pointer lives here because TRPM needs it.
877	*
878	* @param eax The return code, register.
879	* @remark Assume interrupts disabled.
880	* @remark This method pointer lives here because TRPM needs it.
881	*/
882	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
883
884	/** @name Various items that are frequently accessed.
885	* @{ */
886	/** Whether to recompile user mode code or run it raw/hm. */
887	bool fRecompileUser;
888	/** Whether to recompile supervisor mode code or run it raw/hm. */
889	bool fRecompileSupervisor;
890	/** Whether raw mode supports ring-1 code or not. */
891	bool fRawRing1Enabled;
892	/** PATM enabled flag.
893	* This is placed here for performance reasons. */
894	bool fPATMEnabled;
895	/** CSAM enabled flag.
896	* This is placed here for performance reasons. */
897	bool fCSAMEnabled;
898	/** Hardware VM support is available and enabled.
899	* Determined very early during init.
900	* This is placed here for performance reasons. */
901	bool fHMEnabled;
902	/** For asserting on fHMEnable usage. */
903	bool fHMEnabledFixed;
904	/** Hardware VM support requires a minimal raw-mode context.
905	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
906	bool fHMNeedRawModeCtx;
907	/** Set when this VM is the master FT node.
908	* @todo This doesn't need to be here, FTM should store it in it's own
909	* structures instead. */
910	bool fFaultTolerantMaster;
911	/** Large page enabled flag.
912	* @todo This doesn't need to be here, PGM should store it in it's own
913	* structures instead. */
914	bool fUseLargePages;
915	/** @} */
916
917	/** Alignment padding.. */
918	uint8_t uPadding1[2];
919
920	/** @name Debugging
921	* @{ */
922	/** Raw-mode Context VM Pointer. */
923	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
924	/** Ring-3 Host Context VM Pointer. */
925	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
926	/** Ring-0 Host Context VM Pointer. */
927	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
928	/** @} */
929
930	#if HC_ARCH_BITS == 32
931	/** Alignment padding.. */
932	uint32_t uPadding2;
933	#endif
934
935	/** @name Switcher statistics (remove)
936	* @{ */
937	/** Profiling the total time from Qemu to GC. */
938	STAMPROFILEADV StatTotalQemuToGC;
939	/** Profiling the total time from GC to Qemu. */
940	STAMPROFILEADV StatTotalGCToQemu;
941	/** Profiling the total time spent in GC. */
942	STAMPROFILEADV StatTotalInGC;
943	/** Profiling the total time spent not in Qemu. */
944	STAMPROFILEADV StatTotalInQemu;
945	/** Profiling the VMMSwitcher code for going to GC. */
946	STAMPROFILEADV StatSwitcherToGC;
947	/** Profiling the VMMSwitcher code for going to HC. */
948	STAMPROFILEADV StatSwitcherToHC;
949	STAMPROFILEADV StatSwitcherSaveRegs;
950	STAMPROFILEADV StatSwitcherSysEnter;
951	STAMPROFILEADV StatSwitcherDebug;
952	STAMPROFILEADV StatSwitcherCR0;
953	STAMPROFILEADV StatSwitcherCR4;
954	STAMPROFILEADV StatSwitcherJmpCR3;
955	STAMPROFILEADV StatSwitcherRstrRegs;
956	STAMPROFILEADV StatSwitcherLgdt;
957	STAMPROFILEADV StatSwitcherLidt;
958	STAMPROFILEADV StatSwitcherLldt;
959	STAMPROFILEADV StatSwitcherTSS;
960	/** @} */
961
962	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
963	* must start at the same offset on both 64-bit and 32-bit hosts. */
964	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
965
966	/** CPUM part. */
967	union
968	{
969	#ifdef ___CPUMInternal_h
970	struct CPUM s;
971	#endif
972	uint8_t padding[1536]; /* multiple of 64 */
973	} cpum;
974
975	/** VMM part. */
976	union
977	{
978	#ifdef ___VMMInternal_h
979	struct VMM s;
980	#endif
981	uint8_t padding[1600]; /* multiple of 64 */
982	} vmm;
983
984	/** PGM part. */
985	union
986	{
987	#ifdef ___PGMInternal_h
988	struct PGM s;
989	#endif
990	uint8_t padding[40962+6080]; / multiple of 64 */
991	} pgm;
992
993	/** HM part. */
994	union
995	{
996	#ifdef ___HMInternal_h
997	struct HM s;
998	#endif
999	uint8_t padding[5440]; /* multiple of 64 */
1000	} hm;
1001
1002	/** TRPM part. */
1003	union
1004	{
1005	#ifdef ___TRPMInternal_h
1006	struct TRPM s;
1007	#endif
1008	uint8_t padding[5248]; /* multiple of 64 */
1009	} trpm;
1010
1011	/** SELM part. */
1012	union
1013	{
1014	#ifdef ___SELMInternal_h
1015	struct SELM s;
1016	#endif
1017	uint8_t padding[768]; /* multiple of 64 */
1018	} selm;
1019
1020	/** MM part. */
1021	union
1022	{
1023	#ifdef ___MMInternal_h
1024	struct MM s;
1025	#endif
1026	uint8_t padding[192]; /* multiple of 64 */
1027	} mm;
1028
1029	/** PDM part. */
1030	union
1031	{
1032	#ifdef ___PDMInternal_h
1033	struct PDM s;
1034	#endif
1035	uint8_t padding[1920]; /* multiple of 64 */
1036	} pdm;
1037
1038	/** IOM part. */
1039	union
1040	{
1041	#ifdef ___IOMInternal_h
1042	struct IOM s;
1043	#endif
1044	uint8_t padding[896]; /* multiple of 64 */
1045	} iom;
1046
1047	/** PATM part. */
1048	union
1049	{
1050	#ifdef ___PATMInternal_h
1051	struct PATM s;
1052	#endif
1053	uint8_t padding[768]; /* multiple of 64 */
1054	} patm;
1055
1056	/** CSAM part. */
1057	union
1058	{
1059	#ifdef ___CSAMInternal_h
1060	struct CSAM s;
1061	#endif
1062	uint8_t padding[1088]; /* multiple of 64 */
1063	} csam;
1064
1065	/** EM part. */
1066	union
1067	{
1068	#ifdef ___EMInternal_h
1069	struct EM s;
1070	#endif
1071	uint8_t padding[256]; /* multiple of 64 */
1072	} em;
1073
1074	/** TM part. */
1075	union
1076	{
1077	#ifdef ___TMInternal_h
1078	struct TM s;
1079	#endif
1080	uint8_t padding[2432]; /* multiple of 64 */
1081	} tm;
1082
1083	/** DBGF part. */
1084	union
1085	{
1086	#ifdef ___DBGFInternal_h
1087	struct DBGF s;
1088	#endif
1089	uint8_t padding[2368]; /* multiple of 64 */
1090	} dbgf;
1091
1092	/** SSM part. */
1093	union
1094	{
1095	#ifdef ___SSMInternal_h
1096	struct SSM s;
1097	#endif
1098	uint8_t padding[128]; /* multiple of 64 */
1099	} ssm;
1100
1101	/** FTM part. */
1102	union
1103	{
1104	#ifdef ___FTMInternal_h
1105	struct FTM s;
1106	#endif
1107	uint8_t padding[512]; /* multiple of 64 */
1108	} ftm;
1109
1110	/** REM part. */
1111	union
1112	{
1113	#ifdef ___REMInternal_h
1114	struct REM s;
1115	#endif
1116	uint8_t padding[0x11100]; /* multiple of 64 */
1117	} rem;
1118
1119	union
1120	{
1121	#ifdef ___GIMInternal_h
1122	struct GIM s;
1123	#endif
1124	uint8_t padding[256]; /* multiple of 64 */
1125	} gim;
1126
1127	/* ---- begin small stuff ---- */
1128
1129	/** VM part. */
1130	union
1131	{
1132	#ifdef ___VMInternal_h
1133	struct VMINT s;
1134	#endif
1135	uint8_t padding[24]; /* multiple of 8 */
1136	} vm;
1137
1138	/** CFGM part. */
1139	union
1140	{
1141	#ifdef ___CFGMInternal_h
1142	struct CFGM s;
1143	#endif
1144	uint8_t padding[8]; /* multiple of 8 */
1145	} cfgm;
1146
1147
1148	/** Padding for aligning the cpu array on a page boundary. */
1149	uint8_t abAlignment2[158];
1150
1151	/* ---- end small stuff ---- */
1152
1153	/** VMCPU array for the configured number of virtual CPUs.
1154	* Must be aligned on a page boundary for TLB hit reasons as well as
1155	* alignment of VMCPU members. */
1156	VMCPU aCpus[1];
1157	} VM;
1158
1159
1160	#ifdef IN_RC
1161	RT_C_DECLS_BEGIN
1162
1163	/** The VM structure.
1164	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1165	* of those magic globals which we should avoid using.
1166	*/
1167	extern DECLIMPORT(VM) g_VM;
1168
1169	RT_C_DECLS_END
1170	#endif
1171
1172	/** @} */
1173
1174	#endif
1175

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source: vbox/trunk/include/VBox/vmm/vm.h@ 51560

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