vm.h@ 55461

Last change on this file since 55461 was 55229, checked in by vboxsync, 10 years ago
CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps.
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2014 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <VBox/types.h>
31	# include <VBox/vmm/cpum.h>
32	# include <VBox/vmm/stam.h>
33	# include <VBox/vmm/vmapi.h>
34	# include <VBox/vmm/vmm.h>
35	# include <VBox/sup.h>
36	#else
37	# pragma D depends_on library vbox-types.d
38	# pragma D depends_on library CPUMInternal.d
39	# define ___CPUMInternal_h
40	#endif
41
42
43
44	/** @defgroup grp_vm The Virtual Machine
45	* @{
46	*/
47
48	/**
49	* The state of a Virtual CPU.
50	*
51	* The basic state indicated here is whether the CPU has been started or not. In
52	* addition, there are sub-states when started for assisting scheduling (GVMM
53	* mostly).
54	*
55	* The transition out of the STOPPED state is done by a vmR3PowerOn.
56	* The transition back to the STOPPED state is done by vmR3PowerOff.
57	*
58	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
59	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
60	*/
61	typedef enum VMCPUSTATE
62	{
63	/** The customary invalid zero. */
64	VMCPUSTATE_INVALID = 0,
65
66	/** Virtual CPU has not yet been started. */
67	VMCPUSTATE_STOPPED,
68
69	/** CPU started. */
70	VMCPUSTATE_STARTED,
71	/** CPU started in HM context. */
72	VMCPUSTATE_STARTED_HM,
73	/** Executing guest code and can be poked (RC or STI bits of HM). */
74	VMCPUSTATE_STARTED_EXEC,
75	/** Executing guest code in the recompiler. */
76	VMCPUSTATE_STARTED_EXEC_REM,
77	/** Halted. */
78	VMCPUSTATE_STARTED_HALTED,
79
80	/** The end of valid virtual CPU states. */
81	VMCPUSTATE_END,
82
83	/** Ensure 32-bit type. */
84	VMCPUSTATE_32BIT_HACK = 0x7fffffff
85	} VMCPUSTATE;
86
87
88	/**
89	* The cross context virtual CPU structure.
90	*
91	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
92	*/
93	typedef struct VMCPU
94	{
95	/** Per CPU forced action.
96	* See the VMCPU_FF_* \#defines. Updated atomically. */
97	uint32_t volatile fLocalForcedActions; /* 0 */
98	/** The CPU state. */
99	VMCPUSTATE volatile enmState; /* 4 */
100
101	/** Pointer to the ring-3 UVMCPU structure. */
102	PUVMCPU pUVCpu; /* 8 */
103	/** Ring-3 Host Context VM Pointer. */
104	PVMR3 pVMR3; /* 16 / 12 */
105	/** Ring-0 Host Context VM Pointer. */
106	PVMR0 pVMR0; /* 24 / 16 */
107	/** Raw-mode Context VM Pointer. */
108	PVMRC pVMRC; /* 32 / 20 */
109	/** The CPU ID.
110	* This is the index into the VM::aCpu array. */
111	VMCPUID idCpu; /* 36 / 24 */
112	/** The native thread handle. */
113	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
114	/** The native R0 thread handle. (different from the R3 handle!) */
115	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
116	/** Which host CPU ID is this EMT running on.
117	* Only valid when in RC or HMR0 with scheduling disabled. */
118	RTCPUID volatile idHostCpu; /* 56 / 36 */
119	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
120	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
121	uint32_t volatile iHostCpuSet; /* 60 / 40 */
122
123	/** Trace groups enable flags. */
124	uint32_t fTraceGroups; /* 64 / 44 */
125	/** Align the structures below bit on a 64-byte boundary and make sure it starts
126	* at the same offset in both 64-bit and 32-bit builds.
127	*
128	* @remarks The alignments of the members that are larger than 48 bytes should be
129	* 64-byte for cache line reasons. structs containing small amounts of
130	* data could be lumped together at the end with a < 64 byte padding
131	* following it (to grow into and align the struct size).
132	* */
133	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 56 : 12+64];
134	/** State data for use by ad hoc profiling. */
135	uint32_t uAdHoc;
136	/** Profiling samples for use by ad hoc profiling. */
137	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
138
139	/** HM part. */
140	union
141	{
142	#ifdef ___HMInternal_h
143	struct HMCPU s;
144	#endif
145	uint8_t padding[5760]; /* multiple of 64 */
146	} hm;
147
148	/** EM part. */
149	union
150	{
151	#ifdef ___EMInternal_h
152	struct EMCPU s;
153	#endif
154	uint8_t padding[1408]; /* multiple of 64 */
155	} em;
156
157	/** IEM part. */
158	union
159	{
160	#ifdef ___IEMInternal_h
161	struct IEMCPU s;
162	#endif
163	uint8_t padding[3072]; /* multiple of 64 */
164	} iem;
165
166	/** TRPM part. */
167	union
168	{
169	#ifdef ___TRPMInternal_h
170	struct TRPMCPU s;
171	#endif
172	uint8_t padding[128]; /* multiple of 64 */
173	} trpm;
174
175	/** TM part. */
176	union
177	{
178	#ifdef ___TMInternal_h
179	struct TMCPU s;
180	#endif
181	uint8_t padding[384]; /* multiple of 64 */
182	} tm;
183
184	/** VMM part. */
185	union
186	{
187	#ifdef ___VMMInternal_h
188	struct VMMCPU s;
189	#endif
190	uint8_t padding[704]; /* multiple of 64 */
191	} vmm;
192
193	/** PDM part. */
194	union
195	{
196	#ifdef ___PDMInternal_h
197	struct PDMCPU s;
198	#endif
199	uint8_t padding[256]; /* multiple of 64 */
200	} pdm;
201
202	/** IOM part. */
203	union
204	{
205	#ifdef ___IOMInternal_h
206	struct IOMCPU s;
207	#endif
208	uint8_t padding[512]; /* multiple of 64 */
209	} iom;
210
211	/** DBGF part.
212	* @todo Combine this with other tiny structures. */
213	union
214	{
215	#ifdef ___DBGFInternal_h
216	struct DBGFCPU s;
217	#endif
218	uint8_t padding[64]; /* multiple of 64 */
219	} dbgf;
220
221	/** GIM part. */
222	union
223	{
224	#ifdef ___GIMInternal_h
225	struct GIMCPU s;
226	#endif
227	uint8_t padding[64]; /* multiple of 64 */
228	} gim;
229
230	/** Align the following members on page boundary. */
231	uint8_t abAlignment2[3584];
232
233	/** PGM part. */
234	union
235	{
236	#ifdef ___PGMInternal_h
237	struct PGMCPU s;
238	#endif
239	uint8_t padding[4096]; /* multiple of 4096 */
240	} pgm;
241
242	/** CPUM part. */
243	union
244	{
245	#ifdef ___CPUMInternal_h
246	struct CPUMCPU s;
247	#endif
248	uint8_t padding[4096]; /* multiple of 4096 */
249	} cpum;
250
251	} VMCPU;
252
253
254	#ifndef VBOX_FOR_DTRACE_LIB
255
256	/** @name Operations on VMCPU::enmState
257	* @{ */
258	/** Gets the VMCPU state. */
259	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
260	/** Sets the VMCPU state. */
261	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
262	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
263	/** Cmpares and sets the VMCPU state. */
264	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
265	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
266	/** Checks the VMCPU state. */
267	#ifdef VBOX_STRICT
268	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
269	do { \
270	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
271	AssertMsg(enmState == (enmExpectedState), \
272	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
273	enmState, enmExpectedState, (pVCpu)->idCpu)); \
274	} while (0)
275	#else
276	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
277	#endif
278	/** Tests if the state means that the CPU is started. */
279	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
280	/** Tests if the state means that the CPU is stopped. */
281	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
282	/** @} */
283
284
285	/** The name of the Guest Context VMM Core module. */
286	#define VMMGC_MAIN_MODULE_NAME "VMMGC.gc"
287	/** The name of the Ring 0 Context VMM Core module. */
288	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
289
290	/**
291	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
292	*/
293	#ifdef VBOX_WITH_RAW_MODE
294	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
295	#else
296	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
297	#endif
298
299
300	/** VM Forced Action Flags.
301	*
302	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
303	* action mask of a VM.
304	*
305	* @{
306	*/
307	/** The virtual sync clock has been stopped, go to TM until it has been
308	* restarted... */
309	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
310	/** PDM Queues are pending. */
311	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
312	/** The bit number for VM_FF_PDM_QUEUES. */
313	#define VM_FF_PDM_QUEUES_BIT 3
314	/** PDM DMA transfers are pending. */
315	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
316	/** The bit number for VM_FF_PDM_DMA. */
317	#define VM_FF_PDM_DMA_BIT 4
318	/** This action forces the VM to call DBGF so DBGF can service debugger
319	* requests in the emulation thread.
320	* This action flag stays asserted till DBGF clears it.*/
321	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
322	/** The bit number for VM_FF_DBGF. */
323	#define VM_FF_DBGF_BIT 8
324	/** This action forces the VM to service pending requests from other
325	* thread or requests which must be executed in another context. */
326	#define VM_FF_REQUEST RT_BIT_32(9)
327	/** Check for VM state changes and take appropriate action. */
328	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
329	/** The bit number for VM_FF_CHECK_VM_STATE. */
330	#define VM_FF_CHECK_VM_STATE_BIT 10
331	/** Reset the VM. (postponed) */
332	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
333	/** The bit number for VM_FF_RESET. */
334	#define VM_FF_RESET_BIT 11
335	/** EMT rendezvous in VMM. */
336	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
337	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
338	#define VM_FF_EMT_RENDEZVOUS_BIT 12
339
340	/** PGM needs to allocate handy pages. */
341	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
342	/** PGM is out of memory.
343	* Abandon all loops and code paths which can be resumed and get up to the EM
344	* loops. */
345	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
346	/** PGM is about to perform a lightweight pool flush
347	* Guest SMP: all EMT threads should return to ring 3
348	*/
349	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
350	/** REM needs to be informed about handler changes. */
351	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
352	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
353	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
354	/** Suspend the VM - debug only. */
355	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
356
357
358	/** This action forces the VM to check any pending interrups on the APIC. */
359	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
360	/** This action forces the VM to check any pending interrups on the PIC. */
361	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
362	/** This action forces the VM to schedule and run pending timer (TM).
363	* @remarks Don't move - PATM compatibility. */
364	#define VMCPU_FF_TIMER RT_BIT_32(2)
365	/** This action forces the VM to check any pending NMIs. */
366	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
367	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
368	/** This action forces the VM to check any pending SMIs. */
369	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
370	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
371	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
372	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
373	/** This action forces the VCPU out of the halted state. */
374	#define VMCPU_FF_UNHALT RT_BIT_32(6)
375	/** This action forces the VM to service pending requests from other
376	* thread or requests which must be executed in another context. */
377	#define VMCPU_FF_REQUEST RT_BIT_32(9)
378	/** This action forces the VM to service any pending updates to CR3 (used only
379	* by HM). */
380	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
381	/** This action forces the VM to service any pending updates to PAE PDPEs (used
382	* only by HM). */
383	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
384	/** This action forces the VM to resync the page tables before going
385	* back to execute guest code. (GLOBAL FLUSH) */
386	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
387	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
388	* (NON-GLOBAL FLUSH) */
389	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
390	/** Check for pending TLB shootdown actions.
391	* Consumer: HM
392	* @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN */
393	#define VMCPU_FF_TLB_SHOOTDOWN RT_BIT_32(18)
394	/** Check for pending TLB flush action.
395	* Consumer: HM
396	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
397	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
398	/** The bit number for VMCPU_FF_TLB_FLUSH. */
399	#define VMCPU_FF_TLB_FLUSH_BIT 19
400	#ifdef VBOX_WITH_RAW_MODE
401	/** Check the interrupt and trap gates */
402	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
403	/** Check Guest's TSS ring 0 stack */
404	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
405	/** Check Guest's GDT table */
406	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
407	/** Check Guest's LDT table */
408	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
409	#endif /* VBOX_WITH_RAW_MODE */
410	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
411	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
412	/** Block injection of non-maskable interrupts to the guest. */
413	#define VMCPU_FF_BLOCK_NMIS RT_BIT_32(25)
414	#ifdef VBOX_WITH_RAW_MODE
415	/** CSAM needs to scan the page that's being executed */
416	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
417	/** CSAM needs to do some homework. */
418	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
419	#endif /* VBOX_WITH_RAW_MODE */
420	/** Force return to Ring-3. */
421	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
422
423	/** Externally VM forced actions. Used to quit the idle/wait loop. */
424	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
425	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
426	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
427
428	/** Externally forced VM actions. Used to quit the idle/wait loop. */
429	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
430	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
431	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
432	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
433	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_UNHALT \
434	\| VMCPU_FF_TIMER)
435
436	/** High priority VM pre-execution actions. */
437	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
438	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
439	\| VM_FF_EMT_RENDEZVOUS)
440	/** High priority VMCPU pre-execution actions. */
441	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
442	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
443	\| VMCPU_FF_INHIBIT_INTERRUPTS \
444	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
445	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
446
447	/** High priority VM pre raw-mode execution mask. */
448	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
449	/** High priority VMCPU pre raw-mode execution mask. */
450	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
451	\| VMCPU_FF_INHIBIT_INTERRUPTS \
452	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
453	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
454
455	/** High priority post-execution actions. */
456	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
457	/** High priority post-execution actions. */
458	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
459	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES)
460
461	/** Normal priority VM post-execution actions. */
462	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
463	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
464	/** Normal priority VMCPU post-execution actions. */
465	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
466
467	/** Normal priority VM actions. */
468	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
469	\| VM_FF_EMT_RENDEZVOUS)
470	/** Normal priority VMCPU actions. */
471	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST \| VMCPU_FF_UNHALT)
472
473	/** Flags to clear before resuming guest execution. */
474	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
475
476	/** VM Flags that cause the HM loops to go back to ring-3. */
477	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
478	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
479	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
480	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT)
481
482	/** High priority ring-0 VM pre HM-mode execution mask. */
483	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
484	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
485	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
486	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
487	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
488	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
489	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
490	\| VM_FF_PDM_DMA) )
491	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
492	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
493	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
494
495	/** All the forced VM flags. */
496	#define VM_FF_ALL_MASK (~0U)
497	/** All the forced VMCPU flags. */
498	#define VMCPU_FF_ALL_MASK (~0U)
499
500	/** All the forced VM flags except those related to raw-mode and hardware
501	* assisted execution. */
502	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
503	/** All the forced VMCPU flags except those related to raw-mode and hardware
504	* assisted execution. */
505	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
506	\| VMCPU_FF_TLB_FLUSH \| VMCPU_FF_TLB_SHOOTDOWN \
507	\| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
508	/** @} */
509
510	/** @def VM_FF_SET
511	* Sets a force action flag.
512	*
513	* @param pVM Pointer to the VM.
514	* @param fFlag The flag to set.
515	*/
516	#if 1
517	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
518	#else
519	# define VM_FF_SET(pVM, fFlag) \
520	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
521	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
522	} while (0)
523	#endif
524
525	/** @def VMCPU_FF_SET
526	* Sets a force action flag for the given VCPU.
527	*
528	* @param pVCpu Pointer to the VMCPU.
529	* @param fFlag The flag to set.
530	*/
531	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
532
533	/** @def VM_FF_CLEAR
534	* Clears a force action flag.
535	*
536	* @param pVM Pointer to the VM.
537	* @param fFlag The flag to clear.
538	*/
539	#if 1
540	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
541	#else
542	# define VM_FF_CLEAR(pVM, fFlag) \
543	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
544	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
545	} while (0)
546	#endif
547
548	/** @def VMCPU_FF_CLEAR
549	* Clears a force action flag for the given VCPU.
550	*
551	* @param pVCpu Pointer to the VMCPU.
552	* @param fFlag The flag to clear.
553	*/
554	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
555
556	/** @def VM_FF_IS_SET
557	* Checks if a force action flag is set.
558	*
559	* @param pVM Pointer to the VM.
560	* @param fFlag The flag to check.
561	*/
562	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
563
564	/** @def VMCPU_FF_IS_SET
565	* Checks if a force action flag is set for the given VCPU.
566	*
567	* @param pVCpu Pointer to the VMCPU.
568	* @param fFlag The flag to check.
569	*/
570	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
571
572	/** @def VM_FF_IS_PENDING
573	* Checks if one or more force action in the specified set is pending.
574	*
575	* @param pVM Pointer to the VM.
576	* @param fFlags The flags to check for.
577	*/
578	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
579
580	/** @def VM_FF_TESTANDCLEAR
581	* Checks if one (!) force action in the specified set is pending and clears it atomically
582	*
583	* @returns true if the bit was set.
584	* @returns false if the bit was clear.
585	* @param pVM Pointer to the VM.
586	* @param iBit Bit position to check and clear
587	*/
588	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
589
590	/** @def VMCPU_FF_TESTANDCLEAR
591	* Checks if one (!) force action in the specified set is pending and clears it atomically
592	*
593	* @returns true if the bit was set.
594	* @returns false if the bit was clear.
595	* @param pVCpu Pointer to the VMCPU.
596	* @param iBit Bit position to check and clear
597	*/
598	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
599
600	/** @def VMCPU_FF_IS_PENDING
601	* Checks if one or more force action in the specified set is pending for the given VCPU.
602	*
603	* @param pVCpu Pointer to the VMCPU.
604	* @param fFlags The flags to check for.
605	*/
606	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
607
608	/** @def VM_FF_IS_PENDING_EXCEPT
609	* Checks if one or more force action in the specified set is pending while one
610	* or more other ones are not.
611	*
612	* @param pVM Pointer to the VM.
613	* @param fFlags The flags to check for.
614	* @param fExcpt The flags that should not be set.
615	*/
616	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
617
618	/** @def VMCPU_FF_IS_PENDING_EXCEPT
619	* Checks if one or more force action in the specified set is pending for the given
620	* VCPU while one or more other ones are not.
621	*
622	* @param pVCpu Pointer to the VMCPU.
623	* @param fFlags The flags to check for.
624	* @param fExcpt The flags that should not be set.
625	*/
626	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
627
628	/** @def VM_IS_EMT
629	* Checks if the current thread is the emulation thread (EMT).
630	*
631	* @remark The ring-0 variation will need attention if we expand the ring-0
632	* code to let threads other than EMT mess around with the VM.
633	*/
634	#ifdef IN_RC
635	# define VM_IS_EMT(pVM) true
636	#else
637	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
638	#endif
639
640	/** @def VMCPU_IS_EMT
641	* Checks if the current thread is the emulation thread (EMT) for the specified
642	* virtual CPU.
643	*/
644	#ifdef IN_RC
645	# define VMCPU_IS_EMT(pVCpu) true
646	#else
647	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
648	#endif
649
650	/** @def VM_ASSERT_EMT
651	* Asserts that the current thread IS the emulation thread (EMT).
652	*/
653	#ifdef IN_RC
654	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
655	#elif defined(IN_RING0)
656	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
657	#else
658	# define VM_ASSERT_EMT(pVM) \
659	AssertMsg(VM_IS_EMT(pVM), \
660	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
661	#endif
662
663	/** @def VMCPU_ASSERT_EMT
664	* Asserts that the current thread IS the emulation thread (EMT) of the
665	* specified virtual CPU.
666	*/
667	#ifdef IN_RC
668	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
669	#elif defined(IN_RING0)
670	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
671	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
672	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
673	(pVCpu) ? (pVCpu)->idCpu : 0))
674	#else
675	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
676	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
677	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
678	#endif
679
680	/** @def VM_ASSERT_EMT_RETURN
681	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
682	*/
683	#ifdef IN_RC
684	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
685	#elif defined(IN_RING0)
686	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
687	#else
688	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
689	AssertMsgReturn(VM_IS_EMT(pVM), \
690	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
691	(rc))
692	#endif
693
694	/** @def VMCPU_ASSERT_EMT_RETURN
695	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
696	*/
697	#ifdef IN_RC
698	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
699	#elif defined(IN_RING0)
700	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
701	#else
702	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
703	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
704	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
705	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
706	(rc))
707	#endif
708
709	/** @def VMCPU_ASSERT_EMT_OR_GURU
710	* Asserts that the current thread IS the emulation thread (EMT) of the
711	* specified virtual CPU.
712	*/
713	#if defined(IN_RC) \|\| defined(IN_RING0)
714	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
715	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
716	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
717	#else
718	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
719	AssertMsg( VMCPU_IS_EMT(pVCpu) \
720	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
721	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
722	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
723	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
724	#endif
725
726	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
727	* Asserts that the current thread IS the emulation thread (EMT) of the
728	* specified virtual CPU when the VM is running.
729	*/
730	#if defined(IN_RC) \|\| defined(IN_RING0)
731	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
732	Assert( VMCPU_IS_EMT(pVCpu) \
733	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
734	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
735	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
736	#else
737	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
738	AssertMsg( VMCPU_IS_EMT(pVCpu) \
739	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
740	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
741	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
742	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
743	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
744	#endif
745
746	/** @def VM_ASSERT_EMT0
747	* Asserts that the current thread IS emulation thread \#0 (EMT0).
748	*/
749	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
750
751	/** @def VM_ASSERT_EMT0_RETURN
752	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
753	* it isn't.
754	*/
755	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
756
757
758	/**
759	* Asserts that the current thread is NOT the emulation thread.
760	*/
761	#define VM_ASSERT_OTHER_THREAD(pVM) \
762	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
763
764
765	/** @def VM_ASSERT_STATE_RETURN
766	* Asserts a certain VM state.
767	*/
768	#define VM_ASSERT_STATE(pVM, _enmState) \
769	AssertMsg((pVM)->enmVMState == (_enmState), \
770	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
771
772	/** @def VM_ASSERT_STATE_RETURN
773	* Asserts a certain VM state and returns if it doesn't match.
774	*/
775	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
776	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
777	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
778	(rc))
779
780	/** @def VM_IS_VALID_EXT
781	* Asserts a the VM handle is valid for external access, i.e. not being destroy
782	* or terminated. */
783	#define VM_IS_VALID_EXT(pVM) \
784	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
785	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
786	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
787	&& VM_IS_EMT(pVM))) )
788
789	/** @def VM_ASSERT_VALID_EXT_RETURN
790	* Asserts a the VM handle is valid for external access, i.e. not being
791	* destroy or terminated.
792	*/
793	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
794	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
795	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
796	? VMGetStateName(pVM->enmVMState) : ""), \
797	(rc))
798
799	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
800	* Asserts a the VMCPU handle is valid for external access, i.e. not being
801	* destroy or terminated.
802	*/
803	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
804	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
805	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
806	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
807	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
808	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
809	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
810	(rc))
811
812	#endif /* !VBOX_FOR_DTRACE_LIB */
813
814
815
816	/**
817	* The cross context VM structure.
818	*
819	* It contains all the VM data which have to be available in all contexts.
820	* Even if it contains all the data the idea is to use APIs not to modify all
821	* the members all around the place. Therefore we make use of unions to hide
822	* everything which isn't local to the current source module. This means we'll
823	* have to pay a little bit of attention when adding new members to structures
824	* in the unions and make sure to keep the padding sizes up to date.
825	*
826	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
827	*/
828	typedef struct VM
829	{
830	/** The state of the VM.
831	* This field is read only to everyone except the VM and EM. */
832	VMSTATE volatile enmVMState;
833	/** Forced action flags.
834	* See the VM_FF_* \#defines. Updated atomically.
835	*/
836	volatile uint32_t fGlobalForcedActions;
837	/** Pointer to the array of page descriptors for the VM structure allocation. */
838	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
839	/** Session handle. For use when calling SUPR0 APIs. */
840	PSUPDRVSESSION pSession;
841	/** Pointer to the ring-3 VM structure. */
842	PUVM pUVM;
843	/** Ring-3 Host Context VM Pointer. */
844	R3PTRTYPE(struct VM *) pVMR3;
845	/** Ring-0 Host Context VM Pointer. */
846	R0PTRTYPE(struct VM *) pVMR0;
847	/** Raw-mode Context VM Pointer. */
848	RCPTRTYPE(struct VM *) pVMRC;
849
850	/** The GVM VM handle. Only the GVM should modify this field. */
851	uint32_t hSelf;
852	/** Number of virtual CPUs. */
853	uint32_t cCpus;
854	/** CPU excution cap (1-100) */
855	uint32_t uCpuExecutionCap;
856
857	/** Size of the VM structure including the VMCPU array. */
858	uint32_t cbSelf;
859
860	/** Offset to the VMCPU array starting from beginning of this structure. */
861	uint32_t offVMCPU;
862
863	/**
864	* VMMSwitcher assembly entry point returning to host context.
865	*
866	* Depending on how the host handles the rc status given in @a eax, this may
867	* return and let the caller resume whatever it was doing prior to the call.
868	*
869	*
870	* @param eax The return code, register.
871	* @remark Assume interrupts disabled.
872	* @remark This method pointer lives here because TRPM needs it.
873	*/
874	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
875
876	/**
877	* VMMSwitcher assembly entry point returning to host context without saving the
878	* raw-mode context (hyper) registers.
879	*
880	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
881	* expects the caller to save a RC context in CPUM where one might return if the
882	* return code indicate that this is possible.
883	*
884	* This method pointer lives here because TRPM needs it.
885	*
886	* @param eax The return code, register.
887	* @remark Assume interrupts disabled.
888	* @remark This method pointer lives here because TRPM needs it.
889	*/
890	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
891
892	/** @name Various items that are frequently accessed.
893	* @{ */
894	/** Whether to recompile user mode code or run it raw/hm. */
895	bool fRecompileUser;
896	/** Whether to recompile supervisor mode code or run it raw/hm. */
897	bool fRecompileSupervisor;
898	/** Whether raw mode supports ring-1 code or not. */
899	bool fRawRing1Enabled;
900	/** PATM enabled flag.
901	* This is placed here for performance reasons. */
902	bool fPATMEnabled;
903	/** CSAM enabled flag.
904	* This is placed here for performance reasons. */
905	bool fCSAMEnabled;
906	/** Hardware VM support is available and enabled.
907	* Determined very early during init.
908	* This is placed here for performance reasons. */
909	bool fHMEnabled;
910	/** For asserting on fHMEnable usage. */
911	bool fHMEnabledFixed;
912	/** Hardware VM support requires a minimal raw-mode context.
913	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
914	bool fHMNeedRawModeCtx;
915	/** Set when this VM is the master FT node.
916	* @todo This doesn't need to be here, FTM should store it in it's own
917	* structures instead. */
918	bool fFaultTolerantMaster;
919	/** Large page enabled flag.
920	* @todo This doesn't need to be here, PGM should store it in it's own
921	* structures instead. */
922	bool fUseLargePages;
923	/** @} */
924
925	/** Alignment padding.. */
926	uint8_t uPadding1[2];
927
928	/** @name Debugging
929	* @{ */
930	/** Raw-mode Context VM Pointer. */
931	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
932	/** Ring-3 Host Context VM Pointer. */
933	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
934	/** Ring-0 Host Context VM Pointer. */
935	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
936	/** @} */
937
938	#if HC_ARCH_BITS == 32
939	/** Alignment padding.. */
940	uint32_t uPadding2;
941	#endif
942
943	/** @name Switcher statistics (remove)
944	* @{ */
945	/** Profiling the total time from Qemu to GC. */
946	STAMPROFILEADV StatTotalQemuToGC;
947	/** Profiling the total time from GC to Qemu. */
948	STAMPROFILEADV StatTotalGCToQemu;
949	/** Profiling the total time spent in GC. */
950	STAMPROFILEADV StatTotalInGC;
951	/** Profiling the total time spent not in Qemu. */
952	STAMPROFILEADV StatTotalInQemu;
953	/** Profiling the VMMSwitcher code for going to GC. */
954	STAMPROFILEADV StatSwitcherToGC;
955	/** Profiling the VMMSwitcher code for going to HC. */
956	STAMPROFILEADV StatSwitcherToHC;
957	STAMPROFILEADV StatSwitcherSaveRegs;
958	STAMPROFILEADV StatSwitcherSysEnter;
959	STAMPROFILEADV StatSwitcherDebug;
960	STAMPROFILEADV StatSwitcherCR0;
961	STAMPROFILEADV StatSwitcherCR4;
962	STAMPROFILEADV StatSwitcherJmpCR3;
963	STAMPROFILEADV StatSwitcherRstrRegs;
964	STAMPROFILEADV StatSwitcherLgdt;
965	STAMPROFILEADV StatSwitcherLidt;
966	STAMPROFILEADV StatSwitcherLldt;
967	STAMPROFILEADV StatSwitcherTSS;
968	/** @} */
969
970	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
971	* must start at the same offset on both 64-bit and 32-bit hosts. */
972	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
973
974	/** CPUM part. */
975	union
976	{
977	#ifdef ___CPUMInternal_h
978	struct CPUM s;
979	#endif
980	#ifdef ___VBox_vmm_cpum_h
981	/** Read only info exposed about the host and guest CPUs. */
982	struct
983	{
984	/** Padding for hidden fields. */
985	uint8_t abHidden0[64];
986	/** Host CPU feature information. */
987	CPUMFEATURES HostFeatures;
988	/** Guest CPU feature information. */
989	CPUMFEATURES GuestFeatures;
990	} const ro;
991	#endif
992	uint8_t padding[1536]; /* multiple of 64 */
993	} cpum;
994
995	/** VMM part. */
996	union
997	{
998	#ifdef ___VMMInternal_h
999	struct VMM s;
1000	#endif
1001	uint8_t padding[1600]; /* multiple of 64 */
1002	} vmm;
1003
1004	/** PGM part. */
1005	union
1006	{
1007	#ifdef ___PGMInternal_h
1008	struct PGM s;
1009	#endif
1010	uint8_t padding[40962+6080]; / multiple of 64 */
1011	} pgm;
1012
1013	/** HM part. */
1014	union
1015	{
1016	#ifdef ___HMInternal_h
1017	struct HM s;
1018	#endif
1019	uint8_t padding[5440]; /* multiple of 64 */
1020	} hm;
1021
1022	/** TRPM part. */
1023	union
1024	{
1025	#ifdef ___TRPMInternal_h
1026	struct TRPM s;
1027	#endif
1028	uint8_t padding[5248]; /* multiple of 64 */
1029	} trpm;
1030
1031	/** SELM part. */
1032	union
1033	{
1034	#ifdef ___SELMInternal_h
1035	struct SELM s;
1036	#endif
1037	uint8_t padding[768]; /* multiple of 64 */
1038	} selm;
1039
1040	/** MM part. */
1041	union
1042	{
1043	#ifdef ___MMInternal_h
1044	struct MM s;
1045	#endif
1046	uint8_t padding[192]; /* multiple of 64 */
1047	} mm;
1048
1049	/** PDM part. */
1050	union
1051	{
1052	#ifdef ___PDMInternal_h
1053	struct PDM s;
1054	#endif
1055	uint8_t padding[1920]; /* multiple of 64 */
1056	} pdm;
1057
1058	/** IOM part. */
1059	union
1060	{
1061	#ifdef ___IOMInternal_h
1062	struct IOM s;
1063	#endif
1064	uint8_t padding[896]; /* multiple of 64 */
1065	} iom;
1066
1067	/** PATM part. */
1068	union
1069	{
1070	#ifdef ___PATMInternal_h
1071	struct PATM s;
1072	#endif
1073	uint8_t padding[768]; /* multiple of 64 */
1074	} patm;
1075
1076	/** CSAM part. */
1077	union
1078	{
1079	#ifdef ___CSAMInternal_h
1080	struct CSAM s;
1081	#endif
1082	uint8_t padding[1088]; /* multiple of 64 */
1083	} csam;
1084
1085	/** EM part. */
1086	union
1087	{
1088	#ifdef ___EMInternal_h
1089	struct EM s;
1090	#endif
1091	uint8_t padding[256]; /* multiple of 64 */
1092	} em;
1093
1094	/** TM part. */
1095	union
1096	{
1097	#ifdef ___TMInternal_h
1098	struct TM s;
1099	#endif
1100	uint8_t padding[2496]; /* multiple of 64 */
1101	} tm;
1102
1103	/** DBGF part. */
1104	union
1105	{
1106	#ifdef ___DBGFInternal_h
1107	struct DBGF s;
1108	#endif
1109	uint8_t padding[2368]; /* multiple of 64 */
1110	} dbgf;
1111
1112	/** SSM part. */
1113	union
1114	{
1115	#ifdef ___SSMInternal_h
1116	struct SSM s;
1117	#endif
1118	uint8_t padding[128]; /* multiple of 64 */
1119	} ssm;
1120
1121	/** FTM part. */
1122	union
1123	{
1124	#ifdef ___FTMInternal_h
1125	struct FTM s;
1126	#endif
1127	uint8_t padding[512]; /* multiple of 64 */
1128	} ftm;
1129
1130	/** REM part. */
1131	union
1132	{
1133	#ifdef ___REMInternal_h
1134	struct REM s;
1135	#endif
1136	uint8_t padding[0x11100]; /* multiple of 64 */
1137	} rem;
1138
1139	union
1140	{
1141	#ifdef ___GIMInternal_h
1142	struct GIM s;
1143	#endif
1144	uint8_t padding[256]; /* multiple of 64 */
1145	} gim;
1146
1147	/* ---- begin small stuff ---- */
1148
1149	/** VM part. */
1150	union
1151	{
1152	#ifdef ___VMInternal_h
1153	struct VMINT s;
1154	#endif
1155	uint8_t padding[24]; /* multiple of 8 */
1156	} vm;
1157
1158	/** CFGM part. */
1159	union
1160	{
1161	#ifdef ___CFGMInternal_h
1162	struct CFGM s;
1163	#endif
1164	uint8_t padding[8]; /* multiple of 8 */
1165	} cfgm;
1166
1167
1168	/** Padding for aligning the cpu array on a page boundary. */
1169	uint8_t abAlignment2[94];
1170
1171	/* ---- end small stuff ---- */
1172
1173	/** VMCPU array for the configured number of virtual CPUs.
1174	* Must be aligned on a page boundary for TLB hit reasons as well as
1175	* alignment of VMCPU members. */
1176	VMCPU aCpus[1];
1177	} VM;
1178
1179
1180	#ifdef IN_RC
1181	RT_C_DECLS_BEGIN
1182
1183	/** The VM structure.
1184	* This is imported from the VMMGCBuiltin module, i.e. it's a one
1185	* of those magic globals which we should avoid using.
1186	*/
1187	extern DECLIMPORT(VM) g_VM;
1188
1189	RT_C_DECLS_END
1190	#endif
1191
1192	/** @} */
1193
1194	#endif
1195

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source: vbox/trunk/include/VBox/vmm/vm.h@ 55461

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