1 | /** @file
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2 | * VM - The Virtual Machine, data.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2006-2015 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef ___VBox_vmm_vm_h
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27 | #define ___VBox_vmm_vm_h
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28 |
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29 | #ifndef VBOX_FOR_DTRACE_LIB
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30 | # include <VBox/types.h>
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31 | # include <VBox/vmm/cpum.h>
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32 | # include <VBox/vmm/stam.h>
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33 | # include <VBox/vmm/vmapi.h>
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34 | # include <VBox/vmm/vmm.h>
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35 | # include <VBox/sup.h>
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36 | #else
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37 | # pragma D depends_on library vbox-types.d
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38 | # pragma D depends_on library CPUMInternal.d
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39 | # define ___CPUMInternal_h
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40 | #endif
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41 |
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42 |
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43 |
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44 | /** @defgroup grp_vm The Virtual Machine
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45 | * @ingroup grp_vmm
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46 | * @{
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47 | */
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48 |
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49 | /**
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50 | * The state of a Virtual CPU.
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51 | *
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52 | * The basic state indicated here is whether the CPU has been started or not. In
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53 | * addition, there are sub-states when started for assisting scheduling (GVMM
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54 | * mostly).
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55 | *
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56 | * The transition out of the STOPPED state is done by a vmR3PowerOn.
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57 | * The transition back to the STOPPED state is done by vmR3PowerOff.
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58 | *
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59 | * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
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60 | * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
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61 | */
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62 | typedef enum VMCPUSTATE
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63 | {
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64 | /** The customary invalid zero. */
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65 | VMCPUSTATE_INVALID = 0,
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66 |
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67 | /** Virtual CPU has not yet been started. */
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68 | VMCPUSTATE_STOPPED,
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69 |
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70 | /** CPU started. */
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71 | VMCPUSTATE_STARTED,
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72 | /** CPU started in HM context. */
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73 | VMCPUSTATE_STARTED_HM,
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74 | /** Executing guest code and can be poked (RC or STI bits of HM). */
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75 | VMCPUSTATE_STARTED_EXEC,
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76 | /** Executing guest code in the recompiler. */
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77 | VMCPUSTATE_STARTED_EXEC_REM,
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78 | /** Halted. */
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79 | VMCPUSTATE_STARTED_HALTED,
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80 |
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81 | /** The end of valid virtual CPU states. */
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82 | VMCPUSTATE_END,
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83 |
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84 | /** Ensure 32-bit type. */
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85 | VMCPUSTATE_32BIT_HACK = 0x7fffffff
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86 | } VMCPUSTATE;
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87 |
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88 |
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89 | /**
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90 | * The cross context virtual CPU structure.
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91 | *
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92 | * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
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93 | */
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94 | typedef struct VMCPU
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95 | {
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96 | /** Per CPU forced action.
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97 | * See the VMCPU_FF_* \#defines. Updated atomically. */
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98 | uint32_t volatile fLocalForcedActions; /* 0 */
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99 | /** The CPU state. */
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100 | VMCPUSTATE volatile enmState; /* 4 */
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101 |
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102 | /** Pointer to the ring-3 UVMCPU structure. */
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103 | PUVMCPU pUVCpu; /* 8 */
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104 | /** Ring-3 Host Context VM Pointer. */
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105 | PVMR3 pVMR3; /* 16 / 12 */
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106 | /** Ring-0 Host Context VM Pointer. */
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107 | PVMR0 pVMR0; /* 24 / 16 */
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108 | /** Raw-mode Context VM Pointer. */
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109 | PVMRC pVMRC; /* 32 / 20 */
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110 | /** The CPU ID.
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111 | * This is the index into the VM::aCpu array. */
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112 | VMCPUID idCpu; /* 36 / 24 */
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113 | /** The native thread handle. */
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114 | RTNATIVETHREAD hNativeThread; /* 40 / 28 */
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115 | /** The native R0 thread handle. (different from the R3 handle!) */
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116 | RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
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117 | /** Which host CPU ID is this EMT running on.
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118 | * Only valid when in RC or HMR0 with scheduling disabled. */
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119 | RTCPUID volatile idHostCpu; /* 56 / 36 */
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120 | /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
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121 | * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
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122 | uint32_t volatile iHostCpuSet; /* 60 / 40 */
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123 |
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124 | /** Trace groups enable flags. */
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125 | uint32_t fTraceGroups; /* 64 / 44 */
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126 | /** Align the structures below bit on a 64-byte boundary and make sure it starts
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127 | * at the same offset in both 64-bit and 32-bit builds.
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128 | *
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129 | * @remarks The alignments of the members that are larger than 48 bytes should be
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130 | * 64-byte for cache line reasons. structs containing small amounts of
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131 | * data could be lumped together at the end with a < 64 byte padding
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132 | * following it (to grow into and align the struct size).
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133 | * */
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134 | uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 56 : 12+64];
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135 | /** State data for use by ad hoc profiling. */
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136 | uint32_t uAdHoc;
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137 | /** Profiling samples for use by ad hoc profiling. */
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138 | STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
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139 |
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140 | /** HM part. */
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141 | union
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142 | {
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143 | #ifdef ___HMInternal_h
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144 | struct HMCPU s;
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145 | #endif
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146 | uint8_t padding[5760]; /* multiple of 64 */
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147 | } hm;
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148 |
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149 | /** EM part. */
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150 | union
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151 | {
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152 | #ifdef ___EMInternal_h
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153 | struct EMCPU s;
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154 | #endif
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155 | uint8_t padding[1408]; /* multiple of 64 */
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156 | } em;
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157 |
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158 | /** IEM part. */
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159 | union
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160 | {
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161 | #ifdef ___IEMInternal_h
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162 | struct IEMCPU s;
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163 | #endif
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164 | uint8_t padding[3072]; /* multiple of 64 */
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165 | } iem;
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166 |
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167 | /** TRPM part. */
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168 | union
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169 | {
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170 | #ifdef ___TRPMInternal_h
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171 | struct TRPMCPU s;
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172 | #endif
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173 | uint8_t padding[128]; /* multiple of 64 */
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174 | } trpm;
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175 |
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176 | /** TM part. */
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177 | union
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178 | {
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179 | #ifdef ___TMInternal_h
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180 | struct TMCPU s;
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181 | #endif
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182 | uint8_t padding[384]; /* multiple of 64 */
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183 | } tm;
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184 |
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185 | /** VMM part. */
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186 | union
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187 | {
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188 | #ifdef ___VMMInternal_h
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189 | struct VMMCPU s;
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190 | #endif
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191 | uint8_t padding[704]; /* multiple of 64 */
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192 | } vmm;
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193 |
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194 | /** PDM part. */
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195 | union
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196 | {
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197 | #ifdef ___PDMInternal_h
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198 | struct PDMCPU s;
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199 | #endif
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200 | uint8_t padding[256]; /* multiple of 64 */
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201 | } pdm;
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202 |
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203 | /** IOM part. */
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204 | union
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205 | {
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206 | #ifdef ___IOMInternal_h
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207 | struct IOMCPU s;
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208 | #endif
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209 | uint8_t padding[512]; /* multiple of 64 */
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210 | } iom;
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211 |
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212 | /** DBGF part.
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213 | * @todo Combine this with other tiny structures. */
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214 | union
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215 | {
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216 | #ifdef ___DBGFInternal_h
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217 | struct DBGFCPU s;
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218 | #endif
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219 | uint8_t padding[256]; /* multiple of 64 */
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220 | } dbgf;
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221 |
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222 | /** GIM part. */
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223 | union
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224 | {
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225 | #ifdef ___GIMInternal_h
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226 | struct GIMCPU s;
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227 | #endif
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228 | uint8_t padding[64]; /* multiple of 64 */
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229 | } gim;
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230 |
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231 | /** Align the following members on page boundary. */
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232 | uint8_t abAlignment2[3392];
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233 |
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234 | /** PGM part. */
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235 | union
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236 | {
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237 | #ifdef ___PGMInternal_h
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238 | struct PGMCPU s;
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239 | #endif
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240 | uint8_t padding[4096]; /* multiple of 4096 */
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241 | } pgm;
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242 |
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243 | /** CPUM part. */
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244 | union
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245 | {
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246 | #ifdef ___CPUMInternal_h
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247 | struct CPUMCPU s;
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248 | #endif
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249 | uint8_t padding[4096]; /* multiple of 4096 */
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250 | } cpum;
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251 |
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252 | } VMCPU;
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253 |
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254 |
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255 | #ifndef VBOX_FOR_DTRACE_LIB
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256 |
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257 | /** @name Operations on VMCPU::enmState
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258 | * @{ */
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259 | /** Gets the VMCPU state. */
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260 | #define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
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261 | /** Sets the VMCPU state. */
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262 | #define VMCPU_SET_STATE(pVCpu, enmNewState) \
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263 | ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
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264 | /** Cmpares and sets the VMCPU state. */
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265 | #define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
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266 | ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
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267 | /** Checks the VMCPU state. */
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268 | #ifdef VBOX_STRICT
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269 | # define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
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270 | do { \
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271 | VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
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272 | AssertMsg(enmState == (enmExpectedState), \
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273 | ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
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274 | enmState, enmExpectedState, (pVCpu)->idCpu)); \
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275 | } while (0)
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276 | #else
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277 | # define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
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278 | #endif
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279 | /** Tests if the state means that the CPU is started. */
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280 | #define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
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281 | /** Tests if the state means that the CPU is stopped. */
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282 | #define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
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283 | /** @} */
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284 |
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285 |
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286 | /** The name of the raw-mode context VMM Core module. */
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287 | #define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
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288 | /** The name of the ring-0 context VMM Core module. */
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289 | #define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
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290 |
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291 | /**
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292 | * Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
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293 | */
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294 | #ifdef VBOX_WITH_RAW_MODE
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295 | # define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
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296 | #else
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297 | # define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
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298 | #endif
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299 |
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300 |
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301 | /** VM Forced Action Flags.
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302 | *
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303 | * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
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304 | * action mask of a VM.
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305 | *
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306 | * @{
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307 | */
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308 | /** The virtual sync clock has been stopped, go to TM until it has been
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309 | * restarted... */
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310 | #define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
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311 | /** PDM Queues are pending. */
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312 | #define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
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313 | /** The bit number for VM_FF_PDM_QUEUES. */
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314 | #define VM_FF_PDM_QUEUES_BIT 3
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315 | /** PDM DMA transfers are pending. */
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316 | #define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
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317 | /** The bit number for VM_FF_PDM_DMA. */
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318 | #define VM_FF_PDM_DMA_BIT 4
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319 | /** This action forces the VM to call DBGF so DBGF can service debugger
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320 | * requests in the emulation thread.
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321 | * This action flag stays asserted till DBGF clears it.*/
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322 | #define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
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323 | /** The bit number for VM_FF_DBGF. */
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324 | #define VM_FF_DBGF_BIT 8
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325 | /** This action forces the VM to service pending requests from other
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326 | * thread or requests which must be executed in another context. */
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327 | #define VM_FF_REQUEST RT_BIT_32(9)
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328 | /** Check for VM state changes and take appropriate action. */
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329 | #define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
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330 | /** The bit number for VM_FF_CHECK_VM_STATE. */
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331 | #define VM_FF_CHECK_VM_STATE_BIT 10
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332 | /** Reset the VM. (postponed) */
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333 | #define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
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334 | /** The bit number for VM_FF_RESET. */
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335 | #define VM_FF_RESET_BIT 11
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336 | /** EMT rendezvous in VMM. */
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337 | #define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
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338 | /** The bit number for VM_FF_EMT_RENDEZVOUS. */
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339 | #define VM_FF_EMT_RENDEZVOUS_BIT 12
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340 |
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341 | /** PGM needs to allocate handy pages. */
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342 | #define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
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343 | /** PGM is out of memory.
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344 | * Abandon all loops and code paths which can be resumed and get up to the EM
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345 | * loops. */
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346 | #define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
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347 | /** PGM is about to perform a lightweight pool flush
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348 | * Guest SMP: all EMT threads should return to ring 3
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349 | */
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350 | #define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
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351 | /** REM needs to be informed about handler changes. */
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352 | #define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
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353 | /** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
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354 | #define VM_FF_REM_HANDLER_NOTIFY_BIT 29
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355 | /** Suspend the VM - debug only. */
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356 | #define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
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357 |
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358 |
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359 | /** This action forces the VM to check any pending interrups on the APIC. */
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360 | #define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
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361 | /** This action forces the VM to check any pending interrups on the PIC. */
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362 | #define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
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363 | /** This action forces the VM to schedule and run pending timer (TM).
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364 | * @remarks Don't move - PATM compatibility. */
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365 | #define VMCPU_FF_TIMER RT_BIT_32(2)
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366 | /** This action forces the VM to check any pending NMIs. */
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367 | #define VMCPU_FF_INTERRUPT_NMI_BIT 3
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368 | #define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
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369 | /** This action forces the VM to check any pending SMIs. */
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370 | #define VMCPU_FF_INTERRUPT_SMI_BIT 4
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371 | #define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
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372 | /** PDM critical section unlocking is pending, process promptly upon return to R3. */
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373 | #define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
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374 | /** This action forces the VCPU out of the halted state. */
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375 | #define VMCPU_FF_UNHALT RT_BIT_32(6)
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376 | /** Pending IEM action (bit number). */
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377 | #define VMCPU_FF_IEM_BIT 7
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378 | /** Pending IEM action (mask). */
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379 | #define VMCPU_FF_IEM RT_BIT_32(VMCPU_FF_IEM_BIT)
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380 | /** This action forces the VM to service pending requests from other
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381 | * thread or requests which must be executed in another context. */
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382 | #define VMCPU_FF_REQUEST RT_BIT_32(9)
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383 | /** This action forces the VM to service any pending updates to CR3 (used only
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384 | * by HM). */
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385 | #define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
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386 | /** This action forces the VM to service any pending updates to PAE PDPEs (used
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387 | * only by HM). */
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388 | #define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
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389 | /** This action forces the VM to resync the page tables before going
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390 | * back to execute guest code. (GLOBAL FLUSH) */
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391 | #define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
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392 | /** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
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393 | * (NON-GLOBAL FLUSH) */
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394 | #define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
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395 | /** Check for pending TLB shootdown actions (deprecated)
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396 | * Reserved for furture HM re-use if necessary / safe.
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397 | * Consumer: HM */
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398 | #define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_32(18)
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399 | /** Check for pending TLB flush action.
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400 | * Consumer: HM
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401 | * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
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402 | #define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
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403 | /** The bit number for VMCPU_FF_TLB_FLUSH. */
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404 | #define VMCPU_FF_TLB_FLUSH_BIT 19
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405 | #ifdef VBOX_WITH_RAW_MODE
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406 | /** Check the interrupt and trap gates */
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407 | # define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
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408 | /** Check Guest's TSS ring 0 stack */
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409 | # define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
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410 | /** Check Guest's GDT table */
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411 | # define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
|
---|
412 | /** Check Guest's LDT table */
|
---|
413 | # define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
|
---|
414 | #endif /* VBOX_WITH_RAW_MODE */
|
---|
415 | /** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
|
---|
416 | #define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
|
---|
417 | /** Block injection of non-maskable interrupts to the guest. */
|
---|
418 | #define VMCPU_FF_BLOCK_NMIS RT_BIT_32(25)
|
---|
419 | #ifdef VBOX_WITH_RAW_MODE
|
---|
420 | /** CSAM needs to scan the page that's being executed */
|
---|
421 | # define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
|
---|
422 | /** CSAM needs to do some homework. */
|
---|
423 | # define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
|
---|
424 | #endif /* VBOX_WITH_RAW_MODE */
|
---|
425 | /** Force return to Ring-3. */
|
---|
426 | #define VMCPU_FF_TO_R3 RT_BIT_32(28)
|
---|
427 |
|
---|
428 | /** Externally VM forced actions. Used to quit the idle/wait loop. */
|
---|
429 | #define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS)
|
---|
430 | /** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
|
---|
431 | #define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
|
---|
432 |
|
---|
433 | /** Externally forced VM actions. Used to quit the idle/wait loop. */
|
---|
434 | #define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
|
---|
435 | | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
|
---|
436 | /** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
|
---|
437 | #define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST \
|
---|
438 | | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_UNHALT \
|
---|
439 | | VMCPU_FF_TIMER)
|
---|
440 |
|
---|
441 | /** High priority VM pre-execution actions. */
|
---|
442 | #define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
|
---|
443 | | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
|
---|
444 | | VM_FF_EMT_RENDEZVOUS)
|
---|
445 | /** High priority VMCPU pre-execution actions. */
|
---|
446 | #define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
|
---|
447 | | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
|
---|
448 | | VMCPU_FF_INHIBIT_INTERRUPTS \
|
---|
449 | | VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
|
---|
450 | | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0 ) )
|
---|
451 |
|
---|
452 | /** High priority VM pre raw-mode execution mask. */
|
---|
453 | #define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
|
---|
454 | /** High priority VMCPU pre raw-mode execution mask. */
|
---|
455 | #define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
|
---|
456 | | VMCPU_FF_INHIBIT_INTERRUPTS \
|
---|
457 | | VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
|
---|
458 | | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0) )
|
---|
459 |
|
---|
460 | /** High priority post-execution actions. */
|
---|
461 | #define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
|
---|
462 | /** High priority post-execution actions. */
|
---|
463 | #define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
|
---|
464 | | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES | VMCPU_FF_IEM)
|
---|
465 |
|
---|
466 | /** Normal priority VM post-execution actions. */
|
---|
467 | #define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
|
---|
468 | | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
|
---|
469 | /** Normal priority VMCPU post-execution actions. */
|
---|
470 | #define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
|
---|
471 |
|
---|
472 | /** Normal priority VM actions. */
|
---|
473 | #define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY \
|
---|
474 | | VM_FF_EMT_RENDEZVOUS)
|
---|
475 | /** Normal priority VMCPU actions. */
|
---|
476 | #define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST | VMCPU_FF_UNHALT)
|
---|
477 |
|
---|
478 | /** Flags to clear before resuming guest execution. */
|
---|
479 | #define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
|
---|
480 |
|
---|
481 | /** VM Flags that cause the HM loops to go back to ring-3. */
|
---|
482 | #define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
|
---|
483 | | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
|
---|
484 | /** VMCPU Flags that cause the HM loops to go back to ring-3. */
|
---|
485 | #define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_IEM)
|
---|
486 |
|
---|
487 | /** High priority ring-0 VM pre HM-mode execution mask. */
|
---|
488 | #define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
|
---|
489 | /** High priority ring-0 VMCPU pre HM-mode execution mask. */
|
---|
490 | #define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
|
---|
491 | | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST)
|
---|
492 | /** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
|
---|
493 | #define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
|
---|
494 | | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
|
---|
495 | | VM_FF_PDM_DMA) )
|
---|
496 | /** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
|
---|
497 | #define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
|
---|
498 | | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
|
---|
499 |
|
---|
500 | /** All the forced VM flags. */
|
---|
501 | #define VM_FF_ALL_MASK (~0U)
|
---|
502 | /** All the forced VMCPU flags. */
|
---|
503 | #define VMCPU_FF_ALL_MASK (~0U)
|
---|
504 |
|
---|
505 | /** All the forced VM flags except those related to raw-mode and hardware
|
---|
506 | * assisted execution. */
|
---|
507 | #define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NO_MEMORY)
|
---|
508 | /** All the forced VMCPU flags except those related to raw-mode and hardware
|
---|
509 | * assisted execution. */
|
---|
510 | #define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT \
|
---|
511 | | VMCPU_FF_TLB_FLUSH | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
|
---|
512 | /** @} */
|
---|
513 |
|
---|
514 | /** @def VM_FF_SET
|
---|
515 | * Sets a force action flag.
|
---|
516 | *
|
---|
517 | * @param pVM The cross context VM structure.
|
---|
518 | * @param fFlag The flag to set.
|
---|
519 | */
|
---|
520 | #if 1
|
---|
521 | # define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
|
---|
522 | #else
|
---|
523 | # define VM_FF_SET(pVM, fFlag) \
|
---|
524 | do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
|
---|
525 | RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
|
---|
526 | } while (0)
|
---|
527 | #endif
|
---|
528 |
|
---|
529 | /** @def VMCPU_FF_SET
|
---|
530 | * Sets a force action flag for the given VCPU.
|
---|
531 | *
|
---|
532 | * @param pVCpu The cross context virtual CPU structure.
|
---|
533 | * @param fFlag The flag to set.
|
---|
534 | */
|
---|
535 | #define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
|
---|
536 |
|
---|
537 | /** @def VM_FF_CLEAR
|
---|
538 | * Clears a force action flag.
|
---|
539 | *
|
---|
540 | * @param pVM The cross context VM structure.
|
---|
541 | * @param fFlag The flag to clear.
|
---|
542 | */
|
---|
543 | #if 1
|
---|
544 | # define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
|
---|
545 | #else
|
---|
546 | # define VM_FF_CLEAR(pVM, fFlag) \
|
---|
547 | do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
|
---|
548 | RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
|
---|
549 | } while (0)
|
---|
550 | #endif
|
---|
551 |
|
---|
552 | /** @def VMCPU_FF_CLEAR
|
---|
553 | * Clears a force action flag for the given VCPU.
|
---|
554 | *
|
---|
555 | * @param pVCpu The cross context virtual CPU structure.
|
---|
556 | * @param fFlag The flag to clear.
|
---|
557 | */
|
---|
558 | #define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
|
---|
559 |
|
---|
560 | /** @def VM_FF_IS_SET
|
---|
561 | * Checks if a force action flag is set.
|
---|
562 | *
|
---|
563 | * @param pVM The cross context VM structure.
|
---|
564 | * @param fFlag The flag to check.
|
---|
565 | */
|
---|
566 | #define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
|
---|
567 |
|
---|
568 | /** @def VMCPU_FF_IS_SET
|
---|
569 | * Checks if a force action flag is set for the given VCPU.
|
---|
570 | *
|
---|
571 | * @param pVCpu The cross context virtual CPU structure.
|
---|
572 | * @param fFlag The flag to check.
|
---|
573 | */
|
---|
574 | #define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
|
---|
575 |
|
---|
576 | /** @def VM_FF_IS_PENDING
|
---|
577 | * Checks if one or more force action in the specified set is pending.
|
---|
578 | *
|
---|
579 | * @param pVM The cross context VM structure.
|
---|
580 | * @param fFlags The flags to check for.
|
---|
581 | */
|
---|
582 | #define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
|
---|
583 |
|
---|
584 | /** @def VM_FF_TEST_AND_CLEAR
|
---|
585 | * Checks if one (!) force action in the specified set is pending and clears it atomically
|
---|
586 | *
|
---|
587 | * @returns true if the bit was set.
|
---|
588 | * @returns false if the bit was clear.
|
---|
589 | * @param pVM The cross context VM structure.
|
---|
590 | * @param iBit Bit position to check and clear
|
---|
591 | */
|
---|
592 | #define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
|
---|
593 |
|
---|
594 | /** @def VMCPU_FF_TEST_AND_CLEAR
|
---|
595 | * Checks if one (!) force action in the specified set is pending and clears it atomically
|
---|
596 | *
|
---|
597 | * @returns true if the bit was set.
|
---|
598 | * @returns false if the bit was clear.
|
---|
599 | * @param pVCpu The cross context virtual CPU structure.
|
---|
600 | * @param iBit Bit position to check and clear
|
---|
601 | */
|
---|
602 | #define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
|
---|
603 |
|
---|
604 | /** @def VMCPU_FF_IS_PENDING
|
---|
605 | * Checks if one or more force action in the specified set is pending for the given VCPU.
|
---|
606 | *
|
---|
607 | * @param pVCpu The cross context virtual CPU structure.
|
---|
608 | * @param fFlags The flags to check for.
|
---|
609 | */
|
---|
610 | #define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
|
---|
611 |
|
---|
612 | /** @def VM_FF_IS_PENDING_EXCEPT
|
---|
613 | * Checks if one or more force action in the specified set is pending while one
|
---|
614 | * or more other ones are not.
|
---|
615 | *
|
---|
616 | * @param pVM The cross context VM structure.
|
---|
617 | * @param fFlags The flags to check for.
|
---|
618 | * @param fExcpt The flags that should not be set.
|
---|
619 | */
|
---|
620 | #define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
|
---|
621 |
|
---|
622 | /** @def VMCPU_FF_IS_PENDING_EXCEPT
|
---|
623 | * Checks if one or more force action in the specified set is pending for the given
|
---|
624 | * VCPU while one or more other ones are not.
|
---|
625 | *
|
---|
626 | * @param pVCpu The cross context virtual CPU structure.
|
---|
627 | * @param fFlags The flags to check for.
|
---|
628 | * @param fExcpt The flags that should not be set.
|
---|
629 | */
|
---|
630 | #define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
|
---|
631 |
|
---|
632 | /** @def VM_IS_EMT
|
---|
633 | * Checks if the current thread is the emulation thread (EMT).
|
---|
634 | *
|
---|
635 | * @remark The ring-0 variation will need attention if we expand the ring-0
|
---|
636 | * code to let threads other than EMT mess around with the VM.
|
---|
637 | */
|
---|
638 | #ifdef IN_RC
|
---|
639 | # define VM_IS_EMT(pVM) true
|
---|
640 | #else
|
---|
641 | # define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
|
---|
642 | #endif
|
---|
643 |
|
---|
644 | /** @def VMCPU_IS_EMT
|
---|
645 | * Checks if the current thread is the emulation thread (EMT) for the specified
|
---|
646 | * virtual CPU.
|
---|
647 | */
|
---|
648 | #ifdef IN_RC
|
---|
649 | # define VMCPU_IS_EMT(pVCpu) true
|
---|
650 | #else
|
---|
651 | # define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
|
---|
652 | #endif
|
---|
653 |
|
---|
654 | /** @def VM_ASSERT_EMT
|
---|
655 | * Asserts that the current thread IS the emulation thread (EMT).
|
---|
656 | */
|
---|
657 | #ifdef IN_RC
|
---|
658 | # define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
|
---|
659 | #elif defined(IN_RING0)
|
---|
660 | # define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
|
---|
661 | #else
|
---|
662 | # define VM_ASSERT_EMT(pVM) \
|
---|
663 | AssertMsg(VM_IS_EMT(pVM), \
|
---|
664 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
|
---|
665 | #endif
|
---|
666 |
|
---|
667 | /** @def VMCPU_ASSERT_EMT
|
---|
668 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
669 | * specified virtual CPU.
|
---|
670 | */
|
---|
671 | #ifdef IN_RC
|
---|
672 | # define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
|
---|
673 | #elif defined(IN_RING0)
|
---|
674 | # define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
|
---|
675 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
|
---|
676 | RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
|
---|
677 | (pVCpu) ? (pVCpu)->idCpu : 0))
|
---|
678 | #else
|
---|
679 | # define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
|
---|
680 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
681 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
682 | #endif
|
---|
683 |
|
---|
684 | /** @def VM_ASSERT_EMT_RETURN
|
---|
685 | * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
|
---|
686 | */
|
---|
687 | #ifdef IN_RC
|
---|
688 | # define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
|
---|
689 | #elif defined(IN_RING0)
|
---|
690 | # define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
|
---|
691 | #else
|
---|
692 | # define VM_ASSERT_EMT_RETURN(pVM, rc) \
|
---|
693 | AssertMsgReturn(VM_IS_EMT(pVM), \
|
---|
694 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
|
---|
695 | (rc))
|
---|
696 | #endif
|
---|
697 |
|
---|
698 | /** @def VMCPU_ASSERT_EMT_RETURN
|
---|
699 | * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
|
---|
700 | */
|
---|
701 | #ifdef IN_RC
|
---|
702 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
|
---|
703 | #elif defined(IN_RING0)
|
---|
704 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
|
---|
705 | #else
|
---|
706 | # define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
|
---|
707 | AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
|
---|
708 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
709 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
|
---|
710 | (rc))
|
---|
711 | #endif
|
---|
712 |
|
---|
713 | /** @def VMCPU_ASSERT_EMT_OR_GURU
|
---|
714 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
715 | * specified virtual CPU.
|
---|
716 | */
|
---|
717 | #if defined(IN_RC) || defined(IN_RING0)
|
---|
718 | # define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
|
---|
719 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
|
---|
720 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
|
---|
721 | #else
|
---|
722 | # define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
|
---|
723 | AssertMsg( VMCPU_IS_EMT(pVCpu) \
|
---|
724 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
|
---|
725 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
|
---|
726 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
727 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
728 | #endif
|
---|
729 |
|
---|
730 | /** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
|
---|
731 | * Asserts that the current thread IS the emulation thread (EMT) of the
|
---|
732 | * specified virtual CPU when the VM is running.
|
---|
733 | */
|
---|
734 | #if defined(IN_RC) || defined(IN_RING0)
|
---|
735 | # define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
|
---|
736 | Assert( VMCPU_IS_EMT(pVCpu) \
|
---|
737 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
|
---|
738 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
|
---|
739 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
|
---|
740 | #else
|
---|
741 | # define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
|
---|
742 | AssertMsg( VMCPU_IS_EMT(pVCpu) \
|
---|
743 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
|
---|
744 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
|
---|
745 | || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
|
---|
746 | ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
|
---|
747 | RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
|
---|
748 | #endif
|
---|
749 |
|
---|
750 | /** @def VM_ASSERT_EMT0
|
---|
751 | * Asserts that the current thread IS emulation thread \#0 (EMT0).
|
---|
752 | */
|
---|
753 | #define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
|
---|
754 |
|
---|
755 | /** @def VM_ASSERT_EMT0_RETURN
|
---|
756 | * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
|
---|
757 | * it isn't.
|
---|
758 | */
|
---|
759 | #define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
|
---|
760 |
|
---|
761 |
|
---|
762 | /**
|
---|
763 | * Asserts that the current thread is NOT the emulation thread.
|
---|
764 | */
|
---|
765 | #define VM_ASSERT_OTHER_THREAD(pVM) \
|
---|
766 | AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
|
---|
767 |
|
---|
768 |
|
---|
769 | /** @def VM_ASSERT_STATE_RETURN
|
---|
770 | * Asserts a certain VM state.
|
---|
771 | */
|
---|
772 | #define VM_ASSERT_STATE(pVM, _enmState) \
|
---|
773 | AssertMsg((pVM)->enmVMState == (_enmState), \
|
---|
774 | ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
|
---|
775 |
|
---|
776 | /** @def VM_ASSERT_STATE_RETURN
|
---|
777 | * Asserts a certain VM state and returns if it doesn't match.
|
---|
778 | */
|
---|
779 | #define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
|
---|
780 | AssertMsgReturn((pVM)->enmVMState == (_enmState), \
|
---|
781 | ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
|
---|
782 | (rc))
|
---|
783 |
|
---|
784 | /** @def VM_IS_VALID_EXT
|
---|
785 | * Asserts a the VM handle is valid for external access, i.e. not being destroy
|
---|
786 | * or terminated. */
|
---|
787 | #define VM_IS_VALID_EXT(pVM) \
|
---|
788 | ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
|
---|
789 | && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
|
---|
790 | || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
|
---|
791 | && VM_IS_EMT(pVM))) )
|
---|
792 |
|
---|
793 | /** @def VM_ASSERT_VALID_EXT_RETURN
|
---|
794 | * Asserts a the VM handle is valid for external access, i.e. not being
|
---|
795 | * destroy or terminated.
|
---|
796 | */
|
---|
797 | #define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
|
---|
798 | AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
|
---|
799 | ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
|
---|
800 | ? VMGetStateName(pVM->enmVMState) : ""), \
|
---|
801 | (rc))
|
---|
802 |
|
---|
803 | /** @def VMCPU_ASSERT_VALID_EXT_RETURN
|
---|
804 | * Asserts a the VMCPU handle is valid for external access, i.e. not being
|
---|
805 | * destroy or terminated.
|
---|
806 | */
|
---|
807 | #define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
|
---|
808 | AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
|
---|
809 | && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
|
---|
810 | && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
|
---|
811 | ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
|
---|
812 | RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
|
---|
813 | ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
|
---|
814 | (rc))
|
---|
815 |
|
---|
816 | #endif /* !VBOX_FOR_DTRACE_LIB */
|
---|
817 |
|
---|
818 |
|
---|
819 |
|
---|
820 | /**
|
---|
821 | * The cross context VM structure.
|
---|
822 | *
|
---|
823 | * It contains all the VM data which have to be available in all contexts.
|
---|
824 | * Even if it contains all the data the idea is to use APIs not to modify all
|
---|
825 | * the members all around the place. Therefore we make use of unions to hide
|
---|
826 | * everything which isn't local to the current source module. This means we'll
|
---|
827 | * have to pay a little bit of attention when adding new members to structures
|
---|
828 | * in the unions and make sure to keep the padding sizes up to date.
|
---|
829 | *
|
---|
830 | * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
|
---|
831 | */
|
---|
832 | typedef struct VM
|
---|
833 | {
|
---|
834 | /** The state of the VM.
|
---|
835 | * This field is read only to everyone except the VM and EM. */
|
---|
836 | VMSTATE volatile enmVMState;
|
---|
837 | /** Forced action flags.
|
---|
838 | * See the VM_FF_* \#defines. Updated atomically.
|
---|
839 | */
|
---|
840 | volatile uint32_t fGlobalForcedActions;
|
---|
841 | /** Pointer to the array of page descriptors for the VM structure allocation. */
|
---|
842 | R3PTRTYPE(PSUPPAGE) paVMPagesR3;
|
---|
843 | /** Session handle. For use when calling SUPR0 APIs. */
|
---|
844 | PSUPDRVSESSION pSession;
|
---|
845 | /** Pointer to the ring-3 VM structure. */
|
---|
846 | PUVM pUVM;
|
---|
847 | /** Ring-3 Host Context VM Pointer. */
|
---|
848 | R3PTRTYPE(struct VM *) pVMR3;
|
---|
849 | /** Ring-0 Host Context VM Pointer. */
|
---|
850 | R0PTRTYPE(struct VM *) pVMR0;
|
---|
851 | /** Raw-mode Context VM Pointer. */
|
---|
852 | RCPTRTYPE(struct VM *) pVMRC;
|
---|
853 |
|
---|
854 | /** The GVM VM handle. Only the GVM should modify this field. */
|
---|
855 | uint32_t hSelf;
|
---|
856 | /** Number of virtual CPUs. */
|
---|
857 | uint32_t cCpus;
|
---|
858 | /** CPU excution cap (1-100) */
|
---|
859 | uint32_t uCpuExecutionCap;
|
---|
860 |
|
---|
861 | /** Size of the VM structure including the VMCPU array. */
|
---|
862 | uint32_t cbSelf;
|
---|
863 |
|
---|
864 | /** Offset to the VMCPU array starting from beginning of this structure. */
|
---|
865 | uint32_t offVMCPU;
|
---|
866 |
|
---|
867 | /**
|
---|
868 | * VMMSwitcher assembly entry point returning to host context.
|
---|
869 | *
|
---|
870 | * Depending on how the host handles the rc status given in @a eax, this may
|
---|
871 | * return and let the caller resume whatever it was doing prior to the call.
|
---|
872 | *
|
---|
873 | *
|
---|
874 | * @param eax The return code, register.
|
---|
875 | * @remark Assume interrupts disabled.
|
---|
876 | * @remark This method pointer lives here because TRPM needs it.
|
---|
877 | */
|
---|
878 | RTRCPTR pfnVMMRCToHostAsm/*(int32_t eax)*/;
|
---|
879 |
|
---|
880 | /**
|
---|
881 | * VMMSwitcher assembly entry point returning to host context without saving the
|
---|
882 | * raw-mode context (hyper) registers.
|
---|
883 | *
|
---|
884 | * Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
|
---|
885 | * expects the caller to save a RC context in CPUM where one might return if the
|
---|
886 | * return code indicate that this is possible.
|
---|
887 | *
|
---|
888 | * This method pointer lives here because TRPM needs it.
|
---|
889 | *
|
---|
890 | * @param eax The return code, register.
|
---|
891 | * @remark Assume interrupts disabled.
|
---|
892 | * @remark This method pointer lives here because TRPM needs it.
|
---|
893 | */
|
---|
894 | RTRCPTR pfnVMMRCToHostAsmNoReturn/*(int32_t eax)*/;
|
---|
895 |
|
---|
896 | /** @name Various items that are frequently accessed.
|
---|
897 | * @{ */
|
---|
898 | /** Whether to recompile user mode code or run it raw/hm. */
|
---|
899 | bool fRecompileUser;
|
---|
900 | /** Whether to recompile supervisor mode code or run it raw/hm. */
|
---|
901 | bool fRecompileSupervisor;
|
---|
902 | /** Whether raw mode supports ring-1 code or not. */
|
---|
903 | bool fRawRing1Enabled;
|
---|
904 | /** PATM enabled flag.
|
---|
905 | * This is placed here for performance reasons. */
|
---|
906 | bool fPATMEnabled;
|
---|
907 | /** CSAM enabled flag.
|
---|
908 | * This is placed here for performance reasons. */
|
---|
909 | bool fCSAMEnabled;
|
---|
910 | /** Hardware VM support is available and enabled.
|
---|
911 | * Determined very early during init.
|
---|
912 | * This is placed here for performance reasons. */
|
---|
913 | bool fHMEnabled;
|
---|
914 | /** For asserting on fHMEnable usage. */
|
---|
915 | bool fHMEnabledFixed;
|
---|
916 | /** Hardware VM support requires a minimal raw-mode context.
|
---|
917 | * This is never set on 64-bit hosts, only 32-bit hosts requires it. */
|
---|
918 | bool fHMNeedRawModeCtx;
|
---|
919 | /** Set when this VM is the master FT node.
|
---|
920 | * @todo This doesn't need to be here, FTM should store it in it's own
|
---|
921 | * structures instead. */
|
---|
922 | bool fFaultTolerantMaster;
|
---|
923 | /** Large page enabled flag.
|
---|
924 | * @todo This doesn't need to be here, PGM should store it in it's own
|
---|
925 | * structures instead. */
|
---|
926 | bool fUseLargePages;
|
---|
927 | /** @} */
|
---|
928 |
|
---|
929 | /** Alignment padding. */
|
---|
930 | uint8_t uPadding1[2];
|
---|
931 |
|
---|
932 | /** @name Debugging
|
---|
933 | * @{ */
|
---|
934 | /** Raw-mode Context VM Pointer. */
|
---|
935 | RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
|
---|
936 | /** Ring-3 Host Context VM Pointer. */
|
---|
937 | R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
|
---|
938 | /** Ring-0 Host Context VM Pointer. */
|
---|
939 | R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
|
---|
940 | /** @} */
|
---|
941 |
|
---|
942 | #if HC_ARCH_BITS == 32
|
---|
943 | /** Alignment padding. */
|
---|
944 | uint32_t uPadding2;
|
---|
945 | #endif
|
---|
946 |
|
---|
947 | /** @name Switcher statistics (remove)
|
---|
948 | * @{ */
|
---|
949 | /** Profiling the total time from Qemu to GC. */
|
---|
950 | STAMPROFILEADV StatTotalQemuToGC;
|
---|
951 | /** Profiling the total time from GC to Qemu. */
|
---|
952 | STAMPROFILEADV StatTotalGCToQemu;
|
---|
953 | /** Profiling the total time spent in GC. */
|
---|
954 | STAMPROFILEADV StatTotalInGC;
|
---|
955 | /** Profiling the total time spent not in Qemu. */
|
---|
956 | STAMPROFILEADV StatTotalInQemu;
|
---|
957 | /** Profiling the VMMSwitcher code for going to GC. */
|
---|
958 | STAMPROFILEADV StatSwitcherToGC;
|
---|
959 | /** Profiling the VMMSwitcher code for going to HC. */
|
---|
960 | STAMPROFILEADV StatSwitcherToHC;
|
---|
961 | STAMPROFILEADV StatSwitcherSaveRegs;
|
---|
962 | STAMPROFILEADV StatSwitcherSysEnter;
|
---|
963 | STAMPROFILEADV StatSwitcherDebug;
|
---|
964 | STAMPROFILEADV StatSwitcherCR0;
|
---|
965 | STAMPROFILEADV StatSwitcherCR4;
|
---|
966 | STAMPROFILEADV StatSwitcherJmpCR3;
|
---|
967 | STAMPROFILEADV StatSwitcherRstrRegs;
|
---|
968 | STAMPROFILEADV StatSwitcherLgdt;
|
---|
969 | STAMPROFILEADV StatSwitcherLidt;
|
---|
970 | STAMPROFILEADV StatSwitcherLldt;
|
---|
971 | STAMPROFILEADV StatSwitcherTSS;
|
---|
972 | /** @} */
|
---|
973 |
|
---|
974 | /** Padding - the unions must be aligned on a 64 bytes boundary and the unions
|
---|
975 | * must start at the same offset on both 64-bit and 32-bit hosts. */
|
---|
976 | uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
|
---|
977 |
|
---|
978 | /** CPUM part. */
|
---|
979 | union
|
---|
980 | {
|
---|
981 | #ifdef ___CPUMInternal_h
|
---|
982 | struct CPUM s;
|
---|
983 | #endif
|
---|
984 | #ifdef ___VBox_vmm_cpum_h
|
---|
985 | /** Read only info exposed about the host and guest CPUs. */
|
---|
986 | struct
|
---|
987 | {
|
---|
988 | /** Padding for hidden fields. */
|
---|
989 | uint8_t abHidden0[64];
|
---|
990 | /** Host CPU feature information. */
|
---|
991 | CPUMFEATURES HostFeatures;
|
---|
992 | /** Guest CPU feature information. */
|
---|
993 | CPUMFEATURES GuestFeatures;
|
---|
994 | } const ro;
|
---|
995 | #endif
|
---|
996 | uint8_t padding[1536]; /* multiple of 64 */
|
---|
997 | } cpum;
|
---|
998 |
|
---|
999 | /** VMM part. */
|
---|
1000 | union
|
---|
1001 | {
|
---|
1002 | #ifdef ___VMMInternal_h
|
---|
1003 | struct VMM s;
|
---|
1004 | #endif
|
---|
1005 | uint8_t padding[1600]; /* multiple of 64 */
|
---|
1006 | } vmm;
|
---|
1007 |
|
---|
1008 | /** PGM part. */
|
---|
1009 | union
|
---|
1010 | {
|
---|
1011 | #ifdef ___PGMInternal_h
|
---|
1012 | struct PGM s;
|
---|
1013 | #endif
|
---|
1014 | uint8_t padding[4096*2+6080]; /* multiple of 64 */
|
---|
1015 | } pgm;
|
---|
1016 |
|
---|
1017 | /** HM part. */
|
---|
1018 | union
|
---|
1019 | {
|
---|
1020 | #ifdef ___HMInternal_h
|
---|
1021 | struct HM s;
|
---|
1022 | #endif
|
---|
1023 | uint8_t padding[5440]; /* multiple of 64 */
|
---|
1024 | } hm;
|
---|
1025 |
|
---|
1026 | /** TRPM part. */
|
---|
1027 | union
|
---|
1028 | {
|
---|
1029 | #ifdef ___TRPMInternal_h
|
---|
1030 | struct TRPM s;
|
---|
1031 | #endif
|
---|
1032 | uint8_t padding[5248]; /* multiple of 64 */
|
---|
1033 | } trpm;
|
---|
1034 |
|
---|
1035 | /** SELM part. */
|
---|
1036 | union
|
---|
1037 | {
|
---|
1038 | #ifdef ___SELMInternal_h
|
---|
1039 | struct SELM s;
|
---|
1040 | #endif
|
---|
1041 | uint8_t padding[768]; /* multiple of 64 */
|
---|
1042 | } selm;
|
---|
1043 |
|
---|
1044 | /** MM part. */
|
---|
1045 | union
|
---|
1046 | {
|
---|
1047 | #ifdef ___MMInternal_h
|
---|
1048 | struct MM s;
|
---|
1049 | #endif
|
---|
1050 | uint8_t padding[192]; /* multiple of 64 */
|
---|
1051 | } mm;
|
---|
1052 |
|
---|
1053 | /** PDM part. */
|
---|
1054 | union
|
---|
1055 | {
|
---|
1056 | #ifdef ___PDMInternal_h
|
---|
1057 | struct PDM s;
|
---|
1058 | #endif
|
---|
1059 | uint8_t padding[1920]; /* multiple of 64 */
|
---|
1060 | } pdm;
|
---|
1061 |
|
---|
1062 | /** IOM part. */
|
---|
1063 | union
|
---|
1064 | {
|
---|
1065 | #ifdef ___IOMInternal_h
|
---|
1066 | struct IOM s;
|
---|
1067 | #endif
|
---|
1068 | uint8_t padding[896]; /* multiple of 64 */
|
---|
1069 | } iom;
|
---|
1070 |
|
---|
1071 | /** PATM part. */
|
---|
1072 | union
|
---|
1073 | {
|
---|
1074 | #ifdef ___PATMInternal_h
|
---|
1075 | struct PATM s;
|
---|
1076 | #endif
|
---|
1077 | uint8_t padding[768]; /* multiple of 64 */
|
---|
1078 | } patm;
|
---|
1079 |
|
---|
1080 | /** CSAM part. */
|
---|
1081 | union
|
---|
1082 | {
|
---|
1083 | #ifdef ___CSAMInternal_h
|
---|
1084 | struct CSAM s;
|
---|
1085 | #endif
|
---|
1086 | uint8_t padding[1088]; /* multiple of 64 */
|
---|
1087 | } csam;
|
---|
1088 |
|
---|
1089 | /** EM part. */
|
---|
1090 | union
|
---|
1091 | {
|
---|
1092 | #ifdef ___EMInternal_h
|
---|
1093 | struct EM s;
|
---|
1094 | #endif
|
---|
1095 | uint8_t padding[256]; /* multiple of 64 */
|
---|
1096 | } em;
|
---|
1097 |
|
---|
1098 | /** TM part. */
|
---|
1099 | union
|
---|
1100 | {
|
---|
1101 | #ifdef ___TMInternal_h
|
---|
1102 | struct TM s;
|
---|
1103 | #endif
|
---|
1104 | uint8_t padding[2496]; /* multiple of 64 */
|
---|
1105 | } tm;
|
---|
1106 |
|
---|
1107 | /** DBGF part. */
|
---|
1108 | union
|
---|
1109 | {
|
---|
1110 | #ifdef ___DBGFInternal_h
|
---|
1111 | struct DBGF s;
|
---|
1112 | #endif
|
---|
1113 | #ifdef ___VBox_vmm_dbgf_h
|
---|
1114 | /** Read only info exposed about interrupt breakpoints and selected events. */
|
---|
1115 | struct
|
---|
1116 | {
|
---|
1117 | /** Bitmap of enabled hardware interrupt breakpoints. */
|
---|
1118 | uint32_t bmHardIntBreakpoints[256 / 32];
|
---|
1119 | /** Bitmap of enabled software interrupt breakpoints. */
|
---|
1120 | uint32_t bmSoftIntBreakpoints[256 / 32];
|
---|
1121 | /** Bitmap of selected events.
|
---|
1122 | * This includes non-selectable events too for simplicity, we maintain the
|
---|
1123 | * state for some of these, as it may come in handy. */
|
---|
1124 | uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
|
---|
1125 | /** Enabled hardware interrupt breakpoints. */
|
---|
1126 | uint32_t cHardIntBreakpoints;
|
---|
1127 | /** Enabled software interrupt breakpoints. */
|
---|
1128 | uint32_t cSoftIntBreakpoints;
|
---|
1129 | /** Number of selected events. */
|
---|
1130 | uint32_t cSelectedEvents;
|
---|
1131 | } const ro;
|
---|
1132 | #endif
|
---|
1133 | uint8_t padding[2368]; /* multiple of 64 */
|
---|
1134 | } dbgf;
|
---|
1135 |
|
---|
1136 | /** SSM part. */
|
---|
1137 | union
|
---|
1138 | {
|
---|
1139 | #ifdef ___SSMInternal_h
|
---|
1140 | struct SSM s;
|
---|
1141 | #endif
|
---|
1142 | uint8_t padding[128]; /* multiple of 64 */
|
---|
1143 | } ssm;
|
---|
1144 |
|
---|
1145 | /** FTM part. */
|
---|
1146 | union
|
---|
1147 | {
|
---|
1148 | #ifdef ___FTMInternal_h
|
---|
1149 | struct FTM s;
|
---|
1150 | #endif
|
---|
1151 | uint8_t padding[512]; /* multiple of 64 */
|
---|
1152 | } ftm;
|
---|
1153 |
|
---|
1154 | /** REM part. */
|
---|
1155 | union
|
---|
1156 | {
|
---|
1157 | #ifdef ___REMInternal_h
|
---|
1158 | struct REM s;
|
---|
1159 | #endif
|
---|
1160 | uint8_t padding[0x11100]; /* multiple of 64 */
|
---|
1161 | } rem;
|
---|
1162 |
|
---|
1163 | union
|
---|
1164 | {
|
---|
1165 | #ifdef ___GIMInternal_h
|
---|
1166 | struct GIM s;
|
---|
1167 | #endif
|
---|
1168 | uint8_t padding[448]; /* multiple of 64 */
|
---|
1169 | } gim;
|
---|
1170 |
|
---|
1171 | /* ---- begin small stuff ---- */
|
---|
1172 |
|
---|
1173 | /** VM part. */
|
---|
1174 | union
|
---|
1175 | {
|
---|
1176 | #ifdef ___VMInternal_h
|
---|
1177 | struct VMINT s;
|
---|
1178 | #endif
|
---|
1179 | uint8_t padding[24]; /* multiple of 8 */
|
---|
1180 | } vm;
|
---|
1181 |
|
---|
1182 | /** CFGM part. */
|
---|
1183 | union
|
---|
1184 | {
|
---|
1185 | #ifdef ___CFGMInternal_h
|
---|
1186 | struct CFGM s;
|
---|
1187 | #endif
|
---|
1188 | uint8_t padding[8]; /* multiple of 8 */
|
---|
1189 | } cfgm;
|
---|
1190 |
|
---|
1191 |
|
---|
1192 | /** Padding for aligning the cpu array on a page boundary. */
|
---|
1193 | uint8_t abAlignment2[3998];
|
---|
1194 |
|
---|
1195 | /* ---- end small stuff ---- */
|
---|
1196 |
|
---|
1197 | /** VMCPU array for the configured number of virtual CPUs.
|
---|
1198 | * Must be aligned on a page boundary for TLB hit reasons as well as
|
---|
1199 | * alignment of VMCPU members. */
|
---|
1200 | VMCPU aCpus[1];
|
---|
1201 | } VM;
|
---|
1202 |
|
---|
1203 |
|
---|
1204 | #ifdef IN_RC
|
---|
1205 | RT_C_DECLS_BEGIN
|
---|
1206 |
|
---|
1207 | /** The VM structure.
|
---|
1208 | * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
|
---|
1209 | * globals which we should avoid using.
|
---|
1210 | */
|
---|
1211 | extern DECLIMPORT(VM) g_VM;
|
---|
1212 |
|
---|
1213 | RT_C_DECLS_END
|
---|
1214 | #endif
|
---|
1215 |
|
---|
1216 | /** @} */
|
---|
1217 |
|
---|
1218 | #endif
|
---|
1219 |
|
---|