vm.h@ 60188

Last change on this file since 60188 was 59652, checked in by vboxsync, 9 years ago
VMM: Build fixes when VBOX_WITH_REM is not defined.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 45.7 KB

Line
1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2015 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <iprt/param.h>
31	# include <VBox/types.h>
32	# include <VBox/vmm/cpum.h>
33	# include <VBox/vmm/stam.h>
34	# include <VBox/vmm/vmapi.h>
35	# include <VBox/vmm/vmm.h>
36	# include <VBox/sup.h>
37	#else
38	# pragma D depends_on library vbox-types.d
39	# pragma D depends_on library CPUMInternal.d
40	# define ___CPUMInternal_h
41	#endif
42
43
44
45	/** @defgroup grp_vm The Virtual Machine
46	* @ingroup grp_vmm
47	* @{
48	*/
49
50	/**
51	* The state of a Virtual CPU.
52	*
53	* The basic state indicated here is whether the CPU has been started or not. In
54	* addition, there are sub-states when started for assisting scheduling (GVMM
55	* mostly).
56	*
57	* The transition out of the STOPPED state is done by a vmR3PowerOn.
58	* The transition back to the STOPPED state is done by vmR3PowerOff.
59	*
60	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
61	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
62	*/
63	typedef enum VMCPUSTATE
64	{
65	/** The customary invalid zero. */
66	VMCPUSTATE_INVALID = 0,
67
68	/** Virtual CPU has not yet been started. */
69	VMCPUSTATE_STOPPED,
70
71	/** CPU started. */
72	VMCPUSTATE_STARTED,
73	/** CPU started in HM context. */
74	VMCPUSTATE_STARTED_HM,
75	/** Executing guest code and can be poked (RC or STI bits of HM). */
76	VMCPUSTATE_STARTED_EXEC,
77	/** Executing guest code in the recompiler. */
78	VMCPUSTATE_STARTED_EXEC_REM,
79	/** Halted. */
80	VMCPUSTATE_STARTED_HALTED,
81
82	/** The end of valid virtual CPU states. */
83	VMCPUSTATE_END,
84
85	/** Ensure 32-bit type. */
86	VMCPUSTATE_32BIT_HACK = 0x7fffffff
87	} VMCPUSTATE;
88
89
90	/**
91	* The cross context virtual CPU structure.
92	*
93	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
94	*/
95	typedef struct VMCPU
96	{
97	/** Per CPU forced action.
98	* See the VMCPU_FF_* \#defines. Updated atomically. */
99	uint32_t volatile fLocalForcedActions; /* 0 */
100	/** The CPU state. */
101	VMCPUSTATE volatile enmState; /* 4 */
102
103	/** Pointer to the ring-3 UVMCPU structure. */
104	PUVMCPU pUVCpu; /* 8 */
105	/** Ring-3 Host Context VM Pointer. */
106	PVMR3 pVMR3; /* 16 / 12 */
107	/** Ring-0 Host Context VM Pointer. */
108	PVMR0 pVMR0; /* 24 / 16 */
109	/** Raw-mode Context VM Pointer. */
110	PVMRC pVMRC; /* 32 / 20 */
111	/** The CPU ID.
112	* This is the index into the VM::aCpu array. */
113	VMCPUID idCpu; /* 36 / 24 */
114	/** The native thread handle. */
115	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
116	/** The native R0 thread handle. (different from the R3 handle!) */
117	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
118	/** Which host CPU ID is this EMT running on.
119	* Only valid when in RC or HMR0 with scheduling disabled. */
120	RTCPUID volatile idHostCpu; /* 56 / 36 */
121	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
122	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
123	uint32_t volatile iHostCpuSet; /* 60 / 40 */
124
125	/** Trace groups enable flags. */
126	uint32_t fTraceGroups; /* 64 / 44 */
127	/** Align the structures below bit on a 64-byte boundary and make sure it starts
128	* at the same offset in both 64-bit and 32-bit builds.
129	*
130	* @remarks The alignments of the members that are larger than 48 bytes should be
131	* 64-byte for cache line reasons. structs containing small amounts of
132	* data could be lumped together at the end with a < 64 byte padding
133	* following it (to grow into and align the struct size).
134	* */
135	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 56 : 12+64];
136	/** State data for use by ad hoc profiling. */
137	uint32_t uAdHoc;
138	/** Profiling samples for use by ad hoc profiling. */
139	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
140
141	/** HM part. */
142	union
143	{
144	#ifdef ___HMInternal_h
145	struct HMCPU s;
146	#endif
147	uint8_t padding[5760]; /* multiple of 64 */
148	} hm;
149
150	/** EM part. */
151	union
152	{
153	#ifdef ___EMInternal_h
154	struct EMCPU s;
155	#endif
156	uint8_t padding[1408]; /* multiple of 64 */
157	} em;
158
159	/** IEM part. */
160	union
161	{
162	#ifdef ___IEMInternal_h
163	struct IEMCPU s;
164	#endif
165	uint8_t padding[3072]; /* multiple of 64 */
166	} iem;
167
168	/** TRPM part. */
169	union
170	{
171	#ifdef ___TRPMInternal_h
172	struct TRPMCPU s;
173	#endif
174	uint8_t padding[128]; /* multiple of 64 */
175	} trpm;
176
177	/** TM part. */
178	union
179	{
180	#ifdef ___TMInternal_h
181	struct TMCPU s;
182	#endif
183	uint8_t padding[384]; /* multiple of 64 */
184	} tm;
185
186	/** VMM part. */
187	union
188	{
189	#ifdef ___VMMInternal_h
190	struct VMMCPU s;
191	#endif
192	uint8_t padding[704]; /* multiple of 64 */
193	} vmm;
194
195	/** PDM part. */
196	union
197	{
198	#ifdef ___PDMInternal_h
199	struct PDMCPU s;
200	#endif
201	uint8_t padding[256]; /* multiple of 64 */
202	} pdm;
203
204	/** IOM part. */
205	union
206	{
207	#ifdef ___IOMInternal_h
208	struct IOMCPU s;
209	#endif
210	uint8_t padding[512]; /* multiple of 64 */
211	} iom;
212
213	/** DBGF part.
214	* @todo Combine this with other tiny structures. */
215	union
216	{
217	#ifdef ___DBGFInternal_h
218	struct DBGFCPU s;
219	#endif
220	uint8_t padding[256]; /* multiple of 64 */
221	} dbgf;
222
223	/** GIM part. */
224	union
225	{
226	#ifdef ___GIMInternal_h
227	struct GIMCPU s;
228	#endif
229	uint8_t padding[64]; /* multiple of 64 */
230	} gim;
231
232	/** Align the following members on page boundary. */
233	uint8_t abAlignment2[3392];
234
235	/** PGM part. */
236	union
237	{
238	#ifdef ___PGMInternal_h
239	struct PGMCPU s;
240	#endif
241	uint8_t padding[4096]; /* multiple of 4096 */
242	} pgm;
243
244	/** CPUM part. */
245	union
246	{
247	#ifdef ___CPUMInternal_h
248	struct CPUMCPU s;
249	#endif
250	uint8_t padding[4096]; /* multiple of 4096 */
251	} cpum;
252
253	} VMCPU;
254
255
256	#ifndef VBOX_FOR_DTRACE_LIB
257
258	/** @name Operations on VMCPU::enmState
259	* @{ */
260	/** Gets the VMCPU state. */
261	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
262	/** Sets the VMCPU state. */
263	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
264	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
265	/** Cmpares and sets the VMCPU state. */
266	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
267	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
268	/** Checks the VMCPU state. */
269	#ifdef VBOX_STRICT
270	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
271	do { \
272	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
273	AssertMsg(enmState == (enmExpectedState), \
274	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
275	enmState, enmExpectedState, (pVCpu)->idCpu)); \
276	} while (0)
277	#else
278	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
279	#endif
280	/** Tests if the state means that the CPU is started. */
281	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
282	/** Tests if the state means that the CPU is stopped. */
283	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
284	/** @} */
285
286
287	/** The name of the raw-mode context VMM Core module. */
288	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
289	/** The name of the ring-0 context VMM Core module. */
290	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
291
292	/**
293	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
294	*/
295	#ifdef VBOX_WITH_RAW_MODE
296	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
297	#else
298	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
299	#endif
300
301
302	/** VM Forced Action Flags.
303	*
304	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
305	* action mask of a VM.
306	*
307	* @{
308	*/
309	/** The virtual sync clock has been stopped, go to TM until it has been
310	* restarted... */
311	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
312	/** PDM Queues are pending. */
313	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
314	/** The bit number for VM_FF_PDM_QUEUES. */
315	#define VM_FF_PDM_QUEUES_BIT 3
316	/** PDM DMA transfers are pending. */
317	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
318	/** The bit number for VM_FF_PDM_DMA. */
319	#define VM_FF_PDM_DMA_BIT 4
320	/** This action forces the VM to call DBGF so DBGF can service debugger
321	* requests in the emulation thread.
322	* This action flag stays asserted till DBGF clears it.*/
323	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
324	/** The bit number for VM_FF_DBGF. */
325	#define VM_FF_DBGF_BIT 8
326	/** This action forces the VM to service pending requests from other
327	* thread or requests which must be executed in another context. */
328	#define VM_FF_REQUEST RT_BIT_32(9)
329	/** Check for VM state changes and take appropriate action. */
330	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
331	/** The bit number for VM_FF_CHECK_VM_STATE. */
332	#define VM_FF_CHECK_VM_STATE_BIT 10
333	/** Reset the VM. (postponed) */
334	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
335	/** The bit number for VM_FF_RESET. */
336	#define VM_FF_RESET_BIT 11
337	/** EMT rendezvous in VMM. */
338	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
339	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
340	#define VM_FF_EMT_RENDEZVOUS_BIT 12
341
342	/** PGM needs to allocate handy pages. */
343	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
344	/** PGM is out of memory.
345	* Abandon all loops and code paths which can be resumed and get up to the EM
346	* loops. */
347	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
348	/** PGM is about to perform a lightweight pool flush
349	* Guest SMP: all EMT threads should return to ring 3
350	*/
351	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
352	/** REM needs to be informed about handler changes. */
353	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
354	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
355	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
356	/** Suspend the VM - debug only. */
357	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
358
359
360	/** This action forces the VM to check any pending interrups on the APIC. */
361	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
362	/** This action forces the VM to check any pending interrups on the PIC. */
363	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
364	/** This action forces the VM to schedule and run pending timer (TM).
365	* @remarks Don't move - PATM compatibility. */
366	#define VMCPU_FF_TIMER RT_BIT_32(2)
367	/** This action forces the VM to check any pending NMIs. */
368	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
369	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
370	/** This action forces the VM to check any pending SMIs. */
371	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
372	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
373	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
374	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
375	/** This action forces the VCPU out of the halted state. */
376	#define VMCPU_FF_UNHALT RT_BIT_32(6)
377	/** Pending IEM action (bit number). */
378	#define VMCPU_FF_IEM_BIT 7
379	/** Pending IEM action (mask). */
380	#define VMCPU_FF_IEM RT_BIT_32(VMCPU_FF_IEM_BIT)
381	/** This action forces the VM to service pending requests from other
382	* thread or requests which must be executed in another context. */
383	#define VMCPU_FF_REQUEST RT_BIT_32(9)
384	/** This action forces the VM to service any pending updates to CR3 (used only
385	* by HM). */
386	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
387	/** This action forces the VM to service any pending updates to PAE PDPEs (used
388	* only by HM). */
389	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
390	/** This action forces the VM to resync the page tables before going
391	* back to execute guest code. (GLOBAL FLUSH) */
392	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
393	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
394	* (NON-GLOBAL FLUSH) */
395	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
396	/** Check for pending TLB shootdown actions (deprecated)
397	* Reserved for furture HM re-use if necessary / safe.
398	* Consumer: HM */
399	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_32(18)
400	/** Check for pending TLB flush action.
401	* Consumer: HM
402	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
403	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
404	/** The bit number for VMCPU_FF_TLB_FLUSH. */
405	#define VMCPU_FF_TLB_FLUSH_BIT 19
406	#ifdef VBOX_WITH_RAW_MODE
407	/** Check the interrupt and trap gates */
408	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
409	/** Check Guest's TSS ring 0 stack */
410	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
411	/** Check Guest's GDT table */
412	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
413	/** Check Guest's LDT table */
414	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
415	#endif /* VBOX_WITH_RAW_MODE */
416	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
417	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
418	/** Block injection of non-maskable interrupts to the guest. */
419	#define VMCPU_FF_BLOCK_NMIS RT_BIT_32(25)
420	#ifdef VBOX_WITH_RAW_MODE
421	/** CSAM needs to scan the page that's being executed */
422	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
423	/** CSAM needs to do some homework. */
424	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
425	#endif /* VBOX_WITH_RAW_MODE */
426	/** Force return to Ring-3. */
427	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
428
429	/** Externally VM forced actions. Used to quit the idle/wait loop. */
430	#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS)
431	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
432	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK (VMCPU_FF_REQUEST)
433
434	/** Externally forced VM actions. Used to quit the idle/wait loop. */
435	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
436	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
437	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
438	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \| VMCPU_FF_REQUEST \
439	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_UNHALT \
440	\| VMCPU_FF_TIMER)
441
442	/** High priority VM pre-execution actions. */
443	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
444	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
445	\| VM_FF_EMT_RENDEZVOUS)
446	/** High priority VMCPU pre-execution actions. */
447	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
448	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
449	\| VMCPU_FF_INHIBIT_INTERRUPTS \
450	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
451	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
452
453	/** High priority VM pre raw-mode execution mask. */
454	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
455	/** High priority VMCPU pre raw-mode execution mask. */
456	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
457	\| VMCPU_FF_INHIBIT_INTERRUPTS \
458	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
459	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
460
461	/** High priority post-execution actions. */
462	#define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY)
463	/** High priority post-execution actions. */
464	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
465	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \| VMCPU_FF_IEM)
466
467	/** Normal priority VM post-execution actions. */
468	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
469	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
470	/** Normal priority VMCPU post-execution actions. */
471	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
472
473	/** Normal priority VM actions. */
474	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_REM_HANDLER_NOTIFY \
475	\| VM_FF_EMT_RENDEZVOUS)
476	/** Normal priority VMCPU actions. */
477	#define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST \| VMCPU_FF_UNHALT)
478
479	/** Flags to clear before resuming guest execution. */
480	#define VMCPU_FF_RESUME_GUEST_MASK (VMCPU_FF_TO_R3)
481
482	/** VM Flags that cause the HM loops to go back to ring-3. */
483	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
484	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
485	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
486	#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_IEM)
487
488	/** High priority ring-0 VM pre HM-mode execution mask. */
489	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
490	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
491	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
492	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
493	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
494	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
495	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
496	\| VM_FF_PDM_DMA) )
497	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
498	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
499	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
500
501	/** All the forced VM flags. */
502	#define VM_FF_ALL_MASK (~0U)
503	/** All the forced VMCPU flags. */
504	#define VMCPU_FF_ALL_MASK (~0U)
505
506	/** All the forced VM flags except those related to raw-mode and hardware
507	* assisted execution. */
508	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NO_MEMORY)
509	/** All the forced VMCPU flags except those related to raw-mode and hardware
510	* assisted execution. */
511	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
512	\| VMCPU_FF_TLB_FLUSH \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
513	/** @} */
514
515	/** @def VM_FF_SET
516	* Sets a force action flag.
517	*
518	* @param pVM The cross context VM structure.
519	* @param fFlag The flag to set.
520	*/
521	#if 1
522	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
523	#else
524	# define VM_FF_SET(pVM, fFlag) \
525	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
526	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
527	} while (0)
528	#endif
529
530	/** @def VMCPU_FF_SET
531	* Sets a force action flag for the given VCPU.
532	*
533	* @param pVCpu The cross context virtual CPU structure.
534	* @param fFlag The flag to set.
535	*/
536	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
537
538	/** @def VM_FF_CLEAR
539	* Clears a force action flag.
540	*
541	* @param pVM The cross context VM structure.
542	* @param fFlag The flag to clear.
543	*/
544	#if 1
545	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
546	#else
547	# define VM_FF_CLEAR(pVM, fFlag) \
548	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
549	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
550	} while (0)
551	#endif
552
553	/** @def VMCPU_FF_CLEAR
554	* Clears a force action flag for the given VCPU.
555	*
556	* @param pVCpu The cross context virtual CPU structure.
557	* @param fFlag The flag to clear.
558	*/
559	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
560
561	/** @def VM_FF_IS_SET
562	* Checks if a force action flag is set.
563	*
564	* @param pVM The cross context VM structure.
565	* @param fFlag The flag to check.
566	*/
567	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
568
569	/** @def VMCPU_FF_IS_SET
570	* Checks if a force action flag is set for the given VCPU.
571	*
572	* @param pVCpu The cross context virtual CPU structure.
573	* @param fFlag The flag to check.
574	*/
575	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
576
577	/** @def VM_FF_IS_PENDING
578	* Checks if one or more force action in the specified set is pending.
579	*
580	* @param pVM The cross context VM structure.
581	* @param fFlags The flags to check for.
582	*/
583	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
584
585	/** @def VM_FF_TEST_AND_CLEAR
586	* Checks if one (!) force action in the specified set is pending and clears it atomically
587	*
588	* @returns true if the bit was set.
589	* @returns false if the bit was clear.
590	* @param pVM The cross context VM structure.
591	* @param iBit Bit position to check and clear
592	*/
593	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
594
595	/** @def VMCPU_FF_TEST_AND_CLEAR
596	* Checks if one (!) force action in the specified set is pending and clears it atomically
597	*
598	* @returns true if the bit was set.
599	* @returns false if the bit was clear.
600	* @param pVCpu The cross context virtual CPU structure.
601	* @param iBit Bit position to check and clear
602	*/
603	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
604
605	/** @def VMCPU_FF_IS_PENDING
606	* Checks if one or more force action in the specified set is pending for the given VCPU.
607	*
608	* @param pVCpu The cross context virtual CPU structure.
609	* @param fFlags The flags to check for.
610	*/
611	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
612
613	/** @def VM_FF_IS_PENDING_EXCEPT
614	* Checks if one or more force action in the specified set is pending while one
615	* or more other ones are not.
616	*
617	* @param pVM The cross context VM structure.
618	* @param fFlags The flags to check for.
619	* @param fExcpt The flags that should not be set.
620	*/
621	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
622
623	/** @def VMCPU_FF_IS_PENDING_EXCEPT
624	* Checks if one or more force action in the specified set is pending for the given
625	* VCPU while one or more other ones are not.
626	*
627	* @param pVCpu The cross context virtual CPU structure.
628	* @param fFlags The flags to check for.
629	* @param fExcpt The flags that should not be set.
630	*/
631	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
632
633	/** @def VM_IS_EMT
634	* Checks if the current thread is the emulation thread (EMT).
635	*
636	* @remark The ring-0 variation will need attention if we expand the ring-0
637	* code to let threads other than EMT mess around with the VM.
638	*/
639	#ifdef IN_RC
640	# define VM_IS_EMT(pVM) true
641	#else
642	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
643	#endif
644
645	/** @def VMCPU_IS_EMT
646	* Checks if the current thread is the emulation thread (EMT) for the specified
647	* virtual CPU.
648	*/
649	#ifdef IN_RC
650	# define VMCPU_IS_EMT(pVCpu) true
651	#else
652	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
653	#endif
654
655	/** @def VM_ASSERT_EMT
656	* Asserts that the current thread IS the emulation thread (EMT).
657	*/
658	#ifdef IN_RC
659	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
660	#elif defined(IN_RING0)
661	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
662	#else
663	# define VM_ASSERT_EMT(pVM) \
664	AssertMsg(VM_IS_EMT(pVM), \
665	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
666	#endif
667
668	/** @def VMCPU_ASSERT_EMT
669	* Asserts that the current thread IS the emulation thread (EMT) of the
670	* specified virtual CPU.
671	*/
672	#ifdef IN_RC
673	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
674	#elif defined(IN_RING0)
675	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
676	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
677	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
678	(pVCpu) ? (pVCpu)->idCpu : 0))
679	#else
680	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
681	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
682	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
683	#endif
684
685	/** @def VM_ASSERT_EMT_RETURN
686	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
687	*/
688	#ifdef IN_RC
689	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
690	#elif defined(IN_RING0)
691	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
692	#else
693	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
694	AssertMsgReturn(VM_IS_EMT(pVM), \
695	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
696	(rc))
697	#endif
698
699	/** @def VMCPU_ASSERT_EMT_RETURN
700	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
701	*/
702	#ifdef IN_RC
703	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
704	#elif defined(IN_RING0)
705	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
706	#else
707	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
708	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
709	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
710	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
711	(rc))
712	#endif
713
714	/** @def VMCPU_ASSERT_EMT_OR_GURU
715	* Asserts that the current thread IS the emulation thread (EMT) of the
716	* specified virtual CPU.
717	*/
718	#if defined(IN_RC) \|\| defined(IN_RING0)
719	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
720	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
721	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
722	#else
723	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
724	AssertMsg( VMCPU_IS_EMT(pVCpu) \
725	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
726	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
727	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
728	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
729	#endif
730
731	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
732	* Asserts that the current thread IS the emulation thread (EMT) of the
733	* specified virtual CPU when the VM is running.
734	*/
735	#if defined(IN_RC) \|\| defined(IN_RING0)
736	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
737	Assert( VMCPU_IS_EMT(pVCpu) \
738	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
739	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
740	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT )
741	#else
742	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
743	AssertMsg( VMCPU_IS_EMT(pVCpu) \
744	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING \
745	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_LS \
746	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_RUNNING_FT, \
747	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
748	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
749	#endif
750
751	/** @def VM_ASSERT_EMT0
752	* Asserts that the current thread IS emulation thread \#0 (EMT0).
753	*/
754	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
755
756	/** @def VM_ASSERT_EMT0_RETURN
757	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
758	* it isn't.
759	*/
760	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
761
762
763	/**
764	* Asserts that the current thread is NOT the emulation thread.
765	*/
766	#define VM_ASSERT_OTHER_THREAD(pVM) \
767	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
768
769
770	/** @def VM_ASSERT_STATE_RETURN
771	* Asserts a certain VM state.
772	*/
773	#define VM_ASSERT_STATE(pVM, _enmState) \
774	AssertMsg((pVM)->enmVMState == (_enmState), \
775	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
776
777	/** @def VM_ASSERT_STATE_RETURN
778	* Asserts a certain VM state and returns if it doesn't match.
779	*/
780	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
781	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
782	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
783	(rc))
784
785	/** @def VM_IS_VALID_EXT
786	* Asserts a the VM handle is valid for external access, i.e. not being destroy
787	* or terminated. */
788	#define VM_IS_VALID_EXT(pVM) \
789	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
790	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
791	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
792	&& VM_IS_EMT(pVM))) )
793
794	/** @def VM_ASSERT_VALID_EXT_RETURN
795	* Asserts a the VM handle is valid for external access, i.e. not being
796	* destroy or terminated.
797	*/
798	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
799	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
800	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
801	? VMGetStateName(pVM->enmVMState) : ""), \
802	(rc))
803
804	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
805	* Asserts a the VMCPU handle is valid for external access, i.e. not being
806	* destroy or terminated.
807	*/
808	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
809	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
810	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
811	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
812	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
813	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
814	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
815	(rc))
816
817	#endif /* !VBOX_FOR_DTRACE_LIB */
818
819
820
821	/**
822	* The cross context VM structure.
823	*
824	* It contains all the VM data which have to be available in all contexts.
825	* Even if it contains all the data the idea is to use APIs not to modify all
826	* the members all around the place. Therefore we make use of unions to hide
827	* everything which isn't local to the current source module. This means we'll
828	* have to pay a little bit of attention when adding new members to structures
829	* in the unions and make sure to keep the padding sizes up to date.
830	*
831	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
832	*/
833	typedef struct VM
834	{
835	/** The state of the VM.
836	* This field is read only to everyone except the VM and EM. */
837	VMSTATE volatile enmVMState;
838	/** Forced action flags.
839	* See the VM_FF_* \#defines. Updated atomically.
840	*/
841	volatile uint32_t fGlobalForcedActions;
842	/** Pointer to the array of page descriptors for the VM structure allocation. */
843	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
844	/** Session handle. For use when calling SUPR0 APIs. */
845	PSUPDRVSESSION pSession;
846	/** Pointer to the ring-3 VM structure. */
847	PUVM pUVM;
848	/** Ring-3 Host Context VM Pointer. */
849	R3PTRTYPE(struct VM *) pVMR3;
850	/** Ring-0 Host Context VM Pointer. */
851	R0PTRTYPE(struct VM *) pVMR0;
852	/** Raw-mode Context VM Pointer. */
853	RCPTRTYPE(struct VM *) pVMRC;
854
855	/** The GVM VM handle. Only the GVM should modify this field. */
856	uint32_t hSelf;
857	/** Number of virtual CPUs. */
858	uint32_t cCpus;
859	/** CPU excution cap (1-100) */
860	uint32_t uCpuExecutionCap;
861
862	/** Size of the VM structure including the VMCPU array. */
863	uint32_t cbSelf;
864
865	/** Offset to the VMCPU array starting from beginning of this structure. */
866	uint32_t offVMCPU;
867
868	/**
869	* VMMSwitcher assembly entry point returning to host context.
870	*
871	* Depending on how the host handles the rc status given in @a eax, this may
872	* return and let the caller resume whatever it was doing prior to the call.
873	*
874	*
875	* @param eax The return code, register.
876	* @remark Assume interrupts disabled.
877	* @remark This method pointer lives here because TRPM needs it.
878	*/
879	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
880
881	/**
882	* VMMSwitcher assembly entry point returning to host context without saving the
883	* raw-mode context (hyper) registers.
884	*
885	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
886	* expects the caller to save a RC context in CPUM where one might return if the
887	* return code indicate that this is possible.
888	*
889	* This method pointer lives here because TRPM needs it.
890	*
891	* @param eax The return code, register.
892	* @remark Assume interrupts disabled.
893	* @remark This method pointer lives here because TRPM needs it.
894	*/
895	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
896
897	/** @name Various items that are frequently accessed.
898	* @{ */
899	/** Whether to recompile user mode code or run it raw/hm. */
900	bool fRecompileUser;
901	/** Whether to recompile supervisor mode code or run it raw/hm. */
902	bool fRecompileSupervisor;
903	/** Whether raw mode supports ring-1 code or not. */
904	bool fRawRing1Enabled;
905	/** PATM enabled flag.
906	* This is placed here for performance reasons. */
907	bool fPATMEnabled;
908	/** CSAM enabled flag.
909	* This is placed here for performance reasons. */
910	bool fCSAMEnabled;
911	/** Hardware VM support is available and enabled.
912	* Determined very early during init.
913	* This is placed here for performance reasons. */
914	bool fHMEnabled;
915	/** For asserting on fHMEnable usage. */
916	bool fHMEnabledFixed;
917	/** Hardware VM support requires a minimal raw-mode context.
918	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
919	bool fHMNeedRawModeCtx;
920	/** Set when this VM is the master FT node.
921	* @todo This doesn't need to be here, FTM should store it in it's own
922	* structures instead. */
923	bool fFaultTolerantMaster;
924	/** Large page enabled flag.
925	* @todo This doesn't need to be here, PGM should store it in it's own
926	* structures instead. */
927	bool fUseLargePages;
928	/** @} */
929
930	/** Alignment padding. */
931	uint8_t uPadding1[2];
932
933	/** @name Debugging
934	* @{ */
935	/** Raw-mode Context VM Pointer. */
936	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
937	/** Ring-3 Host Context VM Pointer. */
938	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
939	/** Ring-0 Host Context VM Pointer. */
940	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
941	/** @} */
942
943	#if HC_ARCH_BITS == 32
944	/** Alignment padding. */
945	uint32_t uPadding2;
946	#endif
947
948	/** @name Switcher statistics (remove)
949	* @{ */
950	/** Profiling the total time from Qemu to GC. */
951	STAMPROFILEADV StatTotalQemuToGC;
952	/** Profiling the total time from GC to Qemu. */
953	STAMPROFILEADV StatTotalGCToQemu;
954	/** Profiling the total time spent in GC. */
955	STAMPROFILEADV StatTotalInGC;
956	/** Profiling the total time spent not in Qemu. */
957	STAMPROFILEADV StatTotalInQemu;
958	/** Profiling the VMMSwitcher code for going to GC. */
959	STAMPROFILEADV StatSwitcherToGC;
960	/** Profiling the VMMSwitcher code for going to HC. */
961	STAMPROFILEADV StatSwitcherToHC;
962	STAMPROFILEADV StatSwitcherSaveRegs;
963	STAMPROFILEADV StatSwitcherSysEnter;
964	STAMPROFILEADV StatSwitcherDebug;
965	STAMPROFILEADV StatSwitcherCR0;
966	STAMPROFILEADV StatSwitcherCR4;
967	STAMPROFILEADV StatSwitcherJmpCR3;
968	STAMPROFILEADV StatSwitcherRstrRegs;
969	STAMPROFILEADV StatSwitcherLgdt;
970	STAMPROFILEADV StatSwitcherLidt;
971	STAMPROFILEADV StatSwitcherLldt;
972	STAMPROFILEADV StatSwitcherTSS;
973	/** @} */
974
975	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
976	* must start at the same offset on both 64-bit and 32-bit hosts. */
977	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
978
979	/** CPUM part. */
980	union
981	{
982	#ifdef ___CPUMInternal_h
983	struct CPUM s;
984	#endif
985	#ifdef ___VBox_vmm_cpum_h
986	/** Read only info exposed about the host and guest CPUs. */
987	struct
988	{
989	/** Padding for hidden fields. */
990	uint8_t abHidden0[64];
991	/** Host CPU feature information. */
992	CPUMFEATURES HostFeatures;
993	/** Guest CPU feature information. */
994	CPUMFEATURES GuestFeatures;
995	} const ro;
996	#endif
997	uint8_t padding[1536]; /* multiple of 64 */
998	} cpum;
999
1000	/** VMM part. */
1001	union
1002	{
1003	#ifdef ___VMMInternal_h
1004	struct VMM s;
1005	#endif
1006	uint8_t padding[1600]; /* multiple of 64 */
1007	} vmm;
1008
1009	/** PGM part. */
1010	union
1011	{
1012	#ifdef ___PGMInternal_h
1013	struct PGM s;
1014	#endif
1015	uint8_t padding[40962+6080]; / multiple of 64 */
1016	} pgm;
1017
1018	/** HM part. */
1019	union
1020	{
1021	#ifdef ___HMInternal_h
1022	struct HM s;
1023	#endif
1024	uint8_t padding[5440]; /* multiple of 64 */
1025	} hm;
1026
1027	/** TRPM part. */
1028	union
1029	{
1030	#ifdef ___TRPMInternal_h
1031	struct TRPM s;
1032	#endif
1033	uint8_t padding[5248]; /* multiple of 64 */
1034	} trpm;
1035
1036	/** SELM part. */
1037	union
1038	{
1039	#ifdef ___SELMInternal_h
1040	struct SELM s;
1041	#endif
1042	uint8_t padding[768]; /* multiple of 64 */
1043	} selm;
1044
1045	/** MM part. */
1046	union
1047	{
1048	#ifdef ___MMInternal_h
1049	struct MM s;
1050	#endif
1051	uint8_t padding[192]; /* multiple of 64 */
1052	} mm;
1053
1054	/** PDM part. */
1055	union
1056	{
1057	#ifdef ___PDMInternal_h
1058	struct PDM s;
1059	#endif
1060	uint8_t padding[1920]; /* multiple of 64 */
1061	} pdm;
1062
1063	/** IOM part. */
1064	union
1065	{
1066	#ifdef ___IOMInternal_h
1067	struct IOM s;
1068	#endif
1069	uint8_t padding[896]; /* multiple of 64 */
1070	} iom;
1071
1072	/** PATM part. */
1073	union
1074	{
1075	#ifdef ___PATMInternal_h
1076	struct PATM s;
1077	#endif
1078	uint8_t padding[768]; /* multiple of 64 */
1079	} patm;
1080
1081	/** CSAM part. */
1082	union
1083	{
1084	#ifdef ___CSAMInternal_h
1085	struct CSAM s;
1086	#endif
1087	uint8_t padding[1088]; /* multiple of 64 */
1088	} csam;
1089
1090	/** EM part. */
1091	union
1092	{
1093	#ifdef ___EMInternal_h
1094	struct EM s;
1095	#endif
1096	uint8_t padding[256]; /* multiple of 64 */
1097	} em;
1098
1099	/** TM part. */
1100	union
1101	{
1102	#ifdef ___TMInternal_h
1103	struct TM s;
1104	#endif
1105	uint8_t padding[2496]; /* multiple of 64 */
1106	} tm;
1107
1108	/** DBGF part. */
1109	union
1110	{
1111	#ifdef ___DBGFInternal_h
1112	struct DBGF s;
1113	#endif
1114	#ifdef ___VBox_vmm_dbgf_h
1115	/** Read only info exposed about interrupt breakpoints and selected events. */
1116	struct
1117	{
1118	/** Bitmap of enabled hardware interrupt breakpoints. */
1119	uint32_t bmHardIntBreakpoints[256 / 32];
1120	/** Bitmap of enabled software interrupt breakpoints. */
1121	uint32_t bmSoftIntBreakpoints[256 / 32];
1122	/** Bitmap of selected events.
1123	* This includes non-selectable events too for simplicity, we maintain the
1124	* state for some of these, as it may come in handy. */
1125	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1126	/** Enabled hardware interrupt breakpoints. */
1127	uint32_t cHardIntBreakpoints;
1128	/** Enabled software interrupt breakpoints. */
1129	uint32_t cSoftIntBreakpoints;
1130	/** Number of selected events. */
1131	uint32_t cSelectedEvents;
1132	} const ro;
1133	#endif
1134	uint8_t padding[2368]; /* multiple of 64 */
1135	} dbgf;
1136
1137	/** SSM part. */
1138	union
1139	{
1140	#ifdef ___SSMInternal_h
1141	struct SSM s;
1142	#endif
1143	uint8_t padding[128]; /* multiple of 64 */
1144	} ssm;
1145
1146	/** FTM part. */
1147	union
1148	{
1149	#ifdef ___FTMInternal_h
1150	struct FTM s;
1151	#endif
1152	uint8_t padding[512]; /* multiple of 64 */
1153	} ftm;
1154
1155	/** REM part. */
1156	union
1157	{
1158	#ifdef ___REMInternal_h
1159	struct REM s;
1160	#endif
1161	uint8_t padding[0x11100]; /* multiple of 64 */
1162	} rem;
1163
1164	union
1165	{
1166	#ifdef ___GIMInternal_h
1167	struct GIM s;
1168	#endif
1169	uint8_t padding[448]; /* multiple of 64 */
1170	} gim;
1171
1172	/* ---- begin small stuff ---- */
1173
1174	/** VM part. */
1175	union
1176	{
1177	#ifdef ___VMInternal_h
1178	struct VMINT s;
1179	#endif
1180	uint8_t padding[24]; /* multiple of 8 */
1181	} vm;
1182
1183	/** CFGM part. */
1184	union
1185	{
1186	#ifdef ___CFGMInternal_h
1187	struct CFGM s;
1188	#endif
1189	uint8_t padding[8]; /* multiple of 8 */
1190	} cfgm;
1191
1192
1193	/** Padding for aligning the cpu array on a page boundary. */
1194	uint8_t abAlignment2[3998];
1195
1196	/* ---- end small stuff ---- */
1197
1198	/** VMCPU array for the configured number of virtual CPUs.
1199	* Must be aligned on a page boundary for TLB hit reasons as well as
1200	* alignment of VMCPU members. */
1201	VMCPU aCpus[1];
1202	} VM;
1203
1204
1205	#ifdef IN_RC
1206	RT_C_DECLS_BEGIN
1207
1208	/** The VM structure.
1209	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1210	* globals which we should avoid using.
1211	*/
1212	extern DECLIMPORT(VM) g_VM;
1213
1214	RT_C_DECLS_END
1215	#endif
1216
1217	/** @} */
1218
1219	#endif
1220

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/include/VBox/vmm/vm.h@ 60188

Download in other formats: