vm.h@ 71091

Last change on this file since 71091 was 71075, checked in by vboxsync, 7 years ago
VMM,SUPDrv: More NEM/win experimentation. bugref:9044
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2017 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef ___VBox_vmm_vm_h
27	#define ___VBox_vmm_vm_h
28
29	#ifndef VBOX_FOR_DTRACE_LIB
30	# include <iprt/param.h>
31	# include <VBox/types.h>
32	# include <VBox/vmm/cpum.h>
33	# include <VBox/vmm/stam.h>
34	# include <VBox/vmm/vmapi.h>
35	# include <VBox/vmm/vmm.h>
36	# include <VBox/sup.h>
37	#else
38	# pragma D depends_on library vbox-types.d
39	# pragma D depends_on library CPUMInternal.d
40	# define ___CPUMInternal_h
41	#endif
42
43
44
45	/** @defgroup grp_vm The Virtual Machine
46	* @ingroup grp_vmm
47	* @{
48	*/
49
50	/**
51	* The state of a Virtual CPU.
52	*
53	* The basic state indicated here is whether the CPU has been started or not. In
54	* addition, there are sub-states when started for assisting scheduling (GVMM
55	* mostly).
56	*
57	* The transition out of the STOPPED state is done by a vmR3PowerOn.
58	* The transition back to the STOPPED state is done by vmR3PowerOff.
59	*
60	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
61	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
62	*/
63	typedef enum VMCPUSTATE
64	{
65	/** The customary invalid zero. */
66	VMCPUSTATE_INVALID = 0,
67
68	/** Virtual CPU has not yet been started. */
69	VMCPUSTATE_STOPPED,
70
71	/** CPU started. */
72	VMCPUSTATE_STARTED,
73	/** CPU started in HM context. */
74	VMCPUSTATE_STARTED_HM,
75	/** Executing guest code and can be poked (RC or STI bits of HM). */
76	VMCPUSTATE_STARTED_EXEC,
77	/** Executing guest code in the recompiler. */
78	VMCPUSTATE_STARTED_EXEC_REM,
79	/** Executing guest code using NEM. */
80	VMCPUSTATE_STARTED_EXEC_NEM,
81	/** Halted. */
82	VMCPUSTATE_STARTED_HALTED,
83
84	/** The end of valid virtual CPU states. */
85	VMCPUSTATE_END,
86
87	/** Ensure 32-bit type. */
88	VMCPUSTATE_32BIT_HACK = 0x7fffffff
89	} VMCPUSTATE;
90
91
92	/**
93	* The cross context virtual CPU structure.
94	*
95	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
96	*/
97	typedef struct VMCPU
98	{
99	/** Per CPU forced action.
100	* See the VMCPU_FF_* \#defines. Updated atomically. */
101	uint32_t volatile fLocalForcedActions; /* 0 */
102	/** The CPU state. */
103	VMCPUSTATE volatile enmState; /* 4 */
104
105	/** Pointer to the ring-3 UVMCPU structure. */
106	PUVMCPU pUVCpu; /* 8 */
107	/** Ring-3 Host Context VM Pointer. */
108	PVMR3 pVMR3; /* 16 / 12 */
109	/** Ring-0 Host Context VM Pointer. */
110	PVMR0 pVMR0; /* 24 / 16 */
111	/** Raw-mode Context VM Pointer. */
112	PVMRC pVMRC; /* 32 / 20 */
113	/** The CPU ID.
114	* This is the index into the VM::aCpu array. */
115	VMCPUID idCpu; /* 36 / 24 */
116	/** The native thread handle. */
117	RTNATIVETHREAD hNativeThread; /* 40 / 28 */
118	/** The native R0 thread handle. (different from the R3 handle!) */
119	RTNATIVETHREAD hNativeThreadR0; /* 48 / 32 */
120	/** Which host CPU ID is this EMT running on.
121	* Only valid when in RC or HMR0 with scheduling disabled. */
122	RTCPUID volatile idHostCpu; /* 56 / 36 */
123	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
124	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
125	uint32_t volatile iHostCpuSet; /* 60 / 40 */
126
127	#if HC_ARCH_BITS == 32
128	/** Align the structures below bit on a 64-byte boundary and make sure it starts
129	* at the same offset in both 64-bit and 32-bit builds.
130	*
131	* @remarks The alignments of the members that are larger than 48 bytes should be
132	* 64-byte for cache line reasons. structs containing small amounts of
133	* data could be lumped together at the end with a < 64 byte padding
134	* following it (to grow into and align the struct size).
135	*/
136	uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 0 : 20];
137	#endif
138
139	/** IEM part.
140	* @remarks This comes first as it allows the use of 8-bit immediates for the
141	* first 64 bytes of the structure, reducing code size a wee bit. */
142	#ifdef ___IEMInternal_h /* For PDB hacking. */
143	union VMCPUUNIONIEMFULL
144	#else
145	union VMCPUUNIONIEMSTUB
146	#endif
147	{
148	#ifdef ___IEMInternal_h
149	struct IEMCPU s;
150	#endif
151	uint8_t padding[18496]; /* multiple of 64 */
152	} iem;
153
154	/** HM part. */
155	union VMCPUUNIONHM
156	{
157	#ifdef ___HMInternal_h
158	struct HMCPU s;
159	#endif
160	uint8_t padding[5824]; /* multiple of 64 */
161	} hm;
162
163	/** EM part. */
164	union VMCPUUNIONEM
165	{
166	#ifdef ___EMInternal_h
167	struct EMCPU s;
168	#endif
169	uint8_t padding[1408]; /* multiple of 64 */
170	} em;
171
172	/** NEM part. */
173	union VMCPUUNIONNEM
174	{
175	#ifdef ___NEMInternal_h
176	struct NEMCPU s;
177	#endif
178	uint8_t padding[256]; /* multiple of 64 */
179	} nem;
180
181	/** TRPM part. */
182	union VMCPUUNIONTRPM
183	{
184	#ifdef ___TRPMInternal_h
185	struct TRPMCPU s;
186	#endif
187	uint8_t padding[128]; /* multiple of 64 */
188	} trpm;
189
190	/** TM part. */
191	union VMCPUUNIONTM
192	{
193	#ifdef ___TMInternal_h
194	struct TMCPU s;
195	#endif
196	uint8_t padding[384]; /* multiple of 64 */
197	} tm;
198
199	/** VMM part. */
200	union VMCPUUNIONVMM
201	{
202	#ifdef ___VMMInternal_h
203	struct VMMCPU s;
204	#endif
205	uint8_t padding[704]; /* multiple of 64 */
206	} vmm;
207
208	/** PDM part. */
209	union VMCPUUNIONPDM
210	{
211	#ifdef ___PDMInternal_h
212	struct PDMCPU s;
213	#endif
214	uint8_t padding[256]; /* multiple of 64 */
215	} pdm;
216
217	/** IOM part. */
218	union VMCPUUNIONIOM
219	{
220	#ifdef ___IOMInternal_h
221	struct IOMCPU s;
222	#endif
223	uint8_t padding[512]; /* multiple of 64 */
224	} iom;
225
226	/** DBGF part.
227	* @todo Combine this with other tiny structures. */
228	union VMCPUUNIONDBGF
229	{
230	#ifdef ___DBGFInternal_h
231	struct DBGFCPU s;
232	#endif
233	uint8_t padding[256]; /* multiple of 64 */
234	} dbgf;
235
236	/** GIM part. */
237	union VMCPUUNIONGIM
238	{
239	#ifdef ___GIMInternal_h
240	struct GIMCPU s;
241	#endif
242	uint8_t padding[512]; /* multiple of 64 */
243	} gim;
244
245	/** APIC part. */
246	union VMCPUUNIONAPIC
247	{
248	#ifdef ___APICInternal_h
249	struct APICCPU s;
250	#endif
251	uint8_t padding[1792]; /* multiple of 64 */
252	} apic;
253
254	/*
255	* Some less frequently used global members that doesn't need to take up
256	* precious space at the head of the structure.
257	*/
258
259	/** Trace groups enable flags. */
260	uint32_t fTraceGroups; /* 64 / 44 */
261	/** State data for use by ad hoc profiling. */
262	uint32_t uAdHoc;
263	/** Profiling samples for use by ad hoc profiling. */
264	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
265
266	/** Align the following members on page boundary. */
267	uint8_t abAlignment2[1848];
268
269	/** PGM part. */
270	union VMCPUUNIONPGM
271	{
272	#ifdef ___PGMInternal_h
273	struct PGMCPU s;
274	#endif
275	uint8_t padding[4096]; /* multiple of 4096 */
276	} pgm;
277
278	/** CPUM part. */
279	union VMCPUUNIONCPUM
280	{
281	#ifdef ___CPUMInternal_h
282	struct CPUMCPU s;
283	#endif
284	#ifdef VMCPU_INCL_CPUM_GST_CTX
285	/** The guest CPUM context for direct use by execution engines.
286	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
287	* others. The rest will use the function based CPUM API. */
288	CPUMCTX GstCtx;
289	#endif
290	uint8_t padding[4096]; /* multiple of 4096 */
291	} cpum;
292	} VMCPU;
293
294
295	#ifndef VBOX_FOR_DTRACE_LIB
296
297	/** @name Operations on VMCPU::enmState
298	* @{ */
299	/** Gets the VMCPU state. */
300	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
301	/** Sets the VMCPU state. */
302	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
303	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
304	/** Cmpares and sets the VMCPU state. */
305	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
306	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
307	/** Checks the VMCPU state. */
308	#ifdef VBOX_STRICT
309	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
310	do { \
311	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
312	AssertMsg(enmState == (enmExpectedState), \
313	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
314	enmState, enmExpectedState, (pVCpu)->idCpu)); \
315	} while (0)
316	#else
317	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
318	#endif
319	/** Tests if the state means that the CPU is started. */
320	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
321	/** Tests if the state means that the CPU is stopped. */
322	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
323	/** @} */
324
325
326	/** The name of the raw-mode context VMM Core module. */
327	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
328	/** The name of the ring-0 context VMM Core module. */
329	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
330
331	/**
332	* Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
333	*/
334	#ifdef VBOX_WITH_RAW_MODE
335	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr
336	#else
337	# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr
338	#endif
339
340
341	/** VM Forced Action Flags.
342	*
343	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
344	* action mask of a VM.
345	*
346	* Available VM bits:
347	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
348	*
349	*
350	* Available VMCPU bits:
351	* 11, 14, 15, 31
352	*
353	* @todo If we run low on VMCPU, we may consider merging the SELM bits
354	*
355	* @{
356	*/
357	/** The virtual sync clock has been stopped, go to TM until it has been
358	* restarted... */
359	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(2)
360	/** PDM Queues are pending. */
361	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
362	/** The bit number for VM_FF_PDM_QUEUES. */
363	#define VM_FF_PDM_QUEUES_BIT 3
364	/** PDM DMA transfers are pending. */
365	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
366	/** The bit number for VM_FF_PDM_DMA. */
367	#define VM_FF_PDM_DMA_BIT 4
368	/** This action forces the VM to call DBGF so DBGF can service debugger
369	* requests in the emulation thread.
370	* This action flag stays asserted till DBGF clears it.*/
371	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
372	/** The bit number for VM_FF_DBGF. */
373	#define VM_FF_DBGF_BIT 8
374	/** This action forces the VM to service pending requests from other
375	* thread or requests which must be executed in another context. */
376	#define VM_FF_REQUEST RT_BIT_32(9)
377	/** Check for VM state changes and take appropriate action. */
378	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
379	/** The bit number for VM_FF_CHECK_VM_STATE. */
380	#define VM_FF_CHECK_VM_STATE_BIT 10
381	/** Reset the VM. (postponed) */
382	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
383	/** The bit number for VM_FF_RESET. */
384	#define VM_FF_RESET_BIT 11
385	/** EMT rendezvous in VMM. */
386	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
387	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
388	#define VM_FF_EMT_RENDEZVOUS_BIT 12
389
390	/** PGM needs to allocate handy pages. */
391	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(18)
392	/** PGM is out of memory.
393	* Abandon all loops and code paths which can be resumed and get up to the EM
394	* loops. */
395	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(19)
396	/** PGM is about to perform a lightweight pool flush
397	* Guest SMP: all EMT threads should return to ring 3
398	*/
399	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(20)
400	/** REM needs to be informed about handler changes. */
401	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
402	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
403	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
404	/** Suspend the VM - debug only. */
405	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(31)
406
407
408	/** This action forces the VM to check any pending interrupts on the APIC. */
409	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_32(0)
410	/** This action forces the VM to check any pending interrups on the PIC. */
411	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_32(1)
412	/** This action forces the VM to schedule and run pending timer (TM).
413	* @remarks Don't move - PATM compatibility. */
414	#define VMCPU_FF_TIMER RT_BIT_32(2)
415	/** This action forces the VM to check any pending NMIs. */
416	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
417	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_32(VMCPU_FF_INTERRUPT_NMI_BIT)
418	/** This action forces the VM to check any pending SMIs. */
419	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
420	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_32(VMCPU_FF_INTERRUPT_SMI_BIT)
421	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
422	#define VMCPU_FF_PDM_CRITSECT RT_BIT_32(5)
423	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
424	* the virtual CPU out of the next (/current) halted state. It is not processed
425	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
426	* is cleared the next time EM leaves the HALTED state. */
427	#define VMCPU_FF_UNHALT RT_BIT_32(6)
428	/** Pending IEM action (bit number). */
429	#define VMCPU_FF_IEM_BIT 7
430	/** Pending IEM action (mask). */
431	#define VMCPU_FF_IEM RT_BIT_32(VMCPU_FF_IEM_BIT)
432	/** Pending APIC action (bit number). */
433	#define VMCPU_FF_UPDATE_APIC_BIT 8
434	/** This action forces the VM to update APIC's asynchronously arrived
435	* interrupts as pending interrupts. */
436	#define VMCPU_FF_UPDATE_APIC RT_BIT_32(VMCPU_FF_UPDATE_APIC_BIT)
437	/** This action forces the VM to service pending requests from other
438	* thread or requests which must be executed in another context. */
439	#define VMCPU_FF_REQUEST RT_BIT_32(9)
440	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
441	#define VMCPU_FF_DBGF RT_BIT_32(VMCPU_FF_DBGF_BIT)
442	/** The bit number for VMCPU_FF_DBGF. */
443	#define VMCPU_FF_DBGF_BIT 10
444	/** This action forces the VM to service any pending updates to CR3 (used only
445	* by HM). */
446	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_32(12)
447	/** This action forces the VM to service any pending updates to PAE PDPEs (used
448	* only by HM). */
449	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_32(13)
450	/** This action forces the VM to resync the page tables before going
451	* back to execute guest code. (GLOBAL FLUSH) */
452	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_32(16)
453	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
454	* (NON-GLOBAL FLUSH) */
455	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_32(17)
456	/** Check for pending TLB shootdown actions (deprecated)
457	* Reserved for furture HM re-use if necessary / safe.
458	* Consumer: HM */
459	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_32(18)
460	/** Check for pending TLB flush action.
461	* Consumer: HM
462	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
463	#define VMCPU_FF_TLB_FLUSH RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
464	/** The bit number for VMCPU_FF_TLB_FLUSH. */
465	#define VMCPU_FF_TLB_FLUSH_BIT 19
466	#ifdef VBOX_WITH_RAW_MODE
467	/** Check the interrupt and trap gates */
468	# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20)
469	/** Check Guest's TSS ring 0 stack */
470	# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21)
471	/** Check Guest's GDT table */
472	# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22)
473	/** Check Guest's LDT table */
474	# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23)
475	#endif /* VBOX_WITH_RAW_MODE */
476	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
477	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24)
478	/** Block injection of non-maskable interrupts to the guest. */
479	#define VMCPU_FF_BLOCK_NMIS RT_BIT_32(25)
480	#ifdef VBOX_WITH_RAW_MODE
481	/** CSAM needs to scan the page that's being executed */
482	# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26)
483	/** CSAM needs to do some homework. */
484	# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27)
485	#endif /* VBOX_WITH_RAW_MODE */
486	/** Force return to Ring-3. */
487	#define VMCPU_FF_TO_R3 RT_BIT_32(28)
488	/** Force return to ring-3 to service pending I/O or MMIO write.
489	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
490	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
491	* status codes to be propagated at the same time without loss. */
492	#define VMCPU_FF_IOM RT_BIT_32(29)
493	#ifdef VBOX_WITH_RAW_MODE
494	/** CPUM need to adjust CR0.TS/EM before executing raw-mode code again. */
495	# define VMCPU_FF_CPUM RT_BIT_32(VMCPU_FF_CPUM_BIT)
496	/** The bit number for VMCPU_FF_CPUM. */
497	# define VMCPU_FF_CPUM_BIT 30
498	#endif /* VBOX_WITH_RAW_MODE */
499	/** Hardware virtualized nested-guest interrupt pending. */
500	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_32(31)
501
502	/** Externally VM forced actions. Used to quit the idle/wait loop. */
503	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
504	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
505	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
506
507	/** Externally forced VM actions. Used to quit the idle/wait loop. */
508	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
509	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
510	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
511	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
512	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
513	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF )
514
515	/** High priority VM pre-execution actions. */
516	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
517	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
518	\| VM_FF_EMT_RENDEZVOUS )
519	/** High priority VMCPU pre-execution actions. */
520	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
521	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
522	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
523	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
524	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0 ) )
525
526	/** High priority VM pre raw-mode execution mask. */
527	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
528	/** High priority VMCPU pre raw-mode execution mask. */
529	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
530	\| VMCPU_FF_INHIBIT_INTERRUPTS \
531	\| VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_TRPM_SYNC_IDT \
532	\| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT, 0) )
533
534	/** High priority post-execution actions. */
535	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
536	/** High priority post-execution actions. */
537	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
538	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \
539	\| VMCPU_FF_IEM \| VMCPU_FF_IOM )
540
541	/** Normal priority VM post-execution actions. */
542	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
543	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
544	/** Normal priority VMCPU post-execution actions. */
545	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0) \| VMCPU_FF_DBGF )
546
547	/** Normal priority VM actions. */
548	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \
549	\| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
550	/** Normal priority VMCPU actions. */
551	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
552
553	/** Flags to clear before resuming guest execution. */
554	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
555
556
557	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
558	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
559	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
560	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
561	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
562	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
563	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
564	#ifdef IN_RING3
565	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF )
566	#else
567	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
568	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF )
569	#endif
570	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
571	* enabled. */
572	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
573	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
574	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
575	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST )
576	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
577	* disabled. */
578	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
579	& ~(VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC) )
580
581	/** VM Flags that cause the HM loops to go back to ring-3. */
582	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
583	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
584	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
585	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
586	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
587
588	/** High priority ring-0 VM pre HM-mode execution mask. */
589	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
590	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
591	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
592	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST)
593	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
594	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
595	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
596	\| VM_FF_PDM_DMA) )
597	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
598	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
599	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
600
601	/** All the forced VM flags. */
602	#define VM_FF_ALL_MASK (UINT32_MAX)
603	/** All the forced VMCPU flags. */
604	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
605
606	/** All the forced VM flags except those related to raw-mode and hardware
607	* assisted execution. */
608	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
609	/** All the forced VMCPU flags except those related to raw-mode and hardware
610	* assisted execution. */
611	#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \
612	\| VMCPU_FF_TLB_FLUSH \| VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
613	/** @} */
614
615	/** @def VM_FF_SET
616	* Sets a force action flag.
617	*
618	* @param pVM The cross context VM structure.
619	* @param fFlag The flag to set.
620	*/
621	#if 1
622	# define VM_FF_SET(pVM, fFlag) ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag))
623	#else
624	# define VM_FF_SET(pVM, fFlag) \
625	do { ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
626	RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
627	} while (0)
628	#endif
629
630	/** @def VMCPU_FF_SET
631	* Sets a force action flag for the given VCPU.
632	*
633	* @param pVCpu The cross context virtual CPU structure.
634	* @param fFlag The flag to set.
635	*/
636	#define VMCPU_FF_SET(pVCpu, fFlag) ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag))
637
638	/** @def VM_FF_CLEAR
639	* Clears a force action flag.
640	*
641	* @param pVM The cross context VM structure.
642	* @param fFlag The flag to clear.
643	*/
644	#if 1
645	# define VM_FF_CLEAR(pVM, fFlag) ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag))
646	#else
647	# define VM_FF_CLEAR(pVM, fFlag) \
648	do { ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
649	RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
650	} while (0)
651	#endif
652
653	/** @def VMCPU_FF_CLEAR
654	* Clears a force action flag for the given VCPU.
655	*
656	* @param pVCpu The cross context virtual CPU structure.
657	* @param fFlag The flag to clear.
658	*/
659	#define VMCPU_FF_CLEAR(pVCpu, fFlag) ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag))
660
661	/** @def VM_FF_IS_SET
662	* Checks if a force action flag is set.
663	*
664	* @param pVM The cross context VM structure.
665	* @param fFlag The flag to check.
666	*/
667	#define VM_FF_IS_SET(pVM, fFlag) (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
668
669	/** @def VMCPU_FF_IS_SET
670	* Checks if a force action flag is set for the given VCPU.
671	*
672	* @param pVCpu The cross context virtual CPU structure.
673	* @param fFlag The flag to check.
674	*/
675	#define VMCPU_FF_IS_SET(pVCpu, fFlag) (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
676
677	/** @def VM_FF_IS_PENDING
678	* Checks if one or more force action in the specified set is pending.
679	*
680	* @param pVM The cross context VM structure.
681	* @param fFlags The flags to check for.
682	*/
683	#define VM_FF_IS_PENDING(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
684
685	/** @def VM_FF_TEST_AND_CLEAR
686	* Checks if one (!) force action in the specified set is pending and clears it atomically
687	*
688	* @returns true if the bit was set.
689	* @returns false if the bit was clear.
690	* @param pVM The cross context VM structure.
691	* @param iBit Bit position to check and clear
692	*/
693	#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
694
695	/** @def VMCPU_FF_TEST_AND_CLEAR
696	* Checks if one (!) force action in the specified set is pending and clears it atomically
697	*
698	* @returns true if the bit was set.
699	* @returns false if the bit was clear.
700	* @param pVCpu The cross context virtual CPU structure.
701	* @param iBit Bit position to check and clear
702	*/
703	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
704
705	/** @def VMCPU_FF_IS_PENDING
706	* Checks if one or more force action in the specified set is pending for the given VCPU.
707	*
708	* @param pVCpu The cross context virtual CPU structure.
709	* @param fFlags The flags to check for.
710	*/
711	#define VMCPU_FF_IS_PENDING(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
712
713	/** @def VM_FF_IS_PENDING_EXCEPT
714	* Checks if one or more force action in the specified set is pending while one
715	* or more other ones are not.
716	*
717	* @param pVM The cross context VM structure.
718	* @param fFlags The flags to check for.
719	* @param fExcpt The flags that should not be set.
720	*/
721	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
722
723	/** @def VMCPU_FF_IS_PENDING_EXCEPT
724	* Checks if one or more force action in the specified set is pending for the given
725	* VCPU while one or more other ones are not.
726	*
727	* @param pVCpu The cross context virtual CPU structure.
728	* @param fFlags The flags to check for.
729	* @param fExcpt The flags that should not be set.
730	*/
731	#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
732
733	/** @def VM_IS_EMT
734	* Checks if the current thread is the emulation thread (EMT).
735	*
736	* @remark The ring-0 variation will need attention if we expand the ring-0
737	* code to let threads other than EMT mess around with the VM.
738	*/
739	#ifdef IN_RC
740	# define VM_IS_EMT(pVM) true
741	#else
742	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
743	#endif
744
745	/** @def VMCPU_IS_EMT
746	* Checks if the current thread is the emulation thread (EMT) for the specified
747	* virtual CPU.
748	*/
749	#ifdef IN_RC
750	# define VMCPU_IS_EMT(pVCpu) true
751	#else
752	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
753	#endif
754
755	/** @def VM_ASSERT_EMT
756	* Asserts that the current thread IS the emulation thread (EMT).
757	*/
758	#ifdef IN_RC
759	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
760	#elif defined(IN_RING0)
761	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
762	#else
763	# define VM_ASSERT_EMT(pVM) \
764	AssertMsg(VM_IS_EMT(pVM), \
765	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
766	#endif
767
768	/** @def VMCPU_ASSERT_EMT
769	* Asserts that the current thread IS the emulation thread (EMT) of the
770	* specified virtual CPU.
771	*/
772	#ifdef IN_RC
773	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
774	#elif defined(IN_RING0)
775	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
776	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
777	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
778	(pVCpu) ? (pVCpu)->idCpu : 0))
779	#else
780	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
781	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
782	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
783	#endif
784
785	/** @def VM_ASSERT_EMT_RETURN
786	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
787	*/
788	#ifdef IN_RC
789	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
790	#elif defined(IN_RING0)
791	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
792	#else
793	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
794	AssertMsgReturn(VM_IS_EMT(pVM), \
795	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
796	(rc))
797	#endif
798
799	/** @def VMCPU_ASSERT_EMT_RETURN
800	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
801	*/
802	#ifdef IN_RC
803	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
804	#elif defined(IN_RING0)
805	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
806	#else
807	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
808	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
809	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
810	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
811	(rc))
812	#endif
813
814	/** @def VMCPU_ASSERT_EMT_OR_GURU
815	* Asserts that the current thread IS the emulation thread (EMT) of the
816	* specified virtual CPU.
817	*/
818	#if defined(IN_RC) \|\| defined(IN_RING0)
819	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
820	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
821	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
822	#else
823	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
824	AssertMsg( VMCPU_IS_EMT(pVCpu) \
825	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
826	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
827	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
828	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
829	#endif
830
831	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
832	* Asserts that the current thread IS the emulation thread (EMT) of the
833	* specified virtual CPU or the VM is not running.
834	*/
835	#if defined(IN_RC) \|\| defined(IN_RING0)
836	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
837	Assert( VMCPU_IS_EMT(pVCpu) \
838	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
839	#else
840	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
841	AssertMsg( VMCPU_IS_EMT(pVCpu) \
842	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
843	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
844	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
845	#endif
846
847	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
848	* Checks if the the VM is running.
849	* @note Thie is only for pure debug assertions. No AssertReturn or similar!
850	*/
851	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
852	( (pVM)->enmVMState == VMSTATE_RUNNING \
853	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS \
854	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_FT )
855
856	/** @def VM_ASSERT_IS_NOT_RUNNING
857	* Asserts that the VM is not running.
858	*/
859	#if defined(IN_RC) \|\| defined(IN_RING0)
860	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
861	#else
862	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
863	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
864	#endif
865
866	/** @def VM_ASSERT_EMT0
867	* Asserts that the current thread IS emulation thread \#0 (EMT0).
868	*/
869	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
870
871	/** @def VM_ASSERT_EMT0_RETURN
872	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
873	* it isn't.
874	*/
875	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
876
877
878	/**
879	* Asserts that the current thread is NOT the emulation thread.
880	*/
881	#define VM_ASSERT_OTHER_THREAD(pVM) \
882	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
883
884
885	/** @def VM_ASSERT_STATE
886	* Asserts a certain VM state.
887	*/
888	#define VM_ASSERT_STATE(pVM, _enmState) \
889	AssertMsg((pVM)->enmVMState == (_enmState), \
890	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
891
892	/** @def VM_ASSERT_STATE_RETURN
893	* Asserts a certain VM state and returns if it doesn't match.
894	*/
895	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
896	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
897	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
898	(rc))
899
900	/** @def VM_IS_VALID_EXT
901	* Asserts a the VM handle is valid for external access, i.e. not being destroy
902	* or terminated. */
903	#define VM_IS_VALID_EXT(pVM) \
904	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
905	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
906	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
907	&& VM_IS_EMT(pVM))) )
908
909	/** @def VM_ASSERT_VALID_EXT_RETURN
910	* Asserts a the VM handle is valid for external access, i.e. not being
911	* destroy or terminated.
912	*/
913	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
914	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
915	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
916	? VMGetStateName(pVM->enmVMState) : ""), \
917	(rc))
918
919	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
920	* Asserts a the VMCPU handle is valid for external access, i.e. not being
921	* destroy or terminated.
922	*/
923	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
924	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
925	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
926	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
927	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
928	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
929	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
930	(rc))
931
932	#endif /* !VBOX_FOR_DTRACE_LIB */
933
934
935	/** @name VM_EXEC_ENGINE_XXX - VM::bMainExecutionEngine values.
936	* @{ */
937	/** Has not yet been set. */
938	#define VM_EXEC_ENGINE_NOT_SET UINT8_C(0)
939	/** Raw-mode. */
940	#define VM_EXEC_ENGINE_RAW_MODE UINT8_C(1)
941	/** Hardware assisted virtualization thru HM. */
942	#define VM_EXEC_ENGINE_HW_VIRT UINT8_C(2)
943	/** Hardware assisted virtualization thru native API (NEM). */
944	#define VM_EXEC_ENGINE_NATIVE_API UINT8_C(3)
945	/** @} */
946
947	/**
948	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
949	*
950	* ONLY HM and NEM MAY USE THIS!
951	*
952	* @param a_pVM The cross context VM structure.
953	* @param a_bValue The new value.
954	* @internal
955	*/
956	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
957	do { \
958	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
959	ASMCompilerBarrier(); /* just to be on the safe side */ \
960	} while (0)
961
962	/**
963	* Checks whether raw-mode is used.
964	*
965	* @retval true if either is used.
966	* @retval false if software virtualization (raw-mode) is used.
967	*
968	* @param a_pVM The cross context VM structure.
969	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
970	* @internal
971	*/
972	#ifdef VBOX_WITH_RAW_MODE
973	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
974	#else
975	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
976	#endif
977
978	/**
979	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
980	*
981	* @retval true if either is used.
982	* @retval false if software virtualization (raw-mode) is used.
983	*
984	* @param a_pVM The cross context VM structure.
985	* @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
986	* @internal
987	*/
988	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
989
990	/**
991	* Checks whether HM is being used by this VM.
992	*
993	* @retval true if HM (VT-x/AMD-v) is used.
994	* @retval false if not.
995	*
996	* @param a_pVM The cross context VM structure.
997	* @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
998	* @internal
999	*/
1000	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1001
1002	/**
1003	* Checks whether NEM is being used by this VM.
1004	*
1005	* @retval true if a native hypervisor API is used.
1006	* @retval false if not.
1007	*
1008	* @param a_pVM The cross context VM structure.
1009	* @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1010	* @internal
1011	*/
1012	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1013
1014
1015	/**
1016	* The cross context VM structure.
1017	*
1018	* It contains all the VM data which have to be available in all contexts.
1019	* Even if it contains all the data the idea is to use APIs not to modify all
1020	* the members all around the place. Therefore we make use of unions to hide
1021	* everything which isn't local to the current source module. This means we'll
1022	* have to pay a little bit of attention when adding new members to structures
1023	* in the unions and make sure to keep the padding sizes up to date.
1024	*
1025	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1026	*/
1027	typedef struct VM
1028	{
1029	/** The state of the VM.
1030	* This field is read only to everyone except the VM and EM. */
1031	VMSTATE volatile enmVMState;
1032	/** Forced action flags.
1033	* See the VM_FF_* \#defines. Updated atomically.
1034	*/
1035	volatile uint32_t fGlobalForcedActions;
1036	/** Pointer to the array of page descriptors for the VM structure allocation. */
1037	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1038	/** Session handle. For use when calling SUPR0 APIs. */
1039	PSUPDRVSESSION pSession;
1040	/** Pointer to the ring-3 VM structure. */
1041	PUVM pUVM;
1042	/** Ring-3 Host Context VM Pointer. */
1043	R3PTRTYPE(struct VM *) pVMR3;
1044	/** Ring-0 Host Context VM Pointer. */
1045	R0PTRTYPE(struct VM *) pVMR0;
1046	/** Raw-mode Context VM Pointer. */
1047	RCPTRTYPE(struct VM *) pVMRC;
1048
1049	/** The GVM VM handle. Only the GVM should modify this field. */
1050	uint32_t hSelf;
1051	/** Number of virtual CPUs. */
1052	uint32_t cCpus;
1053	/** CPU excution cap (1-100) */
1054	uint32_t uCpuExecutionCap;
1055
1056	/** Size of the VM structure including the VMCPU array. */
1057	uint32_t cbSelf;
1058
1059	/** Offset to the VMCPU array starting from beginning of this structure. */
1060	uint32_t offVMCPU;
1061
1062	/**
1063	* VMMSwitcher assembly entry point returning to host context.
1064	*
1065	* Depending on how the host handles the rc status given in @a eax, this may
1066	* return and let the caller resume whatever it was doing prior to the call.
1067	*
1068	*
1069	* @param eax The return code, register.
1070	* @remark Assume interrupts disabled.
1071	* @remark This method pointer lives here because TRPM needs it.
1072	*/
1073	RTRCPTR pfnVMMRCToHostAsm/(int32_t eax)/;
1074
1075	/**
1076	* VMMSwitcher assembly entry point returning to host context without saving the
1077	* raw-mode context (hyper) registers.
1078	*
1079	* Unlike pfnVMMRC2HCAsm, this will not return to the caller. Instead it
1080	* expects the caller to save a RC context in CPUM where one might return if the
1081	* return code indicate that this is possible.
1082	*
1083	* This method pointer lives here because TRPM needs it.
1084	*
1085	* @param eax The return code, register.
1086	* @remark Assume interrupts disabled.
1087	* @remark This method pointer lives here because TRPM needs it.
1088	*/
1089	RTRCPTR pfnVMMRCToHostAsmNoReturn/(int32_t eax)/;
1090
1091	/** @name Various items that are frequently accessed.
1092	* @{ */
1093	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1094	* This is set early during vmR3InitRing3 by HM or NEM. */
1095	uint8_t const bMainExecutionEngine;
1096
1097	/** Whether to recompile user mode code or run it raw/hm/nem.
1098	* In non-raw-mode both fRecompileUser and fRecompileSupervisor must be set
1099	* to recompiler stuff. */
1100	bool fRecompileUser;
1101	/** Whether to recompile supervisor mode code or run it raw/hm/nem.
1102	* In non-raw-mode both fRecompileUser and fRecompileSupervisor must be set
1103	* to recompiler stuff. */
1104	bool fRecompileSupervisor;
1105	/** Whether raw mode supports ring-1 code or not.
1106	* This will be cleared when not in raw-mode. */
1107	bool fRawRing1Enabled;
1108	/** PATM enabled flag.
1109	* This is placed here for performance reasons.
1110	* This will be cleared when not in raw-mode. */
1111	bool fPATMEnabled;
1112	/** CSAM enabled flag.
1113	* This is placed here for performance reasons.
1114	* This will be cleared when not in raw-mode. */
1115	bool fCSAMEnabled;
1116
1117	/** Hardware VM support is available and enabled.
1118	* Determined very early during init.
1119	* This is placed here for performance reasons.
1120	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1121	bool fHMEnabled;
1122	/** Hardware VM support requires a minimal raw-mode context.
1123	* This is never set on 64-bit hosts, only 32-bit hosts requires it. */
1124	bool fHMNeedRawModeCtx;
1125
1126	/** Set when this VM is the master FT node.
1127	* @todo This doesn't need to be here, FTM should store it in it's own
1128	* structures instead. */
1129	bool fFaultTolerantMaster;
1130	/** Large page enabled flag.
1131	* @todo This doesn't need to be here, PGM should store it in it's own
1132	* structures instead. */
1133	bool fUseLargePages;
1134	/** @} */
1135
1136	/** Alignment padding. */
1137	uint8_t uPadding1[2];
1138
1139	/** @name Debugging
1140	* @{ */
1141	/** Raw-mode Context VM Pointer. */
1142	RCPTRTYPE(RTTRACEBUF) hTraceBufRC;
1143	/** Ring-3 Host Context VM Pointer. */
1144	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1145	/** Ring-0 Host Context VM Pointer. */
1146	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1147	/** @} */
1148
1149	#if HC_ARCH_BITS == 32
1150	/** Alignment padding. */
1151	uint32_t uPadding2;
1152	#endif
1153
1154	/** @name Switcher statistics (remove)
1155	* @{ */
1156	/** Profiling the total time from Qemu to GC. */
1157	STAMPROFILEADV StatTotalQemuToGC;
1158	/** Profiling the total time from GC to Qemu. */
1159	STAMPROFILEADV StatTotalGCToQemu;
1160	/** Profiling the total time spent in GC. */
1161	STAMPROFILEADV StatTotalInGC;
1162	/** Profiling the total time spent not in Qemu. */
1163	STAMPROFILEADV StatTotalInQemu;
1164	/** Profiling the VMMSwitcher code for going to GC. */
1165	STAMPROFILEADV StatSwitcherToGC;
1166	/** Profiling the VMMSwitcher code for going to HC. */
1167	STAMPROFILEADV StatSwitcherToHC;
1168	STAMPROFILEADV StatSwitcherSaveRegs;
1169	STAMPROFILEADV StatSwitcherSysEnter;
1170	STAMPROFILEADV StatSwitcherDebug;
1171	STAMPROFILEADV StatSwitcherCR0;
1172	STAMPROFILEADV StatSwitcherCR4;
1173	STAMPROFILEADV StatSwitcherJmpCR3;
1174	STAMPROFILEADV StatSwitcherRstrRegs;
1175	STAMPROFILEADV StatSwitcherLgdt;
1176	STAMPROFILEADV StatSwitcherLidt;
1177	STAMPROFILEADV StatSwitcherLldt;
1178	STAMPROFILEADV StatSwitcherTSS;
1179	/** @} */
1180
1181	/** Padding - the unions must be aligned on a 64 bytes boundary and the unions
1182	* must start at the same offset on both 64-bit and 32-bit hosts. */
1183	uint8_t abAlignment3[(HC_ARCH_BITS == 32 ? 24 : 0) + 40];
1184
1185	/** CPUM part. */
1186	union
1187	{
1188	#ifdef ___CPUMInternal_h
1189	struct CPUM s;
1190	#endif
1191	#ifdef ___VBox_vmm_cpum_h
1192	/** Read only info exposed about the host and guest CPUs. */
1193	struct
1194	{
1195	/** Padding for hidden fields. */
1196	uint8_t abHidden0[64];
1197	/** Host CPU feature information. */
1198	CPUMFEATURES HostFeatures;
1199	/** Guest CPU feature information. */
1200	CPUMFEATURES GuestFeatures;
1201	} const ro;
1202	#endif
1203	uint8_t padding[1536]; /* multiple of 64 */
1204	} cpum;
1205
1206	/** VMM part. */
1207	union
1208	{
1209	#ifdef ___VMMInternal_h
1210	struct VMM s;
1211	#endif
1212	uint8_t padding[1600]; /* multiple of 64 */
1213	} vmm;
1214
1215	/** PGM part. */
1216	union
1217	{
1218	#ifdef ___PGMInternal_h
1219	struct PGM s;
1220	#endif
1221	uint8_t padding[40962+6080]; / multiple of 64 */
1222	} pgm;
1223
1224	/** HM part. */
1225	union
1226	{
1227	#ifdef ___HMInternal_h
1228	struct HM s;
1229	#endif
1230	uint8_t padding[5440]; /* multiple of 64 */
1231	} hm;
1232
1233	/** TRPM part. */
1234	union
1235	{
1236	#ifdef ___TRPMInternal_h
1237	struct TRPM s;
1238	#endif
1239	uint8_t padding[5248]; /* multiple of 64 */
1240	} trpm;
1241
1242	/** SELM part. */
1243	union
1244	{
1245	#ifdef ___SELMInternal_h
1246	struct SELM s;
1247	#endif
1248	uint8_t padding[768]; /* multiple of 64 */
1249	} selm;
1250
1251	/** MM part. */
1252	union
1253	{
1254	#ifdef ___MMInternal_h
1255	struct MM s;
1256	#endif
1257	uint8_t padding[192]; /* multiple of 64 */
1258	} mm;
1259
1260	/** PDM part. */
1261	union
1262	{
1263	#ifdef ___PDMInternal_h
1264	struct PDM s;
1265	#endif
1266	uint8_t padding[1920]; /* multiple of 64 */
1267	} pdm;
1268
1269	/** IOM part. */
1270	union
1271	{
1272	#ifdef ___IOMInternal_h
1273	struct IOM s;
1274	#endif
1275	uint8_t padding[896]; /* multiple of 64 */
1276	} iom;
1277
1278	/** EM part. */
1279	union
1280	{
1281	#ifdef ___EMInternal_h
1282	struct EM s;
1283	#endif
1284	uint8_t padding[256]; /* multiple of 64 */
1285	} em;
1286
1287	/** NEM part. */
1288	union
1289	{
1290	#ifdef ___NEMInternal_h
1291	struct NEM s;
1292	#endif
1293	uint8_t padding[128]; /* multiple of 64 */
1294	} nem;
1295
1296	/** TM part. */
1297	union
1298	{
1299	#ifdef ___TMInternal_h
1300	struct TM s;
1301	#endif
1302	uint8_t padding[2496]; /* multiple of 64 */
1303	} tm;
1304
1305	/** DBGF part. */
1306	union
1307	{
1308	#ifdef ___DBGFInternal_h
1309	struct DBGF s;
1310	#endif
1311	#ifdef ___VBox_vmm_dbgf_h
1312	/** Read only info exposed about interrupt breakpoints and selected events. */
1313	struct
1314	{
1315	/** Bitmap of enabled hardware interrupt breakpoints. */
1316	uint32_t bmHardIntBreakpoints[256 / 32];
1317	/** Bitmap of enabled software interrupt breakpoints. */
1318	uint32_t bmSoftIntBreakpoints[256 / 32];
1319	/** Bitmap of selected events.
1320	* This includes non-selectable events too for simplicity, we maintain the
1321	* state for some of these, as it may come in handy. */
1322	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1323	/** Enabled hardware interrupt breakpoints. */
1324	uint32_t cHardIntBreakpoints;
1325	/** Enabled software interrupt breakpoints. */
1326	uint32_t cSoftIntBreakpoints;
1327	/** The number of selected events. */
1328	uint32_t cSelectedEvents;
1329	/** The number of enabled hardware breakpoints. */
1330	uint8_t cEnabledHwBreakpoints;
1331	/** The number of enabled hardware I/O breakpoints. */
1332	uint8_t cEnabledHwIoBreakpoints;
1333	/** The number of enabled INT3 breakpoints. */
1334	uint8_t cEnabledInt3Breakpoints;
1335	uint8_t abPadding[1]; /*< Unused padding space up for grabs. /
1336	} const ro;
1337	#endif
1338	uint8_t padding[2368]; /* multiple of 64 */
1339	} dbgf;
1340
1341	/** SSM part. */
1342	union
1343	{
1344	#ifdef ___SSMInternal_h
1345	struct SSM s;
1346	#endif
1347	uint8_t padding[128]; /* multiple of 64 */
1348	} ssm;
1349
1350	/** FTM part. */
1351	union
1352	{
1353	#ifdef ___FTMInternal_h
1354	struct FTM s;
1355	#endif
1356	uint8_t padding[512]; /* multiple of 64 */
1357	} ftm;
1358
1359	#ifdef VBOX_WITH_RAW_MODE
1360	/** PATM part. */
1361	union
1362	{
1363	# ifdef ___PATMInternal_h
1364	struct PATM s;
1365	# endif
1366	uint8_t padding[768]; /* multiple of 64 */
1367	} patm;
1368
1369	/** CSAM part. */
1370	union
1371	{
1372	# ifdef ___CSAMInternal_h
1373	struct CSAM s;
1374	# endif
1375	uint8_t padding[1088]; /* multiple of 64 */
1376	} csam;
1377	#endif
1378
1379	#ifdef VBOX_WITH_REM
1380	/** REM part. */
1381	union
1382	{
1383	# ifdef ___REMInternal_h
1384	struct REM s;
1385	# endif
1386	uint8_t padding[0x11100]; /* multiple of 64 */
1387	} rem;
1388	#endif
1389
1390	union
1391	{
1392	#ifdef ___GIMInternal_h
1393	struct GIM s;
1394	#endif
1395	uint8_t padding[448]; /* multiple of 64 */
1396	} gim;
1397
1398	union
1399	{
1400	#ifdef ___APICInternal_h
1401	struct APIC s;
1402	#endif
1403	uint8_t padding[128]; /* multiple of 8 */
1404	} apic;
1405
1406	/* ---- begin small stuff ---- */
1407
1408	/** VM part. */
1409	union
1410	{
1411	#ifdef ___VMInternal_h
1412	struct VMINT s;
1413	#endif
1414	uint8_t padding[24]; /* multiple of 8 */
1415	} vm;
1416
1417	/** CFGM part. */
1418	union
1419	{
1420	#ifdef ___CFGMInternal_h
1421	struct CFGM s;
1422	#endif
1423	uint8_t padding[8]; /* multiple of 8 */
1424	} cfgm;
1425
1426	/** Padding for aligning the cpu array on a page boundary. */
1427	#if defined(VBOX_WITH_REM) && defined(VBOX_WITH_RAW_MODE)
1428	uint8_t abAlignment2[3742];
1429	#elif defined(VBOX_WITH_REM) && !defined(VBOX_WITH_RAW_MODE)
1430	uint8_t abAlignment2[1502];
1431	#elif !defined(VBOX_WITH_REM) && defined(VBOX_WITH_RAW_MODE)
1432	uint8_t abAlignment2[3998];
1433	#else
1434	uint8_t abAlignment2[1758];
1435	#endif
1436
1437	/* ---- end small stuff ---- */
1438
1439	/** VMCPU array for the configured number of virtual CPUs.
1440	* Must be aligned on a page boundary for TLB hit reasons as well as
1441	* alignment of VMCPU members. */
1442	VMCPU aCpus[1];
1443	} VM;
1444
1445
1446	#ifdef IN_RC
1447	RT_C_DECLS_BEGIN
1448
1449	/** The VM structure.
1450	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1451	* globals which we should avoid using.
1452	*/
1453	extern DECLIMPORT(VM) g_VM;
1454
1455	RT_C_DECLS_END
1456	#endif
1457
1458	/** @} */
1459
1460	#endif
1461

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source: vbox/trunk/include/VBox/vmm/vm.h@ 71091

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