vm.h@ 80135

Last change on this file since 80135 was 80135, checked in by vboxsync, 5 years ago
PGM: Split the phys guest->host TLB into separate ring-0 and ring-3 entities and align it properly. bugref:9511 bugref:9517
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 56.6 KB

Line
1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2019 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef VBOX_INCLUDED_vmm_vm_h
27	#define VBOX_INCLUDED_vmm_vm_h
28	#ifndef RT_WITHOUT_PRAGMA_ONCE
29	# pragma once
30	#endif
31
32	#ifndef VBOX_FOR_DTRACE_LIB
33	# include <iprt/param.h>
34	# include <VBox/param.h>
35	# include <VBox/types.h>
36	# include <VBox/vmm/cpum.h>
37	# include <VBox/vmm/stam.h>
38	# include <VBox/vmm/vmapi.h>
39	# include <VBox/vmm/vmm.h>
40	# include <VBox/sup.h>
41	#else
42	# pragma D depends_on library vbox-types.d
43	# pragma D depends_on library CPUMInternal.d
44	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
45	#endif
46
47
48
49	/** @defgroup grp_vm The Virtual Machine
50	* @ingroup grp_vmm
51	* @{
52	*/
53
54	/**
55	* The state of a Virtual CPU.
56	*
57	* The basic state indicated here is whether the CPU has been started or not. In
58	* addition, there are sub-states when started for assisting scheduling (GVMM
59	* mostly).
60	*
61	* The transition out of the STOPPED state is done by a vmR3PowerOn.
62	* The transition back to the STOPPED state is done by vmR3PowerOff.
63	*
64	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
65	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
66	*/
67	typedef enum VMCPUSTATE
68	{
69	/** The customary invalid zero. */
70	VMCPUSTATE_INVALID = 0,
71
72	/** Virtual CPU has not yet been started. */
73	VMCPUSTATE_STOPPED,
74
75	/** CPU started. */
76	VMCPUSTATE_STARTED,
77	/** CPU started in HM context. */
78	VMCPUSTATE_STARTED_HM,
79	/** Executing guest code and can be poked (RC or STI bits of HM). */
80	VMCPUSTATE_STARTED_EXEC,
81	/** Executing guest code in the recompiler. */
82	VMCPUSTATE_STARTED_EXEC_REM,
83	/** Executing guest code using NEM. */
84	VMCPUSTATE_STARTED_EXEC_NEM,
85	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
86	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
87	/** Halted. */
88	VMCPUSTATE_STARTED_HALTED,
89
90	/** The end of valid virtual CPU states. */
91	VMCPUSTATE_END,
92
93	/** Ensure 32-bit type. */
94	VMCPUSTATE_32BIT_HACK = 0x7fffffff
95	} VMCPUSTATE;
96
97	/** Enables 64-bit FFs. */
98	#define VMCPU_WITH_64_BIT_FFS
99
100
101	/**
102	* The cross context virtual CPU structure.
103	*
104	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
105	*/
106	typedef struct VMCPU
107	{
108	/** @name Volatile per-cpu data.
109	* @{ */
110	/** Per CPU forced action.
111	* See the VMCPU_FF_* \#defines. Updated atomically. */
112	#ifdef VMCPU_WITH_64_BIT_FFS
113	uint64_t volatile fLocalForcedActions;
114	#else
115	uint32_t volatile fLocalForcedActions;
116	uint32_t fForLocalForcedActionsExpansion;
117	#endif
118	/** The CPU state. */
119	VMCPUSTATE volatile enmState;
120
121	/** Which host CPU ID is this EMT running on.
122	* Only valid when in RC or HMR0 with scheduling disabled. */
123	RTCPUID volatile idHostCpu;
124	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
125	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
126	uint32_t volatile iHostCpuSet;
127	/** Padding up to 64 bytes. */
128	uint8_t abAlignment0[64 - 20];
129	/** @} */
130
131	/** IEM part.
132	* @remarks This comes first as it allows the use of 8-bit immediates for the
133	* first 64 bytes of the structure, reducing code size a wee bit. */
134	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
135	union VMCPUUNIONIEMFULL
136	#else
137	union VMCPUUNIONIEMSTUB
138	#endif
139	{
140	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
141	struct IEMCPU s;
142	#endif
143	uint8_t padding[18496]; /* multiple of 64 */
144	} iem;
145
146	/** @name Static per-cpu data.
147	* (Putting this after IEM, hoping that it's less frequently used than it.)
148	* @{ */
149	/** Ring-3 Host Context VM Pointer. */
150	PVMR3 pVMR3;
151	/** Ring-0 Host Context VM Pointer. */
152	PVMR0 pVMR0;
153	/** Raw-mode Context VM Pointer. */
154	uint32_t pVMRC;
155	/** Padding for new raw-mode (long mode). */
156	uint32_t pVMRCPadding;
157	/** Pointer to the ring-3 UVMCPU structure. */
158	PUVMCPU pUVCpu;
159	/** The native thread handle. */
160	RTNATIVETHREAD hNativeThread;
161	/** The native R0 thread handle. (different from the R3 handle!) */
162	RTNATIVETHREAD hNativeThreadR0;
163	/** The CPU ID.
164	* This is the index into the VM::aCpu array. */
165	VMCPUID idCpu;
166
167	/** Align the structures below bit on a 64-byte boundary and make sure it starts
168	* at the same offset in both 64-bit and 32-bit builds.
169	*
170	* @remarks The alignments of the members that are larger than 48 bytes should be
171	* 64-byte for cache line reasons. structs containing small amounts of
172	* data could be lumped together at the end with a < 64 byte padding
173	* following it (to grow into and align the struct size).
174	*/
175	uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
176	/** @} */
177
178	/** HM part. */
179	union VMCPUUNIONHM
180	{
181	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
182	struct HMCPU s;
183	#endif
184	uint8_t padding[5888]; /* multiple of 64 */
185	} hm;
186
187	/** NEM part. */
188	union VMCPUUNIONNEM
189	{
190	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
191	struct NEMCPU s;
192	#endif
193	uint8_t padding[512]; /* multiple of 64 */
194	} nem;
195
196	/** TRPM part. */
197	union VMCPUUNIONTRPM
198	{
199	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
200	struct TRPMCPU s;
201	#endif
202	uint8_t padding[128]; /* multiple of 64 */
203	} trpm;
204
205	/** TM part. */
206	union VMCPUUNIONTM
207	{
208	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
209	struct TMCPU s;
210	#endif
211	uint8_t padding[5760]; /* multiple of 64 */
212	} tm;
213
214	/** VMM part. */
215	union VMCPUUNIONVMM
216	{
217	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
218	struct VMMCPU s;
219	#endif
220	uint8_t padding[896]; /* multiple of 64 */
221	} vmm;
222
223	/** PDM part. */
224	union VMCPUUNIONPDM
225	{
226	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
227	struct PDMCPU s;
228	#endif
229	uint8_t padding[256]; /* multiple of 64 */
230	} pdm;
231
232	/** IOM part. */
233	union VMCPUUNIONIOM
234	{
235	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
236	struct IOMCPU s;
237	#endif
238	uint8_t padding[512]; /* multiple of 64 */
239	} iom;
240
241	/** DBGF part.
242	* @todo Combine this with other tiny structures. */
243	union VMCPUUNIONDBGF
244	{
245	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
246	struct DBGFCPU s;
247	#endif
248	uint8_t padding[256]; /* multiple of 64 */
249	} dbgf;
250
251	/** GIM part. */
252	union VMCPUUNIONGIM
253	{
254	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
255	struct GIMCPU s;
256	#endif
257	uint8_t padding[512]; /* multiple of 64 */
258	} gim;
259
260	/** APIC part. */
261	union VMCPUUNIONAPIC
262	{
263	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
264	struct APICCPU s;
265	#endif
266	uint8_t padding[1792]; /* multiple of 64 */
267	} apic;
268
269	/*
270	* Some less frequently used global members that doesn't need to take up
271	* precious space at the head of the structure.
272	*/
273
274	/** Trace groups enable flags. */
275	uint32_t fTraceGroups; /* 64 / 44 */
276	/** State data for use by ad hoc profiling. */
277	uint32_t uAdHoc;
278	/** Profiling samples for use by ad hoc profiling. */
279	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
280
281	/** Align the following members on page boundary. */
282	uint8_t abAlignment2[1400];
283
284	/** PGM part. */
285	union VMCPUUNIONPGM
286	{
287	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
288	struct PGMCPU s;
289	#endif
290	uint8_t padding[4096]; /* multiple of 4096 */
291	} pgm;
292
293	/** CPUM part. */
294	union VMCPUUNIONCPUM
295	{
296	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
297	struct CPUMCPU s;
298	#endif
299	#ifdef VMCPU_INCL_CPUM_GST_CTX
300	/** The guest CPUM context for direct use by execution engines.
301	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
302	* others. The rest will use the function based CPUM API. */
303	CPUMCTX GstCtx;
304	#endif
305	uint8_t padding[4096]; /* multiple of 4096 */
306	} cpum;
307
308	/** EM part. */
309	union VMCPUUNIONEM
310	{
311	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
312	struct EMCPU s;
313	#endif
314	uint8_t padding[40960]; /* multiple of 4096 */
315	} em;
316	} VMCPU;
317
318
319	#ifndef VBOX_FOR_DTRACE_LIB
320	AssertCompileSizeAlignment(VMCPU, 4096);
321
322	/** @name Operations on VMCPU::enmState
323	* @{ */
324	/** Gets the VMCPU state. */
325	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
326	/** Sets the VMCPU state. */
327	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
328	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
329	/** Cmpares and sets the VMCPU state. */
330	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
331	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
332	/** Checks the VMCPU state. */
333	#ifdef VBOX_STRICT
334	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
335	do { \
336	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
337	AssertMsg(enmState == (enmExpectedState), \
338	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
339	enmState, enmExpectedState, (pVCpu)->idCpu)); \
340	} while (0)
341	#else
342	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
343	#endif
344	/** Tests if the state means that the CPU is started. */
345	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
346	/** Tests if the state means that the CPU is stopped. */
347	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
348	/** @} */
349
350
351	/** The name of the raw-mode context VMM Core module. */
352	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
353	/** The name of the ring-0 context VMM Core module. */
354	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
355
356
357	/** VM Forced Action Flags.
358	*
359	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
360	* action mask of a VM.
361	*
362	* Available VM bits:
363	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
364	*
365	*
366	* Available VMCPU bits:
367	* 14, 15, 36 to 63
368	*
369	* @todo If we run low on VMCPU, we may consider merging the SELM bits
370	*
371	* @{
372	*/
373	/** The virtual sync clock has been stopped, go to TM until it has been
374	* restarted... */
375	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
376	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
377	/** PDM Queues are pending. */
378	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
379	/** The bit number for VM_FF_PDM_QUEUES. */
380	#define VM_FF_PDM_QUEUES_BIT 3
381	/** PDM DMA transfers are pending. */
382	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
383	/** The bit number for VM_FF_PDM_DMA. */
384	#define VM_FF_PDM_DMA_BIT 4
385	/** This action forces the VM to call DBGF so DBGF can service debugger
386	* requests in the emulation thread.
387	* This action flag stays asserted till DBGF clears it.*/
388	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
389	/** The bit number for VM_FF_DBGF. */
390	#define VM_FF_DBGF_BIT 8
391	/** This action forces the VM to service pending requests from other
392	* thread or requests which must be executed in another context. */
393	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
394	#define VM_FF_REQUEST_BIT 9
395	/** Check for VM state changes and take appropriate action. */
396	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
397	/** The bit number for VM_FF_CHECK_VM_STATE. */
398	#define VM_FF_CHECK_VM_STATE_BIT 10
399	/** Reset the VM. (postponed) */
400	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
401	/** The bit number for VM_FF_RESET. */
402	#define VM_FF_RESET_BIT 11
403	/** EMT rendezvous in VMM. */
404	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
405	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
406	#define VM_FF_EMT_RENDEZVOUS_BIT 12
407
408	/** PGM needs to allocate handy pages. */
409	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
410	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
411	/** PGM is out of memory.
412	* Abandon all loops and code paths which can be resumed and get up to the EM
413	* loops. */
414	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
415	#define VM_FF_PGM_NO_MEMORY_BIT 19
416	/** PGM is about to perform a lightweight pool flush
417	* Guest SMP: all EMT threads should return to ring 3
418	*/
419	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
420	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
421	/** REM needs to be informed about handler changes. */
422	#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
423	/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
424	#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
425	/** Suspend the VM - debug only. */
426	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
427	#define VM_FF_DEBUG_SUSPEND_BIT 31
428
429
430	/** This action forces the VM to check any pending interrupts on the APIC. */
431	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
432	#define VMCPU_FF_INTERRUPT_APIC_BIT 0
433	/** This action forces the VM to check any pending interrups on the PIC. */
434	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
435	#define VMCPU_FF_INTERRUPT_PIC_BIT 1
436	/** This action forces the VM to schedule and run pending timer (TM).
437	* @remarks Don't move - PATM compatibility. */
438	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
439	#define VMCPU_FF_TIMER_BIT 2
440	/** This action forces the VM to check any pending NMIs. */
441	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
442	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
443	/** This action forces the VM to check any pending SMIs. */
444	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
445	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
446	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
447	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
448	#define VMCPU_FF_PDM_CRITSECT_BIT 5
449	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
450	* the virtual CPU out of the next (/current) halted state. It is not processed
451	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
452	* is cleared the next time EM leaves the HALTED state. */
453	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
454	#define VMCPU_FF_UNHALT_BIT 6
455	/** Pending IEM action (mask). */
456	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
457	/** Pending IEM action (bit number). */
458	#define VMCPU_FF_IEM_BIT 7
459	/** Pending APIC action (bit number). */
460	#define VMCPU_FF_UPDATE_APIC_BIT 8
461	/** This action forces the VM to update APIC's asynchronously arrived
462	* interrupts as pending interrupts. */
463	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
464	/** This action forces the VM to service pending requests from other
465	* thread or requests which must be executed in another context. */
466	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
467	#define VMCPU_FF_REQUEST_BIT 9
468	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
469	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
470	/** The bit number for VMCPU_FF_DBGF. */
471	#define VMCPU_FF_DBGF_BIT 10
472	/** This action forces the VM to service any pending updates to CR3 (used only
473	* by HM). */
474	/** Hardware virtualized nested-guest interrupt pending. */
475	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
476	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
477	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
478	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
479	/** This action forces the VM to service any pending updates to PAE PDPEs (used
480	* only by HM). */
481	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
482	#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
483	/** This action forces the VM to resync the page tables before going
484	* back to execute guest code. (GLOBAL FLUSH) */
485	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
486	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
487	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
488	* (NON-GLOBAL FLUSH) */
489	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
490	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
491	/** Check for pending TLB shootdown actions (deprecated)
492	* Reserved for furture HM re-use if necessary / safe.
493	* Consumer: HM */
494	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
495	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
496	/** Check for pending TLB flush action.
497	* Consumer: HM
498	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
499	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
500	/** The bit number for VMCPU_FF_TLB_FLUSH. */
501	#define VMCPU_FF_TLB_FLUSH_BIT 19
502	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
503	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
504	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
505	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
506	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
507	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
508	#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
509	/** Block injection of non-maskable interrupts to the guest. */
510	#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
511	#define VMCPU_FF_BLOCK_NMIS_BIT 25
512	/** Force return to Ring-3. */
513	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
514	#define VMCPU_FF_TO_R3_BIT 28
515	/** Force return to ring-3 to service pending I/O or MMIO write.
516	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
517	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
518	* status codes to be propagated at the same time without loss. */
519	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
520	#define VMCPU_FF_IOM_BIT 29
521	/* 30 used to be VMCPU_FF_CPUM */
522	/** VMX-preemption timer in effect. */
523	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
524	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
525	/** Pending MTF (Monitor Trap Flag) event. */
526	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
527	#define VMCPU_FF_VMX_MTF_BIT 32
528	/** VMX APIC-write emulation pending. */
529	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
530	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
531	/** VMX interrupt-window event pending. */
532	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
533	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
534	/** VMX NMI-window event pending. */
535	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
536	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
537
538
539	/** Externally VM forced actions. Used to quit the idle/wait loop. */
540	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
541	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
542	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
543
544	/** Externally forced VM actions. Used to quit the idle/wait loop. */
545	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
546	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
547	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
548	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
549	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
550	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
551	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
552
553	/** High priority VM pre-execution actions. */
554	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
555	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
556	\| VM_FF_EMT_RENDEZVOUS )
557	/** High priority VMCPU pre-execution actions. */
558	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
559	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
560	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
561	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
562	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
563
564	/** High priority VM pre raw-mode execution mask. */
565	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
566	/** High priority VMCPU pre raw-mode execution mask. */
567	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
568	\| VMCPU_FF_INHIBIT_INTERRUPTS )
569
570	/** High priority post-execution actions. */
571	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
572	/** High priority post-execution actions. */
573	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
574	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \
575	\| VMCPU_FF_IEM \| VMCPU_FF_IOM )
576
577	/** Normal priority VM post-execution actions. */
578	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
579	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
580	/** Normal priority VMCPU post-execution actions. */
581	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
582
583	/** Normal priority VM actions. */
584	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \
585	\| VM_FF_REM_HANDLER_NOTIFY \| VM_FF_EMT_RENDEZVOUS)
586	/** Normal priority VMCPU actions. */
587	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
588
589	/** Flags to clear before resuming guest execution. */
590	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
591
592
593	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
594	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
595	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
596	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
597	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
598	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
599	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
600	#ifdef IN_RING3
601	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \
602	\| VMCPU_FF_VMX_MTF )
603	#else
604	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
605	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF )
606	#endif
607	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
608	* enabled. */
609	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
610	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
611	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
612	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
613	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
614	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
615	* disabled. */
616	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
617	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
618	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
619
620	/** VM Flags that cause the HM loops to go back to ring-3. */
621	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
622	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
623	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
624	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
625	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
626
627	/** High priority ring-0 VM pre HM-mode execution mask. */
628	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
629	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
630	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
631	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
632	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
633	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
634	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
635	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
636	\| VM_FF_PDM_DMA) )
637	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
638	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
639	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
640
641	/** All the forced VM flags. */
642	#define VM_FF_ALL_MASK (UINT32_MAX)
643	/** All the forced VMCPU flags. */
644	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
645
646	/** All the forced VM flags except those related to raw-mode and hardware
647	* assisted execution. */
648	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
649	/** All the forced VMCPU flags except those related to raw-mode and hardware
650	* assisted execution. */
651	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
652	/** @} */
653
654	/** @def VM_FF_SET
655	* Sets a single force action flag.
656	*
657	* @param pVM The cross context VM structure.
658	* @param fFlag The flag to set.
659	*/
660	#define VM_FF_SET(pVM, fFlag) do { \
661	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
662	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
663	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
664	} while (0)
665
666	/** @def VMCPU_FF_SET
667	* Sets a single force action flag for the given VCPU.
668	*
669	* @param pVCpu The cross context virtual CPU structure.
670	* @param fFlag The flag to set.
671	* @sa VMCPU_FF_SET_MASK
672	*/
673	#ifdef VMCPU_WITH_64_BIT_FFS
674	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
675	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
676	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
677	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
678	} while (0)
679	#else
680	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
681	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
682	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
683	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
684	} while (0)
685	#endif
686
687	/** @def VMCPU_FF_SET_MASK
688	* Sets a two or more force action flag for the given VCPU.
689	*
690	* @param pVCpu The cross context virtual CPU structure.
691	* @param fFlags The flags to set.
692	* @sa VMCPU_FF_SET
693	*/
694	#ifdef VMCPU_WITH_64_BIT_FFS
695	# if ARCH_BITS > 32
696	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
697	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
698	# else
699	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
700	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
701	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
702	} while (0)
703	# endif
704	#else
705	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
706	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
707	#endif
708
709	/** @def VM_FF_CLEAR
710	* Clears a single force action flag.
711	*
712	* @param pVM The cross context VM structure.
713	* @param fFlag The flag to clear.
714	*/
715	#define VM_FF_CLEAR(pVM, fFlag) do { \
716	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
717	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
718	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
719	} while (0)
720
721	/** @def VMCPU_FF_CLEAR
722	* Clears a single force action flag for the given VCPU.
723	*
724	* @param pVCpu The cross context virtual CPU structure.
725	* @param fFlag The flag to clear.
726	*/
727	#ifdef VMCPU_WITH_64_BIT_FFS
728	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
729	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
730	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
731	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
732	} while (0)
733	#else
734	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
735	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
736	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
737	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
738	} while (0)
739	#endif
740
741	/** @def VMCPU_FF_CLEAR_MASK
742	* Clears two or more force action flags for the given VCPU.
743	*
744	* @param pVCpu The cross context virtual CPU structure.
745	* @param fFlags The flags to clear.
746	*/
747	#ifdef VMCPU_WITH_64_BIT_FFS
748	# if ARCH_BITS > 32
749	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
750	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
751	# else
752	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
753	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
754	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
755	} while (0)
756	# endif
757	#else
758	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
759	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
760	#endif
761
762	/** @def VM_FF_IS_SET
763	* Checks if single a force action flag is set.
764	*
765	* @param pVM The cross context VM structure.
766	* @param fFlag The flag to check.
767	* @sa VM_FF_IS_ANY_SET
768	*/
769	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
770	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
771	#else
772	# define VM_FF_IS_SET(pVM, fFlag) \
773	([](PVM a_pVM) -> bool \
774	{ \
775	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
776	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
777	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
778	}(pVM))
779	#endif
780
781	/** @def VMCPU_FF_IS_SET
782	* Checks if a single force action flag is set for the given VCPU.
783	*
784	* @param pVCpu The cross context virtual CPU structure.
785	* @param fFlag The flag to check.
786	* @sa VMCPU_FF_IS_ANY_SET
787	*/
788	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
789	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
790	#else
791	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
792	([](PCVMCPU a_pVCpu) -> bool \
793	{ \
794	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
795	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
796	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
797	}(pVCpu))
798	#endif
799
800	/** @def VM_FF_IS_ANY_SET
801	* Checks if one or more force action in the specified set is pending.
802	*
803	* @param pVM The cross context VM structure.
804	* @param fFlags The flags to check for.
805	* @sa VM_FF_IS_SET
806	*/
807	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
808
809	/** @def VMCPU_FF_IS_ANY_SET
810	* Checks if two or more force action flags in the specified set is set for the given VCPU.
811	*
812	* @param pVCpu The cross context virtual CPU structure.
813	* @param fFlags The flags to check for.
814	* @sa VMCPU_FF_IS_SET
815	*/
816	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
817
818	/** @def VM_FF_TEST_AND_CLEAR
819	* Checks if one (!) force action in the specified set is pending and clears it atomically
820	*
821	* @returns true if the bit was set.
822	* @returns false if the bit was clear.
823	* @param pVM The cross context VM structure.
824	* @param fFlag Flag constant to check and clear (_BIT is appended).
825	*/
826	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
827
828	/** @def VMCPU_FF_TEST_AND_CLEAR
829	* Checks if one (!) force action in the specified set is pending and clears it atomically
830	*
831	* @returns true if the bit was set.
832	* @returns false if the bit was clear.
833	* @param pVCpu The cross context virtual CPU structure.
834	* @param fFlag Flag constant to check and clear (_BIT is appended).
835	*/
836	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
837
838	/** @def VM_FF_IS_PENDING_EXCEPT
839	* Checks if one or more force action in the specified set is pending while one
840	* or more other ones are not.
841	*
842	* @param pVM The cross context VM structure.
843	* @param fFlags The flags to check for.
844	* @param fExcpt The flags that should not be set.
845	*/
846	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
847	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
848
849	/** @def VM_IS_EMT
850	* Checks if the current thread is the emulation thread (EMT).
851	*
852	* @remark The ring-0 variation will need attention if we expand the ring-0
853	* code to let threads other than EMT mess around with the VM.
854	*/
855	#ifdef IN_RC
856	# define VM_IS_EMT(pVM) true
857	#else
858	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
859	#endif
860
861	/** @def VMCPU_IS_EMT
862	* Checks if the current thread is the emulation thread (EMT) for the specified
863	* virtual CPU.
864	*/
865	#ifdef IN_RC
866	# define VMCPU_IS_EMT(pVCpu) true
867	#else
868	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
869	#endif
870
871	/** @def VM_ASSERT_EMT
872	* Asserts that the current thread IS the emulation thread (EMT).
873	*/
874	#ifdef IN_RC
875	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
876	#elif defined(IN_RING0)
877	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
878	#else
879	# define VM_ASSERT_EMT(pVM) \
880	AssertMsg(VM_IS_EMT(pVM), \
881	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
882	#endif
883
884	/** @def VMCPU_ASSERT_EMT
885	* Asserts that the current thread IS the emulation thread (EMT) of the
886	* specified virtual CPU.
887	*/
888	#ifdef IN_RC
889	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
890	#elif defined(IN_RING0)
891	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
892	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
893	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
894	(pVCpu) ? (pVCpu)->idCpu : 0))
895	#else
896	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
897	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
898	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
899	#endif
900
901	/** @def VM_ASSERT_EMT_RETURN
902	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
903	*/
904	#ifdef IN_RC
905	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
906	#elif defined(IN_RING0)
907	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
908	#else
909	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
910	AssertMsgReturn(VM_IS_EMT(pVM), \
911	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
912	(rc))
913	#endif
914
915	/** @def VMCPU_ASSERT_EMT_RETURN
916	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
917	*/
918	#ifdef IN_RC
919	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
920	#elif defined(IN_RING0)
921	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
922	#else
923	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
924	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
925	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
926	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
927	(rc))
928	#endif
929
930	/** @def VMCPU_ASSERT_EMT_OR_GURU
931	* Asserts that the current thread IS the emulation thread (EMT) of the
932	* specified virtual CPU.
933	*/
934	#if defined(IN_RC) \|\| defined(IN_RING0)
935	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
936	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
937	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
938	#else
939	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
940	AssertMsg( VMCPU_IS_EMT(pVCpu) \
941	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
942	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
943	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
944	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
945	#endif
946
947	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
948	* Asserts that the current thread IS the emulation thread (EMT) of the
949	* specified virtual CPU or the VM is not running.
950	*/
951	#if defined(IN_RC) \|\| defined(IN_RING0)
952	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
953	Assert( VMCPU_IS_EMT(pVCpu) \
954	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
955	#else
956	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
957	AssertMsg( VMCPU_IS_EMT(pVCpu) \
958	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
959	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
960	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
961	#endif
962
963	/** @def VMSTATE_IS_RUNNING
964	* Checks if the given state indicates a running VM.
965	*/
966	#define VMSTATE_IS_RUNNING(a_enmVMState) \
967	( (enmVMState) == VMSTATE_RUNNING \
968	\|\| (enmVMState) == VMSTATE_RUNNING_LS )
969
970	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
971	* Checks if the VM is running.
972	* @note This is only for pure debug assertions. No AssertReturn or similar!
973	* @sa VMSTATE_IS_RUNNING
974	*/
975	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
976	( (pVM)->enmVMState == VMSTATE_RUNNING \
977	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
978
979	/** @def VM_ASSERT_IS_NOT_RUNNING
980	* Asserts that the VM is not running.
981	*/
982	#if defined(IN_RC) \|\| defined(IN_RING0)
983	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
984	#else
985	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
986	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
987	#endif
988
989	/** @def VM_ASSERT_EMT0
990	* Asserts that the current thread IS emulation thread \#0 (EMT0).
991	*/
992	#define VM_ASSERT_EMT0(pVM) VMCPU_ASSERT_EMT(&(pVM)->aCpus[0])
993
994	/** @def VM_ASSERT_EMT0_RETURN
995	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
996	* it isn't.
997	*/
998	#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
999
1000
1001	/**
1002	* Asserts that the current thread is NOT the emulation thread.
1003	*/
1004	#define VM_ASSERT_OTHER_THREAD(pVM) \
1005	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1006
1007
1008	/** @def VM_ASSERT_STATE
1009	* Asserts a certain VM state.
1010	*/
1011	#define VM_ASSERT_STATE(pVM, _enmState) \
1012	AssertMsg((pVM)->enmVMState == (_enmState), \
1013	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1014
1015	/** @def VM_ASSERT_STATE_RETURN
1016	* Asserts a certain VM state and returns if it doesn't match.
1017	*/
1018	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1019	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1020	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1021	(rc))
1022
1023	/** @def VM_IS_VALID_EXT
1024	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1025	* or terminated. */
1026	#define VM_IS_VALID_EXT(pVM) \
1027	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1028	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1029	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1030	&& VM_IS_EMT(pVM))) )
1031
1032	/** @def VM_ASSERT_VALID_EXT_RETURN
1033	* Asserts a the VM handle is valid for external access, i.e. not being
1034	* destroy or terminated.
1035	*/
1036	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1037	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1038	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1039	? VMGetStateName(pVM->enmVMState) : ""), \
1040	(rc))
1041
1042	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1043	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1044	* destroy or terminated.
1045	*/
1046	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1047	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1048	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1049	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1050	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1051	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1052	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1053	(rc))
1054
1055	#endif /* !VBOX_FOR_DTRACE_LIB */
1056
1057
1058	/**
1059	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1060	*
1061	* ONLY HM and NEM MAY USE THIS!
1062	*
1063	* @param a_pVM The cross context VM structure.
1064	* @param a_bValue The new value.
1065	* @internal
1066	*/
1067	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1068	do { \
1069	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1070	ASMCompilerBarrier(); /* just to be on the safe side */ \
1071	} while (0)
1072
1073	/**
1074	* Checks whether raw-mode is used.
1075	*
1076	* @retval true if either is used.
1077	* @retval false if software virtualization (raw-mode) is used.
1078	*
1079	* @param a_pVM The cross context VM structure.
1080	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1081	* @internal
1082	*/
1083	#ifdef VBOX_WITH_RAW_MODE
1084	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1085	#else
1086	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1087	#endif
1088
1089	/**
1090	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1091	*
1092	* @retval true if either is used.
1093	* @retval false if software virtualization (raw-mode) is used.
1094	*
1095	* @param a_pVM The cross context VM structure.
1096	* @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1097	* @internal
1098	*/
1099	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1100
1101	/**
1102	* Checks whether HM is being used by this VM.
1103	*
1104	* @retval true if HM (VT-x/AMD-v) is used.
1105	* @retval false if not.
1106	*
1107	* @param a_pVM The cross context VM structure.
1108	* @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1109	* @internal
1110	*/
1111	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1112
1113	/**
1114	* Checks whether NEM is being used by this VM.
1115	*
1116	* @retval true if a native hypervisor API is used.
1117	* @retval false if not.
1118	*
1119	* @param a_pVM The cross context VM structure.
1120	* @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1121	* @internal
1122	*/
1123	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1124
1125
1126	/**
1127	* The cross context VM structure.
1128	*
1129	* It contains all the VM data which have to be available in all contexts.
1130	* Even if it contains all the data the idea is to use APIs not to modify all
1131	* the members all around the place. Therefore we make use of unions to hide
1132	* everything which isn't local to the current source module. This means we'll
1133	* have to pay a little bit of attention when adding new members to structures
1134	* in the unions and make sure to keep the padding sizes up to date.
1135	*
1136	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1137	*/
1138	typedef struct VM
1139	{
1140	/** The state of the VM.
1141	* This field is read only to everyone except the VM and EM. */
1142	VMSTATE volatile enmVMState;
1143	/** Forced action flags.
1144	* See the VM_FF_* \#defines. Updated atomically.
1145	*/
1146	volatile uint32_t fGlobalForcedActions;
1147	/** Pointer to the array of page descriptors for the VM structure allocation. */
1148	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1149	/** Session handle. For use when calling SUPR0 APIs. */
1150	PSUPDRVSESSION pSession;
1151	/** Pointer to the ring-3 VM structure. */
1152	PUVM pUVM;
1153	/** Ring-3 Host Context VM Pointer. */
1154	R3PTRTYPE(struct VM *) pVMR3;
1155	/** Ring-0 Host Context VM Pointer. */
1156	R0PTRTYPE(struct VM *) pVMR0;
1157	/** Raw-mode Context VM Pointer. */
1158	uint32_t pVMRC;
1159	/** Padding for new raw-mode (long mode). */
1160	uint32_t pVMRCPadding;
1161
1162	/** The GVM VM handle. Only the GVM should modify this field. */
1163	uint32_t hSelf;
1164	/** Number of virtual CPUs. */
1165	uint32_t cCpus;
1166	/** CPU excution cap (1-100) */
1167	uint32_t uCpuExecutionCap;
1168
1169	#ifdef VBOX_BUGREF_9217
1170	/** Size of the VM structure. */
1171	uint32_t cbSelf;
1172	/** Size of the VMCPU structure. */
1173	uint32_t cbVCpu;
1174	/** Structure version number (TBD). */
1175	uint32_t uStructVersion;
1176	#else
1177	/** Size of the VM structure including the VMCPU array. */
1178	uint32_t cbSelf;
1179	uint32_t uUnused0;
1180	uint32_t uUnused1;
1181	#endif
1182
1183	/** @name Various items that are frequently accessed.
1184	* @{ */
1185	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1186	* This is set early during vmR3InitRing3 by HM or NEM. */
1187	uint8_t const bMainExecutionEngine;
1188
1189	/** Hardware VM support is available and enabled.
1190	* Determined very early during init.
1191	* This is placed here for performance reasons.
1192	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1193	bool fHMEnabled;
1194
1195	/** Large page enabled flag.
1196	* @todo This doesn't need to be here, PGM should store it in it's own
1197	* structures instead. */
1198	bool fUseLargePages;
1199	/** @} */
1200
1201	/** Alignment padding. */
1202	uint8_t uPadding1[5];
1203
1204	/** @name Debugging
1205	* @{ */
1206	/** Ring-3 Host Context VM Pointer. */
1207	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1208	/** Ring-0 Host Context VM Pointer. */
1209	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1210	/** @} */
1211
1212	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1213	uint8_t abAlignment3[24];
1214
1215	/** CPUM part. */
1216	union
1217	{
1218	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1219	struct CPUM s;
1220	#endif
1221	#ifdef VBOX_INCLUDED_vmm_cpum_h
1222	/** Read only info exposed about the host and guest CPUs. */
1223	struct
1224	{
1225	/** Padding for hidden fields. */
1226	uint8_t abHidden0[64];
1227	/** Host CPU feature information. */
1228	CPUMFEATURES HostFeatures;
1229	/** Guest CPU feature information. */
1230	CPUMFEATURES GuestFeatures;
1231	} const ro;
1232	#endif
1233	uint8_t padding[1536]; /* multiple of 64 */
1234	} cpum;
1235
1236	/** VMM part. */
1237	union
1238	{
1239	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1240	struct VMM s;
1241	#endif
1242	uint8_t padding[1600]; /* multiple of 64 */
1243	} vmm;
1244
1245	/** PGM part. */
1246	union
1247	{
1248	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1249	struct PGM s;
1250	#endif
1251	uint8_t padding[20800]; /* multiple of 64 */
1252	} pgm;
1253
1254	/** HM part. */
1255	union
1256	{
1257	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1258	struct HM s;
1259	#endif
1260	uint8_t padding[5440]; /* multiple of 64 */
1261	} hm;
1262
1263	/** TRPM part. */
1264	union
1265	{
1266	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1267	struct TRPM s;
1268	#endif
1269	uint8_t padding[5248]; /* multiple of 64 */
1270	} trpm;
1271
1272	/** SELM part. */
1273	union
1274	{
1275	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1276	struct SELM s;
1277	#endif
1278	uint8_t padding[768]; /* multiple of 64 */
1279	} selm;
1280
1281	/** MM part. */
1282	union
1283	{
1284	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1285	struct MM s;
1286	#endif
1287	uint8_t padding[192]; /* multiple of 64 */
1288	} mm;
1289
1290	/** PDM part. */
1291	union
1292	{
1293	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1294	struct PDM s;
1295	#endif
1296	uint8_t padding[1920]; /* multiple of 64 */
1297	} pdm;
1298
1299	/** IOM part. */
1300	union
1301	{
1302	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1303	struct IOM s;
1304	#endif
1305	uint8_t padding[896]; /* multiple of 64 */
1306	} iom;
1307
1308	/** EM part. */
1309	union
1310	{
1311	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1312	struct EM s;
1313	#endif
1314	uint8_t padding[256]; /* multiple of 64 */
1315	} em;
1316
1317	/** NEM part. */
1318	union
1319	{
1320	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1321	struct NEM s;
1322	#endif
1323	uint8_t padding[128]; /* multiple of 64 */
1324	} nem;
1325
1326	/** TM part. */
1327	union
1328	{
1329	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1330	struct TM s;
1331	#endif
1332	uint8_t padding[7872]; /* multiple of 64 */
1333	} tm;
1334
1335	/** DBGF part. */
1336	union
1337	{
1338	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1339	struct DBGF s;
1340	#endif
1341	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1342	/** Read only info exposed about interrupt breakpoints and selected events. */
1343	struct
1344	{
1345	/** Bitmap of enabled hardware interrupt breakpoints. */
1346	uint32_t bmHardIntBreakpoints[256 / 32];
1347	/** Bitmap of enabled software interrupt breakpoints. */
1348	uint32_t bmSoftIntBreakpoints[256 / 32];
1349	/** Bitmap of selected events.
1350	* This includes non-selectable events too for simplicity, we maintain the
1351	* state for some of these, as it may come in handy. */
1352	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1353	/** Enabled hardware interrupt breakpoints. */
1354	uint32_t cHardIntBreakpoints;
1355	/** Enabled software interrupt breakpoints. */
1356	uint32_t cSoftIntBreakpoints;
1357	/** The number of selected events. */
1358	uint32_t cSelectedEvents;
1359	/** The number of enabled hardware breakpoints. */
1360	uint8_t cEnabledHwBreakpoints;
1361	/** The number of enabled hardware I/O breakpoints. */
1362	uint8_t cEnabledHwIoBreakpoints;
1363	/** The number of enabled INT3 breakpoints. */
1364	uint8_t cEnabledInt3Breakpoints;
1365	uint8_t abPadding[1]; /*< Unused padding space up for grabs. /
1366	} const ro;
1367	#endif
1368	uint8_t padding[2432]; /* multiple of 64 */
1369	} dbgf;
1370
1371	/** SSM part. */
1372	union
1373	{
1374	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1375	struct SSM s;
1376	#endif
1377	uint8_t padding[128]; /* multiple of 64 */
1378	} ssm;
1379
1380	#ifdef VBOX_WITH_REM
1381	/** REM part. */
1382	union
1383	{
1384	# ifdef VMM_INCLUDED_SRC_include_REMInternal_h
1385	struct REM s;
1386	# endif
1387	uint8_t padding[0x11100]; /* multiple of 64 */
1388	} rem;
1389	#endif
1390
1391	union
1392	{
1393	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1394	struct GIM s;
1395	#endif
1396	uint8_t padding[448]; /* multiple of 64 */
1397	} gim;
1398
1399	union
1400	{
1401	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1402	struct APIC s;
1403	#endif
1404	uint8_t padding[128]; /* multiple of 8 */
1405	} apic;
1406
1407	/* ---- begin small stuff ---- */
1408
1409	/** VM part. */
1410	union
1411	{
1412	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1413	struct VMINT s;
1414	#endif
1415	uint8_t padding[32]; /* multiple of 8 */
1416	} vm;
1417
1418	/** CFGM part. */
1419	union
1420	{
1421	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1422	struct CFGM s;
1423	#endif
1424	uint8_t padding[8]; /* multiple of 8 */
1425	} cfgm;
1426
1427	#ifdef VBOX_BUGREF_9217
1428	/** Padding for aligning the structure size on a page boundrary. */
1429	# ifdef VBOX_WITH_REM
1430	uint8_t abAlignment2[3030 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1431	# else
1432	uint8_t abAlignment2[3286 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1433	# endif
1434	#else
1435	/** Padding for aligning the cpu array on a page boundary. */
1436	# ifdef VBOX_WITH_REM
1437	uint8_t abAlignment2[3030];
1438	# else
1439	uint8_t abAlignment2[3286];
1440	# endif
1441	#endif
1442
1443	/* ---- end small stuff ---- */
1444
1445	#ifdef VBOX_BUGREF_9217
1446	/** Array of VMCPU pointers. */
1447	PVMCPUR3 apCpus[VMM_MAX_CPU_COUNT];
1448	#else
1449	/** VMCPU array for the configured number of virtual CPUs.
1450	* Must be aligned on a page boundary for TLB hit reasons as well as
1451	* alignment of VMCPU members. */
1452	VMCPU aCpus[1];
1453	#endif
1454	} VM;
1455
1456
1457	#ifdef IN_RC
1458	RT_C_DECLS_BEGIN
1459
1460	/** The VM structure.
1461	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1462	* globals which we should avoid using.
1463	*/
1464	extern DECLIMPORT(VM) g_VM;
1465
1466	/** The VMCPU structure for virtual CPU \#0.
1467	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1468	* globals which we should avoid using.
1469	*/
1470	extern DECLIMPORT(VMCPU) g_VCpu0;
1471
1472	RT_C_DECLS_END
1473	#endif
1474
1475	/** @} */
1476
1477	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1478

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/include/VBox/vmm/vm.h@ 80135

Download in other formats: