VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h@ 80313

Last change on this file since 80313 was 80313, checked in by vboxsync, 6 years ago

vm.h,gvm.h: Fix 32-bit header syntax checking.
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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_vm_h
27#define VBOX_INCLUDED_vmm_vm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#ifndef VBOX_FOR_DTRACE_LIB
33# ifndef USING_VMM_COMMON_DEFS
34# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/Config.kmk - make sure you really need to include this file!"
35# endif
36# include <iprt/param.h>
37# include <VBox/param.h>
38# include <VBox/types.h>
39# include <VBox/vmm/cpum.h>
40# include <VBox/vmm/stam.h>
41# include <VBox/vmm/vmapi.h>
42# include <VBox/vmm/vmm.h>
43# include <VBox/sup.h>
44#else
45# pragma D depends_on library vbox-types.d
46# pragma D depends_on library CPUMInternal.d
47# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48#endif
49
50
51
52/** @defgroup grp_vm The Virtual Machine
53 * @ingroup grp_vmm
54 * @{
55 */
56
57/**
58 * The state of a Virtual CPU.
59 *
60 * The basic state indicated here is whether the CPU has been started or not. In
61 * addition, there are sub-states when started for assisting scheduling (GVMM
62 * mostly).
63 *
64 * The transition out of the STOPPED state is done by a vmR3PowerOn.
65 * The transition back to the STOPPED state is done by vmR3PowerOff.
66 *
67 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69 */
70typedef enum VMCPUSTATE
71{
72 /** The customary invalid zero. */
73 VMCPUSTATE_INVALID = 0,
74
75 /** Virtual CPU has not yet been started. */
76 VMCPUSTATE_STOPPED,
77
78 /** CPU started. */
79 VMCPUSTATE_STARTED,
80 /** CPU started in HM context. */
81 VMCPUSTATE_STARTED_HM,
82 /** Executing guest code and can be poked (RC or STI bits of HM). */
83 VMCPUSTATE_STARTED_EXEC,
84 /** Executing guest code in the recompiler. */
85 VMCPUSTATE_STARTED_EXEC_REM,
86 /** Executing guest code using NEM. */
87 VMCPUSTATE_STARTED_EXEC_NEM,
88 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
89 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
90 /** Halted. */
91 VMCPUSTATE_STARTED_HALTED,
92
93 /** The end of valid virtual CPU states. */
94 VMCPUSTATE_END,
95
96 /** Ensure 32-bit type. */
97 VMCPUSTATE_32BIT_HACK = 0x7fffffff
98} VMCPUSTATE;
99
100/** Enables 64-bit FFs. */
101#define VMCPU_WITH_64_BIT_FFS
102
103
104/**
105 * The cross context virtual CPU structure.
106 *
107 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
108 */
109typedef struct VMCPU
110{
111 /** @name Volatile per-cpu data.
112 * @{ */
113 /** Per CPU forced action.
114 * See the VMCPU_FF_* \#defines. Updated atomically. */
115#ifdef VMCPU_WITH_64_BIT_FFS
116 uint64_t volatile fLocalForcedActions;
117#else
118 uint32_t volatile fLocalForcedActions;
119 uint32_t fForLocalForcedActionsExpansion;
120#endif
121 /** The CPU state. */
122 VMCPUSTATE volatile enmState;
123
124 /** Which host CPU ID is this EMT running on.
125 * Only valid when in RC or HMR0 with scheduling disabled. */
126 RTCPUID volatile idHostCpu;
127 /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
128 * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
129 uint32_t volatile iHostCpuSet;
130 /** Padding up to 64 bytes. */
131 uint8_t abAlignment0[64 - 20];
132 /** @} */
133
134 /** IEM part.
135 * @remarks This comes first as it allows the use of 8-bit immediates for the
136 * first 64 bytes of the structure, reducing code size a wee bit. */
137#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
138 union VMCPUUNIONIEMFULL
139#else
140 union VMCPUUNIONIEMSTUB
141#endif
142 {
143#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
144 struct IEMCPU s;
145#endif
146 uint8_t padding[18496]; /* multiple of 64 */
147 } iem;
148
149 /** @name Static per-cpu data.
150 * (Putting this after IEM, hoping that it's less frequently used than it.)
151 * @{ */
152 /** Ring-3 Host Context VM Pointer. */
153 PVMR3 pVMR3;
154#ifndef VBOX_BUGREF_9217
155 /** Ring-0 Host Context VM Pointer. */
156 PVMR0 pVMR0;
157#else
158 RTR0PTR R0PtrUnused0;
159#endif
160 /** Raw-mode Context VM Pointer. */
161 uint32_t pVMRC;
162 /** Padding for new raw-mode (long mode). */
163 uint32_t pVMRCPadding;
164 /** Pointer to the ring-3 UVMCPU structure. */
165 PUVMCPU pUVCpu;
166 /** The native thread handle. */
167 RTNATIVETHREAD hNativeThread;
168 /** The native R0 thread handle. (different from the R3 handle!) */
169 RTNATIVETHREAD hNativeThreadR0;
170 /** The CPU ID.
171 * This is the index into the VM::aCpu array. */
172#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
173 VMCPUID idCpuUnsafe;
174#else
175 VMCPUID idCpu;
176#endif
177
178 /** Align the structures below bit on a 64-byte boundary and make sure it starts
179 * at the same offset in both 64-bit and 32-bit builds.
180 *
181 * @remarks The alignments of the members that are larger than 48 bytes should be
182 * 64-byte for cache line reasons. structs containing small amounts of
183 * data could be lumped together at the end with a < 64 byte padding
184 * following it (to grow into and align the struct size).
185 */
186 uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
187 /** @} */
188
189 /** HM part. */
190 union VMCPUUNIONHM
191 {
192#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
193 struct HMCPU s;
194#endif
195 uint8_t padding[5888]; /* multiple of 64 */
196 } hm;
197
198 /** NEM part. */
199 union VMCPUUNIONNEM
200 {
201#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
202 struct NEMCPU s;
203#endif
204 uint8_t padding[512]; /* multiple of 64 */
205 } nem;
206
207 /** TRPM part. */
208 union VMCPUUNIONTRPM
209 {
210#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
211 struct TRPMCPU s;
212#endif
213 uint8_t padding[128]; /* multiple of 64 */
214 } trpm;
215
216 /** TM part. */
217 union VMCPUUNIONTM
218 {
219#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
220 struct TMCPU s;
221#endif
222 uint8_t padding[5760]; /* multiple of 64 */
223 } tm;
224
225 /** VMM part. */
226 union VMCPUUNIONVMM
227 {
228#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
229 struct VMMCPU s;
230#endif
231 uint8_t padding[896]; /* multiple of 64 */
232 } vmm;
233
234 /** PDM part. */
235 union VMCPUUNIONPDM
236 {
237#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
238 struct PDMCPU s;
239#endif
240 uint8_t padding[256]; /* multiple of 64 */
241 } pdm;
242
243 /** IOM part. */
244 union VMCPUUNIONIOM
245 {
246#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
247 struct IOMCPU s;
248#endif
249 uint8_t padding[512]; /* multiple of 64 */
250 } iom;
251
252 /** DBGF part.
253 * @todo Combine this with other tiny structures. */
254 union VMCPUUNIONDBGF
255 {
256#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
257 struct DBGFCPU s;
258#endif
259 uint8_t padding[256]; /* multiple of 64 */
260 } dbgf;
261
262 /** GIM part. */
263 union VMCPUUNIONGIM
264 {
265#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
266 struct GIMCPU s;
267#endif
268 uint8_t padding[512]; /* multiple of 64 */
269 } gim;
270
271 /** APIC part. */
272 union VMCPUUNIONAPIC
273 {
274#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
275 struct APICCPU s;
276#endif
277 uint8_t padding[1792]; /* multiple of 64 */
278 } apic;
279
280 /*
281 * Some less frequently used global members that doesn't need to take up
282 * precious space at the head of the structure.
283 */
284
285 /** Trace groups enable flags. */
286 uint32_t fTraceGroups; /* 64 / 44 */
287 /** State data for use by ad hoc profiling. */
288 uint32_t uAdHoc;
289 /** Profiling samples for use by ad hoc profiling. */
290 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
291
292 /** Align the following members on page boundary. */
293 uint8_t abAlignment2[1400];
294
295 /** PGM part. */
296 union VMCPUUNIONPGM
297 {
298#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
299 struct PGMCPU s;
300#endif
301 uint8_t padding[4096]; /* multiple of 4096 */
302 } pgm;
303
304 /** CPUM part. */
305 union VMCPUUNIONCPUM
306 {
307#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
308 struct CPUMCPU s;
309#endif
310#ifdef VMCPU_INCL_CPUM_GST_CTX
311 /** The guest CPUM context for direct use by execution engines.
312 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
313 * others. The rest will use the function based CPUM API. */
314 CPUMCTX GstCtx;
315#endif
316 uint8_t padding[4096]; /* multiple of 4096 */
317 } cpum;
318
319 /** EM part. */
320 union VMCPUUNIONEM
321 {
322#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
323 struct EMCPU s;
324#endif
325 uint8_t padding[40960]; /* multiple of 4096 */
326 } em;
327} VMCPU;
328
329
330#ifndef VBOX_FOR_DTRACE_LIB
331AssertCompileSizeAlignment(VMCPU, 4096);
332
333/** @name Operations on VMCPU::enmState
334 * @{ */
335/** Gets the VMCPU state. */
336#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
337/** Sets the VMCPU state. */
338#define VMCPU_SET_STATE(pVCpu, enmNewState) \
339 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
340/** Cmpares and sets the VMCPU state. */
341#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
342 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
343/** Checks the VMCPU state. */
344#ifdef VBOX_STRICT
345# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
346 do { \
347 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
348 AssertMsg(enmState == (enmExpectedState), \
349 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
350 enmState, enmExpectedState, (pVCpu)->idCpu)); \
351 } while (0)
352#else
353# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
354#endif
355/** Tests if the state means that the CPU is started. */
356#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
357/** Tests if the state means that the CPU is stopped. */
358#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
359/** @} */
360
361
362/** The name of the raw-mode context VMM Core module. */
363#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
364/** The name of the ring-0 context VMM Core module. */
365#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
366
367
368/** VM Forced Action Flags.
369 *
370 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
371 * action mask of a VM.
372 *
373 * Available VM bits:
374 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
375 *
376 *
377 * Available VMCPU bits:
378 * 14, 15, 36 to 63
379 *
380 * @todo If we run low on VMCPU, we may consider merging the SELM bits
381 *
382 * @{
383 */
384/** The virtual sync clock has been stopped, go to TM until it has been
385 * restarted... */
386#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
387#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
388/** PDM Queues are pending. */
389#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
390/** The bit number for VM_FF_PDM_QUEUES. */
391#define VM_FF_PDM_QUEUES_BIT 3
392/** PDM DMA transfers are pending. */
393#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
394/** The bit number for VM_FF_PDM_DMA. */
395#define VM_FF_PDM_DMA_BIT 4
396/** This action forces the VM to call DBGF so DBGF can service debugger
397 * requests in the emulation thread.
398 * This action flag stays asserted till DBGF clears it.*/
399#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
400/** The bit number for VM_FF_DBGF. */
401#define VM_FF_DBGF_BIT 8
402/** This action forces the VM to service pending requests from other
403 * thread or requests which must be executed in another context. */
404#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
405#define VM_FF_REQUEST_BIT 9
406/** Check for VM state changes and take appropriate action. */
407#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
408/** The bit number for VM_FF_CHECK_VM_STATE. */
409#define VM_FF_CHECK_VM_STATE_BIT 10
410/** Reset the VM. (postponed) */
411#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
412/** The bit number for VM_FF_RESET. */
413#define VM_FF_RESET_BIT 11
414/** EMT rendezvous in VMM. */
415#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
416/** The bit number for VM_FF_EMT_RENDEZVOUS. */
417#define VM_FF_EMT_RENDEZVOUS_BIT 12
418
419/** PGM needs to allocate handy pages. */
420#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
421#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
422/** PGM is out of memory.
423 * Abandon all loops and code paths which can be resumed and get up to the EM
424 * loops. */
425#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
426#define VM_FF_PGM_NO_MEMORY_BIT 19
427 /** PGM is about to perform a lightweight pool flush
428 * Guest SMP: all EMT threads should return to ring 3
429 */
430#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
431#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
432/** REM needs to be informed about handler changes. */
433#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
434/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
435#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
436/** Suspend the VM - debug only. */
437#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
438#define VM_FF_DEBUG_SUSPEND_BIT 31
439
440
441/** This action forces the VM to check any pending interrupts on the APIC. */
442#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
443#define VMCPU_FF_INTERRUPT_APIC_BIT 0
444/** This action forces the VM to check any pending interrups on the PIC. */
445#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
446#define VMCPU_FF_INTERRUPT_PIC_BIT 1
447/** This action forces the VM to schedule and run pending timer (TM).
448 * @remarks Don't move - PATM compatibility. */
449#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
450#define VMCPU_FF_TIMER_BIT 2
451/** This action forces the VM to check any pending NMIs. */
452#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
453#define VMCPU_FF_INTERRUPT_NMI_BIT 3
454/** This action forces the VM to check any pending SMIs. */
455#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
456#define VMCPU_FF_INTERRUPT_SMI_BIT 4
457/** PDM critical section unlocking is pending, process promptly upon return to R3. */
458#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
459#define VMCPU_FF_PDM_CRITSECT_BIT 5
460/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
461 * the virtual CPU out of the next (/current) halted state. It is not processed
462 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
463 * is cleared the next time EM leaves the HALTED state. */
464#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
465#define VMCPU_FF_UNHALT_BIT 6
466/** Pending IEM action (mask). */
467#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
468/** Pending IEM action (bit number). */
469#define VMCPU_FF_IEM_BIT 7
470/** Pending APIC action (bit number). */
471#define VMCPU_FF_UPDATE_APIC_BIT 8
472/** This action forces the VM to update APIC's asynchronously arrived
473 * interrupts as pending interrupts. */
474#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
475/** This action forces the VM to service pending requests from other
476 * thread or requests which must be executed in another context. */
477#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
478#define VMCPU_FF_REQUEST_BIT 9
479/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
480#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
481/** The bit number for VMCPU_FF_DBGF. */
482#define VMCPU_FF_DBGF_BIT 10
483/** This action forces the VM to service any pending updates to CR3 (used only
484 * by HM). */
485/** Hardware virtualized nested-guest interrupt pending. */
486#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
487#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
488#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
489#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
490/** This action forces the VM to service any pending updates to PAE PDPEs (used
491 * only by HM). */
492#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
493#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
494/** This action forces the VM to resync the page tables before going
495 * back to execute guest code. (GLOBAL FLUSH) */
496#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
497#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
498/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
499 * (NON-GLOBAL FLUSH) */
500#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
501#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
502/** Check for pending TLB shootdown actions (deprecated)
503 * Reserved for furture HM re-use if necessary / safe.
504 * Consumer: HM */
505#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
506#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
507/** Check for pending TLB flush action.
508 * Consumer: HM
509 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
510#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
511/** The bit number for VMCPU_FF_TLB_FLUSH. */
512#define VMCPU_FF_TLB_FLUSH_BIT 19
513/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
514/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
515/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
516/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
517/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
518#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
519#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
520/** Block injection of non-maskable interrupts to the guest. */
521#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
522#define VMCPU_FF_BLOCK_NMIS_BIT 25
523/** Force return to Ring-3. */
524#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
525#define VMCPU_FF_TO_R3_BIT 28
526/** Force return to ring-3 to service pending I/O or MMIO write.
527 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
528 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
529 * status codes to be propagated at the same time without loss. */
530#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
531#define VMCPU_FF_IOM_BIT 29
532/* 30 used to be VMCPU_FF_CPUM */
533/** VMX-preemption timer in effect. */
534#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
535#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
536/** Pending MTF (Monitor Trap Flag) event. */
537#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
538#define VMCPU_FF_VMX_MTF_BIT 32
539/** VMX APIC-write emulation pending. */
540#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
541#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
542/** VMX interrupt-window event pending. */
543#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
544#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
545/** VMX NMI-window event pending. */
546#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
547#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
548
549
550/** Externally VM forced actions. Used to quit the idle/wait loop. */
551#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
552/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
553#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
554
555/** Externally forced VM actions. Used to quit the idle/wait loop. */
556#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
557 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
558/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
559#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
560 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
561 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
562 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
563
564/** High priority VM pre-execution actions. */
565#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
566 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
567 | VM_FF_EMT_RENDEZVOUS )
568/** High priority VMCPU pre-execution actions. */
569#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
570 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
571 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
572 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
573 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
574
575/** High priority VM pre raw-mode execution mask. */
576#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
577/** High priority VMCPU pre raw-mode execution mask. */
578#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
579 | VMCPU_FF_INHIBIT_INTERRUPTS )
580
581/** High priority post-execution actions. */
582#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
583/** High priority post-execution actions. */
584#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
585 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
586 | VMCPU_FF_IEM | VMCPU_FF_IOM )
587
588/** Normal priority VM post-execution actions. */
589#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
590 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
591/** Normal priority VMCPU post-execution actions. */
592#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
593
594/** Normal priority VM actions. */
595#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA \
596 | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
597/** Normal priority VMCPU actions. */
598#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
599
600/** Flags to clear before resuming guest execution. */
601#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
602
603
604/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
605#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
606 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
607/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
608#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
609 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
610/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
611#ifdef IN_RING3
612# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
613 | VMCPU_FF_VMX_MTF )
614#else
615# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
616 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
617#endif
618/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
619 * enabled. */
620#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
621 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
622 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
623 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
624 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
625/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
626 * disabled. */
627#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
628 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
629 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
630
631/** VM Flags that cause the HM loops to go back to ring-3. */
632#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
633 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
634/** VMCPU Flags that cause the HM loops to go back to ring-3. */
635#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
636 | VMCPU_FF_IEM | VMCPU_FF_IOM)
637
638/** High priority ring-0 VM pre HM-mode execution mask. */
639#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
640/** High priority ring-0 VMCPU pre HM-mode execution mask. */
641#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
642 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
643 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
644/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
645#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
646 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
647 | VM_FF_PDM_DMA) )
648/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
649#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
650 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
651
652/** All the forced VM flags. */
653#define VM_FF_ALL_MASK (UINT32_MAX)
654/** All the forced VMCPU flags. */
655#define VMCPU_FF_ALL_MASK (UINT32_MAX)
656
657/** All the forced VM flags except those related to raw-mode and hardware
658 * assisted execution. */
659#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
660/** All the forced VMCPU flags except those related to raw-mode and hardware
661 * assisted execution. */
662#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
663/** @} */
664
665/** @def VM_FF_SET
666 * Sets a single force action flag.
667 *
668 * @param pVM The cross context VM structure.
669 * @param fFlag The flag to set.
670 */
671#define VM_FF_SET(pVM, fFlag) do { \
672 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
673 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
674 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
675 } while (0)
676
677/** @def VMCPU_FF_SET
678 * Sets a single force action flag for the given VCPU.
679 *
680 * @param pVCpu The cross context virtual CPU structure.
681 * @param fFlag The flag to set.
682 * @sa VMCPU_FF_SET_MASK
683 */
684#ifdef VMCPU_WITH_64_BIT_FFS
685# define VMCPU_FF_SET(pVCpu, fFlag) do { \
686 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
687 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
688 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
689 } while (0)
690#else
691# define VMCPU_FF_SET(pVCpu, fFlag) do { \
692 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
693 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
694 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
695 } while (0)
696#endif
697
698/** @def VMCPU_FF_SET_MASK
699 * Sets a two or more force action flag for the given VCPU.
700 *
701 * @param pVCpu The cross context virtual CPU structure.
702 * @param fFlags The flags to set.
703 * @sa VMCPU_FF_SET
704 */
705#ifdef VMCPU_WITH_64_BIT_FFS
706# if ARCH_BITS > 32
707# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
708 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
709# else
710# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
711 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
712 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
713 } while (0)
714# endif
715#else
716# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
717 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
718#endif
719
720/** @def VM_FF_CLEAR
721 * Clears a single force action flag.
722 *
723 * @param pVM The cross context VM structure.
724 * @param fFlag The flag to clear.
725 */
726#define VM_FF_CLEAR(pVM, fFlag) do { \
727 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
728 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
729 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
730 } while (0)
731
732/** @def VMCPU_FF_CLEAR
733 * Clears a single force action flag for the given VCPU.
734 *
735 * @param pVCpu The cross context virtual CPU structure.
736 * @param fFlag The flag to clear.
737 */
738#ifdef VMCPU_WITH_64_BIT_FFS
739# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
740 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
741 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
742 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
743 } while (0)
744#else
745# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
746 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
747 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
748 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
749 } while (0)
750#endif
751
752/** @def VMCPU_FF_CLEAR_MASK
753 * Clears two or more force action flags for the given VCPU.
754 *
755 * @param pVCpu The cross context virtual CPU structure.
756 * @param fFlags The flags to clear.
757 */
758#ifdef VMCPU_WITH_64_BIT_FFS
759# if ARCH_BITS > 32
760# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
761 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
762# else
763# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
764 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
765 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
766 } while (0)
767# endif
768#else
769# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
770 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
771#endif
772
773/** @def VM_FF_IS_SET
774 * Checks if single a force action flag is set.
775 *
776 * @param pVM The cross context VM structure.
777 * @param fFlag The flag to check.
778 * @sa VM_FF_IS_ANY_SET
779 */
780#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
781# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
782#else
783# define VM_FF_IS_SET(pVM, fFlag) \
784 ([](PVM a_pVM) -> bool \
785 { \
786 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
787 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
788 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
789 }(pVM))
790#endif
791
792/** @def VMCPU_FF_IS_SET
793 * Checks if a single force action flag is set for the given VCPU.
794 *
795 * @param pVCpu The cross context virtual CPU structure.
796 * @param fFlag The flag to check.
797 * @sa VMCPU_FF_IS_ANY_SET
798 */
799#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
800# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
801#else
802# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
803 ([](PCVMCPU a_pVCpu) -> bool \
804 { \
805 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
806 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
807 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
808 }(pVCpu))
809#endif
810
811/** @def VM_FF_IS_ANY_SET
812 * Checks if one or more force action in the specified set is pending.
813 *
814 * @param pVM The cross context VM structure.
815 * @param fFlags The flags to check for.
816 * @sa VM_FF_IS_SET
817 */
818#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
819
820/** @def VMCPU_FF_IS_ANY_SET
821 * Checks if two or more force action flags in the specified set is set for the given VCPU.
822 *
823 * @param pVCpu The cross context virtual CPU structure.
824 * @param fFlags The flags to check for.
825 * @sa VMCPU_FF_IS_SET
826 */
827#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
828
829/** @def VM_FF_TEST_AND_CLEAR
830 * Checks if one (!) force action in the specified set is pending and clears it atomically
831 *
832 * @returns true if the bit was set.
833 * @returns false if the bit was clear.
834 * @param pVM The cross context VM structure.
835 * @param fFlag Flag constant to check and clear (_BIT is appended).
836 */
837#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
838
839/** @def VMCPU_FF_TEST_AND_CLEAR
840 * Checks if one (!) force action in the specified set is pending and clears it atomically
841 *
842 * @returns true if the bit was set.
843 * @returns false if the bit was clear.
844 * @param pVCpu The cross context virtual CPU structure.
845 * @param fFlag Flag constant to check and clear (_BIT is appended).
846 */
847#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
848
849/** @def VM_FF_IS_PENDING_EXCEPT
850 * Checks if one or more force action in the specified set is pending while one
851 * or more other ones are not.
852 *
853 * @param pVM The cross context VM structure.
854 * @param fFlags The flags to check for.
855 * @param fExcpt The flags that should not be set.
856 */
857#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
858 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
859
860/** @def VM_IS_EMT
861 * Checks if the current thread is the emulation thread (EMT).
862 *
863 * @remark The ring-0 variation will need attention if we expand the ring-0
864 * code to let threads other than EMT mess around with the VM.
865 */
866#ifdef IN_RC
867# define VM_IS_EMT(pVM) true
868#else
869# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
870#endif
871
872/** @def VMCPU_IS_EMT
873 * Checks if the current thread is the emulation thread (EMT) for the specified
874 * virtual CPU.
875 */
876#ifdef IN_RC
877# define VMCPU_IS_EMT(pVCpu) true
878#else
879# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
880#endif
881
882/** @def VM_ASSERT_EMT
883 * Asserts that the current thread IS the emulation thread (EMT).
884 */
885#ifdef IN_RC
886# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
887#elif defined(IN_RING0)
888# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
889#else
890# define VM_ASSERT_EMT(pVM) \
891 AssertMsg(VM_IS_EMT(pVM), \
892 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
893#endif
894
895/** @def VMCPU_ASSERT_EMT
896 * Asserts that the current thread IS the emulation thread (EMT) of the
897 * specified virtual CPU.
898 */
899#ifdef IN_RC
900# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
901#elif defined(IN_RING0)
902# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
903 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
904 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
905 (pVCpu) ? (pVCpu)->idCpu : 0))
906#else
907# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
908 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
909 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
910#endif
911
912/** @def VM_ASSERT_EMT_RETURN
913 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
914 */
915#ifdef IN_RC
916# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
917#elif defined(IN_RING0)
918# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
919#else
920# define VM_ASSERT_EMT_RETURN(pVM, rc) \
921 AssertMsgReturn(VM_IS_EMT(pVM), \
922 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
923 (rc))
924#endif
925
926/** @def VMCPU_ASSERT_EMT_RETURN
927 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
928 */
929#ifdef IN_RC
930# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
931#elif defined(IN_RING0)
932# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
933#else
934# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
935 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
936 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
937 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
938 (rc))
939#endif
940
941/** @def VMCPU_ASSERT_EMT_OR_GURU
942 * Asserts that the current thread IS the emulation thread (EMT) of the
943 * specified virtual CPU.
944 */
945#if defined(IN_RC) || defined(IN_RING0)
946# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
947 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
948 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
949#else
950# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
951 AssertMsg( VMCPU_IS_EMT(pVCpu) \
952 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
953 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
954 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
955 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
956#endif
957
958/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
959 * Asserts that the current thread IS the emulation thread (EMT) of the
960 * specified virtual CPU or the VM is not running.
961 */
962#if defined(IN_RC) || defined(IN_RING0)
963# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
964 Assert( VMCPU_IS_EMT(pVCpu) \
965 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
966#else
967# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
968 AssertMsg( VMCPU_IS_EMT(pVCpu) \
969 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
970 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
971 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
972#endif
973
974/** @def VMSTATE_IS_RUNNING
975 * Checks if the given state indicates a running VM.
976 */
977#define VMSTATE_IS_RUNNING(a_enmVMState) \
978 ( (enmVMState) == VMSTATE_RUNNING \
979 || (enmVMState) == VMSTATE_RUNNING_LS )
980
981/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
982 * Checks if the VM is running.
983 * @note This is only for pure debug assertions. No AssertReturn or similar!
984 * @sa VMSTATE_IS_RUNNING
985 */
986#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
987 ( (pVM)->enmVMState == VMSTATE_RUNNING \
988 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
989
990/** @def VM_ASSERT_IS_NOT_RUNNING
991 * Asserts that the VM is not running.
992 */
993#if defined(IN_RC) || defined(IN_RING0)
994#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
995#else
996#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
997 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
998#endif
999
1000/** @def VM_ASSERT_EMT0
1001 * Asserts that the current thread IS emulation thread \#0 (EMT0).
1002 */
1003#if (defined(VBOX_BUGREF_9217_PART_I) || defined(VBOX_BUGREF_9217)) && defined(IN_RING3)
1004# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1005#else
1006# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1007#endif
1008
1009/** @def VM_ASSERT_EMT0_RETURN
1010 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1011 * it isn't.
1012 */
1013#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1014
1015
1016/**
1017 * Asserts that the current thread is NOT the emulation thread.
1018 */
1019#define VM_ASSERT_OTHER_THREAD(pVM) \
1020 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1021
1022
1023/** @def VM_ASSERT_STATE
1024 * Asserts a certain VM state.
1025 */
1026#define VM_ASSERT_STATE(pVM, _enmState) \
1027 AssertMsg((pVM)->enmVMState == (_enmState), \
1028 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1029
1030/** @def VM_ASSERT_STATE_RETURN
1031 * Asserts a certain VM state and returns if it doesn't match.
1032 */
1033#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1034 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1035 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1036 (rc))
1037
1038/** @def VM_IS_VALID_EXT
1039 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1040 * or terminated. */
1041#define VM_IS_VALID_EXT(pVM) \
1042 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1043 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1044 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1045 && VM_IS_EMT(pVM))) )
1046
1047/** @def VM_ASSERT_VALID_EXT_RETURN
1048 * Asserts a the VM handle is valid for external access, i.e. not being
1049 * destroy or terminated.
1050 */
1051#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1052 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1053 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1054 ? VMGetStateName(pVM->enmVMState) : ""), \
1055 (rc))
1056
1057/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1058 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1059 * destroy or terminated.
1060 */
1061#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1062 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1063 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1064 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1065 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1066 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1067 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1068 (rc))
1069
1070#endif /* !VBOX_FOR_DTRACE_LIB */
1071
1072
1073/**
1074 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1075 *
1076 * ONLY HM and NEM MAY USE THIS!
1077 *
1078 * @param a_pVM The cross context VM structure.
1079 * @param a_bValue The new value.
1080 * @internal
1081 */
1082#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1083 do { \
1084 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1085 ASMCompilerBarrier(); /* just to be on the safe side */ \
1086 } while (0)
1087
1088/**
1089 * Checks whether raw-mode is used.
1090 *
1091 * @retval true if either is used.
1092 * @retval false if software virtualization (raw-mode) is used.
1093 *
1094 * @param a_pVM The cross context VM structure.
1095 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1096 * @internal
1097 */
1098#ifdef VBOX_WITH_RAW_MODE
1099# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1100#else
1101# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1102#endif
1103
1104/**
1105 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1106 *
1107 * @retval true if either is used.
1108 * @retval false if software virtualization (raw-mode) is used.
1109 *
1110 * @param a_pVM The cross context VM structure.
1111 * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1112 * @internal
1113 */
1114#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1115
1116/**
1117 * Checks whether HM is being used by this VM.
1118 *
1119 * @retval true if HM (VT-x/AMD-v) is used.
1120 * @retval false if not.
1121 *
1122 * @param a_pVM The cross context VM structure.
1123 * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1124 * @internal
1125 */
1126#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1127
1128/**
1129 * Checks whether NEM is being used by this VM.
1130 *
1131 * @retval true if a native hypervisor API is used.
1132 * @retval false if not.
1133 *
1134 * @param a_pVM The cross context VM structure.
1135 * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1136 * @internal
1137 */
1138#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1139
1140
1141/**
1142 * The cross context VM structure.
1143 *
1144 * It contains all the VM data which have to be available in all contexts.
1145 * Even if it contains all the data the idea is to use APIs not to modify all
1146 * the members all around the place. Therefore we make use of unions to hide
1147 * everything which isn't local to the current source module. This means we'll
1148 * have to pay a little bit of attention when adding new members to structures
1149 * in the unions and make sure to keep the padding sizes up to date.
1150 *
1151 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1152 */
1153typedef struct VM
1154{
1155 /** The state of the VM.
1156 * This field is read only to everyone except the VM and EM. */
1157 VMSTATE volatile enmVMState;
1158 /** Forced action flags.
1159 * See the VM_FF_* \#defines. Updated atomically.
1160 */
1161 volatile uint32_t fGlobalForcedActions;
1162 /** Pointer to the array of page descriptors for the VM structure allocation. */
1163 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1164 /** Session handle. For use when calling SUPR0 APIs. */
1165#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1166 PSUPDRVSESSION pSessionUnsafe;
1167#else
1168 PSUPDRVSESSION pSession;
1169#endif
1170 /** Pointer to the ring-3 VM structure. */
1171 PUVM pUVM;
1172 /** Ring-3 Host Context VM Pointer. */
1173#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1174 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1175#else
1176 R3PTRTYPE(struct VM *) pVMR3;
1177#endif
1178#ifndef VBOX_BUGREF_9217
1179 /** Ring-0 Host Context VM Pointer. */
1180 R0PTRTYPE(struct VM *) pVMR0;
1181#else
1182 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1183 R0PTRTYPE(struct VM *) pVMR0ForCall;
1184#endif
1185 /** Raw-mode Context VM Pointer. */
1186 uint32_t pVMRC;
1187 /** Padding for new raw-mode (long mode). */
1188 uint32_t pVMRCPadding;
1189
1190 /** The GVM VM handle. Only the GVM should modify this field. */
1191#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1192 uint32_t hSelfUnsafe;
1193#else
1194 uint32_t hSelf;
1195#endif
1196 /** Number of virtual CPUs. */
1197#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1198 uint32_t cCpusUnsafe;
1199#else
1200 uint32_t cCpus;
1201#endif
1202 /** CPU excution cap (1-100) */
1203 uint32_t uCpuExecutionCap;
1204
1205#ifdef VBOX_BUGREF_9217
1206 /** Size of the VM structure. */
1207 uint32_t cbSelf;
1208 /** Size of the VMCPU structure. */
1209 uint32_t cbVCpu;
1210 /** Structure version number (TBD). */
1211 uint32_t uStructVersion;
1212#else
1213 /** Size of the VM structure including the VMCPU array. */
1214 uint32_t cbSelf;
1215 uint32_t uUnused1;
1216 uint32_t uUnused2;
1217#endif
1218
1219 /** @name Various items that are frequently accessed.
1220 * @{ */
1221 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1222 * This is set early during vmR3InitRing3 by HM or NEM. */
1223 uint8_t const bMainExecutionEngine;
1224
1225 /** Hardware VM support is available and enabled.
1226 * Determined very early during init.
1227 * This is placed here for performance reasons.
1228 * @todo obsoleted by bMainExecutionEngine, eliminate. */
1229 bool fHMEnabled;
1230
1231 /** Large page enabled flag.
1232 * @todo This doesn't need to be here, PGM should store it in it's own
1233 * structures instead. */
1234 bool fUseLargePages;
1235 /** @} */
1236
1237 /** Alignment padding. */
1238 uint8_t uPadding1[5];
1239
1240 /** @name Debugging
1241 * @{ */
1242 /** Ring-3 Host Context VM Pointer. */
1243 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1244 /** Ring-0 Host Context VM Pointer. */
1245 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1246 /** @} */
1247
1248 /** Padding - the unions must be aligned on a 64 bytes boundary. */
1249 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1250
1251 /** CPUM part. */
1252 union
1253 {
1254#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1255 struct CPUM s;
1256#endif
1257#ifdef VBOX_INCLUDED_vmm_cpum_h
1258 /** Read only info exposed about the host and guest CPUs. */
1259 struct
1260 {
1261 /** Padding for hidden fields. */
1262 uint8_t abHidden0[64];
1263 /** Host CPU feature information. */
1264 CPUMFEATURES HostFeatures;
1265 /** Guest CPU feature information. */
1266 CPUMFEATURES GuestFeatures;
1267 } const ro;
1268#endif
1269 uint8_t padding[1536]; /* multiple of 64 */
1270 } cpum;
1271
1272 /** VMM part. */
1273 union
1274 {
1275#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1276 struct VMM s;
1277#endif
1278 uint8_t padding[1600]; /* multiple of 64 */
1279 } vmm;
1280
1281 /** PGM part. */
1282 union
1283 {
1284#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1285 struct PGM s;
1286#endif
1287 uint8_t padding[20800]; /* multiple of 64 */
1288 } pgm;
1289
1290 /** HM part. */
1291 union
1292 {
1293#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1294 struct HM s;
1295#endif
1296 uint8_t padding[5440]; /* multiple of 64 */
1297 } hm;
1298
1299 /** TRPM part. */
1300 union
1301 {
1302#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1303 struct TRPM s;
1304#endif
1305 uint8_t padding[5248]; /* multiple of 64 */
1306 } trpm;
1307
1308 /** SELM part. */
1309 union
1310 {
1311#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1312 struct SELM s;
1313#endif
1314 uint8_t padding[768]; /* multiple of 64 */
1315 } selm;
1316
1317 /** MM part. */
1318 union
1319 {
1320#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1321 struct MM s;
1322#endif
1323 uint8_t padding[192]; /* multiple of 64 */
1324 } mm;
1325
1326 /** PDM part. */
1327 union
1328 {
1329#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1330 struct PDM s;
1331#endif
1332 uint8_t padding[1920]; /* multiple of 64 */
1333 } pdm;
1334
1335 /** IOM part. */
1336 union
1337 {
1338#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1339 struct IOM s;
1340#endif
1341 uint8_t padding[896]; /* multiple of 64 */
1342 } iom;
1343
1344 /** EM part. */
1345 union
1346 {
1347#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1348 struct EM s;
1349#endif
1350 uint8_t padding[256]; /* multiple of 64 */
1351 } em;
1352
1353 /** NEM part. */
1354 union
1355 {
1356#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1357 struct NEM s;
1358#endif
1359 uint8_t padding[128]; /* multiple of 64 */
1360 } nem;
1361
1362 /** TM part. */
1363 union
1364 {
1365#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1366 struct TM s;
1367#endif
1368 uint8_t padding[7872]; /* multiple of 64 */
1369 } tm;
1370
1371 /** DBGF part. */
1372 union
1373 {
1374#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1375 struct DBGF s;
1376#endif
1377#ifdef VBOX_INCLUDED_vmm_dbgf_h
1378 /** Read only info exposed about interrupt breakpoints and selected events. */
1379 struct
1380 {
1381 /** Bitmap of enabled hardware interrupt breakpoints. */
1382 uint32_t bmHardIntBreakpoints[256 / 32];
1383 /** Bitmap of enabled software interrupt breakpoints. */
1384 uint32_t bmSoftIntBreakpoints[256 / 32];
1385 /** Bitmap of selected events.
1386 * This includes non-selectable events too for simplicity, we maintain the
1387 * state for some of these, as it may come in handy. */
1388 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1389 /** Enabled hardware interrupt breakpoints. */
1390 uint32_t cHardIntBreakpoints;
1391 /** Enabled software interrupt breakpoints. */
1392 uint32_t cSoftIntBreakpoints;
1393 /** The number of selected events. */
1394 uint32_t cSelectedEvents;
1395 /** The number of enabled hardware breakpoints. */
1396 uint8_t cEnabledHwBreakpoints;
1397 /** The number of enabled hardware I/O breakpoints. */
1398 uint8_t cEnabledHwIoBreakpoints;
1399 /** The number of enabled INT3 breakpoints. */
1400 uint8_t cEnabledInt3Breakpoints;
1401 uint8_t abPadding[1]; /**< Unused padding space up for grabs. */
1402 } const ro;
1403#endif
1404 uint8_t padding[2432]; /* multiple of 64 */
1405 } dbgf;
1406
1407 /** SSM part. */
1408 union
1409 {
1410#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1411 struct SSM s;
1412#endif
1413 uint8_t padding[128]; /* multiple of 64 */
1414 } ssm;
1415
1416#ifdef VBOX_WITH_REM
1417 /** REM part. */
1418 union
1419 {
1420# ifdef VMM_INCLUDED_SRC_include_REMInternal_h
1421 struct REM s;
1422# endif
1423 uint8_t padding[0x11100]; /* multiple of 64 */
1424 } rem;
1425#endif
1426
1427 union
1428 {
1429#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1430 struct GIM s;
1431#endif
1432 uint8_t padding[448]; /* multiple of 64 */
1433 } gim;
1434
1435 union
1436 {
1437#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1438 struct APIC s;
1439#endif
1440 uint8_t padding[128]; /* multiple of 8 */
1441 } apic;
1442
1443 /* ---- begin small stuff ---- */
1444
1445 /** VM part. */
1446 union
1447 {
1448#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1449 struct VMINT s;
1450#endif
1451 uint8_t padding[32]; /* multiple of 8 */
1452 } vm;
1453
1454 /** CFGM part. */
1455 union
1456 {
1457#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1458 struct CFGM s;
1459#endif
1460 uint8_t padding[8]; /* multiple of 8 */
1461 } cfgm;
1462
1463 /** Padding for aligning the structure size on a page boundrary. */
1464#ifdef VBOX_WITH_REM
1465 uint8_t abAlignment2[3032 - (sizeof(PVMCPUR3) + sizeof(PVMCPUR0)) * VMM_MAX_CPU_COUNT];
1466#else
1467 uint8_t abAlignment2[3032 + 256 - (sizeof(PVMCPUR3) + sizeof(PVMCPUR0)) * VMM_MAX_CPU_COUNT];
1468#endif
1469
1470 /* ---- end small stuff ---- */
1471#if !defined(VBOX_BUGREF_9217)
1472 /** Array of VMCPU ring-0 pointers. This is temporary as these will
1473 * live in GVM. */
1474 PVMCPUR0 apCpusR0[VMM_MAX_CPU_COUNT];
1475#else
1476 PVMCPUR0 apPaddingR0[VMM_MAX_CPU_COUNT];
1477#endif
1478
1479 /** Array of VMCPU ring-3 pointers. */
1480 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1481#if !defined(VBOX_BUGREF_9217) && !defined(VBOX_BUGREF_9217_PART_I)
1482 /** VMCPU array for the configured number of virtual CPUs.
1483 * Must be aligned on a page boundary for TLB hit reasons as well as
1484 * alignment of VMCPU members. */
1485 VMCPU aCpus[1];
1486#endif
1487} VM;
1488
1489
1490#ifdef IN_RC
1491RT_C_DECLS_BEGIN
1492
1493/** The VM structure.
1494 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1495 * globals which we should avoid using.
1496 */
1497extern DECLIMPORT(VM) g_VM;
1498
1499/** The VMCPU structure for virtual CPU \#0.
1500 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1501 * globals which we should avoid using.
1502 */
1503extern DECLIMPORT(VMCPU) g_VCpu0;
1504
1505RT_C_DECLS_END
1506#endif
1507
1508/** @} */
1509
1510#endif /* !VBOX_INCLUDED_vmm_vm_h */
1511
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