VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h@ 80319

Last change on this file since 80319 was 80319, checked in by vboxsync, 5 years ago

VMM: Addressing some GCC/linux host issues with bugref:9217 .
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File size: 57.9 KB
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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_vm_h
27#define VBOX_INCLUDED_vmm_vm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#ifndef VBOX_FOR_DTRACE_LIB
33# ifndef USING_VMM_COMMON_DEFS
34# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/Config.kmk - make sure you really need to include this file!"
35# endif
36# include <iprt/param.h>
37# include <VBox/param.h>
38# include <VBox/types.h>
39# include <VBox/vmm/cpum.h>
40# include <VBox/vmm/stam.h>
41# include <VBox/vmm/vmapi.h>
42# include <VBox/vmm/vmm.h>
43# include <VBox/sup.h>
44#else
45# pragma D depends_on library vbox-types.d
46# pragma D depends_on library CPUMInternal.d
47# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48#endif
49
50
51
52/** @defgroup grp_vm The Virtual Machine
53 * @ingroup grp_vmm
54 * @{
55 */
56
57/**
58 * The state of a Virtual CPU.
59 *
60 * The basic state indicated here is whether the CPU has been started or not. In
61 * addition, there are sub-states when started for assisting scheduling (GVMM
62 * mostly).
63 *
64 * The transition out of the STOPPED state is done by a vmR3PowerOn.
65 * The transition back to the STOPPED state is done by vmR3PowerOff.
66 *
67 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69 */
70typedef enum VMCPUSTATE
71{
72 /** The customary invalid zero. */
73 VMCPUSTATE_INVALID = 0,
74
75 /** Virtual CPU has not yet been started. */
76 VMCPUSTATE_STOPPED,
77
78 /** CPU started. */
79 VMCPUSTATE_STARTED,
80 /** CPU started in HM context. */
81 VMCPUSTATE_STARTED_HM,
82 /** Executing guest code and can be poked (RC or STI bits of HM). */
83 VMCPUSTATE_STARTED_EXEC,
84 /** Executing guest code in the recompiler. */
85 VMCPUSTATE_STARTED_EXEC_REM,
86 /** Executing guest code using NEM. */
87 VMCPUSTATE_STARTED_EXEC_NEM,
88 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
89 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
90 /** Halted. */
91 VMCPUSTATE_STARTED_HALTED,
92
93 /** The end of valid virtual CPU states. */
94 VMCPUSTATE_END,
95
96 /** Ensure 32-bit type. */
97 VMCPUSTATE_32BIT_HACK = 0x7fffffff
98} VMCPUSTATE;
99
100/** Enables 64-bit FFs. */
101#define VMCPU_WITH_64_BIT_FFS
102
103
104/**
105 * The cross context virtual CPU structure.
106 *
107 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
108 */
109typedef struct VMCPU
110{
111 /** @name Volatile per-cpu data.
112 * @{ */
113 /** Per CPU forced action.
114 * See the VMCPU_FF_* \#defines. Updated atomically. */
115#ifdef VMCPU_WITH_64_BIT_FFS
116 uint64_t volatile fLocalForcedActions;
117#else
118 uint32_t volatile fLocalForcedActions;
119 uint32_t fForLocalForcedActionsExpansion;
120#endif
121 /** The CPU state. */
122 VMCPUSTATE volatile enmState;
123
124 /** Which host CPU ID is this EMT running on.
125 * Only valid when in RC or HMR0 with scheduling disabled. */
126 RTCPUID volatile idHostCpu;
127 /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
128 * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
129 uint32_t volatile iHostCpuSet;
130 /** Padding up to 64 bytes. */
131 uint8_t abAlignment0[64 - 20];
132 /** @} */
133
134 /** IEM part.
135 * @remarks This comes first as it allows the use of 8-bit immediates for the
136 * first 64 bytes of the structure, reducing code size a wee bit. */
137#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
138 union VMCPUUNIONIEMFULL
139#else
140 union VMCPUUNIONIEMSTUB
141#endif
142 {
143#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
144 struct IEMCPU s;
145#endif
146 uint8_t padding[18496]; /* multiple of 64 */
147 } iem;
148
149 /** @name Static per-cpu data.
150 * (Putting this after IEM, hoping that it's less frequently used than it.)
151 * @{ */
152 /** Ring-3 Host Context VM Pointer. */
153 PVMR3 pVMR3;
154#ifndef VBOX_BUGREF_9217
155 /** Ring-0 Host Context VM Pointer. */
156 PVMR0 pVMR0;
157#else
158 /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
159 RTR0PTR pVCpuR0ForVtg;
160#endif
161 /** Raw-mode Context VM Pointer. */
162 uint32_t pVMRC;
163 /** Padding for new raw-mode (long mode). */
164 uint32_t pVMRCPadding;
165 /** Pointer to the ring-3 UVMCPU structure. */
166 PUVMCPU pUVCpu;
167 /** The native thread handle. */
168 RTNATIVETHREAD hNativeThread;
169 /** The native R0 thread handle. (different from the R3 handle!) */
170 RTNATIVETHREAD hNativeThreadR0;
171 /** The CPU ID.
172 * This is the index into the VM::aCpu array. */
173#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
174 VMCPUID idCpuUnsafe;
175#else
176 VMCPUID idCpu;
177#endif
178
179 /** Align the structures below bit on a 64-byte boundary and make sure it starts
180 * at the same offset in both 64-bit and 32-bit builds.
181 *
182 * @remarks The alignments of the members that are larger than 48 bytes should be
183 * 64-byte for cache line reasons. structs containing small amounts of
184 * data could be lumped together at the end with a < 64 byte padding
185 * following it (to grow into and align the struct size).
186 */
187 uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
188 /** @} */
189
190 /** HM part. */
191 union VMCPUUNIONHM
192 {
193#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
194 struct HMCPU s;
195#endif
196 uint8_t padding[5888]; /* multiple of 64 */
197 } hm;
198
199 /** NEM part. */
200 union VMCPUUNIONNEM
201 {
202#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
203 struct NEMCPU s;
204#endif
205 uint8_t padding[512]; /* multiple of 64 */
206 } nem;
207
208 /** TRPM part. */
209 union VMCPUUNIONTRPM
210 {
211#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
212 struct TRPMCPU s;
213#endif
214 uint8_t padding[128]; /* multiple of 64 */
215 } trpm;
216
217 /** TM part. */
218 union VMCPUUNIONTM
219 {
220#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
221 struct TMCPU s;
222#endif
223 uint8_t padding[5760]; /* multiple of 64 */
224 } tm;
225
226 /** VMM part. */
227 union VMCPUUNIONVMM
228 {
229#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
230 struct VMMCPU s;
231#endif
232 uint8_t padding[896]; /* multiple of 64 */
233 } vmm;
234
235 /** PDM part. */
236 union VMCPUUNIONPDM
237 {
238#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
239 struct PDMCPU s;
240#endif
241 uint8_t padding[256]; /* multiple of 64 */
242 } pdm;
243
244 /** IOM part. */
245 union VMCPUUNIONIOM
246 {
247#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
248 struct IOMCPU s;
249#endif
250 uint8_t padding[512]; /* multiple of 64 */
251 } iom;
252
253 /** DBGF part.
254 * @todo Combine this with other tiny structures. */
255 union VMCPUUNIONDBGF
256 {
257#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
258 struct DBGFCPU s;
259#endif
260 uint8_t padding[256]; /* multiple of 64 */
261 } dbgf;
262
263 /** GIM part. */
264 union VMCPUUNIONGIM
265 {
266#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
267 struct GIMCPU s;
268#endif
269 uint8_t padding[512]; /* multiple of 64 */
270 } gim;
271
272 /** APIC part. */
273 union VMCPUUNIONAPIC
274 {
275#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
276 struct APICCPU s;
277#endif
278 uint8_t padding[1792]; /* multiple of 64 */
279 } apic;
280
281 /*
282 * Some less frequently used global members that doesn't need to take up
283 * precious space at the head of the structure.
284 */
285
286 /** Trace groups enable flags. */
287 uint32_t fTraceGroups; /* 64 / 44 */
288 /** State data for use by ad hoc profiling. */
289 uint32_t uAdHoc;
290 /** Profiling samples for use by ad hoc profiling. */
291 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
292
293 /** Align the following members on page boundary. */
294 uint8_t abAlignment2[1400];
295
296 /** PGM part. */
297 union VMCPUUNIONPGM
298 {
299#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
300 struct PGMCPU s;
301#endif
302 uint8_t padding[4096]; /* multiple of 4096 */
303 } pgm;
304
305 /** CPUM part. */
306 union VMCPUUNIONCPUM
307 {
308#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
309 struct CPUMCPU s;
310#endif
311#ifdef VMCPU_INCL_CPUM_GST_CTX
312 /** The guest CPUM context for direct use by execution engines.
313 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
314 * others. The rest will use the function based CPUM API. */
315 CPUMCTX GstCtx;
316#endif
317 uint8_t padding[4096]; /* multiple of 4096 */
318 } cpum;
319
320 /** EM part. */
321 union VMCPUUNIONEM
322 {
323#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
324 struct EMCPU s;
325#endif
326 uint8_t padding[40960]; /* multiple of 4096 */
327 } em;
328} VMCPU;
329
330
331#ifndef VBOX_FOR_DTRACE_LIB
332AssertCompileSizeAlignment(VMCPU, 4096);
333
334/** @name Operations on VMCPU::enmState
335 * @{ */
336/** Gets the VMCPU state. */
337#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
338/** Sets the VMCPU state. */
339#define VMCPU_SET_STATE(pVCpu, enmNewState) \
340 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
341/** Cmpares and sets the VMCPU state. */
342#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
343 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
344/** Checks the VMCPU state. */
345#ifdef VBOX_STRICT
346# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
347 do { \
348 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
349 AssertMsg(enmState == (enmExpectedState), \
350 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
351 enmState, enmExpectedState, (pVCpu)->idCpu)); \
352 } while (0)
353#else
354# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
355#endif
356/** Tests if the state means that the CPU is started. */
357#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
358/** Tests if the state means that the CPU is stopped. */
359#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
360/** @} */
361
362
363/** The name of the raw-mode context VMM Core module. */
364#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
365/** The name of the ring-0 context VMM Core module. */
366#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
367
368
369/** VM Forced Action Flags.
370 *
371 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
372 * action mask of a VM.
373 *
374 * Available VM bits:
375 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
376 *
377 *
378 * Available VMCPU bits:
379 * 14, 15, 36 to 63
380 *
381 * @todo If we run low on VMCPU, we may consider merging the SELM bits
382 *
383 * @{
384 */
385/** The virtual sync clock has been stopped, go to TM until it has been
386 * restarted... */
387#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
388#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
389/** PDM Queues are pending. */
390#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
391/** The bit number for VM_FF_PDM_QUEUES. */
392#define VM_FF_PDM_QUEUES_BIT 3
393/** PDM DMA transfers are pending. */
394#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
395/** The bit number for VM_FF_PDM_DMA. */
396#define VM_FF_PDM_DMA_BIT 4
397/** This action forces the VM to call DBGF so DBGF can service debugger
398 * requests in the emulation thread.
399 * This action flag stays asserted till DBGF clears it.*/
400#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
401/** The bit number for VM_FF_DBGF. */
402#define VM_FF_DBGF_BIT 8
403/** This action forces the VM to service pending requests from other
404 * thread or requests which must be executed in another context. */
405#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
406#define VM_FF_REQUEST_BIT 9
407/** Check for VM state changes and take appropriate action. */
408#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
409/** The bit number for VM_FF_CHECK_VM_STATE. */
410#define VM_FF_CHECK_VM_STATE_BIT 10
411/** Reset the VM. (postponed) */
412#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
413/** The bit number for VM_FF_RESET. */
414#define VM_FF_RESET_BIT 11
415/** EMT rendezvous in VMM. */
416#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
417/** The bit number for VM_FF_EMT_RENDEZVOUS. */
418#define VM_FF_EMT_RENDEZVOUS_BIT 12
419
420/** PGM needs to allocate handy pages. */
421#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
422#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
423/** PGM is out of memory.
424 * Abandon all loops and code paths which can be resumed and get up to the EM
425 * loops. */
426#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
427#define VM_FF_PGM_NO_MEMORY_BIT 19
428 /** PGM is about to perform a lightweight pool flush
429 * Guest SMP: all EMT threads should return to ring 3
430 */
431#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
432#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
433/** REM needs to be informed about handler changes. */
434#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
435/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
436#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
437/** Suspend the VM - debug only. */
438#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
439#define VM_FF_DEBUG_SUSPEND_BIT 31
440
441
442/** This action forces the VM to check any pending interrupts on the APIC. */
443#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
444#define VMCPU_FF_INTERRUPT_APIC_BIT 0
445/** This action forces the VM to check any pending interrups on the PIC. */
446#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
447#define VMCPU_FF_INTERRUPT_PIC_BIT 1
448/** This action forces the VM to schedule and run pending timer (TM).
449 * @remarks Don't move - PATM compatibility. */
450#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
451#define VMCPU_FF_TIMER_BIT 2
452/** This action forces the VM to check any pending NMIs. */
453#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
454#define VMCPU_FF_INTERRUPT_NMI_BIT 3
455/** This action forces the VM to check any pending SMIs. */
456#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
457#define VMCPU_FF_INTERRUPT_SMI_BIT 4
458/** PDM critical section unlocking is pending, process promptly upon return to R3. */
459#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
460#define VMCPU_FF_PDM_CRITSECT_BIT 5
461/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
462 * the virtual CPU out of the next (/current) halted state. It is not processed
463 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
464 * is cleared the next time EM leaves the HALTED state. */
465#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
466#define VMCPU_FF_UNHALT_BIT 6
467/** Pending IEM action (mask). */
468#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
469/** Pending IEM action (bit number). */
470#define VMCPU_FF_IEM_BIT 7
471/** Pending APIC action (bit number). */
472#define VMCPU_FF_UPDATE_APIC_BIT 8
473/** This action forces the VM to update APIC's asynchronously arrived
474 * interrupts as pending interrupts. */
475#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
476/** This action forces the VM to service pending requests from other
477 * thread or requests which must be executed in another context. */
478#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
479#define VMCPU_FF_REQUEST_BIT 9
480/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
481#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
482/** The bit number for VMCPU_FF_DBGF. */
483#define VMCPU_FF_DBGF_BIT 10
484/** This action forces the VM to service any pending updates to CR3 (used only
485 * by HM). */
486/** Hardware virtualized nested-guest interrupt pending. */
487#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
488#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
489#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
490#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
491/** This action forces the VM to service any pending updates to PAE PDPEs (used
492 * only by HM). */
493#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
494#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
495/** This action forces the VM to resync the page tables before going
496 * back to execute guest code. (GLOBAL FLUSH) */
497#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
498#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
499/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
500 * (NON-GLOBAL FLUSH) */
501#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
502#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
503/** Check for pending TLB shootdown actions (deprecated)
504 * Reserved for furture HM re-use if necessary / safe.
505 * Consumer: HM */
506#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
507#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
508/** Check for pending TLB flush action.
509 * Consumer: HM
510 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
511#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
512/** The bit number for VMCPU_FF_TLB_FLUSH. */
513#define VMCPU_FF_TLB_FLUSH_BIT 19
514/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
515/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
516/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
517/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
518/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
519#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
520#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
521/** Block injection of non-maskable interrupts to the guest. */
522#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
523#define VMCPU_FF_BLOCK_NMIS_BIT 25
524/** Force return to Ring-3. */
525#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
526#define VMCPU_FF_TO_R3_BIT 28
527/** Force return to ring-3 to service pending I/O or MMIO write.
528 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
529 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
530 * status codes to be propagated at the same time without loss. */
531#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
532#define VMCPU_FF_IOM_BIT 29
533/* 30 used to be VMCPU_FF_CPUM */
534/** VMX-preemption timer in effect. */
535#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
536#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
537/** Pending MTF (Monitor Trap Flag) event. */
538#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
539#define VMCPU_FF_VMX_MTF_BIT 32
540/** VMX APIC-write emulation pending. */
541#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
542#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
543/** VMX interrupt-window event pending. */
544#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
545#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
546/** VMX NMI-window event pending. */
547#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
548#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
549
550
551/** Externally VM forced actions. Used to quit the idle/wait loop. */
552#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
553/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
554#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
555
556/** Externally forced VM actions. Used to quit the idle/wait loop. */
557#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
558 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
559/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
560#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
561 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
562 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
563 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
564
565/** High priority VM pre-execution actions. */
566#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
567 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
568 | VM_FF_EMT_RENDEZVOUS )
569/** High priority VMCPU pre-execution actions. */
570#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
571 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
572 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
573 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
574 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
575
576/** High priority VM pre raw-mode execution mask. */
577#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
578/** High priority VMCPU pre raw-mode execution mask. */
579#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
580 | VMCPU_FF_INHIBIT_INTERRUPTS )
581
582/** High priority post-execution actions. */
583#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
584/** High priority post-execution actions. */
585#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
586 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
587 | VMCPU_FF_IEM | VMCPU_FF_IOM )
588
589/** Normal priority VM post-execution actions. */
590#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
591 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
592/** Normal priority VMCPU post-execution actions. */
593#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
594
595/** Normal priority VM actions. */
596#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA \
597 | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
598/** Normal priority VMCPU actions. */
599#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
600
601/** Flags to clear before resuming guest execution. */
602#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
603
604
605/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
606#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
607 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
608/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
609#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
610 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
611/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
612#ifdef IN_RING3
613# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
614 | VMCPU_FF_VMX_MTF )
615#else
616# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
617 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
618#endif
619/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
620 * enabled. */
621#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
622 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
623 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
624 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
625 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
626/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
627 * disabled. */
628#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
629 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
630 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
631
632/** VM Flags that cause the HM loops to go back to ring-3. */
633#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
634 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
635/** VMCPU Flags that cause the HM loops to go back to ring-3. */
636#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
637 | VMCPU_FF_IEM | VMCPU_FF_IOM)
638
639/** High priority ring-0 VM pre HM-mode execution mask. */
640#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
641/** High priority ring-0 VMCPU pre HM-mode execution mask. */
642#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
643 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
644 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
645/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
646#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
647 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
648 | VM_FF_PDM_DMA) )
649/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
650#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
651 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
652
653/** All the forced VM flags. */
654#define VM_FF_ALL_MASK (UINT32_MAX)
655/** All the forced VMCPU flags. */
656#define VMCPU_FF_ALL_MASK (UINT32_MAX)
657
658/** All the forced VM flags except those related to raw-mode and hardware
659 * assisted execution. */
660#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
661/** All the forced VMCPU flags except those related to raw-mode and hardware
662 * assisted execution. */
663#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
664/** @} */
665
666/** @def VM_FF_SET
667 * Sets a single force action flag.
668 *
669 * @param pVM The cross context VM structure.
670 * @param fFlag The flag to set.
671 */
672#define VM_FF_SET(pVM, fFlag) do { \
673 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
674 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
675 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
676 } while (0)
677
678/** @def VMCPU_FF_SET
679 * Sets a single force action flag for the given VCPU.
680 *
681 * @param pVCpu The cross context virtual CPU structure.
682 * @param fFlag The flag to set.
683 * @sa VMCPU_FF_SET_MASK
684 */
685#ifdef VMCPU_WITH_64_BIT_FFS
686# define VMCPU_FF_SET(pVCpu, fFlag) do { \
687 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
688 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
689 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
690 } while (0)
691#else
692# define VMCPU_FF_SET(pVCpu, fFlag) do { \
693 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
694 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
695 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
696 } while (0)
697#endif
698
699/** @def VMCPU_FF_SET_MASK
700 * Sets a two or more force action flag for the given VCPU.
701 *
702 * @param pVCpu The cross context virtual CPU structure.
703 * @param fFlags The flags to set.
704 * @sa VMCPU_FF_SET
705 */
706#ifdef VMCPU_WITH_64_BIT_FFS
707# if ARCH_BITS > 32
708# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
709 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
710# else
711# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
712 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
713 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
714 } while (0)
715# endif
716#else
717# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
718 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
719#endif
720
721/** @def VM_FF_CLEAR
722 * Clears a single force action flag.
723 *
724 * @param pVM The cross context VM structure.
725 * @param fFlag The flag to clear.
726 */
727#define VM_FF_CLEAR(pVM, fFlag) do { \
728 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
729 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
730 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
731 } while (0)
732
733/** @def VMCPU_FF_CLEAR
734 * Clears a single force action flag for the given VCPU.
735 *
736 * @param pVCpu The cross context virtual CPU structure.
737 * @param fFlag The flag to clear.
738 */
739#ifdef VMCPU_WITH_64_BIT_FFS
740# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
741 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
742 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
743 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
744 } while (0)
745#else
746# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
747 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
748 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
749 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
750 } while (0)
751#endif
752
753/** @def VMCPU_FF_CLEAR_MASK
754 * Clears two or more force action flags for the given VCPU.
755 *
756 * @param pVCpu The cross context virtual CPU structure.
757 * @param fFlags The flags to clear.
758 */
759#ifdef VMCPU_WITH_64_BIT_FFS
760# if ARCH_BITS > 32
761# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
762 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
763# else
764# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
765 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
766 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
767 } while (0)
768# endif
769#else
770# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
771 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
772#endif
773
774/** @def VM_FF_IS_SET
775 * Checks if single a force action flag is set.
776 *
777 * @param pVM The cross context VM structure.
778 * @param fFlag The flag to check.
779 * @sa VM_FF_IS_ANY_SET
780 */
781#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
782# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
783#else
784# define VM_FF_IS_SET(pVM, fFlag) \
785 ([](PVM a_pVM) -> bool \
786 { \
787 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
788 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
789 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
790 }(pVM))
791#endif
792
793/** @def VMCPU_FF_IS_SET
794 * Checks if a single force action flag is set for the given VCPU.
795 *
796 * @param pVCpu The cross context virtual CPU structure.
797 * @param fFlag The flag to check.
798 * @sa VMCPU_FF_IS_ANY_SET
799 */
800#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
801# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
802#else
803# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
804 ([](PCVMCPU a_pVCpu) -> bool \
805 { \
806 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
807 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
808 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
809 }(pVCpu))
810#endif
811
812/** @def VM_FF_IS_ANY_SET
813 * Checks if one or more force action in the specified set is pending.
814 *
815 * @param pVM The cross context VM structure.
816 * @param fFlags The flags to check for.
817 * @sa VM_FF_IS_SET
818 */
819#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
820
821/** @def VMCPU_FF_IS_ANY_SET
822 * Checks if two or more force action flags in the specified set is set for the given VCPU.
823 *
824 * @param pVCpu The cross context virtual CPU structure.
825 * @param fFlags The flags to check for.
826 * @sa VMCPU_FF_IS_SET
827 */
828#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
829
830/** @def VM_FF_TEST_AND_CLEAR
831 * Checks if one (!) force action in the specified set is pending and clears it atomically
832 *
833 * @returns true if the bit was set.
834 * @returns false if the bit was clear.
835 * @param pVM The cross context VM structure.
836 * @param fFlag Flag constant to check and clear (_BIT is appended).
837 */
838#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
839
840/** @def VMCPU_FF_TEST_AND_CLEAR
841 * Checks if one (!) force action in the specified set is pending and clears it atomically
842 *
843 * @returns true if the bit was set.
844 * @returns false if the bit was clear.
845 * @param pVCpu The cross context virtual CPU structure.
846 * @param fFlag Flag constant to check and clear (_BIT is appended).
847 */
848#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
849
850/** @def VM_FF_IS_PENDING_EXCEPT
851 * Checks if one or more force action in the specified set is pending while one
852 * or more other ones are not.
853 *
854 * @param pVM The cross context VM structure.
855 * @param fFlags The flags to check for.
856 * @param fExcpt The flags that should not be set.
857 */
858#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
859 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
860
861/** @def VM_IS_EMT
862 * Checks if the current thread is the emulation thread (EMT).
863 *
864 * @remark The ring-0 variation will need attention if we expand the ring-0
865 * code to let threads other than EMT mess around with the VM.
866 */
867#ifdef IN_RC
868# define VM_IS_EMT(pVM) true
869#else
870# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
871#endif
872
873/** @def VMCPU_IS_EMT
874 * Checks if the current thread is the emulation thread (EMT) for the specified
875 * virtual CPU.
876 */
877#ifdef IN_RC
878# define VMCPU_IS_EMT(pVCpu) true
879#else
880# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
881#endif
882
883/** @def VM_ASSERT_EMT
884 * Asserts that the current thread IS the emulation thread (EMT).
885 */
886#ifdef IN_RC
887# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
888#elif defined(IN_RING0)
889# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
890#else
891# define VM_ASSERT_EMT(pVM) \
892 AssertMsg(VM_IS_EMT(pVM), \
893 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
894#endif
895
896/** @def VMCPU_ASSERT_EMT
897 * Asserts that the current thread IS the emulation thread (EMT) of the
898 * specified virtual CPU.
899 */
900#ifdef IN_RC
901# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
902#elif defined(IN_RING0)
903# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
904 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
905 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
906 (pVCpu) ? (pVCpu)->idCpu : 0))
907#else
908# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
909 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
910 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
911#endif
912
913/** @def VM_ASSERT_EMT_RETURN
914 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
915 */
916#ifdef IN_RC
917# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
918#elif defined(IN_RING0)
919# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
920#else
921# define VM_ASSERT_EMT_RETURN(pVM, rc) \
922 AssertMsgReturn(VM_IS_EMT(pVM), \
923 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
924 (rc))
925#endif
926
927/** @def VMCPU_ASSERT_EMT_RETURN
928 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
929 */
930#ifdef IN_RC
931# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
932#elif defined(IN_RING0)
933# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
934#else
935# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
936 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
937 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
938 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
939 (rc))
940#endif
941
942/** @def VMCPU_ASSERT_EMT_OR_GURU
943 * Asserts that the current thread IS the emulation thread (EMT) of the
944 * specified virtual CPU.
945 */
946#if defined(IN_RC) || defined(IN_RING0)
947# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
948 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
949 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
950#else
951# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
952 AssertMsg( VMCPU_IS_EMT(pVCpu) \
953 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
954 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
955 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
956 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
957#endif
958
959/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
960 * Asserts that the current thread IS the emulation thread (EMT) of the
961 * specified virtual CPU or the VM is not running.
962 */
963#if defined(IN_RC) || defined(IN_RING0)
964# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
965 Assert( VMCPU_IS_EMT(pVCpu) \
966 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
967#else
968# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
969 AssertMsg( VMCPU_IS_EMT(pVCpu) \
970 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
971 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
972 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
973#endif
974
975/** @def VMSTATE_IS_RUNNING
976 * Checks if the given state indicates a running VM.
977 */
978#define VMSTATE_IS_RUNNING(a_enmVMState) \
979 ( (enmVMState) == VMSTATE_RUNNING \
980 || (enmVMState) == VMSTATE_RUNNING_LS )
981
982/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
983 * Checks if the VM is running.
984 * @note This is only for pure debug assertions. No AssertReturn or similar!
985 * @sa VMSTATE_IS_RUNNING
986 */
987#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
988 ( (pVM)->enmVMState == VMSTATE_RUNNING \
989 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
990
991/** @def VM_ASSERT_IS_NOT_RUNNING
992 * Asserts that the VM is not running.
993 */
994#if defined(IN_RC) || defined(IN_RING0)
995#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
996#else
997#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
998 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
999#endif
1000
1001/** @def VM_ASSERT_EMT0
1002 * Asserts that the current thread IS emulation thread \#0 (EMT0).
1003 */
1004#if (defined(VBOX_BUGREF_9217_PART_I) || defined(VBOX_BUGREF_9217)) && defined(IN_RING3)
1005# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1006#else
1007# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1008#endif
1009
1010/** @def VM_ASSERT_EMT0_RETURN
1011 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1012 * it isn't.
1013 */
1014#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1015
1016
1017/**
1018 * Asserts that the current thread is NOT the emulation thread.
1019 */
1020#define VM_ASSERT_OTHER_THREAD(pVM) \
1021 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1022
1023
1024/** @def VM_ASSERT_STATE
1025 * Asserts a certain VM state.
1026 */
1027#define VM_ASSERT_STATE(pVM, _enmState) \
1028 AssertMsg((pVM)->enmVMState == (_enmState), \
1029 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1030
1031/** @def VM_ASSERT_STATE_RETURN
1032 * Asserts a certain VM state and returns if it doesn't match.
1033 */
1034#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1035 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1036 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1037 (rc))
1038
1039/** @def VM_IS_VALID_EXT
1040 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1041 * or terminated. */
1042#define VM_IS_VALID_EXT(pVM) \
1043 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1044 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1045 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1046 && VM_IS_EMT(pVM))) )
1047
1048/** @def VM_ASSERT_VALID_EXT_RETURN
1049 * Asserts a the VM handle is valid for external access, i.e. not being
1050 * destroy or terminated.
1051 */
1052#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1053 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1054 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1055 ? VMGetStateName(pVM->enmVMState) : ""), \
1056 (rc))
1057
1058/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1059 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1060 * destroy or terminated.
1061 */
1062#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1063 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1064 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1065 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1066 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1067 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1068 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1069 (rc))
1070
1071#endif /* !VBOX_FOR_DTRACE_LIB */
1072
1073
1074/**
1075 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1076 *
1077 * ONLY HM and NEM MAY USE THIS!
1078 *
1079 * @param a_pVM The cross context VM structure.
1080 * @param a_bValue The new value.
1081 * @internal
1082 */
1083#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1084 do { \
1085 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1086 ASMCompilerBarrier(); /* just to be on the safe side */ \
1087 } while (0)
1088
1089/**
1090 * Checks whether raw-mode is used.
1091 *
1092 * @retval true if either is used.
1093 * @retval false if software virtualization (raw-mode) is used.
1094 *
1095 * @param a_pVM The cross context VM structure.
1096 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1097 * @internal
1098 */
1099#ifdef VBOX_WITH_RAW_MODE
1100# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1101#else
1102# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1103#endif
1104
1105/**
1106 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1107 *
1108 * @retval true if either is used.
1109 * @retval false if software virtualization (raw-mode) is used.
1110 *
1111 * @param a_pVM The cross context VM structure.
1112 * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1113 * @internal
1114 */
1115#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1116
1117/**
1118 * Checks whether HM is being used by this VM.
1119 *
1120 * @retval true if HM (VT-x/AMD-v) is used.
1121 * @retval false if not.
1122 *
1123 * @param a_pVM The cross context VM structure.
1124 * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1125 * @internal
1126 */
1127#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1128
1129/**
1130 * Checks whether NEM is being used by this VM.
1131 *
1132 * @retval true if a native hypervisor API is used.
1133 * @retval false if not.
1134 *
1135 * @param a_pVM The cross context VM structure.
1136 * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1137 * @internal
1138 */
1139#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1140
1141
1142/**
1143 * The cross context VM structure.
1144 *
1145 * It contains all the VM data which have to be available in all contexts.
1146 * Even if it contains all the data the idea is to use APIs not to modify all
1147 * the members all around the place. Therefore we make use of unions to hide
1148 * everything which isn't local to the current source module. This means we'll
1149 * have to pay a little bit of attention when adding new members to structures
1150 * in the unions and make sure to keep the padding sizes up to date.
1151 *
1152 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1153 */
1154typedef struct VM
1155{
1156 /** The state of the VM.
1157 * This field is read only to everyone except the VM and EM. */
1158 VMSTATE volatile enmVMState;
1159 /** Forced action flags.
1160 * See the VM_FF_* \#defines. Updated atomically.
1161 */
1162 volatile uint32_t fGlobalForcedActions;
1163 /** Pointer to the array of page descriptors for the VM structure allocation. */
1164 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1165 /** Session handle. For use when calling SUPR0 APIs. */
1166#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1167 PSUPDRVSESSION pSessionUnsafe;
1168#else
1169 PSUPDRVSESSION pSession;
1170#endif
1171 /** Pointer to the ring-3 VM structure. */
1172 PUVM pUVM;
1173 /** Ring-3 Host Context VM Pointer. */
1174#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1175 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1176#else
1177 R3PTRTYPE(struct VM *) pVMR3;
1178#endif
1179#ifndef VBOX_BUGREF_9217
1180 /** Ring-0 Host Context VM Pointer. */
1181 R0PTRTYPE(struct VM *) pVMR0;
1182#else
1183 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1184 R0PTRTYPE(struct VM *) pVMR0ForCall;
1185#endif
1186 /** Raw-mode Context VM Pointer. */
1187 uint32_t pVMRC;
1188 /** Padding for new raw-mode (long mode). */
1189 uint32_t pVMRCPadding;
1190
1191 /** The GVM VM handle. Only the GVM should modify this field. */
1192#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1193 uint32_t hSelfUnsafe;
1194#else
1195 uint32_t hSelf;
1196#endif
1197 /** Number of virtual CPUs. */
1198#if defined(VBOX_BUGREF_9217) && defined(IN_RING0)
1199 uint32_t cCpusUnsafe;
1200#else
1201 uint32_t cCpus;
1202#endif
1203 /** CPU excution cap (1-100) */
1204 uint32_t uCpuExecutionCap;
1205
1206#ifdef VBOX_BUGREF_9217
1207 /** Size of the VM structure. */
1208 uint32_t cbSelf;
1209 /** Size of the VMCPU structure. */
1210 uint32_t cbVCpu;
1211 /** Structure version number (TBD). */
1212 uint32_t uStructVersion;
1213#else
1214 /** Size of the VM structure including the VMCPU array. */
1215 uint32_t cbSelf;
1216 uint32_t uUnused1;
1217 uint32_t uUnused2;
1218#endif
1219
1220 /** @name Various items that are frequently accessed.
1221 * @{ */
1222 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1223 * This is set early during vmR3InitRing3 by HM or NEM. */
1224 uint8_t const bMainExecutionEngine;
1225
1226 /** Hardware VM support is available and enabled.
1227 * Determined very early during init.
1228 * This is placed here for performance reasons.
1229 * @todo obsoleted by bMainExecutionEngine, eliminate. */
1230 bool fHMEnabled;
1231
1232 /** Large page enabled flag.
1233 * @todo This doesn't need to be here, PGM should store it in it's own
1234 * structures instead. */
1235 bool fUseLargePages;
1236 /** @} */
1237
1238 /** Alignment padding. */
1239 uint8_t uPadding1[5];
1240
1241 /** @name Debugging
1242 * @{ */
1243 /** Ring-3 Host Context VM Pointer. */
1244 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1245 /** Ring-0 Host Context VM Pointer. */
1246 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1247 /** @} */
1248
1249 /** Padding - the unions must be aligned on a 64 bytes boundary. */
1250 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1251
1252 /** CPUM part. */
1253 union
1254 {
1255#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1256 struct CPUM s;
1257#endif
1258#ifdef VBOX_INCLUDED_vmm_cpum_h
1259 /** Read only info exposed about the host and guest CPUs. */
1260 struct
1261 {
1262 /** Padding for hidden fields. */
1263 uint8_t abHidden0[64];
1264 /** Host CPU feature information. */
1265 CPUMFEATURES HostFeatures;
1266 /** Guest CPU feature information. */
1267 CPUMFEATURES GuestFeatures;
1268 } const ro;
1269#endif
1270 uint8_t padding[1536]; /* multiple of 64 */
1271 } cpum;
1272
1273 /** VMM part. */
1274 union
1275 {
1276#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1277 struct VMM s;
1278#endif
1279 uint8_t padding[1600]; /* multiple of 64 */
1280 } vmm;
1281
1282 /** PGM part. */
1283 union
1284 {
1285#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1286 struct PGM s;
1287#endif
1288 uint8_t padding[20800]; /* multiple of 64 */
1289 } pgm;
1290
1291 /** HM part. */
1292 union
1293 {
1294#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1295 struct HM s;
1296#endif
1297 uint8_t padding[5440]; /* multiple of 64 */
1298 } hm;
1299
1300 /** TRPM part. */
1301 union
1302 {
1303#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1304 struct TRPM s;
1305#endif
1306 uint8_t padding[5248]; /* multiple of 64 */
1307 } trpm;
1308
1309 /** SELM part. */
1310 union
1311 {
1312#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1313 struct SELM s;
1314#endif
1315 uint8_t padding[768]; /* multiple of 64 */
1316 } selm;
1317
1318 /** MM part. */
1319 union
1320 {
1321#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1322 struct MM s;
1323#endif
1324 uint8_t padding[192]; /* multiple of 64 */
1325 } mm;
1326
1327 /** PDM part. */
1328 union
1329 {
1330#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1331 struct PDM s;
1332#endif
1333 uint8_t padding[1920]; /* multiple of 64 */
1334 } pdm;
1335
1336 /** IOM part. */
1337 union
1338 {
1339#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1340 struct IOM s;
1341#endif
1342 uint8_t padding[896]; /* multiple of 64 */
1343 } iom;
1344
1345 /** EM part. */
1346 union
1347 {
1348#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1349 struct EM s;
1350#endif
1351 uint8_t padding[256]; /* multiple of 64 */
1352 } em;
1353
1354 /** NEM part. */
1355 union
1356 {
1357#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1358 struct NEM s;
1359#endif
1360 uint8_t padding[128]; /* multiple of 64 */
1361 } nem;
1362
1363 /** TM part. */
1364 union
1365 {
1366#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1367 struct TM s;
1368#endif
1369 uint8_t padding[7872]; /* multiple of 64 */
1370 } tm;
1371
1372 /** DBGF part. */
1373 union
1374 {
1375#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1376 struct DBGF s;
1377#endif
1378#ifdef VBOX_INCLUDED_vmm_dbgf_h
1379 /** Read only info exposed about interrupt breakpoints and selected events. */
1380 struct
1381 {
1382 /** Bitmap of enabled hardware interrupt breakpoints. */
1383 uint32_t bmHardIntBreakpoints[256 / 32];
1384 /** Bitmap of enabled software interrupt breakpoints. */
1385 uint32_t bmSoftIntBreakpoints[256 / 32];
1386 /** Bitmap of selected events.
1387 * This includes non-selectable events too for simplicity, we maintain the
1388 * state for some of these, as it may come in handy. */
1389 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1390 /** Enabled hardware interrupt breakpoints. */
1391 uint32_t cHardIntBreakpoints;
1392 /** Enabled software interrupt breakpoints. */
1393 uint32_t cSoftIntBreakpoints;
1394 /** The number of selected events. */
1395 uint32_t cSelectedEvents;
1396 /** The number of enabled hardware breakpoints. */
1397 uint8_t cEnabledHwBreakpoints;
1398 /** The number of enabled hardware I/O breakpoints. */
1399 uint8_t cEnabledHwIoBreakpoints;
1400 /** The number of enabled INT3 breakpoints. */
1401 uint8_t cEnabledInt3Breakpoints;
1402 uint8_t abPadding[1]; /**< Unused padding space up for grabs. */
1403 } const ro;
1404#endif
1405 uint8_t padding[2432]; /* multiple of 64 */
1406 } dbgf;
1407
1408 /** SSM part. */
1409 union
1410 {
1411#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1412 struct SSM s;
1413#endif
1414 uint8_t padding[128]; /* multiple of 64 */
1415 } ssm;
1416
1417#ifdef VBOX_WITH_REM
1418 /** REM part. */
1419 union
1420 {
1421# ifdef VMM_INCLUDED_SRC_include_REMInternal_h
1422 struct REM s;
1423# endif
1424 uint8_t padding[0x11100]; /* multiple of 64 */
1425 } rem;
1426#endif
1427
1428 union
1429 {
1430#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1431 struct GIM s;
1432#endif
1433 uint8_t padding[448]; /* multiple of 64 */
1434 } gim;
1435
1436 union
1437 {
1438#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1439 struct APIC s;
1440#endif
1441 uint8_t padding[128]; /* multiple of 8 */
1442 } apic;
1443
1444 /* ---- begin small stuff ---- */
1445
1446 /** VM part. */
1447 union
1448 {
1449#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1450 struct VMINT s;
1451#endif
1452 uint8_t padding[32]; /* multiple of 8 */
1453 } vm;
1454
1455 /** CFGM part. */
1456 union
1457 {
1458#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1459 struct CFGM s;
1460#endif
1461 uint8_t padding[8]; /* multiple of 8 */
1462 } cfgm;
1463
1464 /** Padding for aligning the structure size on a page boundrary. */
1465#ifdef VBOX_WITH_REM
1466 uint8_t abAlignment2[3032 - (sizeof(PVMCPUR3) + sizeof(PVMCPUR0)) * VMM_MAX_CPU_COUNT];
1467#else
1468 uint8_t abAlignment2[3032 + 256 - (sizeof(PVMCPUR3) + sizeof(PVMCPUR0)) * VMM_MAX_CPU_COUNT];
1469#endif
1470
1471 /* ---- end small stuff ---- */
1472#if !defined(VBOX_BUGREF_9217)
1473 /** Array of VMCPU ring-0 pointers. This is temporary as these will
1474 * live in GVM. */
1475 PVMCPUR0 apCpusR0[VMM_MAX_CPU_COUNT];
1476#else
1477 PVMCPUR0 apPaddingR0[VMM_MAX_CPU_COUNT];
1478#endif
1479
1480 /** Array of VMCPU ring-3 pointers. */
1481 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1482#if !defined(VBOX_BUGREF_9217) && !defined(VBOX_BUGREF_9217_PART_I)
1483 /** VMCPU array for the configured number of virtual CPUs.
1484 * Must be aligned on a page boundary for TLB hit reasons as well as
1485 * alignment of VMCPU members. */
1486 VMCPU aCpus[1];
1487#endif
1488} VM;
1489
1490
1491#ifdef IN_RC
1492RT_C_DECLS_BEGIN
1493
1494/** The VM structure.
1495 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1496 * globals which we should avoid using.
1497 */
1498extern DECLIMPORT(VM) g_VM;
1499
1500/** The VMCPU structure for virtual CPU \#0.
1501 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1502 * globals which we should avoid using.
1503 */
1504extern DECLIMPORT(VMCPU) g_VCpu0;
1505
1506RT_C_DECLS_END
1507#endif
1508
1509/** @} */
1510
1511#endif /* !VBOX_INCLUDED_vmm_vm_h */
1512
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