VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h@ 80531

Last change on this file since 80531 was 80331, checked in by vboxsync, 5 years ago

/include: Eliminating the VBOX_BUGREF_9217 preprocessor macro. bugref:9217
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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2019 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_vm_h
27#define VBOX_INCLUDED_vmm_vm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#ifndef VBOX_FOR_DTRACE_LIB
33# ifndef USING_VMM_COMMON_DEFS
34# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/Config.kmk - make sure you really need to include this file!"
35# endif
36# include <iprt/param.h>
37# include <VBox/param.h>
38# include <VBox/types.h>
39# include <VBox/vmm/cpum.h>
40# include <VBox/vmm/stam.h>
41# include <VBox/vmm/vmapi.h>
42# include <VBox/vmm/vmm.h>
43# include <VBox/sup.h>
44#else
45# pragma D depends_on library vbox-types.d
46# pragma D depends_on library CPUMInternal.d
47# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48#endif
49
50
51
52/** @defgroup grp_vm The Virtual Machine
53 * @ingroup grp_vmm
54 * @{
55 */
56
57/**
58 * The state of a Virtual CPU.
59 *
60 * The basic state indicated here is whether the CPU has been started or not. In
61 * addition, there are sub-states when started for assisting scheduling (GVMM
62 * mostly).
63 *
64 * The transition out of the STOPPED state is done by a vmR3PowerOn.
65 * The transition back to the STOPPED state is done by vmR3PowerOff.
66 *
67 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69 */
70typedef enum VMCPUSTATE
71{
72 /** The customary invalid zero. */
73 VMCPUSTATE_INVALID = 0,
74
75 /** Virtual CPU has not yet been started. */
76 VMCPUSTATE_STOPPED,
77
78 /** CPU started. */
79 VMCPUSTATE_STARTED,
80 /** CPU started in HM context. */
81 VMCPUSTATE_STARTED_HM,
82 /** Executing guest code and can be poked (RC or STI bits of HM). */
83 VMCPUSTATE_STARTED_EXEC,
84 /** Executing guest code in the recompiler. */
85 VMCPUSTATE_STARTED_EXEC_REM,
86 /** Executing guest code using NEM. */
87 VMCPUSTATE_STARTED_EXEC_NEM,
88 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
89 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
90 /** Halted. */
91 VMCPUSTATE_STARTED_HALTED,
92
93 /** The end of valid virtual CPU states. */
94 VMCPUSTATE_END,
95
96 /** Ensure 32-bit type. */
97 VMCPUSTATE_32BIT_HACK = 0x7fffffff
98} VMCPUSTATE;
99
100/** Enables 64-bit FFs. */
101#define VMCPU_WITH_64_BIT_FFS
102
103
104/**
105 * The cross context virtual CPU structure.
106 *
107 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
108 */
109typedef struct VMCPU
110{
111 /** @name Volatile per-cpu data.
112 * @{ */
113 /** Per CPU forced action.
114 * See the VMCPU_FF_* \#defines. Updated atomically. */
115#ifdef VMCPU_WITH_64_BIT_FFS
116 uint64_t volatile fLocalForcedActions;
117#else
118 uint32_t volatile fLocalForcedActions;
119 uint32_t fForLocalForcedActionsExpansion;
120#endif
121 /** The CPU state. */
122 VMCPUSTATE volatile enmState;
123
124 /** Which host CPU ID is this EMT running on.
125 * Only valid when in RC or HMR0 with scheduling disabled. */
126 RTCPUID volatile idHostCpu;
127 /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
128 * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
129 uint32_t volatile iHostCpuSet;
130 /** Padding up to 64 bytes. */
131 uint8_t abAlignment0[64 - 20];
132 /** @} */
133
134 /** IEM part.
135 * @remarks This comes first as it allows the use of 8-bit immediates for the
136 * first 64 bytes of the structure, reducing code size a wee bit. */
137#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
138 union VMCPUUNIONIEMFULL
139#else
140 union VMCPUUNIONIEMSTUB
141#endif
142 {
143#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
144 struct IEMCPU s;
145#endif
146 uint8_t padding[18496]; /* multiple of 64 */
147 } iem;
148
149 /** @name Static per-cpu data.
150 * (Putting this after IEM, hoping that it's less frequently used than it.)
151 * @{ */
152 /** Ring-3 Host Context VM Pointer. */
153 PVMR3 pVMR3;
154 /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
155 RTR0PTR pVCpuR0ForVtg;
156 /** Raw-mode Context VM Pointer. */
157 uint32_t pVMRC;
158 /** Padding for new raw-mode (long mode). */
159 uint32_t pVMRCPadding;
160 /** Pointer to the ring-3 UVMCPU structure. */
161 PUVMCPU pUVCpu;
162 /** The native thread handle. */
163 RTNATIVETHREAD hNativeThread;
164 /** The native R0 thread handle. (different from the R3 handle!) */
165 RTNATIVETHREAD hNativeThreadR0;
166 /** The CPU ID.
167 * This is the index into the VM::aCpu array. */
168#ifdef IN_RING0
169 VMCPUID idCpuUnsafe;
170#else
171 VMCPUID idCpu;
172#endif
173
174 /** Align the structures below bit on a 64-byte boundary and make sure it starts
175 * at the same offset in both 64-bit and 32-bit builds.
176 *
177 * @remarks The alignments of the members that are larger than 48 bytes should be
178 * 64-byte for cache line reasons. structs containing small amounts of
179 * data could be lumped together at the end with a < 64 byte padding
180 * following it (to grow into and align the struct size).
181 */
182 uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
183 /** @} */
184
185 /** HM part. */
186 union VMCPUUNIONHM
187 {
188#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
189 struct HMCPU s;
190#endif
191 uint8_t padding[5888]; /* multiple of 64 */
192 } hm;
193
194 /** NEM part. */
195 union VMCPUUNIONNEM
196 {
197#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
198 struct NEMCPU s;
199#endif
200 uint8_t padding[512]; /* multiple of 64 */
201 } nem;
202
203 /** TRPM part. */
204 union VMCPUUNIONTRPM
205 {
206#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
207 struct TRPMCPU s;
208#endif
209 uint8_t padding[128]; /* multiple of 64 */
210 } trpm;
211
212 /** TM part. */
213 union VMCPUUNIONTM
214 {
215#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
216 struct TMCPU s;
217#endif
218 uint8_t padding[5760]; /* multiple of 64 */
219 } tm;
220
221 /** VMM part. */
222 union VMCPUUNIONVMM
223 {
224#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
225 struct VMMCPU s;
226#endif
227 uint8_t padding[896]; /* multiple of 64 */
228 } vmm;
229
230 /** PDM part. */
231 union VMCPUUNIONPDM
232 {
233#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
234 struct PDMCPU s;
235#endif
236 uint8_t padding[256]; /* multiple of 64 */
237 } pdm;
238
239 /** IOM part. */
240 union VMCPUUNIONIOM
241 {
242#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
243 struct IOMCPU s;
244#endif
245 uint8_t padding[512]; /* multiple of 64 */
246 } iom;
247
248 /** DBGF part.
249 * @todo Combine this with other tiny structures. */
250 union VMCPUUNIONDBGF
251 {
252#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
253 struct DBGFCPU s;
254#endif
255 uint8_t padding[256]; /* multiple of 64 */
256 } dbgf;
257
258 /** GIM part. */
259 union VMCPUUNIONGIM
260 {
261#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
262 struct GIMCPU s;
263#endif
264 uint8_t padding[512]; /* multiple of 64 */
265 } gim;
266
267 /** APIC part. */
268 union VMCPUUNIONAPIC
269 {
270#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
271 struct APICCPU s;
272#endif
273 uint8_t padding[1792]; /* multiple of 64 */
274 } apic;
275
276 /*
277 * Some less frequently used global members that doesn't need to take up
278 * precious space at the head of the structure.
279 */
280
281 /** Trace groups enable flags. */
282 uint32_t fTraceGroups; /* 64 / 44 */
283 /** State data for use by ad hoc profiling. */
284 uint32_t uAdHoc;
285 /** Profiling samples for use by ad hoc profiling. */
286 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
287
288 /** Align the following members on page boundary. */
289 uint8_t abAlignment2[1400];
290
291 /** PGM part. */
292 union VMCPUUNIONPGM
293 {
294#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
295 struct PGMCPU s;
296#endif
297 uint8_t padding[4096]; /* multiple of 4096 */
298 } pgm;
299
300 /** CPUM part. */
301 union VMCPUUNIONCPUM
302 {
303#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
304 struct CPUMCPU s;
305#endif
306#ifdef VMCPU_INCL_CPUM_GST_CTX
307 /** The guest CPUM context for direct use by execution engines.
308 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
309 * others. The rest will use the function based CPUM API. */
310 CPUMCTX GstCtx;
311#endif
312 uint8_t padding[4096]; /* multiple of 4096 */
313 } cpum;
314
315 /** EM part. */
316 union VMCPUUNIONEM
317 {
318#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
319 struct EMCPU s;
320#endif
321 uint8_t padding[40960]; /* multiple of 4096 */
322 } em;
323} VMCPU;
324
325
326#ifndef VBOX_FOR_DTRACE_LIB
327AssertCompileSizeAlignment(VMCPU, 4096);
328
329/** @name Operations on VMCPU::enmState
330 * @{ */
331/** Gets the VMCPU state. */
332#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
333/** Sets the VMCPU state. */
334#define VMCPU_SET_STATE(pVCpu, enmNewState) \
335 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
336/** Cmpares and sets the VMCPU state. */
337#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
338 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
339/** Checks the VMCPU state. */
340#ifdef VBOX_STRICT
341# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
342 do { \
343 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
344 AssertMsg(enmState == (enmExpectedState), \
345 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
346 enmState, enmExpectedState, (pVCpu)->idCpu)); \
347 } while (0)
348#else
349# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
350#endif
351/** Tests if the state means that the CPU is started. */
352#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
353/** Tests if the state means that the CPU is stopped. */
354#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
355/** @} */
356
357
358/** The name of the raw-mode context VMM Core module. */
359#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
360/** The name of the ring-0 context VMM Core module. */
361#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
362
363
364/** VM Forced Action Flags.
365 *
366 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
367 * action mask of a VM.
368 *
369 * Available VM bits:
370 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 30
371 *
372 *
373 * Available VMCPU bits:
374 * 14, 15, 36 to 63
375 *
376 * @todo If we run low on VMCPU, we may consider merging the SELM bits
377 *
378 * @{
379 */
380/** The virtual sync clock has been stopped, go to TM until it has been
381 * restarted... */
382#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
383#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
384/** PDM Queues are pending. */
385#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
386/** The bit number for VM_FF_PDM_QUEUES. */
387#define VM_FF_PDM_QUEUES_BIT 3
388/** PDM DMA transfers are pending. */
389#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
390/** The bit number for VM_FF_PDM_DMA. */
391#define VM_FF_PDM_DMA_BIT 4
392/** This action forces the VM to call DBGF so DBGF can service debugger
393 * requests in the emulation thread.
394 * This action flag stays asserted till DBGF clears it.*/
395#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
396/** The bit number for VM_FF_DBGF. */
397#define VM_FF_DBGF_BIT 8
398/** This action forces the VM to service pending requests from other
399 * thread or requests which must be executed in another context. */
400#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
401#define VM_FF_REQUEST_BIT 9
402/** Check for VM state changes and take appropriate action. */
403#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
404/** The bit number for VM_FF_CHECK_VM_STATE. */
405#define VM_FF_CHECK_VM_STATE_BIT 10
406/** Reset the VM. (postponed) */
407#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
408/** The bit number for VM_FF_RESET. */
409#define VM_FF_RESET_BIT 11
410/** EMT rendezvous in VMM. */
411#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
412/** The bit number for VM_FF_EMT_RENDEZVOUS. */
413#define VM_FF_EMT_RENDEZVOUS_BIT 12
414
415/** PGM needs to allocate handy pages. */
416#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
417#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
418/** PGM is out of memory.
419 * Abandon all loops and code paths which can be resumed and get up to the EM
420 * loops. */
421#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
422#define VM_FF_PGM_NO_MEMORY_BIT 19
423 /** PGM is about to perform a lightweight pool flush
424 * Guest SMP: all EMT threads should return to ring 3
425 */
426#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
427#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
428/** REM needs to be informed about handler changes. */
429#define VM_FF_REM_HANDLER_NOTIFY RT_BIT_32(VM_FF_REM_HANDLER_NOTIFY_BIT)
430/** The bit number for VM_FF_REM_HANDLER_NOTIFY. */
431#define VM_FF_REM_HANDLER_NOTIFY_BIT 29
432/** Suspend the VM - debug only. */
433#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
434#define VM_FF_DEBUG_SUSPEND_BIT 31
435
436
437/** This action forces the VM to check any pending interrupts on the APIC. */
438#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
439#define VMCPU_FF_INTERRUPT_APIC_BIT 0
440/** This action forces the VM to check any pending interrups on the PIC. */
441#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
442#define VMCPU_FF_INTERRUPT_PIC_BIT 1
443/** This action forces the VM to schedule and run pending timer (TM).
444 * @remarks Don't move - PATM compatibility. */
445#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
446#define VMCPU_FF_TIMER_BIT 2
447/** This action forces the VM to check any pending NMIs. */
448#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
449#define VMCPU_FF_INTERRUPT_NMI_BIT 3
450/** This action forces the VM to check any pending SMIs. */
451#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
452#define VMCPU_FF_INTERRUPT_SMI_BIT 4
453/** PDM critical section unlocking is pending, process promptly upon return to R3. */
454#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
455#define VMCPU_FF_PDM_CRITSECT_BIT 5
456/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
457 * the virtual CPU out of the next (/current) halted state. It is not processed
458 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
459 * is cleared the next time EM leaves the HALTED state. */
460#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
461#define VMCPU_FF_UNHALT_BIT 6
462/** Pending IEM action (mask). */
463#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
464/** Pending IEM action (bit number). */
465#define VMCPU_FF_IEM_BIT 7
466/** Pending APIC action (bit number). */
467#define VMCPU_FF_UPDATE_APIC_BIT 8
468/** This action forces the VM to update APIC's asynchronously arrived
469 * interrupts as pending interrupts. */
470#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
471/** This action forces the VM to service pending requests from other
472 * thread or requests which must be executed in another context. */
473#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
474#define VMCPU_FF_REQUEST_BIT 9
475/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
476#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
477/** The bit number for VMCPU_FF_DBGF. */
478#define VMCPU_FF_DBGF_BIT 10
479/** This action forces the VM to service any pending updates to CR3 (used only
480 * by HM). */
481/** Hardware virtualized nested-guest interrupt pending. */
482#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
483#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
484#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
485#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
486/** This action forces the VM to service any pending updates to PAE PDPEs (used
487 * only by HM). */
488#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
489#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
490/** This action forces the VM to resync the page tables before going
491 * back to execute guest code. (GLOBAL FLUSH) */
492#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
493#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
494/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
495 * (NON-GLOBAL FLUSH) */
496#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
497#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
498/** Check for pending TLB shootdown actions (deprecated)
499 * Reserved for furture HM re-use if necessary / safe.
500 * Consumer: HM */
501#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
502#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
503/** Check for pending TLB flush action.
504 * Consumer: HM
505 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
506#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
507/** The bit number for VMCPU_FF_TLB_FLUSH. */
508#define VMCPU_FF_TLB_FLUSH_BIT 19
509/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
510/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
511/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
512/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
513/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
514#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
515#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
516/** Block injection of non-maskable interrupts to the guest. */
517#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
518#define VMCPU_FF_BLOCK_NMIS_BIT 25
519/** Force return to Ring-3. */
520#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
521#define VMCPU_FF_TO_R3_BIT 28
522/** Force return to ring-3 to service pending I/O or MMIO write.
523 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
524 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
525 * status codes to be propagated at the same time without loss. */
526#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
527#define VMCPU_FF_IOM_BIT 29
528/* 30 used to be VMCPU_FF_CPUM */
529/** VMX-preemption timer in effect. */
530#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
531#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
532/** Pending MTF (Monitor Trap Flag) event. */
533#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
534#define VMCPU_FF_VMX_MTF_BIT 32
535/** VMX APIC-write emulation pending. */
536#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
537#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
538/** VMX interrupt-window event pending. */
539#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
540#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
541/** VMX NMI-window event pending. */
542#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
543#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
544
545
546/** Externally VM forced actions. Used to quit the idle/wait loop. */
547#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
548/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
549#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
550
551/** Externally forced VM actions. Used to quit the idle/wait loop. */
552#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
553 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
554/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
555#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
556 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
557 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
558 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
559
560/** High priority VM pre-execution actions. */
561#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
562 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
563 | VM_FF_EMT_RENDEZVOUS )
564/** High priority VMCPU pre-execution actions. */
565#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
566 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
567 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
568 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
569 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
570
571/** High priority VM pre raw-mode execution mask. */
572#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
573/** High priority VMCPU pre raw-mode execution mask. */
574#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
575 | VMCPU_FF_INHIBIT_INTERRUPTS )
576
577/** High priority post-execution actions. */
578#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
579/** High priority post-execution actions. */
580#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
581 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
582 | VMCPU_FF_IEM | VMCPU_FF_IOM )
583
584/** Normal priority VM post-execution actions. */
585#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
586 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
587/** Normal priority VMCPU post-execution actions. */
588#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
589
590/** Normal priority VM actions. */
591#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA \
592 | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
593/** Normal priority VMCPU actions. */
594#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
595
596/** Flags to clear before resuming guest execution. */
597#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
598
599
600/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
601#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
602 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
603/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
604#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
605 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
606/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
607#ifdef IN_RING3
608# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
609 | VMCPU_FF_VMX_MTF )
610#else
611# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
612 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
613#endif
614/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
615 * enabled. */
616#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
617 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
618 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
619 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
620 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
621/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
622 * disabled. */
623#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
624 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
625 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
626
627/** VM Flags that cause the HM loops to go back to ring-3. */
628#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
629 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
630/** VMCPU Flags that cause the HM loops to go back to ring-3. */
631#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
632 | VMCPU_FF_IEM | VMCPU_FF_IOM)
633
634/** High priority ring-0 VM pre HM-mode execution mask. */
635#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
636/** High priority ring-0 VMCPU pre HM-mode execution mask. */
637#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
638 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
639 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
640/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
641#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
642 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
643 | VM_FF_PDM_DMA) )
644/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
645#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
646 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
647
648/** All the forced VM flags. */
649#define VM_FF_ALL_MASK (UINT32_MAX)
650/** All the forced VMCPU flags. */
651#define VMCPU_FF_ALL_MASK (UINT32_MAX)
652
653/** All the forced VM flags except those related to raw-mode and hardware
654 * assisted execution. */
655#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
656/** All the forced VMCPU flags except those related to raw-mode and hardware
657 * assisted execution. */
658#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
659/** @} */
660
661/** @def VM_FF_SET
662 * Sets a single force action flag.
663 *
664 * @param pVM The cross context VM structure.
665 * @param fFlag The flag to set.
666 */
667#define VM_FF_SET(pVM, fFlag) do { \
668 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
669 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
670 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
671 } while (0)
672
673/** @def VMCPU_FF_SET
674 * Sets a single force action flag for the given VCPU.
675 *
676 * @param pVCpu The cross context virtual CPU structure.
677 * @param fFlag The flag to set.
678 * @sa VMCPU_FF_SET_MASK
679 */
680#ifdef VMCPU_WITH_64_BIT_FFS
681# define VMCPU_FF_SET(pVCpu, fFlag) do { \
682 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
683 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
684 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
685 } while (0)
686#else
687# define VMCPU_FF_SET(pVCpu, fFlag) do { \
688 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
689 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
690 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
691 } while (0)
692#endif
693
694/** @def VMCPU_FF_SET_MASK
695 * Sets a two or more force action flag for the given VCPU.
696 *
697 * @param pVCpu The cross context virtual CPU structure.
698 * @param fFlags The flags to set.
699 * @sa VMCPU_FF_SET
700 */
701#ifdef VMCPU_WITH_64_BIT_FFS
702# if ARCH_BITS > 32
703# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
704 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
705# else
706# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
707 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
708 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
709 } while (0)
710# endif
711#else
712# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
713 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
714#endif
715
716/** @def VM_FF_CLEAR
717 * Clears a single force action flag.
718 *
719 * @param pVM The cross context VM structure.
720 * @param fFlag The flag to clear.
721 */
722#define VM_FF_CLEAR(pVM, fFlag) do { \
723 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
724 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
725 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
726 } while (0)
727
728/** @def VMCPU_FF_CLEAR
729 * Clears a single force action flag for the given VCPU.
730 *
731 * @param pVCpu The cross context virtual CPU structure.
732 * @param fFlag The flag to clear.
733 */
734#ifdef VMCPU_WITH_64_BIT_FFS
735# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
736 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
737 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
738 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
739 } while (0)
740#else
741# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
742 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
743 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
744 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
745 } while (0)
746#endif
747
748/** @def VMCPU_FF_CLEAR_MASK
749 * Clears two or more force action flags for the given VCPU.
750 *
751 * @param pVCpu The cross context virtual CPU structure.
752 * @param fFlags The flags to clear.
753 */
754#ifdef VMCPU_WITH_64_BIT_FFS
755# if ARCH_BITS > 32
756# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
757 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
758# else
759# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
760 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
761 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
762 } while (0)
763# endif
764#else
765# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
766 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
767#endif
768
769/** @def VM_FF_IS_SET
770 * Checks if single a force action flag is set.
771 *
772 * @param pVM The cross context VM structure.
773 * @param fFlag The flag to check.
774 * @sa VM_FF_IS_ANY_SET
775 */
776#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
777# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
778#else
779# define VM_FF_IS_SET(pVM, fFlag) \
780 ([](PVM a_pVM) -> bool \
781 { \
782 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
783 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
784 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
785 }(pVM))
786#endif
787
788/** @def VMCPU_FF_IS_SET
789 * Checks if a single force action flag is set for the given VCPU.
790 *
791 * @param pVCpu The cross context virtual CPU structure.
792 * @param fFlag The flag to check.
793 * @sa VMCPU_FF_IS_ANY_SET
794 */
795#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
796# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
797#else
798# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
799 ([](PCVMCPU a_pVCpu) -> bool \
800 { \
801 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
802 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
803 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
804 }(pVCpu))
805#endif
806
807/** @def VM_FF_IS_ANY_SET
808 * Checks if one or more force action in the specified set is pending.
809 *
810 * @param pVM The cross context VM structure.
811 * @param fFlags The flags to check for.
812 * @sa VM_FF_IS_SET
813 */
814#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
815
816/** @def VMCPU_FF_IS_ANY_SET
817 * Checks if two or more force action flags in the specified set is set for the given VCPU.
818 *
819 * @param pVCpu The cross context virtual CPU structure.
820 * @param fFlags The flags to check for.
821 * @sa VMCPU_FF_IS_SET
822 */
823#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
824
825/** @def VM_FF_TEST_AND_CLEAR
826 * Checks if one (!) force action in the specified set is pending and clears it atomically
827 *
828 * @returns true if the bit was set.
829 * @returns false if the bit was clear.
830 * @param pVM The cross context VM structure.
831 * @param fFlag Flag constant to check and clear (_BIT is appended).
832 */
833#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
834
835/** @def VMCPU_FF_TEST_AND_CLEAR
836 * Checks if one (!) force action in the specified set is pending and clears it atomically
837 *
838 * @returns true if the bit was set.
839 * @returns false if the bit was clear.
840 * @param pVCpu The cross context virtual CPU structure.
841 * @param fFlag Flag constant to check and clear (_BIT is appended).
842 */
843#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
844
845/** @def VM_FF_IS_PENDING_EXCEPT
846 * Checks if one or more force action in the specified set is pending while one
847 * or more other ones are not.
848 *
849 * @param pVM The cross context VM structure.
850 * @param fFlags The flags to check for.
851 * @param fExcpt The flags that should not be set.
852 */
853#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
854 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
855
856/** @def VM_IS_EMT
857 * Checks if the current thread is the emulation thread (EMT).
858 *
859 * @remark The ring-0 variation will need attention if we expand the ring-0
860 * code to let threads other than EMT mess around with the VM.
861 */
862#ifdef IN_RC
863# define VM_IS_EMT(pVM) true
864#else
865# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
866#endif
867
868/** @def VMCPU_IS_EMT
869 * Checks if the current thread is the emulation thread (EMT) for the specified
870 * virtual CPU.
871 */
872#ifdef IN_RC
873# define VMCPU_IS_EMT(pVCpu) true
874#else
875# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
876#endif
877
878/** @def VM_ASSERT_EMT
879 * Asserts that the current thread IS the emulation thread (EMT).
880 */
881#ifdef IN_RC
882# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
883#elif defined(IN_RING0)
884# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
885#else
886# define VM_ASSERT_EMT(pVM) \
887 AssertMsg(VM_IS_EMT(pVM), \
888 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
889#endif
890
891/** @def VMCPU_ASSERT_EMT
892 * Asserts that the current thread IS the emulation thread (EMT) of the
893 * specified virtual CPU.
894 */
895#ifdef IN_RC
896# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
897#elif defined(IN_RING0)
898# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
899 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
900 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
901 (pVCpu) ? (pVCpu)->idCpu : 0))
902#else
903# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
904 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
905 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
906#endif
907
908/** @def VM_ASSERT_EMT_RETURN
909 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
910 */
911#ifdef IN_RC
912# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
913#elif defined(IN_RING0)
914# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
915#else
916# define VM_ASSERT_EMT_RETURN(pVM, rc) \
917 AssertMsgReturn(VM_IS_EMT(pVM), \
918 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
919 (rc))
920#endif
921
922/** @def VMCPU_ASSERT_EMT_RETURN
923 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
924 */
925#ifdef IN_RC
926# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
927#elif defined(IN_RING0)
928# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
929#else
930# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
931 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
932 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
933 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
934 (rc))
935#endif
936
937/** @def VMCPU_ASSERT_EMT_OR_GURU
938 * Asserts that the current thread IS the emulation thread (EMT) of the
939 * specified virtual CPU.
940 */
941#if defined(IN_RC) || defined(IN_RING0)
942# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
943 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
944 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
945#else
946# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
947 AssertMsg( VMCPU_IS_EMT(pVCpu) \
948 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
949 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
950 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
951 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
952#endif
953
954/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
955 * Asserts that the current thread IS the emulation thread (EMT) of the
956 * specified virtual CPU or the VM is not running.
957 */
958#if defined(IN_RC) || defined(IN_RING0)
959# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
960 Assert( VMCPU_IS_EMT(pVCpu) \
961 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
962#else
963# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
964 AssertMsg( VMCPU_IS_EMT(pVCpu) \
965 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
966 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
967 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
968#endif
969
970/** @def VMSTATE_IS_RUNNING
971 * Checks if the given state indicates a running VM.
972 */
973#define VMSTATE_IS_RUNNING(a_enmVMState) \
974 ( (enmVMState) == VMSTATE_RUNNING \
975 || (enmVMState) == VMSTATE_RUNNING_LS )
976
977/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
978 * Checks if the VM is running.
979 * @note This is only for pure debug assertions. No AssertReturn or similar!
980 * @sa VMSTATE_IS_RUNNING
981 */
982#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
983 ( (pVM)->enmVMState == VMSTATE_RUNNING \
984 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
985
986/** @def VM_ASSERT_IS_NOT_RUNNING
987 * Asserts that the VM is not running.
988 */
989#if defined(IN_RC) || defined(IN_RING0)
990#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
991#else
992#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
993 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
994#endif
995
996/** @def VM_ASSERT_EMT0
997 * Asserts that the current thread IS emulation thread \#0 (EMT0).
998 */
999#ifdef IN_RING3
1000# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1001#else
1002# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1003#endif
1004
1005/** @def VM_ASSERT_EMT0_RETURN
1006 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1007 * it isn't.
1008 */
1009#define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1010
1011
1012/**
1013 * Asserts that the current thread is NOT the emulation thread.
1014 */
1015#define VM_ASSERT_OTHER_THREAD(pVM) \
1016 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1017
1018
1019/** @def VM_ASSERT_STATE
1020 * Asserts a certain VM state.
1021 */
1022#define VM_ASSERT_STATE(pVM, _enmState) \
1023 AssertMsg((pVM)->enmVMState == (_enmState), \
1024 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1025
1026/** @def VM_ASSERT_STATE_RETURN
1027 * Asserts a certain VM state and returns if it doesn't match.
1028 */
1029#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1030 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1031 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1032 (rc))
1033
1034/** @def VM_IS_VALID_EXT
1035 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1036 * or terminated. */
1037#define VM_IS_VALID_EXT(pVM) \
1038 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1039 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1040 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1041 && VM_IS_EMT(pVM))) )
1042
1043/** @def VM_ASSERT_VALID_EXT_RETURN
1044 * Asserts a the VM handle is valid for external access, i.e. not being
1045 * destroy or terminated.
1046 */
1047#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1048 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1049 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1050 ? VMGetStateName(pVM->enmVMState) : ""), \
1051 (rc))
1052
1053/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1054 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1055 * destroy or terminated.
1056 */
1057#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1058 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1059 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1060 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1061 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1062 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1063 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1064 (rc))
1065
1066#endif /* !VBOX_FOR_DTRACE_LIB */
1067
1068
1069/**
1070 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1071 *
1072 * ONLY HM and NEM MAY USE THIS!
1073 *
1074 * @param a_pVM The cross context VM structure.
1075 * @param a_bValue The new value.
1076 * @internal
1077 */
1078#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1079 do { \
1080 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1081 ASMCompilerBarrier(); /* just to be on the safe side */ \
1082 } while (0)
1083
1084/**
1085 * Checks whether raw-mode is used.
1086 *
1087 * @retval true if either is used.
1088 * @retval false if software virtualization (raw-mode) is used.
1089 *
1090 * @param a_pVM The cross context VM structure.
1091 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1092 * @internal
1093 */
1094#ifdef VBOX_WITH_RAW_MODE
1095# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1096#else
1097# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1098#endif
1099
1100/**
1101 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1102 *
1103 * @retval true if either is used.
1104 * @retval false if software virtualization (raw-mode) is used.
1105 *
1106 * @param a_pVM The cross context VM structure.
1107 * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1108 * @internal
1109 */
1110#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1111
1112/**
1113 * Checks whether HM is being used by this VM.
1114 *
1115 * @retval true if HM (VT-x/AMD-v) is used.
1116 * @retval false if not.
1117 *
1118 * @param a_pVM The cross context VM structure.
1119 * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1120 * @internal
1121 */
1122#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1123
1124/**
1125 * Checks whether NEM is being used by this VM.
1126 *
1127 * @retval true if a native hypervisor API is used.
1128 * @retval false if not.
1129 *
1130 * @param a_pVM The cross context VM structure.
1131 * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1132 * @internal
1133 */
1134#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1135
1136
1137/**
1138 * The cross context VM structure.
1139 *
1140 * It contains all the VM data which have to be available in all contexts.
1141 * Even if it contains all the data the idea is to use APIs not to modify all
1142 * the members all around the place. Therefore we make use of unions to hide
1143 * everything which isn't local to the current source module. This means we'll
1144 * have to pay a little bit of attention when adding new members to structures
1145 * in the unions and make sure to keep the padding sizes up to date.
1146 *
1147 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1148 */
1149typedef struct VM
1150{
1151 /** The state of the VM.
1152 * This field is read only to everyone except the VM and EM. */
1153 VMSTATE volatile enmVMState;
1154 /** Forced action flags.
1155 * See the VM_FF_* \#defines. Updated atomically.
1156 */
1157 volatile uint32_t fGlobalForcedActions;
1158 /** Pointer to the array of page descriptors for the VM structure allocation. */
1159 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1160 /** Session handle. For use when calling SUPR0 APIs. */
1161#ifdef IN_RING0
1162 PSUPDRVSESSION pSessionUnsafe;
1163#else
1164 PSUPDRVSESSION pSession;
1165#endif
1166 /** Pointer to the ring-3 VM structure. */
1167 PUVM pUVM;
1168 /** Ring-3 Host Context VM Pointer. */
1169#ifdef IN_RING0
1170 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1171#else
1172 R3PTRTYPE(struct VM *) pVMR3;
1173#endif
1174 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1175 R0PTRTYPE(struct VM *) pVMR0ForCall;
1176 /** Raw-mode Context VM Pointer. */
1177 uint32_t pVMRC;
1178 /** Padding for new raw-mode (long mode). */
1179 uint32_t pVMRCPadding;
1180
1181 /** The GVM VM handle. Only the GVM should modify this field. */
1182#ifdef IN_RING0
1183 uint32_t hSelfUnsafe;
1184#else
1185 uint32_t hSelf;
1186#endif
1187 /** Number of virtual CPUs. */
1188#ifdef IN_RING0
1189 uint32_t cCpusUnsafe;
1190#else
1191 uint32_t cCpus;
1192#endif
1193 /** CPU excution cap (1-100) */
1194 uint32_t uCpuExecutionCap;
1195
1196 /** Size of the VM structure. */
1197 uint32_t cbSelf;
1198 /** Size of the VMCPU structure. */
1199 uint32_t cbVCpu;
1200 /** Structure version number (TBD). */
1201 uint32_t uStructVersion;
1202
1203 /** @name Various items that are frequently accessed.
1204 * @{ */
1205 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1206 * This is set early during vmR3InitRing3 by HM or NEM. */
1207 uint8_t const bMainExecutionEngine;
1208
1209 /** Hardware VM support is available and enabled.
1210 * Determined very early during init.
1211 * This is placed here for performance reasons.
1212 * @todo obsoleted by bMainExecutionEngine, eliminate. */
1213 bool fHMEnabled;
1214
1215 /** Large page enabled flag.
1216 * @todo This doesn't need to be here, PGM should store it in it's own
1217 * structures instead. */
1218 bool fUseLargePages;
1219 /** @} */
1220
1221 /** Alignment padding. */
1222 uint8_t uPadding1[5];
1223
1224 /** @name Debugging
1225 * @{ */
1226 /** Ring-3 Host Context VM Pointer. */
1227 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1228 /** Ring-0 Host Context VM Pointer. */
1229 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1230 /** @} */
1231
1232 /** Padding - the unions must be aligned on a 64 bytes boundary. */
1233 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1234
1235 /** CPUM part. */
1236 union
1237 {
1238#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1239 struct CPUM s;
1240#endif
1241#ifdef VBOX_INCLUDED_vmm_cpum_h
1242 /** Read only info exposed about the host and guest CPUs. */
1243 struct
1244 {
1245 /** Padding for hidden fields. */
1246 uint8_t abHidden0[64];
1247 /** Host CPU feature information. */
1248 CPUMFEATURES HostFeatures;
1249 /** Guest CPU feature information. */
1250 CPUMFEATURES GuestFeatures;
1251 } const ro;
1252#endif
1253 uint8_t padding[1536]; /* multiple of 64 */
1254 } cpum;
1255
1256 /** VMM part. */
1257 union
1258 {
1259#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1260 struct VMM s;
1261#endif
1262 uint8_t padding[1600]; /* multiple of 64 */
1263 } vmm;
1264
1265 /** PGM part. */
1266 union
1267 {
1268#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1269 struct PGM s;
1270#endif
1271 uint8_t padding[20800]; /* multiple of 64 */
1272 } pgm;
1273
1274 /** HM part. */
1275 union
1276 {
1277#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1278 struct HM s;
1279#endif
1280 uint8_t padding[5440]; /* multiple of 64 */
1281 } hm;
1282
1283 /** TRPM part. */
1284 union
1285 {
1286#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1287 struct TRPM s;
1288#endif
1289 uint8_t padding[5248]; /* multiple of 64 */
1290 } trpm;
1291
1292 /** SELM part. */
1293 union
1294 {
1295#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1296 struct SELM s;
1297#endif
1298 uint8_t padding[768]; /* multiple of 64 */
1299 } selm;
1300
1301 /** MM part. */
1302 union
1303 {
1304#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1305 struct MM s;
1306#endif
1307 uint8_t padding[192]; /* multiple of 64 */
1308 } mm;
1309
1310 /** PDM part. */
1311 union
1312 {
1313#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1314 struct PDM s;
1315#endif
1316 uint8_t padding[1920]; /* multiple of 64 */
1317 } pdm;
1318
1319 /** IOM part. */
1320 union
1321 {
1322#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1323 struct IOM s;
1324#endif
1325 uint8_t padding[896]; /* multiple of 64 */
1326 } iom;
1327
1328 /** EM part. */
1329 union
1330 {
1331#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1332 struct EM s;
1333#endif
1334 uint8_t padding[256]; /* multiple of 64 */
1335 } em;
1336
1337 /** NEM part. */
1338 union
1339 {
1340#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1341 struct NEM s;
1342#endif
1343 uint8_t padding[128]; /* multiple of 64 */
1344 } nem;
1345
1346 /** TM part. */
1347 union
1348 {
1349#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1350 struct TM s;
1351#endif
1352 uint8_t padding[7872]; /* multiple of 64 */
1353 } tm;
1354
1355 /** DBGF part. */
1356 union
1357 {
1358#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1359 struct DBGF s;
1360#endif
1361#ifdef VBOX_INCLUDED_vmm_dbgf_h
1362 /** Read only info exposed about interrupt breakpoints and selected events. */
1363 struct
1364 {
1365 /** Bitmap of enabled hardware interrupt breakpoints. */
1366 uint32_t bmHardIntBreakpoints[256 / 32];
1367 /** Bitmap of enabled software interrupt breakpoints. */
1368 uint32_t bmSoftIntBreakpoints[256 / 32];
1369 /** Bitmap of selected events.
1370 * This includes non-selectable events too for simplicity, we maintain the
1371 * state for some of these, as it may come in handy. */
1372 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1373 /** Enabled hardware interrupt breakpoints. */
1374 uint32_t cHardIntBreakpoints;
1375 /** Enabled software interrupt breakpoints. */
1376 uint32_t cSoftIntBreakpoints;
1377 /** The number of selected events. */
1378 uint32_t cSelectedEvents;
1379 /** The number of enabled hardware breakpoints. */
1380 uint8_t cEnabledHwBreakpoints;
1381 /** The number of enabled hardware I/O breakpoints. */
1382 uint8_t cEnabledHwIoBreakpoints;
1383 /** The number of enabled INT3 breakpoints. */
1384 uint8_t cEnabledInt3Breakpoints;
1385 uint8_t abPadding[1]; /**< Unused padding space up for grabs. */
1386 } const ro;
1387#endif
1388 uint8_t padding[2432]; /* multiple of 64 */
1389 } dbgf;
1390
1391 /** SSM part. */
1392 union
1393 {
1394#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1395 struct SSM s;
1396#endif
1397 uint8_t padding[128]; /* multiple of 64 */
1398 } ssm;
1399
1400#ifdef VBOX_WITH_REM
1401 /** REM part. */
1402 union
1403 {
1404# ifdef VMM_INCLUDED_SRC_include_REMInternal_h
1405 struct REM s;
1406# endif
1407 uint8_t padding[0x11100]; /* multiple of 64 */
1408 } rem;
1409#endif
1410
1411 union
1412 {
1413#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1414 struct GIM s;
1415#endif
1416 uint8_t padding[448]; /* multiple of 64 */
1417 } gim;
1418
1419 union
1420 {
1421#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1422 struct APIC s;
1423#endif
1424 uint8_t padding[128]; /* multiple of 8 */
1425 } apic;
1426
1427 /* ---- begin small stuff ---- */
1428
1429 /** VM part. */
1430 union
1431 {
1432#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1433 struct VMINT s;
1434#endif
1435 uint8_t padding[32]; /* multiple of 8 */
1436 } vm;
1437
1438 /** CFGM part. */
1439 union
1440 {
1441#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1442 struct CFGM s;
1443#endif
1444 uint8_t padding[8]; /* multiple of 8 */
1445 } cfgm;
1446
1447 /** Padding for aligning the structure size on a page boundrary. */
1448#ifdef VBOX_WITH_REM
1449 uint8_t abAlignment2[3032 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1450#else
1451 uint8_t abAlignment2[3032 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1452#endif
1453
1454 /* ---- end small stuff ---- */
1455
1456 /** Array of VMCPU ring-3 pointers. */
1457 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1458} VM;
1459
1460
1461#ifdef IN_RC
1462RT_C_DECLS_BEGIN
1463
1464/** The VM structure.
1465 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1466 * globals which we should avoid using.
1467 */
1468extern DECLIMPORT(VM) g_VM;
1469
1470/** The VMCPU structure for virtual CPU \#0.
1471 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1472 * globals which we should avoid using.
1473 */
1474extern DECLIMPORT(VMCPU) g_VCpu0;
1475
1476RT_C_DECLS_END
1477#endif
1478
1479/** @} */
1480
1481#endif /* !VBOX_INCLUDED_vmm_vm_h */
1482
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