vm.h@ 81605

Last change on this file since 81605 was 81391, checked in by vboxsync, 5 years ago
PDM: Introducing a asynchronous ring-3 task concept to alliviate the places where we use single item PDM queues to trigger ring-3 work from ring-0 (and formerly raw-mode). Untested code, not enabled yet. bugref:9218
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2019 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef VBOX_INCLUDED_vmm_vm_h
27	#define VBOX_INCLUDED_vmm_vm_h
28	#ifndef RT_WITHOUT_PRAGMA_ONCE
29	# pragma once
30	#endif
31
32	#ifndef VBOX_FOR_DTRACE_LIB
33	# ifndef USING_VMM_COMMON_DEFS
34	# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/Config.kmk - make sure you really need to include this file!"
35	# endif
36	# include <iprt/param.h>
37	# include <VBox/param.h>
38	# include <VBox/types.h>
39	# include <VBox/vmm/cpum.h>
40	# include <VBox/vmm/stam.h>
41	# include <VBox/vmm/vmapi.h>
42	# include <VBox/vmm/vmm.h>
43	# include <VBox/sup.h>
44	#else
45	# pragma D depends_on library vbox-types.d
46	# pragma D depends_on library CPUMInternal.d
47	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48	#endif
49
50
51
52	/** @defgroup grp_vm The Virtual Machine
53	* @ingroup grp_vmm
54	* @{
55	*/
56
57	/**
58	* The state of a Virtual CPU.
59	*
60	* The basic state indicated here is whether the CPU has been started or not. In
61	* addition, there are sub-states when started for assisting scheduling (GVMM
62	* mostly).
63	*
64	* The transition out of the STOPPED state is done by a vmR3PowerOn.
65	* The transition back to the STOPPED state is done by vmR3PowerOff.
66	*
67	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69	*/
70	typedef enum VMCPUSTATE
71	{
72	/** The customary invalid zero. */
73	VMCPUSTATE_INVALID = 0,
74
75	/** Virtual CPU has not yet been started. */
76	VMCPUSTATE_STOPPED,
77
78	/** CPU started. */
79	VMCPUSTATE_STARTED,
80	/** CPU started in HM context. */
81	VMCPUSTATE_STARTED_HM,
82	/** Executing guest code and can be poked (RC or STI bits of HM). */
83	VMCPUSTATE_STARTED_EXEC,
84	/** Executing guest code using NEM. */
85	VMCPUSTATE_STARTED_EXEC_NEM,
86	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
87	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
88	/** Halted. */
89	VMCPUSTATE_STARTED_HALTED,
90
91	/** The end of valid virtual CPU states. */
92	VMCPUSTATE_END,
93
94	/** Ensure 32-bit type. */
95	VMCPUSTATE_32BIT_HACK = 0x7fffffff
96	} VMCPUSTATE;
97
98	/** Enables 64-bit FFs. */
99	#define VMCPU_WITH_64_BIT_FFS
100
101
102	/**
103	* The cross context virtual CPU structure.
104	*
105	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
106	*/
107	typedef struct VMCPU
108	{
109	/** @name Volatile per-cpu data.
110	* @{ */
111	/** Per CPU forced action.
112	* See the VMCPU_FF_* \#defines. Updated atomically. */
113	#ifdef VMCPU_WITH_64_BIT_FFS
114	uint64_t volatile fLocalForcedActions;
115	#else
116	uint32_t volatile fLocalForcedActions;
117	uint32_t fForLocalForcedActionsExpansion;
118	#endif
119	/** The CPU state. */
120	VMCPUSTATE volatile enmState;
121
122	/** Which host CPU ID is this EMT running on.
123	* Only valid when in RC or HMR0 with scheduling disabled. */
124	RTCPUID volatile idHostCpu;
125	/** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
126	* @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
127	uint32_t volatile iHostCpuSet;
128	/** Padding up to 64 bytes. */
129	uint8_t abAlignment0[64 - 20];
130	/** @} */
131
132	/** IEM part.
133	* @remarks This comes first as it allows the use of 8-bit immediates for the
134	* first 64 bytes of the structure, reducing code size a wee bit. */
135	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
136	union VMCPUUNIONIEMFULL
137	#else
138	union VMCPUUNIONIEMSTUB
139	#endif
140	{
141	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
142	struct IEMCPU s;
143	#endif
144	uint8_t padding[18496]; /* multiple of 64 */
145	} iem;
146
147	/** @name Static per-cpu data.
148	* (Putting this after IEM, hoping that it's less frequently used than it.)
149	* @{ */
150	/** Ring-3 Host Context VM Pointer. */
151	PVMR3 pVMR3;
152	/** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
153	RTR0PTR pVCpuR0ForVtg;
154	/** Raw-mode Context VM Pointer. */
155	uint32_t pVMRC;
156	/** Padding for new raw-mode (long mode). */
157	uint32_t pVMRCPadding;
158	/** Pointer to the ring-3 UVMCPU structure. */
159	PUVMCPU pUVCpu;
160	/** The native thread handle. */
161	RTNATIVETHREAD hNativeThread;
162	/** The native R0 thread handle. (different from the R3 handle!) */
163	RTNATIVETHREAD hNativeThreadR0;
164	/** The CPU ID.
165	* This is the index into the VM::aCpu array. */
166	#ifdef IN_RING0
167	VMCPUID idCpuUnsafe;
168	#else
169	VMCPUID idCpu;
170	#endif
171
172	/** Align the structures below bit on a 64-byte boundary and make sure it starts
173	* at the same offset in both 64-bit and 32-bit builds.
174	*
175	* @remarks The alignments of the members that are larger than 48 bytes should be
176	* 64-byte for cache line reasons. structs containing small amounts of
177	* data could be lumped together at the end with a < 64 byte padding
178	* following it (to grow into and align the struct size).
179	*/
180	uint8_t abAlignment1[64 - 5 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
181	/** @} */
182
183	/** HM part. */
184	union VMCPUUNIONHM
185	{
186	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
187	struct HMCPU s;
188	#endif
189	uint8_t padding[5888]; /* multiple of 64 */
190	} hm;
191
192	/** NEM part. */
193	union VMCPUUNIONNEM
194	{
195	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
196	struct NEMCPU s;
197	#endif
198	uint8_t padding[512]; /* multiple of 64 */
199	} nem;
200
201	/** TRPM part. */
202	union VMCPUUNIONTRPM
203	{
204	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
205	struct TRPMCPU s;
206	#endif
207	uint8_t padding[128]; /* multiple of 64 */
208	} trpm;
209
210	/** TM part. */
211	union VMCPUUNIONTM
212	{
213	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
214	struct TMCPU s;
215	#endif
216	uint8_t padding[5760]; /* multiple of 64 */
217	} tm;
218
219	/** VMM part. */
220	union VMCPUUNIONVMM
221	{
222	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
223	struct VMMCPU s;
224	#endif
225	uint8_t padding[896]; /* multiple of 64 */
226	} vmm;
227
228	/** PDM part. */
229	union VMCPUUNIONPDM
230	{
231	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
232	struct PDMCPU s;
233	#endif
234	uint8_t padding[256]; /* multiple of 64 */
235	} pdm;
236
237	/** IOM part. */
238	union VMCPUUNIONIOM
239	{
240	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
241	struct IOMCPU s;
242	#endif
243	uint8_t padding[512]; /* multiple of 64 */
244	} iom;
245
246	/** DBGF part.
247	* @todo Combine this with other tiny structures. */
248	union VMCPUUNIONDBGF
249	{
250	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
251	struct DBGFCPU s;
252	#endif
253	uint8_t padding[256]; /* multiple of 64 */
254	} dbgf;
255
256	/** GIM part. */
257	union VMCPUUNIONGIM
258	{
259	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
260	struct GIMCPU s;
261	#endif
262	uint8_t padding[512]; /* multiple of 64 */
263	} gim;
264
265	/** APIC part. */
266	union VMCPUUNIONAPIC
267	{
268	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
269	struct APICCPU s;
270	#endif
271	uint8_t padding[1792]; /* multiple of 64 */
272	} apic;
273
274	/*
275	* Some less frequently used global members that doesn't need to take up
276	* precious space at the head of the structure.
277	*/
278
279	/** Trace groups enable flags. */
280	uint32_t fTraceGroups; /* 64 / 44 */
281	/** State data for use by ad hoc profiling. */
282	uint32_t uAdHoc;
283	/** Profiling samples for use by ad hoc profiling. */
284	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
285
286	/** Align the following members on page boundary. */
287	uint8_t abAlignment2[1400];
288
289	/** PGM part. */
290	union VMCPUUNIONPGM
291	{
292	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
293	struct PGMCPU s;
294	#endif
295	uint8_t padding[4096]; /* multiple of 4096 */
296	} pgm;
297
298	/** CPUM part. */
299	union VMCPUUNIONCPUM
300	{
301	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
302	struct CPUMCPU s;
303	#endif
304	#ifdef VMCPU_INCL_CPUM_GST_CTX
305	/** The guest CPUM context for direct use by execution engines.
306	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
307	* others. The rest will use the function based CPUM API. */
308	CPUMCTX GstCtx;
309	#endif
310	uint8_t padding[4096]; /* multiple of 4096 */
311	} cpum;
312
313	/** EM part. */
314	union VMCPUUNIONEM
315	{
316	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
317	struct EMCPU s;
318	#endif
319	uint8_t padding[40960]; /* multiple of 4096 */
320	} em;
321	} VMCPU;
322
323
324	#ifndef VBOX_FOR_DTRACE_LIB
325	AssertCompileSizeAlignment(VMCPU, 4096);
326
327	/** @name Operations on VMCPU::enmState
328	* @{ */
329	/** Gets the VMCPU state. */
330	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
331	/** Sets the VMCPU state. */
332	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
333	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
334	/** Cmpares and sets the VMCPU state. */
335	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
336	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
337	/** Checks the VMCPU state. */
338	#ifdef VBOX_STRICT
339	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
340	do { \
341	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
342	AssertMsg(enmState == (enmExpectedState), \
343	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
344	enmState, enmExpectedState, (pVCpu)->idCpu)); \
345	} while (0)
346	#else
347	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
348	#endif
349	/** Tests if the state means that the CPU is started. */
350	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
351	/** Tests if the state means that the CPU is stopped. */
352	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
353	/** @} */
354
355
356	/** The name of the raw-mode context VMM Core module. */
357	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
358	/** The name of the ring-0 context VMM Core module. */
359	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
360
361
362	/** VM Forced Action Flags.
363	*
364	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
365	* action mask of a VM.
366	*
367	* Available VM bits:
368	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
369	*
370	*
371	* Available VMCPU bits:
372	* 14, 15, 36 to 63
373	*
374	* @todo If we run low on VMCPU, we may consider merging the SELM bits
375	*
376	* @{
377	*/
378	/** The virtual sync clock has been stopped, go to TM until it has been
379	* restarted... */
380	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
381	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
382	/** PDM Queues are pending. */
383	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
384	/** The bit number for VM_FF_PDM_QUEUES. */
385	#define VM_FF_PDM_QUEUES_BIT 3
386	/** PDM DMA transfers are pending. */
387	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
388	/** The bit number for VM_FF_PDM_DMA. */
389	#define VM_FF_PDM_DMA_BIT 4
390	/** This action forces the VM to call DBGF so DBGF can service debugger
391	* requests in the emulation thread.
392	* This action flag stays asserted till DBGF clears it.*/
393	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
394	/** The bit number for VM_FF_DBGF. */
395	#define VM_FF_DBGF_BIT 8
396	/** This action forces the VM to service pending requests from other
397	* thread or requests which must be executed in another context. */
398	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
399	#define VM_FF_REQUEST_BIT 9
400	/** Check for VM state changes and take appropriate action. */
401	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
402	/** The bit number for VM_FF_CHECK_VM_STATE. */
403	#define VM_FF_CHECK_VM_STATE_BIT 10
404	/** Reset the VM. (postponed) */
405	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
406	/** The bit number for VM_FF_RESET. */
407	#define VM_FF_RESET_BIT 11
408	/** EMT rendezvous in VMM. */
409	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
410	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
411	#define VM_FF_EMT_RENDEZVOUS_BIT 12
412
413	/** PGM needs to allocate handy pages. */
414	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
415	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
416	/** PGM is out of memory.
417	* Abandon all loops and code paths which can be resumed and get up to the EM
418	* loops. */
419	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
420	#define VM_FF_PGM_NO_MEMORY_BIT 19
421	/** PGM is about to perform a lightweight pool flush
422	* Guest SMP: all EMT threads should return to ring 3
423	*/
424	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
425	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
426	/** Suspend the VM - debug only. */
427	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
428	#define VM_FF_DEBUG_SUSPEND_BIT 31
429
430
431	/** This action forces the VM to check any pending interrupts on the APIC. */
432	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
433	#define VMCPU_FF_INTERRUPT_APIC_BIT 0
434	/** This action forces the VM to check any pending interrups on the PIC. */
435	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
436	#define VMCPU_FF_INTERRUPT_PIC_BIT 1
437	/** This action forces the VM to schedule and run pending timer (TM).
438	* @remarks Don't move - PATM compatibility. */
439	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
440	#define VMCPU_FF_TIMER_BIT 2
441	/** This action forces the VM to check any pending NMIs. */
442	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
443	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
444	/** This action forces the VM to check any pending SMIs. */
445	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
446	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
447	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
448	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
449	#define VMCPU_FF_PDM_CRITSECT_BIT 5
450	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
451	* the virtual CPU out of the next (/current) halted state. It is not processed
452	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
453	* is cleared the next time EM leaves the HALTED state. */
454	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
455	#define VMCPU_FF_UNHALT_BIT 6
456	/** Pending IEM action (mask). */
457	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
458	/** Pending IEM action (bit number). */
459	#define VMCPU_FF_IEM_BIT 7
460	/** Pending APIC action (bit number). */
461	#define VMCPU_FF_UPDATE_APIC_BIT 8
462	/** This action forces the VM to update APIC's asynchronously arrived
463	* interrupts as pending interrupts. */
464	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
465	/** This action forces the VM to service pending requests from other
466	* thread or requests which must be executed in another context. */
467	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
468	#define VMCPU_FF_REQUEST_BIT 9
469	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
470	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
471	/** The bit number for VMCPU_FF_DBGF. */
472	#define VMCPU_FF_DBGF_BIT 10
473	/** This action forces the VM to service any pending updates to CR3 (used only
474	* by HM). */
475	/** Hardware virtualized nested-guest interrupt pending. */
476	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
477	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
478	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
479	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
480	/** This action forces the VM to service any pending updates to PAE PDPEs (used
481	* only by HM). */
482	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
483	#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
484	/** This action forces the VM to resync the page tables before going
485	* back to execute guest code. (GLOBAL FLUSH) */
486	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
487	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
488	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
489	* (NON-GLOBAL FLUSH) */
490	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
491	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
492	/** Check for pending TLB shootdown actions (deprecated)
493	* Reserved for furture HM re-use if necessary / safe.
494	* Consumer: HM */
495	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
496	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
497	/** Check for pending TLB flush action.
498	* Consumer: HM
499	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
500	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
501	/** The bit number for VMCPU_FF_TLB_FLUSH. */
502	#define VMCPU_FF_TLB_FLUSH_BIT 19
503	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
504	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
505	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
506	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
507	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
508	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
509	#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
510	/** Block injection of non-maskable interrupts to the guest. */
511	#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
512	#define VMCPU_FF_BLOCK_NMIS_BIT 25
513	/** Force return to Ring-3. */
514	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
515	#define VMCPU_FF_TO_R3_BIT 28
516	/** Force return to ring-3 to service pending I/O or MMIO write.
517	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
518	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
519	* status codes to be propagated at the same time without loss. */
520	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
521	#define VMCPU_FF_IOM_BIT 29
522	/* 30 used to be VMCPU_FF_CPUM */
523	/** VMX-preemption timer in effect. */
524	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
525	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
526	/** Pending MTF (Monitor Trap Flag) event. */
527	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
528	#define VMCPU_FF_VMX_MTF_BIT 32
529	/** VMX APIC-write emulation pending. */
530	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
531	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
532	/** VMX interrupt-window event pending. */
533	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
534	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
535	/** VMX NMI-window event pending. */
536	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
537	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
538
539
540	/** Externally VM forced actions. Used to quit the idle/wait loop. */
541	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
542	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
543	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
544
545	/** Externally forced VM actions. Used to quit the idle/wait loop. */
546	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
547	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
548	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
549	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
550	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
551	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
552	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
553
554	/** High priority VM pre-execution actions. */
555	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
556	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
557	\| VM_FF_EMT_RENDEZVOUS )
558	/** High priority VMCPU pre-execution actions. */
559	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
560	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
561	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
562	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
563	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
564
565	/** High priority VM pre raw-mode execution mask. */
566	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
567	/** High priority VMCPU pre raw-mode execution mask. */
568	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
569	\| VMCPU_FF_INHIBIT_INTERRUPTS )
570
571	/** High priority post-execution actions. */
572	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
573	/** High priority post-execution actions. */
574	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
575	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \
576	\| VMCPU_FF_IEM \| VMCPU_FF_IOM )
577
578	/** Normal priority VM post-execution actions. */
579	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
580	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
581	/** Normal priority VMCPU post-execution actions. */
582	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
583
584	/** Normal priority VM actions. */
585	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
586	/** Normal priority VMCPU actions. */
587	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
588
589	/** Flags to clear before resuming guest execution. */
590	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
591
592
593	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
594	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
595	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
596	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
597	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
598	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
599	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
600	#ifdef IN_RING3
601	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \
602	\| VMCPU_FF_VMX_MTF )
603	#else
604	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
605	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF )
606	#endif
607	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
608	* enabled. */
609	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
610	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
611	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
612	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
613	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
614	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
615	* disabled. */
616	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
617	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
618	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
619
620	/** VM Flags that cause the HM loops to go back to ring-3. */
621	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
622	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
623	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
624	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
625	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
626
627	/** High priority ring-0 VM pre HM-mode execution mask. */
628	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
629	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
630	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
631	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
632	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
633	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
634	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
635	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
636	\| VM_FF_PDM_DMA) )
637	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
638	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
639	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
640
641	/** All the forced VM flags. */
642	#define VM_FF_ALL_MASK (UINT32_MAX)
643	/** All the forced VMCPU flags. */
644	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
645
646	/** All the forced VM flags except those related to raw-mode and hardware
647	* assisted execution. */
648	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
649	/** All the forced VMCPU flags except those related to raw-mode and hardware
650	* assisted execution. */
651	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
652	/** @} */
653
654	/** @def VM_FF_SET
655	* Sets a single force action flag.
656	*
657	* @param pVM The cross context VM structure.
658	* @param fFlag The flag to set.
659	*/
660	#define VM_FF_SET(pVM, fFlag) do { \
661	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
662	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
663	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
664	} while (0)
665
666	/** @def VMCPU_FF_SET
667	* Sets a single force action flag for the given VCPU.
668	*
669	* @param pVCpu The cross context virtual CPU structure.
670	* @param fFlag The flag to set.
671	* @sa VMCPU_FF_SET_MASK
672	*/
673	#ifdef VMCPU_WITH_64_BIT_FFS
674	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
675	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
676	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
677	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
678	} while (0)
679	#else
680	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
681	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
682	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
683	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
684	} while (0)
685	#endif
686
687	/** @def VMCPU_FF_SET_MASK
688	* Sets a two or more force action flag for the given VCPU.
689	*
690	* @param pVCpu The cross context virtual CPU structure.
691	* @param fFlags The flags to set.
692	* @sa VMCPU_FF_SET
693	*/
694	#ifdef VMCPU_WITH_64_BIT_FFS
695	# if ARCH_BITS > 32
696	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
697	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
698	# else
699	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
700	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
701	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
702	} while (0)
703	# endif
704	#else
705	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
706	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
707	#endif
708
709	/** @def VM_FF_CLEAR
710	* Clears a single force action flag.
711	*
712	* @param pVM The cross context VM structure.
713	* @param fFlag The flag to clear.
714	*/
715	#define VM_FF_CLEAR(pVM, fFlag) do { \
716	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
717	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
718	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
719	} while (0)
720
721	/** @def VMCPU_FF_CLEAR
722	* Clears a single force action flag for the given VCPU.
723	*
724	* @param pVCpu The cross context virtual CPU structure.
725	* @param fFlag The flag to clear.
726	*/
727	#ifdef VMCPU_WITH_64_BIT_FFS
728	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
729	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
730	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
731	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
732	} while (0)
733	#else
734	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
735	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
736	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
737	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
738	} while (0)
739	#endif
740
741	/** @def VMCPU_FF_CLEAR_MASK
742	* Clears two or more force action flags for the given VCPU.
743	*
744	* @param pVCpu The cross context virtual CPU structure.
745	* @param fFlags The flags to clear.
746	*/
747	#ifdef VMCPU_WITH_64_BIT_FFS
748	# if ARCH_BITS > 32
749	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
750	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
751	# else
752	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
753	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
754	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
755	} while (0)
756	# endif
757	#else
758	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
759	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
760	#endif
761
762	/** @def VM_FF_IS_SET
763	* Checks if single a force action flag is set.
764	*
765	* @param pVM The cross context VM structure.
766	* @param fFlag The flag to check.
767	* @sa VM_FF_IS_ANY_SET
768	*/
769	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
770	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
771	#else
772	# define VM_FF_IS_SET(pVM, fFlag) \
773	([](PVM a_pVM) -> bool \
774	{ \
775	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
776	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
777	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
778	}(pVM))
779	#endif
780
781	/** @def VMCPU_FF_IS_SET
782	* Checks if a single force action flag is set for the given VCPU.
783	*
784	* @param pVCpu The cross context virtual CPU structure.
785	* @param fFlag The flag to check.
786	* @sa VMCPU_FF_IS_ANY_SET
787	*/
788	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
789	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
790	#else
791	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
792	([](PCVMCPU a_pVCpu) -> bool \
793	{ \
794	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
795	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
796	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
797	}(pVCpu))
798	#endif
799
800	/** @def VM_FF_IS_ANY_SET
801	* Checks if one or more force action in the specified set is pending.
802	*
803	* @param pVM The cross context VM structure.
804	* @param fFlags The flags to check for.
805	* @sa VM_FF_IS_SET
806	*/
807	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
808
809	/** @def VMCPU_FF_IS_ANY_SET
810	* Checks if two or more force action flags in the specified set is set for the given VCPU.
811	*
812	* @param pVCpu The cross context virtual CPU structure.
813	* @param fFlags The flags to check for.
814	* @sa VMCPU_FF_IS_SET
815	*/
816	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
817
818	/** @def VM_FF_TEST_AND_CLEAR
819	* Checks if one (!) force action in the specified set is pending and clears it atomically
820	*
821	* @returns true if the bit was set.
822	* @returns false if the bit was clear.
823	* @param pVM The cross context VM structure.
824	* @param fFlag Flag constant to check and clear (_BIT is appended).
825	*/
826	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
827
828	/** @def VMCPU_FF_TEST_AND_CLEAR
829	* Checks if one (!) force action in the specified set is pending and clears it atomically
830	*
831	* @returns true if the bit was set.
832	* @returns false if the bit was clear.
833	* @param pVCpu The cross context virtual CPU structure.
834	* @param fFlag Flag constant to check and clear (_BIT is appended).
835	*/
836	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
837
838	/** @def VM_FF_IS_PENDING_EXCEPT
839	* Checks if one or more force action in the specified set is pending while one
840	* or more other ones are not.
841	*
842	* @param pVM The cross context VM structure.
843	* @param fFlags The flags to check for.
844	* @param fExcpt The flags that should not be set.
845	*/
846	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
847	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
848
849	/** @def VM_IS_EMT
850	* Checks if the current thread is the emulation thread (EMT).
851	*
852	* @remark The ring-0 variation will need attention if we expand the ring-0
853	* code to let threads other than EMT mess around with the VM.
854	*/
855	#ifdef IN_RC
856	# define VM_IS_EMT(pVM) true
857	#else
858	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
859	#endif
860
861	/** @def VMCPU_IS_EMT
862	* Checks if the current thread is the emulation thread (EMT) for the specified
863	* virtual CPU.
864	*/
865	#ifdef IN_RC
866	# define VMCPU_IS_EMT(pVCpu) true
867	#else
868	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
869	#endif
870
871	/** @def VM_ASSERT_EMT
872	* Asserts that the current thread IS the emulation thread (EMT).
873	*/
874	#ifdef IN_RC
875	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
876	#elif defined(IN_RING0)
877	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
878	#else
879	# define VM_ASSERT_EMT(pVM) \
880	AssertMsg(VM_IS_EMT(pVM), \
881	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
882	#endif
883
884	/** @def VMCPU_ASSERT_EMT
885	* Asserts that the current thread IS the emulation thread (EMT) of the
886	* specified virtual CPU.
887	*/
888	#ifdef IN_RC
889	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
890	#elif defined(IN_RING0)
891	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
892	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
893	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
894	(pVCpu) ? (pVCpu)->idCpu : 0))
895	#else
896	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
897	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
898	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
899	#endif
900
901	/** @def VM_ASSERT_EMT_RETURN
902	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
903	*/
904	#ifdef IN_RC
905	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
906	#elif defined(IN_RING0)
907	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
908	#else
909	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
910	AssertMsgReturn(VM_IS_EMT(pVM), \
911	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
912	(rc))
913	#endif
914
915	/** @def VMCPU_ASSERT_EMT_RETURN
916	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
917	*/
918	#ifdef IN_RC
919	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
920	#elif defined(IN_RING0)
921	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
922	#else
923	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
924	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
925	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
926	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
927	(rc))
928	#endif
929
930	/** @def VMCPU_ASSERT_EMT_OR_GURU
931	* Asserts that the current thread IS the emulation thread (EMT) of the
932	* specified virtual CPU.
933	*/
934	#if defined(IN_RC) \|\| defined(IN_RING0)
935	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
936	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
937	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
938	#else
939	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
940	AssertMsg( VMCPU_IS_EMT(pVCpu) \
941	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
942	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
943	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
944	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
945	#endif
946
947	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
948	* Asserts that the current thread IS the emulation thread (EMT) of the
949	* specified virtual CPU or the VM is not running.
950	*/
951	#if defined(IN_RC) \|\| defined(IN_RING0)
952	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
953	Assert( VMCPU_IS_EMT(pVCpu) \
954	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
955	#else
956	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
957	AssertMsg( VMCPU_IS_EMT(pVCpu) \
958	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
959	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
960	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
961	#endif
962
963	/** @def VMSTATE_IS_RUNNING
964	* Checks if the given state indicates a running VM.
965	*/
966	#define VMSTATE_IS_RUNNING(a_enmVMState) \
967	( (enmVMState) == VMSTATE_RUNNING \
968	\|\| (enmVMState) == VMSTATE_RUNNING_LS )
969
970	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
971	* Checks if the VM is running.
972	* @note This is only for pure debug assertions. No AssertReturn or similar!
973	* @sa VMSTATE_IS_RUNNING
974	*/
975	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
976	( (pVM)->enmVMState == VMSTATE_RUNNING \
977	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
978
979	/** @def VM_ASSERT_IS_NOT_RUNNING
980	* Asserts that the VM is not running.
981	*/
982	#if defined(IN_RC) \|\| defined(IN_RING0)
983	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
984	#else
985	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
986	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
987	#endif
988
989	/** @def VM_ASSERT_EMT0
990	* Asserts that the current thread IS emulation thread \#0 (EMT0).
991	*/
992	#ifdef IN_RING3
993	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
994	#else
995	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
996	#endif
997
998	/** @def VM_ASSERT_EMT0_RETURN
999	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1000	* it isn't.
1001	*/
1002	#ifdef IN_RING3
1003	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1004	#else
1005	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1006	#endif
1007
1008
1009	/**
1010	* Asserts that the current thread is NOT the emulation thread.
1011	*/
1012	#define VM_ASSERT_OTHER_THREAD(pVM) \
1013	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1014
1015
1016	/** @def VM_ASSERT_STATE
1017	* Asserts a certain VM state.
1018	*/
1019	#define VM_ASSERT_STATE(pVM, _enmState) \
1020	AssertMsg((pVM)->enmVMState == (_enmState), \
1021	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1022
1023	/** @def VM_ASSERT_STATE_RETURN
1024	* Asserts a certain VM state and returns if it doesn't match.
1025	*/
1026	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1027	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1028	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1029	(rc))
1030
1031	/** @def VM_IS_VALID_EXT
1032	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1033	* or terminated. */
1034	#define VM_IS_VALID_EXT(pVM) \
1035	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1036	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1037	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1038	&& VM_IS_EMT(pVM))) )
1039
1040	/** @def VM_ASSERT_VALID_EXT_RETURN
1041	* Asserts a the VM handle is valid for external access, i.e. not being
1042	* destroy or terminated.
1043	*/
1044	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1045	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1046	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1047	? VMGetStateName(pVM->enmVMState) : ""), \
1048	(rc))
1049
1050	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1051	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1052	* destroy or terminated.
1053	*/
1054	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1055	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1056	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1057	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1058	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1059	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1060	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1061	(rc))
1062
1063	#endif /* !VBOX_FOR_DTRACE_LIB */
1064
1065
1066	/**
1067	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1068	*
1069	* ONLY HM and NEM MAY USE THIS!
1070	*
1071	* @param a_pVM The cross context VM structure.
1072	* @param a_bValue The new value.
1073	* @internal
1074	*/
1075	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1076	do { \
1077	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1078	ASMCompilerBarrier(); /* just to be on the safe side */ \
1079	} while (0)
1080
1081	/**
1082	* Checks whether raw-mode is used.
1083	*
1084	* @retval true if either is used.
1085	* @retval false if software virtualization (raw-mode) is used.
1086	*
1087	* @param a_pVM The cross context VM structure.
1088	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1089	* @internal
1090	*/
1091	#ifdef VBOX_WITH_RAW_MODE
1092	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1093	#else
1094	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1095	#endif
1096
1097	/**
1098	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1099	*
1100	* @retval true if either is used.
1101	* @retval false if software virtualization (raw-mode) is used.
1102	*
1103	* @param a_pVM The cross context VM structure.
1104	* @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1105	* @internal
1106	*/
1107	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1108
1109	/**
1110	* Checks whether HM is being used by this VM.
1111	*
1112	* @retval true if HM (VT-x/AMD-v) is used.
1113	* @retval false if not.
1114	*
1115	* @param a_pVM The cross context VM structure.
1116	* @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1117	* @internal
1118	*/
1119	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1120
1121	/**
1122	* Checks whether NEM is being used by this VM.
1123	*
1124	* @retval true if a native hypervisor API is used.
1125	* @retval false if not.
1126	*
1127	* @param a_pVM The cross context VM structure.
1128	* @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1129	* @internal
1130	*/
1131	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1132
1133
1134	/**
1135	* The cross context VM structure.
1136	*
1137	* It contains all the VM data which have to be available in all contexts.
1138	* Even if it contains all the data the idea is to use APIs not to modify all
1139	* the members all around the place. Therefore we make use of unions to hide
1140	* everything which isn't local to the current source module. This means we'll
1141	* have to pay a little bit of attention when adding new members to structures
1142	* in the unions and make sure to keep the padding sizes up to date.
1143	*
1144	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1145	*/
1146	typedef struct VM
1147	{
1148	/** The state of the VM.
1149	* This field is read only to everyone except the VM and EM. */
1150	VMSTATE volatile enmVMState;
1151	/** Forced action flags.
1152	* See the VM_FF_* \#defines. Updated atomically.
1153	*/
1154	volatile uint32_t fGlobalForcedActions;
1155	/** Pointer to the array of page descriptors for the VM structure allocation. */
1156	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1157	/** Session handle. For use when calling SUPR0 APIs. */
1158	#ifdef IN_RING0
1159	PSUPDRVSESSION pSessionUnsafe;
1160	#else
1161	PSUPDRVSESSION pSession;
1162	#endif
1163	/** Pointer to the ring-3 VM structure. */
1164	PUVM pUVM;
1165	/** Ring-3 Host Context VM Pointer. */
1166	#ifdef IN_RING0
1167	R3PTRTYPE(struct VM *) pVMR3Unsafe;
1168	#else
1169	R3PTRTYPE(struct VM *) pVMR3;
1170	#endif
1171	/** Ring-0 Host Context VM pointer for making ring-0 calls. */
1172	R0PTRTYPE(struct VM *) pVMR0ForCall;
1173	/** Raw-mode Context VM Pointer. */
1174	uint32_t pVMRC;
1175	/** Padding for new raw-mode (long mode). */
1176	uint32_t pVMRCPadding;
1177
1178	/** The GVM VM handle. Only the GVM should modify this field. */
1179	#ifdef IN_RING0
1180	uint32_t hSelfUnsafe;
1181	#else
1182	uint32_t hSelf;
1183	#endif
1184	/** Number of virtual CPUs. */
1185	#ifdef IN_RING0
1186	uint32_t cCpusUnsafe;
1187	#else
1188	uint32_t cCpus;
1189	#endif
1190	/** CPU excution cap (1-100) */
1191	uint32_t uCpuExecutionCap;
1192
1193	/** Size of the VM structure. */
1194	uint32_t cbSelf;
1195	/** Size of the VMCPU structure. */
1196	uint32_t cbVCpu;
1197	/** Structure version number (TBD). */
1198	uint32_t uStructVersion;
1199
1200	/** @name Various items that are frequently accessed.
1201	* @{ */
1202	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1203	* This is set early during vmR3InitRing3 by HM or NEM. */
1204	uint8_t const bMainExecutionEngine;
1205
1206	/** Hardware VM support is available and enabled.
1207	* Determined very early during init.
1208	* This is placed here for performance reasons.
1209	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1210	bool fHMEnabled;
1211
1212	/** Large page enabled flag.
1213	* @todo This doesn't need to be here, PGM should store it in it's own
1214	* structures instead. */
1215	bool fUseLargePages;
1216	/** @} */
1217
1218	/** Alignment padding. */
1219	uint8_t uPadding1[5];
1220
1221	/** @name Debugging
1222	* @{ */
1223	/** Ring-3 Host Context VM Pointer. */
1224	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1225	/** Ring-0 Host Context VM Pointer. */
1226	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1227	/** @} */
1228
1229	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1230	uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1231
1232	/** CPUM part. */
1233	union
1234	{
1235	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1236	struct CPUM s;
1237	#endif
1238	#ifdef VBOX_INCLUDED_vmm_cpum_h
1239	/** Read only info exposed about the host and guest CPUs. */
1240	struct
1241	{
1242	/** Padding for hidden fields. */
1243	uint8_t abHidden0[64];
1244	/** Host CPU feature information. */
1245	CPUMFEATURES HostFeatures;
1246	/** Guest CPU feature information. */
1247	CPUMFEATURES GuestFeatures;
1248	} const ro;
1249	#endif
1250	uint8_t padding[1536]; /* multiple of 64 */
1251	} cpum;
1252
1253	/** VMM part. */
1254	union
1255	{
1256	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1257	struct VMM s;
1258	#endif
1259	uint8_t padding[1600]; /* multiple of 64 */
1260	} vmm;
1261
1262	/** PGM part. */
1263	union
1264	{
1265	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1266	struct PGM s;
1267	#endif
1268	uint8_t padding[20800]; /* multiple of 64 */
1269	} pgm;
1270
1271	/** HM part. */
1272	union
1273	{
1274	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1275	struct HM s;
1276	#endif
1277	uint8_t padding[5440]; /* multiple of 64 */
1278	} hm;
1279
1280	/** TRPM part. */
1281	union
1282	{
1283	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1284	struct TRPM s;
1285	#endif
1286	uint8_t padding[5248]; /* multiple of 64 */
1287	} trpm;
1288
1289	/** SELM part. */
1290	union
1291	{
1292	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1293	struct SELM s;
1294	#endif
1295	uint8_t padding[768]; /* multiple of 64 */
1296	} selm;
1297
1298	/** MM part. */
1299	union
1300	{
1301	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1302	struct MM s;
1303	#endif
1304	uint8_t padding[192]; /* multiple of 64 */
1305	} mm;
1306
1307	/** PDM part. */
1308	union
1309	{
1310	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1311	struct PDM s;
1312	#endif
1313	uint8_t padding[7808]; /* multiple of 64 */
1314	} pdm;
1315
1316	/** IOM part. */
1317	union
1318	{
1319	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1320	struct IOM s;
1321	#endif
1322	uint8_t padding[1152]; /* multiple of 64 */
1323	} iom;
1324
1325	/** EM part. */
1326	union
1327	{
1328	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1329	struct EM s;
1330	#endif
1331	uint8_t padding[256]; /* multiple of 64 */
1332	} em;
1333
1334	/** NEM part. */
1335	union
1336	{
1337	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1338	struct NEM s;
1339	#endif
1340	uint8_t padding[128]; /* multiple of 64 */
1341	} nem;
1342
1343	/** TM part. */
1344	union
1345	{
1346	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1347	struct TM s;
1348	#endif
1349	uint8_t padding[7872]; /* multiple of 64 */
1350	} tm;
1351
1352	/** DBGF part. */
1353	union
1354	{
1355	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1356	struct DBGF s;
1357	#endif
1358	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1359	/** Read only info exposed about interrupt breakpoints and selected events. */
1360	struct
1361	{
1362	/** Bitmap of enabled hardware interrupt breakpoints. */
1363	uint32_t bmHardIntBreakpoints[256 / 32];
1364	/** Bitmap of enabled software interrupt breakpoints. */
1365	uint32_t bmSoftIntBreakpoints[256 / 32];
1366	/** Bitmap of selected events.
1367	* This includes non-selectable events too for simplicity, we maintain the
1368	* state for some of these, as it may come in handy. */
1369	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1370	/** Enabled hardware interrupt breakpoints. */
1371	uint32_t cHardIntBreakpoints;
1372	/** Enabled software interrupt breakpoints. */
1373	uint32_t cSoftIntBreakpoints;
1374	/** The number of selected events. */
1375	uint32_t cSelectedEvents;
1376	/** The number of enabled hardware breakpoints. */
1377	uint8_t cEnabledHwBreakpoints;
1378	/** The number of enabled hardware I/O breakpoints. */
1379	uint8_t cEnabledHwIoBreakpoints;
1380	/** The number of enabled INT3 breakpoints. */
1381	uint8_t cEnabledInt3Breakpoints;
1382	uint8_t abPadding[1]; /*< Unused padding space up for grabs. /
1383	} const ro;
1384	#endif
1385	uint8_t padding[2432]; /* multiple of 64 */
1386	} dbgf;
1387
1388	/** SSM part. */
1389	union
1390	{
1391	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1392	struct SSM s;
1393	#endif
1394	uint8_t padding[128]; /* multiple of 64 */
1395	} ssm;
1396
1397	union
1398	{
1399	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1400	struct GIM s;
1401	#endif
1402	uint8_t padding[448]; /* multiple of 64 */
1403	} gim;
1404
1405	union
1406	{
1407	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1408	struct APIC s;
1409	#endif
1410	uint8_t padding[128]; /* multiple of 8 */
1411	} apic;
1412
1413	/* ---- begin small stuff ---- */
1414
1415	/** VM part. */
1416	union
1417	{
1418	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1419	struct VMINT s;
1420	#endif
1421	uint8_t padding[32]; /* multiple of 8 */
1422	} vm;
1423
1424	/** CFGM part. */
1425	union
1426	{
1427	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1428	struct CFGM s;
1429	#endif
1430	uint8_t padding[8]; /* multiple of 8 */
1431	} cfgm;
1432
1433	/** Padding for aligning the structure size on a page boundrary. */
1434	uint8_t abAlignment2[984 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1435
1436	/* ---- end small stuff ---- */
1437
1438	/** Array of VMCPU ring-3 pointers. */
1439	PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1440	} VM;
1441
1442
1443	#ifdef IN_RC
1444	RT_C_DECLS_BEGIN
1445
1446	/** The VM structure.
1447	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1448	* globals which we should avoid using.
1449	*/
1450	extern DECLIMPORT(VM) g_VM;
1451
1452	/** The VMCPU structure for virtual CPU \#0.
1453	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1454	* globals which we should avoid using.
1455	*/
1456	extern DECLIMPORT(VMCPU) g_VCpu0;
1457
1458	RT_C_DECLS_END
1459	#endif
1460
1461	/** @} */
1462
1463	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1464

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