vm.h@ 90500

Last change on this file since 90500 was 90500, checked in by vboxsync, 3 years ago
VMM/PDM: Increased the PDMCRITSECT size by 64 bytes to make space for a self pointer and more statistics. bugref:6695
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File size: 57.2 KB

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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2020 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef VBOX_INCLUDED_vmm_vm_h
27	#define VBOX_INCLUDED_vmm_vm_h
28	#ifndef RT_WITHOUT_PRAGMA_ONCE
29	# pragma once
30	#endif
31
32	#ifndef VBOX_FOR_DTRACE_LIB
33	# ifndef USING_VMM_COMMON_DEFS
34	# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
35	# endif
36	# include <iprt/param.h>
37	# include <VBox/param.h>
38	# include <VBox/types.h>
39	# include <VBox/vmm/cpum.h>
40	# include <VBox/vmm/stam.h>
41	# include <VBox/vmm/vmapi.h>
42	# include <VBox/vmm/vmm.h>
43	# include <VBox/sup.h>
44	#else
45	# pragma D depends_on library vbox-types.d
46	# pragma D depends_on library CPUMInternal.d
47	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48	#endif
49
50
51
52	/** @defgroup grp_vm The Virtual Machine
53	* @ingroup grp_vmm
54	* @{
55	*/
56
57	/**
58	* The state of a Virtual CPU.
59	*
60	* The basic state indicated here is whether the CPU has been started or not. In
61	* addition, there are sub-states when started for assisting scheduling (GVMM
62	* mostly).
63	*
64	* The transition out of the STOPPED state is done by a vmR3PowerOn.
65	* The transition back to the STOPPED state is done by vmR3PowerOff.
66	*
67	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69	*/
70	typedef enum VMCPUSTATE
71	{
72	/** The customary invalid zero. */
73	VMCPUSTATE_INVALID = 0,
74
75	/** Virtual CPU has not yet been started. */
76	VMCPUSTATE_STOPPED,
77
78	/** CPU started. */
79	VMCPUSTATE_STARTED,
80	/** CPU started in HM context. */
81	VMCPUSTATE_STARTED_HM,
82	/** Executing guest code and can be poked (RC or STI bits of HM). */
83	VMCPUSTATE_STARTED_EXEC,
84	/** Executing guest code using NEM. */
85	VMCPUSTATE_STARTED_EXEC_NEM,
86	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
87	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
88	/** Halted. */
89	VMCPUSTATE_STARTED_HALTED,
90
91	/** The end of valid virtual CPU states. */
92	VMCPUSTATE_END,
93
94	/** Ensure 32-bit type. */
95	VMCPUSTATE_32BIT_HACK = 0x7fffffff
96	} VMCPUSTATE;
97
98	/** Enables 64-bit FFs. */
99	#define VMCPU_WITH_64_BIT_FFS
100
101
102	/**
103	* The cross context virtual CPU structure.
104	*
105	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
106	*/
107	typedef struct VMCPU
108	{
109	/** @name Volatile per-cpu data.
110	* @{ */
111	/** Per CPU forced action.
112	* See the VMCPU_FF_* \#defines. Updated atomically. */
113	#ifdef VMCPU_WITH_64_BIT_FFS
114	uint64_t volatile fLocalForcedActions;
115	#else
116	uint32_t volatile fLocalForcedActions;
117	uint32_t fForLocalForcedActionsExpansion;
118	#endif
119	/** The CPU state. */
120	VMCPUSTATE volatile enmState;
121
122	/** Padding up to 64 bytes. */
123	uint8_t abAlignment0[64 - 12];
124	/** @} */
125
126	/** IEM part.
127	* @remarks This comes first as it allows the use of 8-bit immediates for the
128	* first 64 bytes of the structure, reducing code size a wee bit. */
129	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
130	union VMCPUUNIONIEMFULL
131	#else
132	union VMCPUUNIONIEMSTUB
133	#endif
134	{
135	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
136	struct IEMCPU s;
137	#endif
138	uint8_t padding[18496]; /* multiple of 64 */
139	} iem;
140
141	/** @name Static per-cpu data.
142	* (Putting this after IEM, hoping that it's less frequently used than it.)
143	* @{ */
144	/** Ring-3 Host Context VM Pointer. */
145	PVMR3 pVMR3;
146	/** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
147	RTR0PTR pVCpuR0ForVtg;
148	/** Raw-mode Context VM Pointer. */
149	uint32_t pVMRC;
150	/** Padding for new raw-mode (long mode). */
151	uint32_t pVMRCPadding;
152	/** Pointer to the ring-3 UVMCPU structure. */
153	PUVMCPU pUVCpu;
154	/** The native thread handle. */
155	RTNATIVETHREAD hNativeThread;
156	/** The native R0 thread handle. (different from the R3 handle!) */
157	RTNATIVETHREAD hNativeThreadR0;
158	/** The IPRT thread handle (for VMMDevTesting). */
159	RTTHREAD hThread;
160	/** The CPU ID.
161	* This is the index into the VM::aCpu array. */
162	#ifdef IN_RING0
163	VMCPUID idCpuUnsafe;
164	#else
165	VMCPUID idCpu;
166	#endif
167
168	/** Align the structures below bit on a 64-byte boundary and make sure it starts
169	* at the same offset in both 64-bit and 32-bit builds.
170	*
171	* @remarks The alignments of the members that are larger than 48 bytes should be
172	* 64-byte for cache line reasons. structs containing small amounts of
173	* data could be lumped together at the end with a < 64 byte padding
174	* following it (to grow into and align the struct size).
175	*/
176	uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
177	/** @} */
178
179	/** HM part. */
180	union VMCPUUNIONHM
181	{
182	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
183	struct HMCPU s;
184	#endif
185	uint8_t padding[5888]; /* multiple of 64 */
186	} hm;
187
188	/** NEM part. */
189	union VMCPUUNIONNEM
190	{
191	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
192	struct NEMCPU s;
193	#endif
194	uint8_t padding[512]; /* multiple of 64 */
195	} nem;
196
197	/** TRPM part. */
198	union VMCPUUNIONTRPM
199	{
200	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
201	struct TRPMCPU s;
202	#endif
203	uint8_t padding[128]; /* multiple of 64 */
204	} trpm;
205
206	/** TM part. */
207	union VMCPUUNIONTM
208	{
209	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
210	struct TMCPU s;
211	#endif
212	uint8_t padding[5760]; /* multiple of 64 */
213	} tm;
214
215	/** VMM part. */
216	union VMCPUUNIONVMM
217	{
218	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
219	struct VMMCPU s;
220	#endif
221	uint8_t padding[960]; /* multiple of 64 */
222	} vmm;
223
224	/** PDM part. */
225	union VMCPUUNIONPDM
226	{
227	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
228	struct PDMCPU s;
229	#endif
230	uint8_t padding[256]; /* multiple of 64 */
231	} pdm;
232
233	/** IOM part. */
234	union VMCPUUNIONIOM
235	{
236	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
237	struct IOMCPU s;
238	#endif
239	uint8_t padding[512]; /* multiple of 64 */
240	} iom;
241
242	/** DBGF part.
243	* @todo Combine this with other tiny structures. */
244	union VMCPUUNIONDBGF
245	{
246	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
247	struct DBGFCPU s;
248	#endif
249	uint8_t padding[512]; /* multiple of 64 */
250	} dbgf;
251
252	/** GIM part. */
253	union VMCPUUNIONGIM
254	{
255	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
256	struct GIMCPU s;
257	#endif
258	uint8_t padding[512]; /* multiple of 64 */
259	} gim;
260
261	/** APIC part. */
262	union VMCPUUNIONAPIC
263	{
264	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
265	struct APICCPU s;
266	#endif
267	uint8_t padding[3840]; /* multiple of 64 */
268	} apic;
269
270	/*
271	* Some less frequently used global members that doesn't need to take up
272	* precious space at the head of the structure.
273	*/
274
275	/** Trace groups enable flags. */
276	uint32_t fTraceGroups; /* 64 / 44 */
277	/** State data for use by ad hoc profiling. */
278	uint32_t uAdHoc;
279	/** Profiling samples for use by ad hoc profiling. */
280	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
281
282	/** Align the following members on page boundary. */
283	uint8_t abAlignment2[3128];
284
285	/** PGM part. */
286	union VMCPUUNIONPGM
287	{
288	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
289	struct PGMCPU s;
290	#endif
291	uint8_t padding[4096]; /* multiple of 4096 */
292	} pgm;
293
294	/** CPUM part. */
295	union VMCPUUNIONCPUM
296	{
297	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
298	struct CPUMCPU s;
299	#endif
300	#ifdef VMCPU_INCL_CPUM_GST_CTX
301	/** The guest CPUM context for direct use by execution engines.
302	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
303	* others. The rest will use the function based CPUM API. */
304	CPUMCTX GstCtx;
305	#endif
306	uint8_t padding[4096]; /* multiple of 4096 */
307	} cpum;
308
309	/** EM part. */
310	union VMCPUUNIONEM
311	{
312	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
313	struct EMCPU s;
314	#endif
315	uint8_t padding[40960]; /* multiple of 4096 */
316	} em;
317	} VMCPU;
318
319
320	#ifndef VBOX_FOR_DTRACE_LIB
321	AssertCompileSizeAlignment(VMCPU, 4096);
322
323	/** @name Operations on VMCPU::enmState
324	* @{ */
325	/** Gets the VMCPU state. */
326	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
327	/** Sets the VMCPU state. */
328	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
329	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
330	/** Cmpares and sets the VMCPU state. */
331	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
332	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
333	/** Checks the VMCPU state. */
334	#ifdef VBOX_STRICT
335	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
336	do { \
337	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
338	AssertMsg(enmState == (enmExpectedState), \
339	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
340	enmState, enmExpectedState, (pVCpu)->idCpu)); \
341	} while (0)
342
343	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
344	do { \
345	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
346	AssertMsg( enmState == (enmExpectedState) \
347	\|\| enmState == (a_enmExpectedState2), \
348	("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
349	enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
350	} while (0)
351	#else
352	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
353	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
354	#endif
355	/** Tests if the state means that the CPU is started. */
356	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
357	/** Tests if the state means that the CPU is stopped. */
358	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
359	/** @} */
360
361
362	/** The name of the raw-mode context VMM Core module. */
363	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
364	/** The name of the ring-0 context VMM Core module. */
365	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
366
367
368	/** VM Forced Action Flags.
369	*
370	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
371	* action mask of a VM.
372	*
373	* Available VM bits:
374	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
375	*
376	*
377	* Available VMCPU bits:
378	* 14, 15, 36 to 63
379	*
380	* @todo If we run low on VMCPU, we may consider merging the SELM bits
381	*
382	* @{
383	*/
384	/** The virtual sync clock has been stopped, go to TM until it has been
385	* restarted... */
386	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
387	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
388	/** PDM Queues are pending. */
389	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
390	/** The bit number for VM_FF_PDM_QUEUES. */
391	#define VM_FF_PDM_QUEUES_BIT 3
392	/** PDM DMA transfers are pending. */
393	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
394	/** The bit number for VM_FF_PDM_DMA. */
395	#define VM_FF_PDM_DMA_BIT 4
396	/** This action forces the VM to call DBGF so DBGF can service debugger
397	* requests in the emulation thread.
398	* This action flag stays asserted till DBGF clears it.*/
399	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
400	/** The bit number for VM_FF_DBGF. */
401	#define VM_FF_DBGF_BIT 8
402	/** This action forces the VM to service pending requests from other
403	* thread or requests which must be executed in another context. */
404	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
405	#define VM_FF_REQUEST_BIT 9
406	/** Check for VM state changes and take appropriate action. */
407	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
408	/** The bit number for VM_FF_CHECK_VM_STATE. */
409	#define VM_FF_CHECK_VM_STATE_BIT 10
410	/** Reset the VM. (postponed) */
411	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
412	/** The bit number for VM_FF_RESET. */
413	#define VM_FF_RESET_BIT 11
414	/** EMT rendezvous in VMM. */
415	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
416	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
417	#define VM_FF_EMT_RENDEZVOUS_BIT 12
418
419	/** PGM needs to allocate handy pages. */
420	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
421	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
422	/** PGM is out of memory.
423	* Abandon all loops and code paths which can be resumed and get up to the EM
424	* loops. */
425	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
426	#define VM_FF_PGM_NO_MEMORY_BIT 19
427	/** PGM is about to perform a lightweight pool flush
428	* Guest SMP: all EMT threads should return to ring 3
429	*/
430	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
431	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
432	/** Suspend the VM - debug only. */
433	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
434	#define VM_FF_DEBUG_SUSPEND_BIT 31
435
436
437	/** This action forces the VM to check any pending interrupts on the APIC. */
438	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
439	#define VMCPU_FF_INTERRUPT_APIC_BIT 0
440	/** This action forces the VM to check any pending interrups on the PIC. */
441	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
442	#define VMCPU_FF_INTERRUPT_PIC_BIT 1
443	/** This action forces the VM to schedule and run pending timer (TM).
444	* @remarks Don't move - PATM compatibility. */
445	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
446	#define VMCPU_FF_TIMER_BIT 2
447	/** This action forces the VM to check any pending NMIs. */
448	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
449	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
450	/** This action forces the VM to check any pending SMIs. */
451	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
452	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
453	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
454	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
455	#define VMCPU_FF_PDM_CRITSECT_BIT 5
456	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
457	* the virtual CPU out of the next (/current) halted state. It is not processed
458	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
459	* is cleared the next time EM leaves the HALTED state. */
460	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
461	#define VMCPU_FF_UNHALT_BIT 6
462	/** Pending IEM action (mask). */
463	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
464	/** Pending IEM action (bit number). */
465	#define VMCPU_FF_IEM_BIT 7
466	/** Pending APIC action (bit number). */
467	#define VMCPU_FF_UPDATE_APIC_BIT 8
468	/** This action forces the VM to update APIC's asynchronously arrived
469	* interrupts as pending interrupts. */
470	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
471	/** This action forces the VM to service pending requests from other
472	* thread or requests which must be executed in another context. */
473	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
474	#define VMCPU_FF_REQUEST_BIT 9
475	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
476	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
477	/** The bit number for VMCPU_FF_DBGF. */
478	#define VMCPU_FF_DBGF_BIT 10
479	/** This action forces the VM to service any pending updates to CR3 (used only
480	* by HM). */
481	/** Hardware virtualized nested-guest interrupt pending. */
482	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
483	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
484	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
485	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
486	/** This action forces the VM to service any pending updates to PAE PDPEs (used
487	* only by HM)
488	* @todo r=bird: This description is very unhelpful. From the looks of things,
489	* when this flag is set the actual PDPE values live in HMCPU::aPdpes
490	* and PGM should fetch them from there before use. */
491	#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
492	#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
493	/** This action forces the VM to resync the page tables before going
494	* back to execute guest code. (GLOBAL FLUSH) */
495	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
496	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
497	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
498	* (NON-GLOBAL FLUSH) */
499	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
500	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
501	/** Check for pending TLB shootdown actions (deprecated)
502	* Reserved for furture HM re-use if necessary / safe.
503	* Consumer: HM */
504	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
505	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
506	/** Check for pending TLB flush action.
507	* Consumer: HM
508	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
509	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
510	/** The bit number for VMCPU_FF_TLB_FLUSH. */
511	#define VMCPU_FF_TLB_FLUSH_BIT 19
512	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
513	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
514	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
515	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
516	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
517	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
518	#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
519	/** Block injection of non-maskable interrupts to the guest. */
520	#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
521	#define VMCPU_FF_BLOCK_NMIS_BIT 25
522	/** Force return to Ring-3. */
523	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
524	#define VMCPU_FF_TO_R3_BIT 28
525	/** Force return to ring-3 to service pending I/O or MMIO write.
526	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
527	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
528	* status codes to be propagated at the same time without loss. */
529	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
530	#define VMCPU_FF_IOM_BIT 29
531	/* 30 used to be VMCPU_FF_CPUM */
532	/** VMX-preemption timer expired. */
533	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
534	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
535	/** Pending MTF (Monitor Trap Flag) event. */
536	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
537	#define VMCPU_FF_VMX_MTF_BIT 32
538	/** VMX APIC-write emulation pending. */
539	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
540	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
541	/** VMX interrupt-window event pending. */
542	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
543	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
544	/** VMX NMI-window event pending. */
545	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
546	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
547
548
549	/** Externally VM forced actions. Used to quit the idle/wait loop. */
550	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
551	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
552	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
553
554	/** Externally forced VM actions. Used to quit the idle/wait loop. */
555	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
556	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
557	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
558	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
559	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
560	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
561	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
562
563	/** High priority VM pre-execution actions. */
564	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
565	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
566	\| VM_FF_EMT_RENDEZVOUS )
567	/** High priority VMCPU pre-execution actions. */
568	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
569	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
570	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
571	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
572	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
573
574	/** High priority VM pre raw-mode execution mask. */
575	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
576	/** High priority VMCPU pre raw-mode execution mask. */
577	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
578	\| VMCPU_FF_INHIBIT_INTERRUPTS )
579
580	/** High priority post-execution actions. */
581	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
582	/** High priority post-execution actions. */
583	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
584	\| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_HM_UPDATE_PAE_PDPES \
585	\| VMCPU_FF_IEM \| VMCPU_FF_IOM )
586
587	/** Normal priority VM post-execution actions. */
588	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
589	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
590	/** Normal priority VMCPU post-execution actions. */
591	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
592
593	/** Normal priority VM actions. */
594	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
595	/** Normal priority VMCPU actions. */
596	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
597
598	/** Flags to clear before resuming guest execution. */
599	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
600
601
602	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
603	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
604	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
605	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
606	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
607	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
608	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
609	#ifdef IN_RING3
610	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \
611	\| VMCPU_FF_VMX_MTF )
612	#else
613	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
614	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF )
615	#endif
616	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
617	* enabled. */
618	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
619	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
620	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
621	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
622	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
623	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
624	* disabled. */
625	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
626	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
627	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
628
629	/** VM Flags that cause the HM loops to go back to ring-3. */
630	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
631	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
632	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
633	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
634	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
635
636	/** High priority ring-0 VM pre HM-mode execution mask. */
637	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
638	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
639	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
640	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
641	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
642	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
643	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
644	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
645	\| VM_FF_PDM_DMA) )
646	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
647	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
648	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
649
650	/** All the VMX nested-guest flags. */
651	#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
652	\| VMCPU_FF_VMX_INT_WINDOW \| VMCPU_FF_VMX_NMI_WINDOW )
653
654	/** All the forced VM flags. */
655	#define VM_FF_ALL_MASK (UINT32_MAX)
656	/** All the forced VMCPU flags. */
657	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
658
659	/** All the forced VM flags except those related to raw-mode and hardware
660	* assisted execution. */
661	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
662	/** All the forced VMCPU flags except those related to raw-mode and hardware
663	* assisted execution. */
664	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
665	/** @} */
666
667	/** @def VM_FF_SET
668	* Sets a single force action flag.
669	*
670	* @param pVM The cross context VM structure.
671	* @param fFlag The flag to set.
672	*/
673	#define VM_FF_SET(pVM, fFlag) do { \
674	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
675	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
676	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
677	} while (0)
678
679	/** @def VMCPU_FF_SET
680	* Sets a single force action flag for the given VCPU.
681	*
682	* @param pVCpu The cross context virtual CPU structure.
683	* @param fFlag The flag to set.
684	* @sa VMCPU_FF_SET_MASK
685	*/
686	#ifdef VMCPU_WITH_64_BIT_FFS
687	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
688	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
689	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
690	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
691	} while (0)
692	#else
693	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
694	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
695	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
696	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
697	} while (0)
698	#endif
699
700	/** @def VMCPU_FF_SET_MASK
701	* Sets a two or more force action flag for the given VCPU.
702	*
703	* @param pVCpu The cross context virtual CPU structure.
704	* @param fFlags The flags to set.
705	* @sa VMCPU_FF_SET
706	*/
707	#ifdef VMCPU_WITH_64_BIT_FFS
708	# if ARCH_BITS > 32
709	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
710	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
711	# else
712	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
713	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
714	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
715	} while (0)
716	# endif
717	#else
718	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
719	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
720	#endif
721
722	/** @def VM_FF_CLEAR
723	* Clears a single force action flag.
724	*
725	* @param pVM The cross context VM structure.
726	* @param fFlag The flag to clear.
727	*/
728	#define VM_FF_CLEAR(pVM, fFlag) do { \
729	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
730	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
731	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
732	} while (0)
733
734	/** @def VMCPU_FF_CLEAR
735	* Clears a single force action flag for the given VCPU.
736	*
737	* @param pVCpu The cross context virtual CPU structure.
738	* @param fFlag The flag to clear.
739	*/
740	#ifdef VMCPU_WITH_64_BIT_FFS
741	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
742	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
743	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
744	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
745	} while (0)
746	#else
747	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
748	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
749	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
750	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
751	} while (0)
752	#endif
753
754	/** @def VMCPU_FF_CLEAR_MASK
755	* Clears two or more force action flags for the given VCPU.
756	*
757	* @param pVCpu The cross context virtual CPU structure.
758	* @param fFlags The flags to clear.
759	*/
760	#ifdef VMCPU_WITH_64_BIT_FFS
761	# if ARCH_BITS > 32
762	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
763	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
764	# else
765	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
766	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
767	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
768	} while (0)
769	# endif
770	#else
771	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
772	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
773	#endif
774
775	/** @def VM_FF_IS_SET
776	* Checks if single a force action flag is set.
777	*
778	* @param pVM The cross context VM structure.
779	* @param fFlag The flag to check.
780	* @sa VM_FF_IS_ANY_SET
781	*/
782	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
783	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
784	#else
785	# define VM_FF_IS_SET(pVM, fFlag) \
786	([](PVM a_pVM) -> bool \
787	{ \
788	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
789	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
790	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
791	}(pVM))
792	#endif
793
794	/** @def VMCPU_FF_IS_SET
795	* Checks if a single force action flag is set for the given VCPU.
796	*
797	* @param pVCpu The cross context virtual CPU structure.
798	* @param fFlag The flag to check.
799	* @sa VMCPU_FF_IS_ANY_SET
800	*/
801	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
802	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
803	#else
804	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
805	([](PCVMCPU a_pVCpu) -> bool \
806	{ \
807	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
808	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
809	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
810	}(pVCpu))
811	#endif
812
813	/** @def VM_FF_IS_ANY_SET
814	* Checks if one or more force action in the specified set is pending.
815	*
816	* @param pVM The cross context VM structure.
817	* @param fFlags The flags to check for.
818	* @sa VM_FF_IS_SET
819	*/
820	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
821
822	/** @def VMCPU_FF_IS_ANY_SET
823	* Checks if two or more force action flags in the specified set is set for the given VCPU.
824	*
825	* @param pVCpu The cross context virtual CPU structure.
826	* @param fFlags The flags to check for.
827	* @sa VMCPU_FF_IS_SET
828	*/
829	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
830
831	/** @def VM_FF_TEST_AND_CLEAR
832	* Checks if one (!) force action in the specified set is pending and clears it atomically
833	*
834	* @returns true if the bit was set.
835	* @returns false if the bit was clear.
836	* @param pVM The cross context VM structure.
837	* @param fFlag Flag constant to check and clear (_BIT is appended).
838	*/
839	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
840
841	/** @def VMCPU_FF_TEST_AND_CLEAR
842	* Checks if one (!) force action in the specified set is pending and clears it atomically
843	*
844	* @returns true if the bit was set.
845	* @returns false if the bit was clear.
846	* @param pVCpu The cross context virtual CPU structure.
847	* @param fFlag Flag constant to check and clear (_BIT is appended).
848	*/
849	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
850
851	/** @def VM_FF_IS_PENDING_EXCEPT
852	* Checks if one or more force action in the specified set is pending while one
853	* or more other ones are not.
854	*
855	* @param pVM The cross context VM structure.
856	* @param fFlags The flags to check for.
857	* @param fExcpt The flags that should not be set.
858	*/
859	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
860	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
861
862	/** @def VM_IS_EMT
863	* Checks if the current thread is the emulation thread (EMT).
864	*
865	* @remark The ring-0 variation will need attention if we expand the ring-0
866	* code to let threads other than EMT mess around with the VM.
867	*/
868	#ifdef IN_RC
869	# define VM_IS_EMT(pVM) true
870	#else
871	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
872	#endif
873
874	/** @def VMCPU_IS_EMT
875	* Checks if the current thread is the emulation thread (EMT) for the specified
876	* virtual CPU.
877	*/
878	#ifdef IN_RC
879	# define VMCPU_IS_EMT(pVCpu) true
880	#else
881	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
882	#endif
883
884	/** @def VM_ASSERT_EMT
885	* Asserts that the current thread IS the emulation thread (EMT).
886	*/
887	#ifdef IN_RC
888	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
889	#elif defined(IN_RING0)
890	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
891	#else
892	# define VM_ASSERT_EMT(pVM) \
893	AssertMsg(VM_IS_EMT(pVM), \
894	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
895	#endif
896
897	/** @def VMCPU_ASSERT_EMT
898	* Asserts that the current thread IS the emulation thread (EMT) of the
899	* specified virtual CPU.
900	*/
901	#ifdef IN_RC
902	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
903	#elif defined(IN_RING0)
904	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
905	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
906	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
907	(pVCpu) ? (pVCpu)->idCpu : 0))
908	#else
909	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
910	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
911	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
912	#endif
913
914	/** @def VM_ASSERT_EMT_RETURN
915	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
916	*/
917	#ifdef IN_RC
918	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
919	#elif defined(IN_RING0)
920	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
921	#else
922	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
923	AssertMsgReturn(VM_IS_EMT(pVM), \
924	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
925	(rc))
926	#endif
927
928	/** @def VMCPU_ASSERT_EMT_RETURN
929	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
930	*/
931	#ifdef IN_RC
932	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
933	#elif defined(IN_RING0)
934	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
935	#else
936	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
937	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
938	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
939	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
940	(rc))
941	#endif
942
943	/** @def VMCPU_ASSERT_EMT_OR_GURU
944	* Asserts that the current thread IS the emulation thread (EMT) of the
945	* specified virtual CPU.
946	*/
947	#if defined(IN_RC) \|\| defined(IN_RING0)
948	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
949	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
950	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
951	#else
952	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
953	AssertMsg( VMCPU_IS_EMT(pVCpu) \
954	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
955	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
956	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
957	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
958	#endif
959
960	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
961	* Asserts that the current thread IS the emulation thread (EMT) of the
962	* specified virtual CPU or the VM is not running.
963	*/
964	#if defined(IN_RC) \|\| defined(IN_RING0)
965	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
966	Assert( VMCPU_IS_EMT(pVCpu) \
967	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
968	#else
969	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
970	AssertMsg( VMCPU_IS_EMT(pVCpu) \
971	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
972	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
973	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
974	#endif
975
976	/** @def VMSTATE_IS_RUNNING
977	* Checks if the given state indicates a running VM.
978	*/
979	#define VMSTATE_IS_RUNNING(a_enmVMState) \
980	( (enmVMState) == VMSTATE_RUNNING \
981	\|\| (enmVMState) == VMSTATE_RUNNING_LS )
982
983	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
984	* Checks if the VM is running.
985	* @note This is only for pure debug assertions. No AssertReturn or similar!
986	* @sa VMSTATE_IS_RUNNING
987	*/
988	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
989	( (pVM)->enmVMState == VMSTATE_RUNNING \
990	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
991
992	/** @def VM_ASSERT_IS_NOT_RUNNING
993	* Asserts that the VM is not running.
994	*/
995	#if defined(IN_RC) \|\| defined(IN_RING0)
996	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
997	#else
998	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
999	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
1000	#endif
1001
1002	/** @def VM_ASSERT_EMT0
1003	* Asserts that the current thread IS emulation thread \#0 (EMT0).
1004	*/
1005	#ifdef IN_RING3
1006	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1007	#else
1008	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1009	#endif
1010
1011	/** @def VM_ASSERT_EMT0_RETURN
1012	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1013	* it isn't.
1014	*/
1015	#ifdef IN_RING3
1016	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1017	#else
1018	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1019	#endif
1020
1021
1022	/**
1023	* Asserts that the current thread is NOT the emulation thread.
1024	*/
1025	#define VM_ASSERT_OTHER_THREAD(pVM) \
1026	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1027
1028
1029	/** @def VM_ASSERT_STATE
1030	* Asserts a certain VM state.
1031	*/
1032	#define VM_ASSERT_STATE(pVM, _enmState) \
1033	AssertMsg((pVM)->enmVMState == (_enmState), \
1034	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1035
1036	/** @def VM_ASSERT_STATE_RETURN
1037	* Asserts a certain VM state and returns if it doesn't match.
1038	*/
1039	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1040	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1041	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1042	(rc))
1043
1044	/** @def VM_IS_VALID_EXT
1045	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1046	* or terminated. */
1047	#define VM_IS_VALID_EXT(pVM) \
1048	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1049	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1050	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1051	&& VM_IS_EMT(pVM))) )
1052
1053	/** @def VM_ASSERT_VALID_EXT_RETURN
1054	* Asserts a the VM handle is valid for external access, i.e. not being
1055	* destroy or terminated.
1056	*/
1057	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1058	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1059	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1060	? VMGetStateName(pVM->enmVMState) : ""), \
1061	(rc))
1062
1063	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1064	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1065	* destroy or terminated.
1066	*/
1067	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1068	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1069	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1070	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1071	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1072	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1073	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1074	(rc))
1075
1076	#endif /* !VBOX_FOR_DTRACE_LIB */
1077
1078
1079	/**
1080	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1081	*
1082	* ONLY HM and NEM MAY USE THIS!
1083	*
1084	* @param a_pVM The cross context VM structure.
1085	* @param a_bValue The new value.
1086	* @internal
1087	*/
1088	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1089	do { \
1090	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1091	ASMCompilerBarrier(); /* just to be on the safe side */ \
1092	} while (0)
1093
1094	/**
1095	* Checks whether raw-mode is used.
1096	*
1097	* @retval true if either is used.
1098	* @retval false if software virtualization (raw-mode) is used.
1099	*
1100	* @param a_pVM The cross context VM structure.
1101	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1102	* @internal
1103	*/
1104	#ifdef VBOX_WITH_RAW_MODE
1105	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1106	#else
1107	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1108	#endif
1109
1110	/**
1111	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1112	*
1113	* @retval true if either is used.
1114	* @retval false if software virtualization (raw-mode) is used.
1115	*
1116	* @param a_pVM The cross context VM structure.
1117	* @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1118	* @internal
1119	*/
1120	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1121
1122	/**
1123	* Checks whether HM is being used by this VM.
1124	*
1125	* @retval true if HM (VT-x/AMD-v) is used.
1126	* @retval false if not.
1127	*
1128	* @param a_pVM The cross context VM structure.
1129	* @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1130	* @internal
1131	*/
1132	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1133
1134	/**
1135	* Checks whether NEM is being used by this VM.
1136	*
1137	* @retval true if a native hypervisor API is used.
1138	* @retval false if not.
1139	*
1140	* @param a_pVM The cross context VM structure.
1141	* @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1142	* @internal
1143	*/
1144	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1145
1146
1147	/**
1148	* The cross context VM structure.
1149	*
1150	* It contains all the VM data which have to be available in all contexts.
1151	* Even if it contains all the data the idea is to use APIs not to modify all
1152	* the members all around the place. Therefore we make use of unions to hide
1153	* everything which isn't local to the current source module. This means we'll
1154	* have to pay a little bit of attention when adding new members to structures
1155	* in the unions and make sure to keep the padding sizes up to date.
1156	*
1157	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1158	*/
1159	typedef struct VM
1160	{
1161	/** The state of the VM.
1162	* This field is read only to everyone except the VM and EM. */
1163	VMSTATE volatile enmVMState;
1164	/** Forced action flags.
1165	* See the VM_FF_* \#defines. Updated atomically.
1166	*/
1167	volatile uint32_t fGlobalForcedActions;
1168	/** Pointer to the array of page descriptors for the VM structure allocation. */
1169	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1170	/** Session handle. For use when calling SUPR0 APIs. */
1171	#ifdef IN_RING0
1172	PSUPDRVSESSION pSessionUnsafe;
1173	#else
1174	PSUPDRVSESSION pSession;
1175	#endif
1176	/** Pointer to the ring-3 VM structure. */
1177	PUVM pUVM;
1178	/** Ring-3 Host Context VM Pointer. */
1179	#ifdef IN_RING0
1180	R3PTRTYPE(struct VM *) pVMR3Unsafe;
1181	#else
1182	R3PTRTYPE(struct VM *) pVMR3;
1183	#endif
1184	/** Ring-0 Host Context VM pointer for making ring-0 calls. */
1185	R0PTRTYPE(struct VM *) pVMR0ForCall;
1186	/** Raw-mode Context VM Pointer. */
1187	uint32_t pVMRC;
1188	/** Padding for new raw-mode (long mode). */
1189	uint32_t pVMRCPadding;
1190
1191	/** The GVM VM handle. Only the GVM should modify this field. */
1192	#ifdef IN_RING0
1193	uint32_t hSelfUnsafe;
1194	#else
1195	uint32_t hSelf;
1196	#endif
1197	/** Number of virtual CPUs. */
1198	#ifdef IN_RING0
1199	uint32_t cCpusUnsafe;
1200	#else
1201	uint32_t cCpus;
1202	#endif
1203	/** CPU excution cap (1-100) */
1204	uint32_t uCpuExecutionCap;
1205
1206	/** Size of the VM structure. */
1207	uint32_t cbSelf;
1208	/** Size of the VMCPU structure. */
1209	uint32_t cbVCpu;
1210	/** Structure version number (TBD). */
1211	uint32_t uStructVersion;
1212
1213	/** @name Various items that are frequently accessed.
1214	* @{ */
1215	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1216	* This is set early during vmR3InitRing3 by HM or NEM. */
1217	uint8_t const bMainExecutionEngine;
1218
1219	/** Hardware VM support is available and enabled.
1220	* Determined very early during init.
1221	* This is placed here for performance reasons.
1222	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1223	bool fHMEnabled;
1224
1225	/** Large page enabled flag.
1226	* @todo This doesn't need to be here, PGM should store it in it's own
1227	* structures instead. */
1228	bool fUseLargePages;
1229	/** @} */
1230
1231	/** Alignment padding. */
1232	uint8_t uPadding1[5];
1233
1234	/** @name Debugging
1235	* @{ */
1236	/** Ring-3 Host Context VM Pointer. */
1237	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1238	/** Ring-0 Host Context VM Pointer. */
1239	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1240	/** @} */
1241
1242	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1243	uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 24 : 52];
1244
1245	/** CPUM part. */
1246	union
1247	{
1248	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1249	struct CPUM s;
1250	#endif
1251	#ifdef VBOX_INCLUDED_vmm_cpum_h
1252	/** Read only info exposed about the host and guest CPUs. */
1253	struct
1254	{
1255	/** Padding for hidden fields. */
1256	uint8_t abHidden0[64];
1257	/** Host CPU feature information. */
1258	CPUMFEATURES HostFeatures;
1259	/** Guest CPU feature information. */
1260	CPUMFEATURES GuestFeatures;
1261	} const ro;
1262	#endif
1263	uint8_t padding[1536]; /* multiple of 64 */
1264	} cpum;
1265
1266	/** VMM part. */
1267	union
1268	{
1269	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1270	struct VMM s;
1271	#endif
1272	uint8_t padding[1600]; /* multiple of 64 */
1273	} vmm;
1274
1275	/** PGM part. */
1276	union
1277	{
1278	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1279	struct PGM s;
1280	#endif
1281	uint8_t padding[21120]; /* multiple of 64 */
1282	} pgm;
1283
1284	/** HM part. */
1285	union
1286	{
1287	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1288	struct HM s;
1289	#endif
1290	uint8_t padding[5504]; /* multiple of 64 */
1291	} hm;
1292
1293	/** TRPM part. */
1294	union
1295	{
1296	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1297	struct TRPM s;
1298	#endif
1299	uint8_t padding[2048]; /* multiple of 64 */
1300	} trpm;
1301
1302	/** SELM part. */
1303	union
1304	{
1305	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1306	struct SELM s;
1307	#endif
1308	uint8_t padding[768]; /* multiple of 64 */
1309	} selm;
1310
1311	/** MM part. */
1312	union
1313	{
1314	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1315	struct MM s;
1316	#endif
1317	uint8_t padding[192]; /* multiple of 64 */
1318	} mm;
1319
1320	/** PDM part. */
1321	union
1322	{
1323	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1324	struct PDM s;
1325	#endif
1326	uint8_t padding[8256]; /* multiple of 64 */
1327	} pdm;
1328
1329	/** IOM part. */
1330	union
1331	{
1332	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1333	struct IOM s;
1334	#endif
1335	uint8_t padding[1152]; /* multiple of 64 */
1336	} iom;
1337
1338	/** EM part. */
1339	union
1340	{
1341	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1342	struct EM s;
1343	#endif
1344	uint8_t padding[256]; /* multiple of 64 */
1345	} em;
1346
1347	/** NEM part. */
1348	union
1349	{
1350	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1351	struct NEM s;
1352	#endif
1353	uint8_t padding[128]; /* multiple of 64 */
1354	} nem;
1355
1356	/** TM part. */
1357	union
1358	{
1359	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1360	struct TM s;
1361	#endif
1362	uint8_t padding[10112]; /* multiple of 64 */
1363	} tm;
1364
1365	/** DBGF part. */
1366	union
1367	{
1368	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1369	struct DBGF s;
1370	#endif
1371	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1372	/** Read only info exposed about interrupt breakpoints and selected events. */
1373	struct
1374	{
1375	/** Bitmap of enabled hardware interrupt breakpoints. */
1376	uint32_t bmHardIntBreakpoints[256 / 32];
1377	/** Bitmap of enabled software interrupt breakpoints. */
1378	uint32_t bmSoftIntBreakpoints[256 / 32];
1379	/** Bitmap of selected events.
1380	* This includes non-selectable events too for simplicity, we maintain the
1381	* state for some of these, as it may come in handy. */
1382	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1383	/** Enabled hardware interrupt breakpoints. */
1384	uint32_t cHardIntBreakpoints;
1385	/** Enabled software interrupt breakpoints. */
1386	uint32_t cSoftIntBreakpoints;
1387	/** The number of selected events. */
1388	uint32_t cSelectedEvents;
1389	/** The number of enabled hardware breakpoints. */
1390	uint8_t cEnabledHwBreakpoints;
1391	/** The number of enabled hardware I/O breakpoints. */
1392	uint8_t cEnabledHwIoBreakpoints;
1393	uint8_t au8Alignment1[2]; /*< Alignment padding. /
1394	/** The number of enabled INT3 breakpoints. */
1395	uint32_t volatile cEnabledInt3Breakpoints;
1396	} const ro;
1397	#endif
1398	uint8_t padding[2432]; /* multiple of 64 */
1399	} dbgf;
1400
1401	/** SSM part. */
1402	union
1403	{
1404	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1405	struct SSM s;
1406	#endif
1407	uint8_t padding[128]; /* multiple of 64 */
1408	} ssm;
1409
1410	union
1411	{
1412	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1413	struct GIM s;
1414	#endif
1415	uint8_t padding[448]; /* multiple of 64 */
1416	} gim;
1417
1418	union
1419	{
1420	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1421	struct APIC s;
1422	#endif
1423	uint8_t padding[128]; /* multiple of 8 */
1424	} apic;
1425
1426	/* ---- begin small stuff ---- */
1427
1428	/** VM part. */
1429	union
1430	{
1431	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1432	struct VMINT s;
1433	#endif
1434	uint8_t padding[32]; /* multiple of 8 */
1435	} vm;
1436
1437	/** CFGM part. */
1438	union
1439	{
1440	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1441	struct CFGM s;
1442	#endif
1443	uint8_t padding[8]; /* multiple of 8 */
1444	} cfgm;
1445
1446	/** Statistics for ring-0 only components. */
1447	struct
1448	{
1449	/** GMMR0 stats. */
1450	struct
1451	{
1452	/** Chunk TLB hits. */
1453	uint64_t cChunkTlbHits;
1454	/** Chunk TLB misses. */
1455	uint64_t cChunkTlbMisses;
1456	} gmm;
1457	uint64_t au64Padding[6]; /* probably more comming here... */
1458	} R0Stats;
1459
1460	/** Padding for aligning the structure size on a page boundrary. */
1461	uint8_t abAlignment2[1304 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1462
1463	/* ---- end small stuff ---- */
1464
1465	/** Array of VMCPU ring-3 pointers. */
1466	PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1467	} VM;
1468
1469
1470	#ifdef IN_RC
1471	RT_C_DECLS_BEGIN
1472
1473	/** The VM structure.
1474	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1475	* globals which we should avoid using.
1476	*/
1477	extern DECLIMPORT(VM) g_VM;
1478
1479	/** The VMCPU structure for virtual CPU \#0.
1480	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1481	* globals which we should avoid using.
1482	*/
1483	extern DECLIMPORT(VMCPU) g_VCpu0;
1484
1485	RT_C_DECLS_END
1486	#endif
1487
1488	/** @} */
1489
1490	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1491

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source: vbox/trunk/include/VBox/vmm/vm.h@ 90500

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