VirtualBox

source: vbox/trunk/include/VBox/vmm/vm.h@ 90828

Last change on this file since 90828 was 90634, checked in by vboxsync, 3 years ago

VMM/PDMCritSectRwEnterExcl: Implemented waiting in most ring-0 contexts. bugref:6695
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1/** @file
2 * VM - The Virtual Machine, data.
3 */
4
5/*
6 * Copyright (C) 2006-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_vm_h
27#define VBOX_INCLUDED_vmm_vm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#ifndef VBOX_FOR_DTRACE_LIB
33# ifndef USING_VMM_COMMON_DEFS
34# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
35# endif
36# include <iprt/param.h>
37# include <VBox/param.h>
38# include <VBox/types.h>
39# include <VBox/vmm/cpum.h>
40# include <VBox/vmm/stam.h>
41# include <VBox/vmm/vmapi.h>
42# include <VBox/vmm/vmm.h>
43# include <VBox/sup.h>
44#else
45# pragma D depends_on library vbox-types.d
46# pragma D depends_on library CPUMInternal.d
47# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48#endif
49
50
51
52/** @defgroup grp_vm The Virtual Machine
53 * @ingroup grp_vmm
54 * @{
55 */
56
57/**
58 * The state of a Virtual CPU.
59 *
60 * The basic state indicated here is whether the CPU has been started or not. In
61 * addition, there are sub-states when started for assisting scheduling (GVMM
62 * mostly).
63 *
64 * The transition out of the STOPPED state is done by a vmR3PowerOn.
65 * The transition back to the STOPPED state is done by vmR3PowerOff.
66 *
67 * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68 * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69 */
70typedef enum VMCPUSTATE
71{
72 /** The customary invalid zero. */
73 VMCPUSTATE_INVALID = 0,
74
75 /** Virtual CPU has not yet been started. */
76 VMCPUSTATE_STOPPED,
77
78 /** CPU started. */
79 VMCPUSTATE_STARTED,
80 /** CPU started in HM context. */
81 VMCPUSTATE_STARTED_HM,
82 /** Executing guest code and can be poked (RC or STI bits of HM). */
83 VMCPUSTATE_STARTED_EXEC,
84 /** Executing guest code using NEM. */
85 VMCPUSTATE_STARTED_EXEC_NEM,
86 VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
87 VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
88 /** Halted. */
89 VMCPUSTATE_STARTED_HALTED,
90
91 /** The end of valid virtual CPU states. */
92 VMCPUSTATE_END,
93
94 /** Ensure 32-bit type. */
95 VMCPUSTATE_32BIT_HACK = 0x7fffffff
96} VMCPUSTATE;
97
98/** Enables 64-bit FFs. */
99#define VMCPU_WITH_64_BIT_FFS
100
101
102/**
103 * The cross context virtual CPU structure.
104 *
105 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
106 */
107typedef struct VMCPU
108{
109 /** @name Volatile per-cpu data.
110 * @{ */
111 /** Per CPU forced action.
112 * See the VMCPU_FF_* \#defines. Updated atomically. */
113#ifdef VMCPU_WITH_64_BIT_FFS
114 uint64_t volatile fLocalForcedActions;
115#else
116 uint32_t volatile fLocalForcedActions;
117 uint32_t fForLocalForcedActionsExpansion;
118#endif
119 /** The CPU state. */
120 VMCPUSTATE volatile enmState;
121
122 /** Padding up to 64 bytes. */
123 uint8_t abAlignment0[64 - 12];
124 /** @} */
125
126 /** IEM part.
127 * @remarks This comes first as it allows the use of 8-bit immediates for the
128 * first 64 bytes of the structure, reducing code size a wee bit. */
129#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
130 union VMCPUUNIONIEMFULL
131#else
132 union VMCPUUNIONIEMSTUB
133#endif
134 {
135#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
136 struct IEMCPU s;
137#endif
138 uint8_t padding[18496]; /* multiple of 64 */
139 } iem;
140
141 /** @name Static per-cpu data.
142 * (Putting this after IEM, hoping that it's less frequently used than it.)
143 * @{ */
144 /** Ring-3 Host Context VM Pointer. */
145 PVMR3 pVMR3;
146 /** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
147 RTR0PTR pVCpuR0ForVtg;
148 /** Raw-mode Context VM Pointer. */
149 uint32_t pVMRC;
150 /** Padding for new raw-mode (long mode). */
151 uint32_t pVMRCPadding;
152 /** Pointer to the ring-3 UVMCPU structure. */
153 PUVMCPU pUVCpu;
154 /** The native thread handle. */
155 RTNATIVETHREAD hNativeThread;
156 /** The native R0 thread handle. (different from the R3 handle!) */
157 RTNATIVETHREAD hNativeThreadR0;
158 /** The IPRT thread handle (for VMMDevTesting). */
159 RTTHREAD hThread;
160 /** The CPU ID.
161 * This is the index into the VM::aCpu array. */
162#ifdef IN_RING0
163 VMCPUID idCpuUnsafe;
164#else
165 VMCPUID idCpu;
166#endif
167
168 /** Align the structures below bit on a 64-byte boundary and make sure it starts
169 * at the same offset in both 64-bit and 32-bit builds.
170 *
171 * @remarks The alignments of the members that are larger than 48 bytes should be
172 * 64-byte for cache line reasons. structs containing small amounts of
173 * data could be lumped together at the end with a < 64 byte padding
174 * following it (to grow into and align the struct size).
175 */
176 uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
177 /** @} */
178
179 /** HM part. */
180 union VMCPUUNIONHM
181 {
182#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
183 struct HMCPU s;
184#endif
185 uint8_t padding[5888]; /* multiple of 64 */
186 } hm;
187
188 /** NEM part. */
189 union VMCPUUNIONNEM
190 {
191#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
192 struct NEMCPU s;
193#endif
194 uint8_t padding[512]; /* multiple of 64 */
195 } nem;
196
197 /** TRPM part. */
198 union VMCPUUNIONTRPM
199 {
200#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
201 struct TRPMCPU s;
202#endif
203 uint8_t padding[128]; /* multiple of 64 */
204 } trpm;
205
206 /** TM part. */
207 union VMCPUUNIONTM
208 {
209#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
210 struct TMCPU s;
211#endif
212 uint8_t padding[5760]; /* multiple of 64 */
213 } tm;
214
215 /** VMM part. */
216 union VMCPUUNIONVMM
217 {
218#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
219 struct VMMCPU s;
220#endif
221 uint8_t padding[960]; /* multiple of 64 */
222 } vmm;
223
224 /** PDM part. */
225 union VMCPUUNIONPDM
226 {
227#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
228 struct PDMCPU s;
229#endif
230 uint8_t padding[256]; /* multiple of 64 */
231 } pdm;
232
233 /** IOM part. */
234 union VMCPUUNIONIOM
235 {
236#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
237 struct IOMCPU s;
238#endif
239 uint8_t padding[512]; /* multiple of 64 */
240 } iom;
241
242 /** DBGF part.
243 * @todo Combine this with other tiny structures. */
244 union VMCPUUNIONDBGF
245 {
246#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
247 struct DBGFCPU s;
248#endif
249 uint8_t padding[512]; /* multiple of 64 */
250 } dbgf;
251
252 /** GIM part. */
253 union VMCPUUNIONGIM
254 {
255#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
256 struct GIMCPU s;
257#endif
258 uint8_t padding[512]; /* multiple of 64 */
259 } gim;
260
261 /** APIC part. */
262 union VMCPUUNIONAPIC
263 {
264#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
265 struct APICCPU s;
266#endif
267 uint8_t padding[3840]; /* multiple of 64 */
268 } apic;
269
270 /*
271 * Some less frequently used global members that doesn't need to take up
272 * precious space at the head of the structure.
273 */
274
275 /** Trace groups enable flags. */
276 uint32_t fTraceGroups; /* 64 / 44 */
277 /** Number of collisions hashing the ring-0 EMT handle. */
278 uint8_t cEmtHashCollisions;
279 uint8_t abAdHoc[3];
280 /** Profiling samples for use by ad hoc profiling. */
281 STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
282
283 /** Align the following members on page boundary. */
284 uint8_t abAlignment2[3128];
285
286 /** PGM part. */
287 union VMCPUUNIONPGM
288 {
289#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
290 struct PGMCPU s;
291#endif
292 uint8_t padding[4096]; /* multiple of 4096 */
293 } pgm;
294
295 /** CPUM part. */
296 union VMCPUUNIONCPUM
297 {
298#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
299 struct CPUMCPU s;
300#endif
301#ifdef VMCPU_INCL_CPUM_GST_CTX
302 /** The guest CPUM context for direct use by execution engines.
303 * This is not for general consumption, but for HM, REM, IEM, and maybe a few
304 * others. The rest will use the function based CPUM API. */
305 CPUMCTX GstCtx;
306#endif
307 uint8_t padding[4096]; /* multiple of 4096 */
308 } cpum;
309
310 /** EM part. */
311 union VMCPUUNIONEM
312 {
313#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
314 struct EMCPU s;
315#endif
316 uint8_t padding[40960]; /* multiple of 4096 */
317 } em;
318} VMCPU;
319
320
321#ifndef VBOX_FOR_DTRACE_LIB
322AssertCompileSizeAlignment(VMCPU, 4096);
323
324/** @name Operations on VMCPU::enmState
325 * @{ */
326/** Gets the VMCPU state. */
327#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
328/** Sets the VMCPU state. */
329#define VMCPU_SET_STATE(pVCpu, enmNewState) \
330 ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
331/** Cmpares and sets the VMCPU state. */
332#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
333 ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
334/** Checks the VMCPU state. */
335#ifdef VBOX_STRICT
336# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
337 do { \
338 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
339 AssertMsg(enmState == (enmExpectedState), \
340 ("enmState=%d enmExpectedState=%d idCpu=%u\n", \
341 enmState, enmExpectedState, (pVCpu)->idCpu)); \
342 } while (0)
343
344# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
345 do { \
346 VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
347 AssertMsg( enmState == (enmExpectedState) \
348 || enmState == (a_enmExpectedState2), \
349 ("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
350 enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
351 } while (0)
352#else
353# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
354# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
355#endif
356/** Tests if the state means that the CPU is started. */
357#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
358/** Tests if the state means that the CPU is stopped. */
359#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
360/** @} */
361
362
363/** The name of the raw-mode context VMM Core module. */
364#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
365/** The name of the ring-0 context VMM Core module. */
366#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
367
368
369/** VM Forced Action Flags.
370 *
371 * Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
372 * action mask of a VM.
373 *
374 * Available VM bits:
375 * 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
376 *
377 *
378 * Available VMCPU bits:
379 * 14, 15, 36 to 63
380 *
381 * @todo If we run low on VMCPU, we may consider merging the SELM bits
382 *
383 * @{
384 */
385/** The virtual sync clock has been stopped, go to TM until it has been
386 * restarted... */
387#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
388#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
389/** PDM Queues are pending. */
390#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
391/** The bit number for VM_FF_PDM_QUEUES. */
392#define VM_FF_PDM_QUEUES_BIT 3
393/** PDM DMA transfers are pending. */
394#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
395/** The bit number for VM_FF_PDM_DMA. */
396#define VM_FF_PDM_DMA_BIT 4
397/** This action forces the VM to call DBGF so DBGF can service debugger
398 * requests in the emulation thread.
399 * This action flag stays asserted till DBGF clears it.*/
400#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
401/** The bit number for VM_FF_DBGF. */
402#define VM_FF_DBGF_BIT 8
403/** This action forces the VM to service pending requests from other
404 * thread or requests which must be executed in another context. */
405#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
406#define VM_FF_REQUEST_BIT 9
407/** Check for VM state changes and take appropriate action. */
408#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
409/** The bit number for VM_FF_CHECK_VM_STATE. */
410#define VM_FF_CHECK_VM_STATE_BIT 10
411/** Reset the VM. (postponed) */
412#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
413/** The bit number for VM_FF_RESET. */
414#define VM_FF_RESET_BIT 11
415/** EMT rendezvous in VMM. */
416#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
417/** The bit number for VM_FF_EMT_RENDEZVOUS. */
418#define VM_FF_EMT_RENDEZVOUS_BIT 12
419
420/** PGM needs to allocate handy pages. */
421#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
422#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
423/** PGM is out of memory.
424 * Abandon all loops and code paths which can be resumed and get up to the EM
425 * loops. */
426#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
427#define VM_FF_PGM_NO_MEMORY_BIT 19
428 /** PGM is about to perform a lightweight pool flush
429 * Guest SMP: all EMT threads should return to ring 3
430 */
431#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
432#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
433/** Suspend the VM - debug only. */
434#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
435#define VM_FF_DEBUG_SUSPEND_BIT 31
436
437
438/** This action forces the VM to check any pending interrupts on the APIC. */
439#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
440#define VMCPU_FF_INTERRUPT_APIC_BIT 0
441/** This action forces the VM to check any pending interrups on the PIC. */
442#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
443#define VMCPU_FF_INTERRUPT_PIC_BIT 1
444/** This action forces the VM to schedule and run pending timer (TM).
445 * @remarks Don't move - PATM compatibility. */
446#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
447#define VMCPU_FF_TIMER_BIT 2
448/** This action forces the VM to check any pending NMIs. */
449#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
450#define VMCPU_FF_INTERRUPT_NMI_BIT 3
451/** This action forces the VM to check any pending SMIs. */
452#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
453#define VMCPU_FF_INTERRUPT_SMI_BIT 4
454/** PDM critical section unlocking is pending, process promptly upon return to R3. */
455#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
456#define VMCPU_FF_PDM_CRITSECT_BIT 5
457/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
458 * the virtual CPU out of the next (/current) halted state. It is not processed
459 * nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
460 * is cleared the next time EM leaves the HALTED state. */
461#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
462#define VMCPU_FF_UNHALT_BIT 6
463/** Pending IEM action (mask). */
464#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
465/** Pending IEM action (bit number). */
466#define VMCPU_FF_IEM_BIT 7
467/** Pending APIC action (bit number). */
468#define VMCPU_FF_UPDATE_APIC_BIT 8
469/** This action forces the VM to update APIC's asynchronously arrived
470 * interrupts as pending interrupts. */
471#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
472/** This action forces the VM to service pending requests from other
473 * thread or requests which must be executed in another context. */
474#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
475#define VMCPU_FF_REQUEST_BIT 9
476/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
477#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
478/** The bit number for VMCPU_FF_DBGF. */
479#define VMCPU_FF_DBGF_BIT 10
480/** This action forces the VM to service any pending updates to CR3 (used only
481 * by HM). */
482/** Hardware virtualized nested-guest interrupt pending. */
483#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
484#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
485#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
486#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
487/** This action forces the VM to service any pending updates to PAE PDPEs (used
488 * only by HM)
489 * @todo r=bird: This description is very unhelpful. From the looks of things,
490 * when this flag is set the actual PDPE values live in HMCPU::aPdpes
491 * and PGM should fetch them from there before use. */
492#define VMCPU_FF_HM_UPDATE_PAE_PDPES RT_BIT_64(VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT)
493#define VMCPU_FF_HM_UPDATE_PAE_PDPES_BIT 13
494/** This action forces the VM to resync the page tables before going
495 * back to execute guest code. (GLOBAL FLUSH) */
496#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
497#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
498/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
499 * (NON-GLOBAL FLUSH) */
500#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
501#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
502/** Check for pending TLB shootdown actions (deprecated)
503 * Reserved for furture HM re-use if necessary / safe.
504 * Consumer: HM */
505#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
506#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
507/** Check for pending TLB flush action.
508 * Consumer: HM
509 * @todo rename to VMCPU_FF_HM_TLB_FLUSH */
510#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
511/** The bit number for VMCPU_FF_TLB_FLUSH. */
512#define VMCPU_FF_TLB_FLUSH_BIT 19
513/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
514/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
515/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
516/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
517/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
518#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
519#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
520/** Block injection of non-maskable interrupts to the guest. */
521#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
522#define VMCPU_FF_BLOCK_NMIS_BIT 25
523/** Force return to Ring-3. */
524#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
525#define VMCPU_FF_TO_R3_BIT 28
526/** Force return to ring-3 to service pending I/O or MMIO write.
527 * This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
528 * VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
529 * status codes to be propagated at the same time without loss. */
530#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
531#define VMCPU_FF_IOM_BIT 29
532/* 30 used to be VMCPU_FF_CPUM */
533/** VMX-preemption timer expired. */
534#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
535#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
536/** Pending MTF (Monitor Trap Flag) event. */
537#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
538#define VMCPU_FF_VMX_MTF_BIT 32
539/** VMX APIC-write emulation pending. */
540#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
541#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
542/** VMX interrupt-window event pending. */
543#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
544#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
545/** VMX NMI-window event pending. */
546#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
547#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
548
549
550/** Externally VM forced actions. Used to quit the idle/wait loop. */
551#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS )
552/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
553#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST | VMCPU_FF_DBGF )
554
555/** Externally forced VM actions. Used to quit the idle/wait loop. */
556#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST \
557 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS )
558/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
559#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
560 | VMCPU_FF_REQUEST | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI \
561 | VMCPU_FF_UNHALT | VMCPU_FF_TIMER | VMCPU_FF_DBGF \
562 | VMCPU_FF_INTERRUPT_NESTED_GUEST)
563
564/** High priority VM pre-execution actions. */
565#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
566 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
567 | VM_FF_EMT_RENDEZVOUS )
568/** High priority VMCPU pre-execution actions. */
569#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
570 | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF \
571 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
572 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
573 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
574
575/** High priority VM pre raw-mode execution mask. */
576#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY )
577/** High priority VMCPU pre raw-mode execution mask. */
578#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
579 | VMCPU_FF_INHIBIT_INTERRUPTS )
580
581/** High priority post-execution actions. */
582#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
583/** High priority post-execution actions. */
584#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \
585 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
586 | VMCPU_FF_IEM | VMCPU_FF_IOM )
587
588/** Normal priority VM post-execution actions. */
589#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET \
590 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
591/** Normal priority VMCPU post-execution actions. */
592#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
593
594/** Normal priority VM actions. */
595#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
596/** Normal priority VMCPU actions. */
597#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
598
599/** Flags to clear before resuming guest execution. */
600#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
601
602
603/** VM flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
604#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
605 | VM_FF_EMT_RENDEZVOUS | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_RESET)
606/** VM flags that cause the REP[|NE|E] STRINS loops to yield. */
607#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
608 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_DBGF | VM_FF_DEBUG_SUSPEND )
609/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield immediately. */
610#ifdef IN_RING3
611# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF \
612 | VMCPU_FF_VMX_MTF )
613#else
614# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_IEM | VMCPU_FF_IOM | VMCPU_FF_PGM_SYNC_CR3 \
615 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_DBGF | VMCPU_FF_VMX_MTF )
616#endif
617/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
618 * enabled. */
619#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
620 | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
621 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
622 | VMCPU_FF_TIMER | VMCPU_FF_REQUEST \
623 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
624/** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
625 * disabled. */
626#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
627 & ~( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
628 | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
629
630/** VM Flags that cause the HM loops to go back to ring-3. */
631#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
632 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
633/** VMCPU Flags that cause the HM loops to go back to ring-3. */
634#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT \
635 | VMCPU_FF_IEM | VMCPU_FF_IOM)
636
637/** High priority ring-0 VM pre HM-mode execution mask. */
638#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
639/** High priority ring-0 VMCPU pre HM-mode execution mask. */
640#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 \
641 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_REQUEST \
642 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_PREEMPT_TIMER)
643/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
644#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
645 | VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST \
646 | VM_FF_PDM_DMA) )
647/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
648#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
649 | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_REQUEST) )
650
651/** All the VMX nested-guest flags. */
652#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE \
653 | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW )
654
655/** All the forced VM flags. */
656#define VM_FF_ALL_MASK (UINT32_MAX)
657/** All the forced VMCPU flags. */
658#define VMCPU_FF_ALL_MASK (UINT32_MAX)
659
660/** All the forced VM flags except those related to raw-mode and hardware
661 * assisted execution. */
662#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
663/** All the forced VMCPU flags except those related to raw-mode and hardware
664 * assisted execution. */
665#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
666/** @} */
667
668/** @def VM_FF_SET
669 * Sets a single force action flag.
670 *
671 * @param pVM The cross context VM structure.
672 * @param fFlag The flag to set.
673 */
674#define VM_FF_SET(pVM, fFlag) do { \
675 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
676 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
677 ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
678 } while (0)
679
680/** @def VMCPU_FF_SET
681 * Sets a single force action flag for the given VCPU.
682 *
683 * @param pVCpu The cross context virtual CPU structure.
684 * @param fFlag The flag to set.
685 * @sa VMCPU_FF_SET_MASK
686 */
687#ifdef VMCPU_WITH_64_BIT_FFS
688# define VMCPU_FF_SET(pVCpu, fFlag) do { \
689 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
690 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
691 ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
692 } while (0)
693#else
694# define VMCPU_FF_SET(pVCpu, fFlag) do { \
695 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
696 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
697 ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
698 } while (0)
699#endif
700
701/** @def VMCPU_FF_SET_MASK
702 * Sets a two or more force action flag for the given VCPU.
703 *
704 * @param pVCpu The cross context virtual CPU structure.
705 * @param fFlags The flags to set.
706 * @sa VMCPU_FF_SET
707 */
708#ifdef VMCPU_WITH_64_BIT_FFS
709# if ARCH_BITS > 32
710# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
711 do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
712# else
713# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
714 if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
715 else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
716 } while (0)
717# endif
718#else
719# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
720 do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
721#endif
722
723/** @def VM_FF_CLEAR
724 * Clears a single force action flag.
725 *
726 * @param pVM The cross context VM structure.
727 * @param fFlag The flag to clear.
728 */
729#define VM_FF_CLEAR(pVM, fFlag) do { \
730 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
731 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
732 ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
733 } while (0)
734
735/** @def VMCPU_FF_CLEAR
736 * Clears a single force action flag for the given VCPU.
737 *
738 * @param pVCpu The cross context virtual CPU structure.
739 * @param fFlag The flag to clear.
740 */
741#ifdef VMCPU_WITH_64_BIT_FFS
742# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
743 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
744 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
745 ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
746 } while (0)
747#else
748# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
749 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
750 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
751 ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
752 } while (0)
753#endif
754
755/** @def VMCPU_FF_CLEAR_MASK
756 * Clears two or more force action flags for the given VCPU.
757 *
758 * @param pVCpu The cross context virtual CPU structure.
759 * @param fFlags The flags to clear.
760 */
761#ifdef VMCPU_WITH_64_BIT_FFS
762# if ARCH_BITS > 32
763# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
764 do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
765# else
766# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
767 if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
768 else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
769 } while (0)
770# endif
771#else
772# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
773 do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
774#endif
775
776/** @def VM_FF_IS_SET
777 * Checks if single a force action flag is set.
778 *
779 * @param pVM The cross context VM structure.
780 * @param fFlag The flag to check.
781 * @sa VM_FF_IS_ANY_SET
782 */
783#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
784# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
785#else
786# define VM_FF_IS_SET(pVM, fFlag) \
787 ([](PVM a_pVM) -> bool \
788 { \
789 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
790 AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
791 return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
792 }(pVM))
793#endif
794
795/** @def VMCPU_FF_IS_SET
796 * Checks if a single force action flag is set for the given VCPU.
797 *
798 * @param pVCpu The cross context virtual CPU structure.
799 * @param fFlag The flag to check.
800 * @sa VMCPU_FF_IS_ANY_SET
801 */
802#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
803# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
804#else
805# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
806 ([](PCVMCPU a_pVCpu) -> bool \
807 { \
808 AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
809 AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
810 return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
811 }(pVCpu))
812#endif
813
814/** @def VM_FF_IS_ANY_SET
815 * Checks if one or more force action in the specified set is pending.
816 *
817 * @param pVM The cross context VM structure.
818 * @param fFlags The flags to check for.
819 * @sa VM_FF_IS_SET
820 */
821#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
822
823/** @def VMCPU_FF_IS_ANY_SET
824 * Checks if two or more force action flags in the specified set is set for the given VCPU.
825 *
826 * @param pVCpu The cross context virtual CPU structure.
827 * @param fFlags The flags to check for.
828 * @sa VMCPU_FF_IS_SET
829 */
830#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
831
832/** @def VM_FF_TEST_AND_CLEAR
833 * Checks if one (!) force action in the specified set is pending and clears it atomically
834 *
835 * @returns true if the bit was set.
836 * @returns false if the bit was clear.
837 * @param pVM The cross context VM structure.
838 * @param fFlag Flag constant to check and clear (_BIT is appended).
839 */
840#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
841
842/** @def VMCPU_FF_TEST_AND_CLEAR
843 * Checks if one (!) force action in the specified set is pending and clears it atomically
844 *
845 * @returns true if the bit was set.
846 * @returns false if the bit was clear.
847 * @param pVCpu The cross context virtual CPU structure.
848 * @param fFlag Flag constant to check and clear (_BIT is appended).
849 */
850#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
851
852/** @def VM_FF_IS_PENDING_EXCEPT
853 * Checks if one or more force action in the specified set is pending while one
854 * or more other ones are not.
855 *
856 * @param pVM The cross context VM structure.
857 * @param fFlags The flags to check for.
858 * @param fExcpt The flags that should not be set.
859 */
860#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
861 ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
862
863/** @def VM_IS_EMT
864 * Checks if the current thread is the emulation thread (EMT).
865 *
866 * @remark The ring-0 variation will need attention if we expand the ring-0
867 * code to let threads other than EMT mess around with the VM.
868 */
869#ifdef IN_RC
870# define VM_IS_EMT(pVM) true
871#else
872# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
873#endif
874
875/** @def VMCPU_IS_EMT
876 * Checks if the current thread is the emulation thread (EMT) for the specified
877 * virtual CPU.
878 */
879#ifdef IN_RC
880# define VMCPU_IS_EMT(pVCpu) true
881#else
882# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
883#endif
884
885/** @def VM_ASSERT_EMT
886 * Asserts that the current thread IS the emulation thread (EMT).
887 */
888#ifdef IN_RC
889# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
890#elif defined(IN_RING0)
891# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
892#else
893# define VM_ASSERT_EMT(pVM) \
894 AssertMsg(VM_IS_EMT(pVM), \
895 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
896#endif
897
898/** @def VMCPU_ASSERT_EMT
899 * Asserts that the current thread IS the emulation thread (EMT) of the
900 * specified virtual CPU.
901 */
902#ifdef IN_RC
903# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
904#elif defined(IN_RING0)
905# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
906 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
907 RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
908 (pVCpu) ? (pVCpu)->idCpu : 0))
909#else
910# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
911 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
912 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
913#endif
914
915/** @def VM_ASSERT_EMT_RETURN
916 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
917 */
918#ifdef IN_RC
919# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
920#elif defined(IN_RING0)
921# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
922#else
923# define VM_ASSERT_EMT_RETURN(pVM, rc) \
924 AssertMsgReturn(VM_IS_EMT(pVM), \
925 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
926 (rc))
927#endif
928
929/** @def VMCPU_ASSERT_EMT_RETURN
930 * Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
931 */
932#ifdef IN_RC
933# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
934#elif defined(IN_RING0)
935# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
936#else
937# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
938 AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
939 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
940 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
941 (rc))
942#endif
943
944/** @def VMCPU_ASSERT_EMT_OR_GURU
945 * Asserts that the current thread IS the emulation thread (EMT) of the
946 * specified virtual CPU.
947 */
948#if defined(IN_RC) || defined(IN_RING0)
949# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
950 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
951 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
952#else
953# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
954 AssertMsg( VMCPU_IS_EMT(pVCpu) \
955 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
956 || pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
957 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
958 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
959#endif
960
961/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
962 * Asserts that the current thread IS the emulation thread (EMT) of the
963 * specified virtual CPU or the VM is not running.
964 */
965#if defined(IN_RC) || defined(IN_RING0)
966# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
967 Assert( VMCPU_IS_EMT(pVCpu) \
968 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
969#else
970# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
971 AssertMsg( VMCPU_IS_EMT(pVCpu) \
972 || !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
973 ("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
974 RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
975#endif
976
977/** @def VMSTATE_IS_RUNNING
978 * Checks if the given state indicates a running VM.
979 */
980#define VMSTATE_IS_RUNNING(a_enmVMState) \
981 ( (enmVMState) == VMSTATE_RUNNING \
982 || (enmVMState) == VMSTATE_RUNNING_LS )
983
984/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
985 * Checks if the VM is running.
986 * @note This is only for pure debug assertions. No AssertReturn or similar!
987 * @sa VMSTATE_IS_RUNNING
988 */
989#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
990 ( (pVM)->enmVMState == VMSTATE_RUNNING \
991 || (pVM)->enmVMState == VMSTATE_RUNNING_LS )
992
993/** @def VM_ASSERT_IS_NOT_RUNNING
994 * Asserts that the VM is not running.
995 */
996#if defined(IN_RC) || defined(IN_RING0)
997#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
998#else
999#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
1000 ("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
1001#endif
1002
1003/** @def VM_ASSERT_EMT0
1004 * Asserts that the current thread IS emulation thread \#0 (EMT0).
1005 */
1006#ifdef IN_RING3
1007# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1008#else
1009# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1010#endif
1011
1012/** @def VM_ASSERT_EMT0_RETURN
1013 * Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1014 * it isn't.
1015 */
1016#ifdef IN_RING3
1017# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1018#else
1019# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1020#endif
1021
1022
1023/**
1024 * Asserts that the current thread is NOT the emulation thread.
1025 */
1026#define VM_ASSERT_OTHER_THREAD(pVM) \
1027 AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1028
1029
1030/** @def VM_ASSERT_STATE
1031 * Asserts a certain VM state.
1032 */
1033#define VM_ASSERT_STATE(pVM, _enmState) \
1034 AssertMsg((pVM)->enmVMState == (_enmState), \
1035 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1036
1037/** @def VM_ASSERT_STATE_RETURN
1038 * Asserts a certain VM state and returns if it doesn't match.
1039 */
1040#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1041 AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1042 ("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1043 (rc))
1044
1045/** @def VM_IS_VALID_EXT
1046 * Asserts a the VM handle is valid for external access, i.e. not being destroy
1047 * or terminated. */
1048#define VM_IS_VALID_EXT(pVM) \
1049 ( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1050 && ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1051 || ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1052 && VM_IS_EMT(pVM))) )
1053
1054/** @def VM_ASSERT_VALID_EXT_RETURN
1055 * Asserts a the VM handle is valid for external access, i.e. not being
1056 * destroy or terminated.
1057 */
1058#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1059 AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1060 ("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1061 ? VMGetStateName(pVM->enmVMState) : ""), \
1062 (rc))
1063
1064/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1065 * Asserts a the VMCPU handle is valid for external access, i.e. not being
1066 * destroy or terminated.
1067 */
1068#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1069 AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1070 && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1071 && (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1072 ("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1073 RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1074 ? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1075 (rc))
1076
1077#endif /* !VBOX_FOR_DTRACE_LIB */
1078
1079
1080/**
1081 * Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1082 *
1083 * ONLY HM and NEM MAY USE THIS!
1084 *
1085 * @param a_pVM The cross context VM structure.
1086 * @param a_bValue The new value.
1087 * @internal
1088 */
1089#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1090 do { \
1091 *const_cast<uint8_t *>(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1092 ASMCompilerBarrier(); /* just to be on the safe side */ \
1093 } while (0)
1094
1095/**
1096 * Checks whether raw-mode is used.
1097 *
1098 * @retval true if either is used.
1099 * @retval false if software virtualization (raw-mode) is used.
1100 *
1101 * @param a_pVM The cross context VM structure.
1102 * @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1103 * @internal
1104 */
1105#ifdef VBOX_WITH_RAW_MODE
1106# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1107#else
1108# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1109#endif
1110
1111/**
1112 * Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1113 *
1114 * @retval true if either is used.
1115 * @retval false if software virtualization (raw-mode) is used.
1116 *
1117 * @param a_pVM The cross context VM structure.
1118 * @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1119 * @internal
1120 */
1121#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1122
1123/**
1124 * Checks whether HM is being used by this VM.
1125 *
1126 * @retval true if HM (VT-x/AMD-v) is used.
1127 * @retval false if not.
1128 *
1129 * @param a_pVM The cross context VM structure.
1130 * @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1131 * @internal
1132 */
1133#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1134
1135/**
1136 * Checks whether NEM is being used by this VM.
1137 *
1138 * @retval true if a native hypervisor API is used.
1139 * @retval false if not.
1140 *
1141 * @param a_pVM The cross context VM structure.
1142 * @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1143 * @internal
1144 */
1145#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1146
1147
1148/**
1149 * The cross context VM structure.
1150 *
1151 * It contains all the VM data which have to be available in all contexts.
1152 * Even if it contains all the data the idea is to use APIs not to modify all
1153 * the members all around the place. Therefore we make use of unions to hide
1154 * everything which isn't local to the current source module. This means we'll
1155 * have to pay a little bit of attention when adding new members to structures
1156 * in the unions and make sure to keep the padding sizes up to date.
1157 *
1158 * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1159 */
1160typedef struct VM
1161{
1162 /** The state of the VM.
1163 * This field is read only to everyone except the VM and EM. */
1164 VMSTATE volatile enmVMState;
1165 /** Forced action flags.
1166 * See the VM_FF_* \#defines. Updated atomically.
1167 */
1168 volatile uint32_t fGlobalForcedActions;
1169 /** Pointer to the array of page descriptors for the VM structure allocation. */
1170 R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1171 /** Session handle. For use when calling SUPR0 APIs. */
1172#ifdef IN_RING0
1173 PSUPDRVSESSION pSessionUnsafe;
1174#else
1175 PSUPDRVSESSION pSession;
1176#endif
1177 /** Pointer to the ring-3 VM structure. */
1178 PUVM pUVM;
1179 /** Ring-3 Host Context VM Pointer. */
1180#ifdef IN_RING0
1181 R3PTRTYPE(struct VM *) pVMR3Unsafe;
1182#else
1183 R3PTRTYPE(struct VM *) pVMR3;
1184#endif
1185 /** Ring-0 Host Context VM pointer for making ring-0 calls. */
1186 R0PTRTYPE(struct VM *) pVMR0ForCall;
1187 /** Raw-mode Context VM Pointer. */
1188 uint32_t pVMRC;
1189 /** Padding for new raw-mode (long mode). */
1190 uint32_t pVMRCPadding;
1191
1192 /** The GVM VM handle. Only the GVM should modify this field. */
1193#ifdef IN_RING0
1194 uint32_t hSelfUnsafe;
1195#else
1196 uint32_t hSelf;
1197#endif
1198 /** Number of virtual CPUs. */
1199#ifdef IN_RING0
1200 uint32_t cCpusUnsafe;
1201#else
1202 uint32_t cCpus;
1203#endif
1204 /** CPU excution cap (1-100) */
1205 uint32_t uCpuExecutionCap;
1206
1207 /** Size of the VM structure. */
1208 uint32_t cbSelf;
1209 /** Size of the VMCPU structure. */
1210 uint32_t cbVCpu;
1211 /** Structure version number (TBD). */
1212 uint32_t uStructVersion;
1213
1214 /** @name Various items that are frequently accessed.
1215 * @{ */
1216 /** The main execution engine, VM_EXEC_ENGINE_XXX.
1217 * This is set early during vmR3InitRing3 by HM or NEM. */
1218 uint8_t const bMainExecutionEngine;
1219
1220 /** Hardware VM support is available and enabled.
1221 * Determined very early during init.
1222 * This is placed here for performance reasons.
1223 * @todo obsoleted by bMainExecutionEngine, eliminate. */
1224 bool fHMEnabled;
1225
1226 /** Large page enabled flag.
1227 * @todo This doesn't need to be here, PGM should store it in it's own
1228 * structures instead. */
1229 bool fUseLargePages;
1230 /** @} */
1231
1232 /** Alignment padding. */
1233 uint8_t uPadding1[5];
1234
1235 /** @name Debugging
1236 * @{ */
1237 /** Ring-3 Host Context VM Pointer. */
1238 R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1239 /** Ring-0 Host Context VM Pointer. */
1240 R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1241 /** @} */
1242
1243 /** Max EMT hash lookup collisions (in GVMM). */
1244 uint8_t cMaxEmtHashCollisions;
1245
1246 /** Padding - the unions must be aligned on a 64 bytes boundary. */
1247 uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
1248
1249 /** CPUM part. */
1250 union
1251 {
1252#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1253 struct CPUM s;
1254#endif
1255#ifdef VBOX_INCLUDED_vmm_cpum_h
1256 /** Read only info exposed about the host and guest CPUs. */
1257 struct
1258 {
1259 /** Padding for hidden fields. */
1260 uint8_t abHidden0[64];
1261 /** Host CPU feature information. */
1262 CPUMFEATURES HostFeatures;
1263 /** Guest CPU feature information. */
1264 CPUMFEATURES GuestFeatures;
1265 } const ro;
1266#endif
1267 uint8_t padding[1536]; /* multiple of 64 */
1268 } cpum;
1269
1270 /** VMM part. */
1271 union
1272 {
1273#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1274 struct VMM s;
1275#endif
1276 uint8_t padding[1600]; /* multiple of 64 */
1277 } vmm;
1278
1279 /** PGM part. */
1280 union
1281 {
1282#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1283 struct PGM s;
1284#endif
1285 uint8_t padding[21120]; /* multiple of 64 */
1286 } pgm;
1287
1288 /** HM part. */
1289 union
1290 {
1291#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1292 struct HM s;
1293#endif
1294 uint8_t padding[5504]; /* multiple of 64 */
1295 } hm;
1296
1297 /** TRPM part. */
1298 union
1299 {
1300#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1301 struct TRPM s;
1302#endif
1303 uint8_t padding[2048]; /* multiple of 64 */
1304 } trpm;
1305
1306 /** SELM part. */
1307 union
1308 {
1309#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1310 struct SELM s;
1311#endif
1312 uint8_t padding[768]; /* multiple of 64 */
1313 } selm;
1314
1315 /** MM part. */
1316 union
1317 {
1318#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1319 struct MM s;
1320#endif
1321 uint8_t padding[192]; /* multiple of 64 */
1322 } mm;
1323
1324 /** PDM part. */
1325 union
1326 {
1327#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1328 struct PDM s;
1329#endif
1330 uint8_t padding[8320]; /* multiple of 64 */
1331 } pdm;
1332
1333 /** IOM part. */
1334 union
1335 {
1336#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1337 struct IOM s;
1338#endif
1339 uint8_t padding[1152]; /* multiple of 64 */
1340 } iom;
1341
1342 /** EM part. */
1343 union
1344 {
1345#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1346 struct EM s;
1347#endif
1348 uint8_t padding[256]; /* multiple of 64 */
1349 } em;
1350
1351 /** NEM part. */
1352 union
1353 {
1354#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1355 struct NEM s;
1356#endif
1357 uint8_t padding[128]; /* multiple of 64 */
1358 } nem;
1359
1360 /** TM part. */
1361 union
1362 {
1363#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1364 struct TM s;
1365#endif
1366 uint8_t padding[10112]; /* multiple of 64 */
1367 } tm;
1368
1369 /** DBGF part. */
1370 union
1371 {
1372#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1373 struct DBGF s;
1374#endif
1375#ifdef VBOX_INCLUDED_vmm_dbgf_h
1376 /** Read only info exposed about interrupt breakpoints and selected events. */
1377 struct
1378 {
1379 /** Bitmap of enabled hardware interrupt breakpoints. */
1380 uint32_t bmHardIntBreakpoints[256 / 32];
1381 /** Bitmap of enabled software interrupt breakpoints. */
1382 uint32_t bmSoftIntBreakpoints[256 / 32];
1383 /** Bitmap of selected events.
1384 * This includes non-selectable events too for simplicity, we maintain the
1385 * state for some of these, as it may come in handy. */
1386 uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1387 /** Enabled hardware interrupt breakpoints. */
1388 uint32_t cHardIntBreakpoints;
1389 /** Enabled software interrupt breakpoints. */
1390 uint32_t cSoftIntBreakpoints;
1391 /** The number of selected events. */
1392 uint32_t cSelectedEvents;
1393 /** The number of enabled hardware breakpoints. */
1394 uint8_t cEnabledHwBreakpoints;
1395 /** The number of enabled hardware I/O breakpoints. */
1396 uint8_t cEnabledHwIoBreakpoints;
1397 uint8_t au8Alignment1[2]; /**< Alignment padding. */
1398 /** The number of enabled INT3 breakpoints. */
1399 uint32_t volatile cEnabledInt3Breakpoints;
1400 } const ro;
1401#endif
1402 uint8_t padding[2432]; /* multiple of 64 */
1403 } dbgf;
1404
1405 /** SSM part. */
1406 union
1407 {
1408#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1409 struct SSM s;
1410#endif
1411 uint8_t padding[128]; /* multiple of 64 */
1412 } ssm;
1413
1414 union
1415 {
1416#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1417 struct GIM s;
1418#endif
1419 uint8_t padding[448]; /* multiple of 64 */
1420 } gim;
1421
1422 union
1423 {
1424#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1425 struct APIC s;
1426#endif
1427 uint8_t padding[128]; /* multiple of 8 */
1428 } apic;
1429
1430 /* ---- begin small stuff ---- */
1431
1432 /** VM part. */
1433 union
1434 {
1435#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1436 struct VMINT s;
1437#endif
1438 uint8_t padding[32]; /* multiple of 8 */
1439 } vm;
1440
1441 /** CFGM part. */
1442 union
1443 {
1444#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1445 struct CFGM s;
1446#endif
1447 uint8_t padding[8]; /* multiple of 8 */
1448 } cfgm;
1449
1450 /** Statistics for ring-0 only components. */
1451 struct
1452 {
1453 /** GMMR0 stats. */
1454 struct
1455 {
1456 /** Chunk TLB hits. */
1457 uint64_t cChunkTlbHits;
1458 /** Chunk TLB misses. */
1459 uint64_t cChunkTlbMisses;
1460 } gmm;
1461 uint64_t au64Padding[6]; /* probably more comming here... */
1462 } R0Stats;
1463
1464 /** Padding for aligning the structure size on a page boundrary. */
1465 uint8_t abAlignment2[1240 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1466
1467 /* ---- end small stuff ---- */
1468
1469 /** Array of VMCPU ring-3 pointers. */
1470 PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1471} VM;
1472
1473
1474#ifdef IN_RC
1475RT_C_DECLS_BEGIN
1476
1477/** The VM structure.
1478 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1479 * globals which we should avoid using.
1480 */
1481extern DECLIMPORT(VM) g_VM;
1482
1483/** The VMCPU structure for virtual CPU \#0.
1484 * This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1485 * globals which we should avoid using.
1486 */
1487extern DECLIMPORT(VMCPU) g_VCpu0;
1488
1489RT_C_DECLS_END
1490#endif
1491
1492/** @} */
1493
1494#endif /* !VBOX_INCLUDED_vmm_vm_h */
1495
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