vm.h@ 92070

Last change on this file since 92070 was 91702, checked in by vboxsync, 3 years ago
VMM/NEM: More stats. Played with using WHvMapGpaRange again, but much too slow to use on a per-page basis. bugref:10118
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1	/** @file
2	* VM - The Virtual Machine, data.
3	*/
4
5	/*
6	* Copyright (C) 2006-2020 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*
16	* The contents of this file may alternatively be used under the terms
17	* of the Common Development and Distribution License Version 1.0
18	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19	* VirtualBox OSE distribution, in which case the provisions of the
20	* CDDL are applicable instead of those of the GPL.
21	*
22	* You may elect to license modified versions of this file under the
23	* terms and conditions of either the GPL or the CDDL or both.
24	*/
25
26	#ifndef VBOX_INCLUDED_vmm_vm_h
27	#define VBOX_INCLUDED_vmm_vm_h
28	#ifndef RT_WITHOUT_PRAGMA_ONCE
29	# pragma once
30	#endif
31
32	#ifndef VBOX_FOR_DTRACE_LIB
33	# ifndef USING_VMM_COMMON_DEFS
34	# error "Compile job does not include VMM_COMMON_DEFS from src/VBox/VMM/Config.kmk - make sure you really need to include this file!"
35	# endif
36	# include <iprt/param.h>
37	# include <VBox/param.h>
38	# include <VBox/types.h>
39	# include <VBox/vmm/cpum.h>
40	# include <VBox/vmm/stam.h>
41	# include <VBox/vmm/vmapi.h>
42	# include <VBox/vmm/vmm.h>
43	# include <VBox/sup.h>
44	#else
45	# pragma D depends_on library vbox-types.d
46	# pragma D depends_on library CPUMInternal.d
47	# define VMM_INCLUDED_SRC_include_CPUMInternal_h
48	#endif
49
50
51
52	/** @defgroup grp_vm The Virtual Machine
53	* @ingroup grp_vmm
54	* @{
55	*/
56
57	/**
58	* The state of a Virtual CPU.
59	*
60	* The basic state indicated here is whether the CPU has been started or not. In
61	* addition, there are sub-states when started for assisting scheduling (GVMM
62	* mostly).
63	*
64	* The transition out of the STOPPED state is done by a vmR3PowerOn.
65	* The transition back to the STOPPED state is done by vmR3PowerOff.
66	*
67	* (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
68	* handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
69	*/
70	typedef enum VMCPUSTATE
71	{
72	/** The customary invalid zero. */
73	VMCPUSTATE_INVALID = 0,
74
75	/** Virtual CPU has not yet been started. */
76	VMCPUSTATE_STOPPED,
77
78	/** CPU started. */
79	VMCPUSTATE_STARTED,
80	/** CPU started in HM context. */
81	VMCPUSTATE_STARTED_HM,
82	/** Executing guest code and can be poked (RC or STI bits of HM). */
83	VMCPUSTATE_STARTED_EXEC,
84	/** Executing guest code using NEM. */
85	VMCPUSTATE_STARTED_EXEC_NEM,
86	VMCPUSTATE_STARTED_EXEC_NEM_WAIT,
87	VMCPUSTATE_STARTED_EXEC_NEM_CANCELED,
88	/** Halted. */
89	VMCPUSTATE_STARTED_HALTED,
90
91	/** The end of valid virtual CPU states. */
92	VMCPUSTATE_END,
93
94	/** Ensure 32-bit type. */
95	VMCPUSTATE_32BIT_HACK = 0x7fffffff
96	} VMCPUSTATE;
97
98	/** Enables 64-bit FFs. */
99	#define VMCPU_WITH_64_BIT_FFS
100
101
102	/**
103	* The cross context virtual CPU structure.
104	*
105	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
106	*/
107	typedef struct VMCPU
108	{
109	/** @name Volatile per-cpu data.
110	* @{ */
111	/** Per CPU forced action.
112	* See the VMCPU_FF_* \#defines. Updated atomically. */
113	#ifdef VMCPU_WITH_64_BIT_FFS
114	uint64_t volatile fLocalForcedActions;
115	#else
116	uint32_t volatile fLocalForcedActions;
117	uint32_t fForLocalForcedActionsExpansion;
118	#endif
119	/** The CPU state. */
120	VMCPUSTATE volatile enmState;
121
122	/** Padding up to 64 bytes. */
123	uint8_t abAlignment0[64 - 12];
124	/** @} */
125
126	/** IEM part.
127	* @remarks This comes first as it allows the use of 8-bit immediates for the
128	* first 64 bytes of the structure, reducing code size a wee bit. */
129	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h /* For PDB hacking. */
130	union VMCPUUNIONIEMFULL
131	#else
132	union VMCPUUNIONIEMSTUB
133	#endif
134	{
135	#ifdef VMM_INCLUDED_SRC_include_IEMInternal_h
136	struct IEMCPU s;
137	#endif
138	uint8_t padding[26688]; /* multiple of 64 */
139	} iem;
140
141	/** @name Static per-cpu data.
142	* (Putting this after IEM, hoping that it's less frequently used than it.)
143	* @{ */
144	/** Ring-3 Host Context VM Pointer. */
145	PVMR3 pVMR3;
146	/** Ring-0 Host Context VM Pointer, currently used by VTG/dtrace. */
147	RTR0PTR pVCpuR0ForVtg;
148	/** Raw-mode Context VM Pointer. */
149	uint32_t pVMRC;
150	/** Padding for new raw-mode (long mode). */
151	uint32_t pVMRCPadding;
152	/** Pointer to the ring-3 UVMCPU structure. */
153	PUVMCPU pUVCpu;
154	/** The native thread handle. */
155	RTNATIVETHREAD hNativeThread;
156	/** The native R0 thread handle. (different from the R3 handle!) */
157	RTNATIVETHREAD hNativeThreadR0;
158	/** The IPRT thread handle (for VMMDevTesting). */
159	RTTHREAD hThread;
160	/** The CPU ID.
161	* This is the index into the VM::aCpu array. */
162	#ifdef IN_RING0
163	VMCPUID idCpuUnsafe;
164	#else
165	VMCPUID idCpu;
166	#endif
167
168	/** Align the structures below bit on a 64-byte boundary and make sure it starts
169	* at the same offset in both 64-bit and 32-bit builds.
170	*
171	* @remarks The alignments of the members that are larger than 48 bytes should be
172	* 64-byte for cache line reasons. structs containing small amounts of
173	* data could be lumped together at the end with a < 64 byte padding
174	* following it (to grow into and align the struct size).
175	*/
176	uint8_t abAlignment1[64 - 6 * (HC_ARCH_BITS == 32 ? 4 : 8) - 8 - 4];
177	/** @} */
178
179	/** HM part. */
180	union VMCPUUNIONHM
181	{
182	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
183	struct HMCPU s;
184	#endif
185	uint8_t padding[9984]; /* multiple of 64 */
186	} hm;
187
188	/** NEM part. */
189	union VMCPUUNIONNEM
190	{
191	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
192	struct NEMCPU s;
193	#endif
194	uint8_t padding[512]; /* multiple of 64 */
195	} nem;
196
197	/** TRPM part. */
198	union VMCPUUNIONTRPM
199	{
200	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
201	struct TRPMCPU s;
202	#endif
203	uint8_t padding[128]; /* multiple of 64 */
204	} trpm;
205
206	/** TM part. */
207	union VMCPUUNIONTM
208	{
209	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
210	struct TMCPU s;
211	#endif
212	uint8_t padding[5760]; /* multiple of 64 */
213	} tm;
214
215	/** VMM part. */
216	union VMCPUUNIONVMM
217	{
218	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
219	struct VMMCPU s;
220	#endif
221	uint8_t padding[1344]; /* multiple of 64 */
222	} vmm;
223
224	/** PDM part. */
225	union VMCPUUNIONPDM
226	{
227	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
228	struct PDMCPU s;
229	#endif
230	uint8_t padding[256]; /* multiple of 64 */
231	} pdm;
232
233	/** IOM part. */
234	union VMCPUUNIONIOM
235	{
236	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
237	struct IOMCPU s;
238	#endif
239	uint8_t padding[512]; /* multiple of 64 */
240	} iom;
241
242	/** DBGF part.
243	* @todo Combine this with other tiny structures. */
244	union VMCPUUNIONDBGF
245	{
246	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
247	struct DBGFCPU s;
248	#endif
249	uint8_t padding[512]; /* multiple of 64 */
250	} dbgf;
251
252	/** GIM part. */
253	union VMCPUUNIONGIM
254	{
255	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
256	struct GIMCPU s;
257	#endif
258	uint8_t padding[512]; /* multiple of 64 */
259	} gim;
260
261	/** APIC part. */
262	union VMCPUUNIONAPIC
263	{
264	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
265	struct APICCPU s;
266	#endif
267	uint8_t padding[3840]; /* multiple of 64 */
268	} apic;
269
270	/*
271	* Some less frequently used global members that doesn't need to take up
272	* precious space at the head of the structure.
273	*/
274
275	/** Trace groups enable flags. */
276	uint32_t fTraceGroups; /* 64 / 44 */
277	/** Number of collisions hashing the ring-0 EMT handle. */
278	uint8_t cEmtHashCollisions;
279	uint8_t abAdHoc[3];
280	/** Profiling samples for use by ad hoc profiling. */
281	STAMPROFILEADV aStatAdHoc[8]; /* size: 408 = 320 /
282
283	/** Align the following members on page boundary. */
284	uint8_t abAlignment2[2744];
285
286	/** PGM part. */
287	union VMCPUUNIONPGM
288	{
289	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
290	struct PGMCPU s;
291	#endif
292	uint8_t padding[4096 + 28672]; /* multiple of 4096 */
293	} pgm;
294
295	/** CPUM part. */
296	union VMCPUUNIONCPUM
297	{
298	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
299	struct CPUMCPU s;
300	#endif
301	#ifdef VMCPU_INCL_CPUM_GST_CTX
302	/** The guest CPUM context for direct use by execution engines.
303	* This is not for general consumption, but for HM, REM, IEM, and maybe a few
304	* others. The rest will use the function based CPUM API. */
305	CPUMCTX GstCtx;
306	#endif
307	uint8_t padding[102400]; /* multiple of 4096 */
308	} cpum;
309
310	/** EM part. */
311	union VMCPUUNIONEM
312	{
313	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
314	struct EMCPU s;
315	#endif
316	uint8_t padding[40960]; /* multiple of 4096 */
317	} em;
318	} VMCPU;
319
320
321	#ifndef VBOX_FOR_DTRACE_LIB
322	AssertCompileSizeAlignment(VMCPU, 4096);
323
324	/** @name Operations on VMCPU::enmState
325	* @{ */
326	/** Gets the VMCPU state. */
327	#define VMCPU_GET_STATE(pVCpu) ( (pVCpu)->enmState )
328	/** Sets the VMCPU state. */
329	#define VMCPU_SET_STATE(pVCpu, enmNewState) \
330	ASMAtomicWriteU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState))
331	/** Cmpares and sets the VMCPU state. */
332	#define VMCPU_CMPXCHG_STATE(pVCpu, enmNewState, enmOldState) \
333	ASMAtomicCmpXchgU32((uint32_t volatile *)&(pVCpu)->enmState, (enmNewState), (enmOldState))
334	/** Checks the VMCPU state. */
335	#ifdef VBOX_STRICT
336	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) \
337	do { \
338	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
339	AssertMsg(enmState == (enmExpectedState), \
340	("enmState=%d enmExpectedState=%d idCpu=%u\n", \
341	enmState, enmExpectedState, (pVCpu)->idCpu)); \
342	} while (0)
343
344	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) \
345	do { \
346	VMCPUSTATE enmState = VMCPU_GET_STATE(pVCpu); \
347	AssertMsg( enmState == (enmExpectedState) \
348	\|\| enmState == (a_enmExpectedState2), \
349	("enmState=%d enmExpectedState=%d enmExpectedState2=%d idCpu=%u\n", \
350	enmState, enmExpectedState, a_enmExpectedState2, (pVCpu)->idCpu)); \
351	} while (0)
352	#else
353	# define VMCPU_ASSERT_STATE(pVCpu, enmExpectedState) do { } while (0)
354	# define VMCPU_ASSERT_STATE_2(pVCpu, enmExpectedState, a_enmExpectedState2) do { } while (0)
355	#endif
356	/** Tests if the state means that the CPU is started. */
357	#define VMCPUSTATE_IS_STARTED(enmState) ( (enmState) > VMCPUSTATE_STOPPED )
358	/** Tests if the state means that the CPU is stopped. */
359	#define VMCPUSTATE_IS_STOPPED(enmState) ( (enmState) == VMCPUSTATE_STOPPED )
360	/** @} */
361
362
363	/** The name of the raw-mode context VMM Core module. */
364	#define VMMRC_MAIN_MODULE_NAME "VMMRC.rc"
365	/** The name of the ring-0 context VMM Core module. */
366	#define VMMR0_MAIN_MODULE_NAME "VMMR0.r0"
367
368
369	/** VM Forced Action Flags.
370	*
371	* Use the VM_FF_SET() and VM_FF_CLEAR() macros to change the force
372	* action mask of a VM.
373	*
374	* Available VM bits:
375	* 0, 1, 5, 6, 7, 13, 14, 15, 16, 17, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
376	*
377	*
378	* Available VMCPU bits:
379	* 14, 15, 36 to 63
380	*
381	* @todo If we run low on VMCPU, we may consider merging the SELM bits
382	*
383	* @{
384	*/
385	/** The virtual sync clock has been stopped, go to TM until it has been
386	* restarted... */
387	#define VM_FF_TM_VIRTUAL_SYNC RT_BIT_32(VM_FF_TM_VIRTUAL_SYNC_BIT)
388	#define VM_FF_TM_VIRTUAL_SYNC_BIT 2
389	/** PDM Queues are pending. */
390	#define VM_FF_PDM_QUEUES RT_BIT_32(VM_FF_PDM_QUEUES_BIT)
391	/** The bit number for VM_FF_PDM_QUEUES. */
392	#define VM_FF_PDM_QUEUES_BIT 3
393	/** PDM DMA transfers are pending. */
394	#define VM_FF_PDM_DMA RT_BIT_32(VM_FF_PDM_DMA_BIT)
395	/** The bit number for VM_FF_PDM_DMA. */
396	#define VM_FF_PDM_DMA_BIT 4
397	/** This action forces the VM to call DBGF so DBGF can service debugger
398	* requests in the emulation thread.
399	* This action flag stays asserted till DBGF clears it.*/
400	#define VM_FF_DBGF RT_BIT_32(VM_FF_DBGF_BIT)
401	/** The bit number for VM_FF_DBGF. */
402	#define VM_FF_DBGF_BIT 8
403	/** This action forces the VM to service pending requests from other
404	* thread or requests which must be executed in another context. */
405	#define VM_FF_REQUEST RT_BIT_32(VM_FF_REQUEST_BIT)
406	#define VM_FF_REQUEST_BIT 9
407	/** Check for VM state changes and take appropriate action. */
408	#define VM_FF_CHECK_VM_STATE RT_BIT_32(VM_FF_CHECK_VM_STATE_BIT)
409	/** The bit number for VM_FF_CHECK_VM_STATE. */
410	#define VM_FF_CHECK_VM_STATE_BIT 10
411	/** Reset the VM. (postponed) */
412	#define VM_FF_RESET RT_BIT_32(VM_FF_RESET_BIT)
413	/** The bit number for VM_FF_RESET. */
414	#define VM_FF_RESET_BIT 11
415	/** EMT rendezvous in VMM. */
416	#define VM_FF_EMT_RENDEZVOUS RT_BIT_32(VM_FF_EMT_RENDEZVOUS_BIT)
417	/** The bit number for VM_FF_EMT_RENDEZVOUS. */
418	#define VM_FF_EMT_RENDEZVOUS_BIT 12
419
420	/** PGM needs to allocate handy pages. */
421	#define VM_FF_PGM_NEED_HANDY_PAGES RT_BIT_32(VM_FF_PGM_NEED_HANDY_PAGES_BIT)
422	#define VM_FF_PGM_NEED_HANDY_PAGES_BIT 18
423	/** PGM is out of memory.
424	* Abandon all loops and code paths which can be resumed and get up to the EM
425	* loops. */
426	#define VM_FF_PGM_NO_MEMORY RT_BIT_32(VM_FF_PGM_NO_MEMORY_BIT)
427	#define VM_FF_PGM_NO_MEMORY_BIT 19
428	/** PGM is about to perform a lightweight pool flush
429	* Guest SMP: all EMT threads should return to ring 3
430	*/
431	#define VM_FF_PGM_POOL_FLUSH_PENDING RT_BIT_32(VM_FF_PGM_POOL_FLUSH_PENDING_BIT)
432	#define VM_FF_PGM_POOL_FLUSH_PENDING_BIT 20
433	/** Suspend the VM - debug only. */
434	#define VM_FF_DEBUG_SUSPEND RT_BIT_32(VM_FF_DEBUG_SUSPEND_BIT)
435	#define VM_FF_DEBUG_SUSPEND_BIT 31
436
437
438	/** This action forces the VM to check any pending interrupts on the APIC. */
439	#define VMCPU_FF_INTERRUPT_APIC RT_BIT_64(VMCPU_FF_INTERRUPT_APIC_BIT)
440	#define VMCPU_FF_INTERRUPT_APIC_BIT 0
441	/** This action forces the VM to check any pending interrups on the PIC. */
442	#define VMCPU_FF_INTERRUPT_PIC RT_BIT_64(VMCPU_FF_INTERRUPT_PIC_BIT)
443	#define VMCPU_FF_INTERRUPT_PIC_BIT 1
444	/** This action forces the VM to schedule and run pending timer (TM).
445	* @remarks Don't move - PATM compatibility. */
446	#define VMCPU_FF_TIMER RT_BIT_64(VMCPU_FF_TIMER_BIT)
447	#define VMCPU_FF_TIMER_BIT 2
448	/** This action forces the VM to check any pending NMIs. */
449	#define VMCPU_FF_INTERRUPT_NMI RT_BIT_64(VMCPU_FF_INTERRUPT_NMI_BIT)
450	#define VMCPU_FF_INTERRUPT_NMI_BIT 3
451	/** This action forces the VM to check any pending SMIs. */
452	#define VMCPU_FF_INTERRUPT_SMI RT_BIT_64(VMCPU_FF_INTERRUPT_SMI_BIT)
453	#define VMCPU_FF_INTERRUPT_SMI_BIT 4
454	/** PDM critical section unlocking is pending, process promptly upon return to R3. */
455	#define VMCPU_FF_PDM_CRITSECT RT_BIT_64(VMCPU_FF_PDM_CRITSECT_BIT)
456	#define VMCPU_FF_PDM_CRITSECT_BIT 5
457	/** Special EM internal force flag that is used by EMUnhaltAndWakeUp() to force
458	* the virtual CPU out of the next (/current) halted state. It is not processed
459	* nor cleared by emR3ForcedActions (similar to VMCPU_FF_BLOCK_NMIS), instead it
460	* is cleared the next time EM leaves the HALTED state. */
461	#define VMCPU_FF_UNHALT RT_BIT_64(VMCPU_FF_UNHALT_BIT)
462	#define VMCPU_FF_UNHALT_BIT 6
463	/** Pending IEM action (mask). */
464	#define VMCPU_FF_IEM RT_BIT_64(VMCPU_FF_IEM_BIT)
465	/** Pending IEM action (bit number). */
466	#define VMCPU_FF_IEM_BIT 7
467	/** Pending APIC action (bit number). */
468	#define VMCPU_FF_UPDATE_APIC_BIT 8
469	/** This action forces the VM to update APIC's asynchronously arrived
470	* interrupts as pending interrupts. */
471	#define VMCPU_FF_UPDATE_APIC RT_BIT_64(VMCPU_FF_UPDATE_APIC_BIT)
472	/** This action forces the VM to service pending requests from other
473	* thread or requests which must be executed in another context. */
474	#define VMCPU_FF_REQUEST RT_BIT_64(VMCPU_FF_REQUEST_BIT)
475	#define VMCPU_FF_REQUEST_BIT 9
476	/** Pending DBGF event (alternative to passing VINF_EM_DBG_EVENT around). */
477	#define VMCPU_FF_DBGF RT_BIT_64(VMCPU_FF_DBGF_BIT)
478	/** The bit number for VMCPU_FF_DBGF. */
479	#define VMCPU_FF_DBGF_BIT 10
480	/** This action forces the VM to service any pending updates to CR3 (used only
481	* by HM). */
482	/** Hardware virtualized nested-guest interrupt pending. */
483	#define VMCPU_FF_INTERRUPT_NESTED_GUEST RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
484	#define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
485	/** This action forces PGM to update changes to CR3 when the guest was in HM mode
486	* (when using nested paging). */
487	#define VMCPU_FF_HM_UPDATE_CR3 RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
488	#define VMCPU_FF_HM_UPDATE_CR3_BIT 12
489	/* Bit 13 used to be VMCPU_FF_HM_UPDATE_PAE_PDPES. */
490	/** This action forces the VM to resync the page tables before going
491	* back to execute guest code. (GLOBAL FLUSH) */
492	#define VMCPU_FF_PGM_SYNC_CR3 RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_BIT)
493	#define VMCPU_FF_PGM_SYNC_CR3_BIT 16
494	/** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
495	* (NON-GLOBAL FLUSH) */
496	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT_64(VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT)
497	#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL_BIT 17
498	/** Check for pending TLB shootdown actions (deprecated)
499	* Reserved for furture HM re-use if necessary / safe.
500	* Consumer: HM */
501	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED RT_BIT_64(VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT)
502	#define VMCPU_FF_TLB_SHOOTDOWN_UNUSED_BIT 18
503	/** Check for pending TLB flush action.
504	* Consumer: HM
505	* @todo rename to VMCPU_FF_HM_TLB_FLUSH */
506	#define VMCPU_FF_TLB_FLUSH RT_BIT_64(VMCPU_FF_TLB_FLUSH_BIT)
507	/** The bit number for VMCPU_FF_TLB_FLUSH. */
508	#define VMCPU_FF_TLB_FLUSH_BIT 19
509	/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
510	/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
511	/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
512	/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
513	/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
514	#define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
515	#define VMCPU_FF_INHIBIT_INTERRUPTS_BIT 24
516	/** Block injection of non-maskable interrupts to the guest. */
517	#define VMCPU_FF_BLOCK_NMIS RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
518	#define VMCPU_FF_BLOCK_NMIS_BIT 25
519	/** Force return to Ring-3. */
520	#define VMCPU_FF_TO_R3 RT_BIT_64(VMCPU_FF_TO_R3_BIT)
521	#define VMCPU_FF_TO_R3_BIT 28
522	/** Force return to ring-3 to service pending I/O or MMIO write.
523	* This is a backup for mechanism VINF_IOM_R3_IOPORT_COMMIT_WRITE and
524	* VINF_IOM_R3_MMIO_COMMIT_WRITE, allowing VINF_EM_DBG_BREAKPOINT and similar
525	* status codes to be propagated at the same time without loss. */
526	#define VMCPU_FF_IOM RT_BIT_64(VMCPU_FF_IOM_BIT)
527	#define VMCPU_FF_IOM_BIT 29
528	/* 30 used to be VMCPU_FF_CPUM */
529	/** VMX-preemption timer expired. */
530	#define VMCPU_FF_VMX_PREEMPT_TIMER RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
531	#define VMCPU_FF_VMX_PREEMPT_TIMER_BIT 31
532	/** Pending MTF (Monitor Trap Flag) event. */
533	#define VMCPU_FF_VMX_MTF RT_BIT_64(VMCPU_FF_VMX_MTF_BIT)
534	#define VMCPU_FF_VMX_MTF_BIT 32
535	/** VMX APIC-write emulation pending. */
536	#define VMCPU_FF_VMX_APIC_WRITE RT_BIT_64(VMCPU_FF_VMX_APIC_WRITE_BIT)
537	#define VMCPU_FF_VMX_APIC_WRITE_BIT 33
538	/** VMX interrupt-window event pending. */
539	#define VMCPU_FF_VMX_INT_WINDOW RT_BIT_64(VMCPU_FF_VMX_INT_WINDOW_BIT)
540	#define VMCPU_FF_VMX_INT_WINDOW_BIT 34
541	/** VMX NMI-window event pending. */
542	#define VMCPU_FF_VMX_NMI_WINDOW RT_BIT_64(VMCPU_FF_VMX_NMI_WINDOW_BIT)
543	#define VMCPU_FF_VMX_NMI_WINDOW_BIT 35
544
545
546	/** Externally VM forced actions. Used to quit the idle/wait loop. */
547	#define VM_FF_EXTERNAL_SUSPENDED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \| VM_FF_EMT_RENDEZVOUS )
548	/** Externally VMCPU forced actions. Used to quit the idle/wait loop. */
549	#define VMCPU_FF_EXTERNAL_SUSPENDED_MASK ( VMCPU_FF_REQUEST \| VMCPU_FF_DBGF )
550
551	/** Externally forced VM actions. Used to quit the idle/wait loop. */
552	#define VM_FF_EXTERNAL_HALTED_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_REQUEST \
553	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS )
554	/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
555	#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
556	\| VMCPU_FF_REQUEST \| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \
557	\| VMCPU_FF_UNHALT \| VMCPU_FF_TIMER \| VMCPU_FF_DBGF \
558	\| VMCPU_FF_INTERRUPT_NESTED_GUEST)
559
560	/** High priority VM pre-execution actions. */
561	#define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_TM_VIRTUAL_SYNC \
562	\| VM_FF_DEBUG_SUSPEND \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
563	\| VM_FF_EMT_RENDEZVOUS )
564	/** High priority VMCPU pre-execution actions. */
565	#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER \| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_INTERRUPT_PIC \
566	\| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INHIBIT_INTERRUPTS \| VMCPU_FF_DBGF \
567	\| VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
568	\| VMCPU_FF_INTERRUPT_NESTED_GUEST \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
569	\| VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_NMI_WINDOW \| VMCPU_FF_VMX_INT_WINDOW )
570
571	/** High priority VM pre raw-mode execution mask. */
572	#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY )
573	/** High priority VMCPU pre raw-mode execution mask. */
574	#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
575	\| VMCPU_FF_INHIBIT_INTERRUPTS )
576
577	/** High priority post-execution actions. */
578	#define VM_FF_HIGH_PRIORITY_POST_MASK ( VM_FF_PGM_NO_MEMORY )
579	/** High priority post-execution actions. */
580	#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_HM_UPDATE_CR3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM )
581
582	/** Normal priority VM post-execution actions. */
583	#define VM_FF_NORMAL_PRIORITY_POST_MASK ( VM_FF_CHECK_VM_STATE \| VM_FF_DBGF \| VM_FF_RESET \
584	\| VM_FF_PGM_NO_MEMORY \| VM_FF_EMT_RENDEZVOUS)
585	/** Normal priority VMCPU post-execution actions. */
586	#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK ( VMCPU_FF_DBGF )
587
588	/** Normal priority VM actions. */
589	#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST \| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_EMT_RENDEZVOUS)
590	/** Normal priority VMCPU actions. */
591	#define VMCPU_FF_NORMAL_PRIORITY_MASK ( VMCPU_FF_REQUEST )
592
593	/** Flags to clear before resuming guest execution. */
594	#define VMCPU_FF_RESUME_GUEST_MASK ( VMCPU_FF_TO_R3 )
595
596
597	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
598	#define VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
599	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_RESET)
600	/** VM flags that cause the REP[\|NE\|E] STRINS loops to yield. */
601	#define VM_FF_YIELD_REPSTR_MASK ( VM_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
602	\| VM_FF_PDM_QUEUES \| VM_FF_PDM_DMA \| VM_FF_DBGF \| VM_FF_DEBUG_SUSPEND )
603	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield immediately. */
604	#ifdef IN_RING3
605	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \
606	\| VMCPU_FF_VMX_MTF )
607	#else
608	# define VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_IEM \| VMCPU_FF_IOM \| VMCPU_FF_PGM_SYNC_CR3 \
609	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_DBGF \| VMCPU_FF_VMX_MTF )
610	#endif
611	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
612	* enabled. */
613	#define VMCPU_FF_YIELD_REPSTR_MASK ( VMCPU_FF_HIGH_PRIORITY_POST_REPSTR_MASK \
614	\| VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
615	\| VMCPU_FF_INTERRUPT_NMI \| VMCPU_FF_INTERRUPT_SMI \| VMCPU_FF_PDM_CRITSECT \
616	\| VMCPU_FF_TIMER \| VMCPU_FF_REQUEST \
617	\| VMCPU_FF_INTERRUPT_NESTED_GUEST )
618	/** VMCPU flags that cause the REP[\|NE\|E] STRINS loops to yield, interrupts
619	* disabled. */
620	#define VMCPU_FF_YIELD_REPSTR_NOINT_MASK ( VMCPU_FF_YIELD_REPSTR_MASK \
621	& ~( VMCPU_FF_INTERRUPT_APIC \| VMCPU_FF_UPDATE_APIC \| VMCPU_FF_INTERRUPT_PIC \
622	\| VMCPU_FF_INTERRUPT_NESTED_GUEST) )
623
624	/** VM Flags that cause the HM loops to go back to ring-3. */
625	#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY \
626	\| VM_FF_PDM_QUEUES \| VM_FF_EMT_RENDEZVOUS)
627	/** VMCPU Flags that cause the HM loops to go back to ring-3. */
628	#define VMCPU_FF_HM_TO_R3_MASK ( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \| VMCPU_FF_PDM_CRITSECT \
629	\| VMCPU_FF_IEM \| VMCPU_FF_IOM)
630
631	/** High priority ring-0 VM pre HM-mode execution mask. */
632	#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK \| VM_FF_REQUEST \| VM_FF_PGM_POOL_FLUSH_PENDING \| VM_FF_PDM_DMA)
633	/** High priority ring-0 VMCPU pre HM-mode execution mask. */
634	#define VMCPU_FF_HP_R0_PRE_HM_MASK ( VMCPU_FF_HM_TO_R3_MASK \| VMCPU_FF_PGM_SYNC_CR3 \
635	\| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \| VMCPU_FF_REQUEST \
636	\| VMCPU_FF_VMX_APIC_WRITE \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_PREEMPT_TIMER)
637	/** High priority ring-0 VM pre HM-mode execution mask, single stepping. */
638	#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC \| VM_FF_PDM_QUEUES \
639	\| VM_FF_EMT_RENDEZVOUS \| VM_FF_REQUEST \
640	\| VM_FF_PDM_DMA) )
641	/** High priority ring-0 VMCPU pre HM-mode execution mask, single stepping. */
642	#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 \| VMCPU_FF_TIMER \
643	\| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_REQUEST) )
644
645	/** All the VMX nested-guest flags. */
646	#define VMCPU_FF_VMX_ALL_MASK ( VMCPU_FF_VMX_PREEMPT_TIMER \| VMCPU_FF_VMX_MTF \| VMCPU_FF_VMX_APIC_WRITE \
647	\| VMCPU_FF_VMX_INT_WINDOW \| VMCPU_FF_VMX_NMI_WINDOW )
648
649	/** All the forced VM flags. */
650	#define VM_FF_ALL_MASK (UINT32_MAX)
651	/** All the forced VMCPU flags. */
652	#define VMCPU_FF_ALL_MASK (UINT32_MAX)
653
654	/** All the forced VM flags except those related to raw-mode and hardware
655	* assisted execution. */
656	#define VM_FF_ALL_REM_MASK (~(VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) \| VM_FF_PGM_NEED_HANDY_PAGES \| VM_FF_PGM_NO_MEMORY)
657	/** All the forced VMCPU flags except those related to raw-mode and hardware
658	* assisted execution. */
659	#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK \| VMCPU_FF_PDM_CRITSECT \| VMCPU_FF_TLB_FLUSH))
660	/** @} */
661
662	/** @def VM_FF_SET
663	* Sets a single force action flag.
664	*
665	* @param pVM The cross context VM structure.
666	* @param fFlag The flag to set.
667	*/
668	#define VM_FF_SET(pVM, fFlag) do { \
669	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
670	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
671	ASMAtomicOrU32(&(pVM)->fGlobalForcedActions, (fFlag)); \
672	} while (0)
673
674	/** @def VMCPU_FF_SET
675	* Sets a single force action flag for the given VCPU.
676	*
677	* @param pVCpu The cross context virtual CPU structure.
678	* @param fFlag The flag to set.
679	* @sa VMCPU_FF_SET_MASK
680	*/
681	#ifdef VMCPU_WITH_64_BIT_FFS
682	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
683	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
684	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
685	ASMAtomicBitSet(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
686	} while (0)
687	#else
688	# define VMCPU_FF_SET(pVCpu, fFlag) do { \
689	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
690	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
691	ASMAtomicOrU32(&(pVCpu)->fLocalForcedActions, (fFlag)); \
692	} while (0)
693	#endif
694
695	/** @def VMCPU_FF_SET_MASK
696	* Sets a two or more force action flag for the given VCPU.
697	*
698	* @param pVCpu The cross context virtual CPU structure.
699	* @param fFlags The flags to set.
700	* @sa VMCPU_FF_SET
701	*/
702	#ifdef VMCPU_WITH_64_BIT_FFS
703	# if ARCH_BITS > 32
704	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
705	do { ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
706	# else
707	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) do { \
708	if (!((fFlags) >> 32)) ASMAtomicOrU32((uint32_t volatile *)&pVCpu->fLocalForcedActions, (uint32_t)(fFlags)); \
709	else ASMAtomicOrU64(&pVCpu->fLocalForcedActions, (fFlags)); \
710	} while (0)
711	# endif
712	#else
713	# define VMCPU_FF_SET_MASK(pVCpu, fFlags) \
714	do { ASMAtomicOrU32(&pVCpu->fLocalForcedActions, (fFlags)); } while (0)
715	#endif
716
717	/** @def VM_FF_CLEAR
718	* Clears a single force action flag.
719	*
720	* @param pVM The cross context VM structure.
721	* @param fFlag The flag to clear.
722	*/
723	#define VM_FF_CLEAR(pVM, fFlag) do { \
724	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
725	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
726	ASMAtomicAndU32(&(pVM)->fGlobalForcedActions, ~(fFlag)); \
727	} while (0)
728
729	/** @def VMCPU_FF_CLEAR
730	* Clears a single force action flag for the given VCPU.
731	*
732	* @param pVCpu The cross context virtual CPU structure.
733	* @param fFlag The flag to clear.
734	*/
735	#ifdef VMCPU_WITH_64_BIT_FFS
736	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
737	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
738	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
739	ASMAtomicBitClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT); \
740	} while (0)
741	#else
742	# define VMCPU_FF_CLEAR(pVCpu, fFlag) do { \
743	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
744	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
745	ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlag)); \
746	} while (0)
747	#endif
748
749	/** @def VMCPU_FF_CLEAR_MASK
750	* Clears two or more force action flags for the given VCPU.
751	*
752	* @param pVCpu The cross context virtual CPU structure.
753	* @param fFlags The flags to clear.
754	*/
755	#ifdef VMCPU_WITH_64_BIT_FFS
756	# if ARCH_BITS > 32
757	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
758	do { ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
759	# else
760	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) do { \
761	if (!((fFlags) >> 32)) ASMAtomicAndU32((uint32_t volatile *)&(pVCpu)->fLocalForcedActions, ~(uint32_t)(fFlags)); \
762	else ASMAtomicAndU64(&(pVCpu)->fLocalForcedActions, ~(fFlags)); \
763	} while (0)
764	# endif
765	#else
766	# define VMCPU_FF_CLEAR_MASK(pVCpu, fFlags) \
767	do { ASMAtomicAndU32(&(pVCpu)->fLocalForcedActions, ~(fFlags)); } while (0)
768	#endif
769
770	/** @def VM_FF_IS_SET
771	* Checks if single a force action flag is set.
772	*
773	* @param pVM The cross context VM structure.
774	* @param fFlag The flag to check.
775	* @sa VM_FF_IS_ANY_SET
776	*/
777	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
778	# define VM_FF_IS_SET(pVM, fFlag) RT_BOOL((pVM)->fGlobalForcedActions & (fFlag))
779	#else
780	# define VM_FF_IS_SET(pVM, fFlag) \
781	([](PVM a_pVM) -> bool \
782	{ \
783	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
784	AssertCompile((fFlag) == RT_BIT_32(fFlag##_BIT)); \
785	return RT_BOOL(a_pVM->fGlobalForcedActions & (fFlag)); \
786	}(pVM))
787	#endif
788
789	/** @def VMCPU_FF_IS_SET
790	* Checks if a single force action flag is set for the given VCPU.
791	*
792	* @param pVCpu The cross context virtual CPU structure.
793	* @param fFlag The flag to check.
794	* @sa VMCPU_FF_IS_ANY_SET
795	*/
796	#if !defined(VBOX_STRICT) \|\| !defined(RT_COMPILER_SUPPORTS_LAMBDA)
797	# define VMCPU_FF_IS_SET(pVCpu, fFlag) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlag))
798	#else
799	# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
800	([](PCVMCPU a_pVCpu) -> bool \
801	{ \
802	AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
803	AssertCompile((fFlag) == RT_BIT_64(fFlag##_BIT)); \
804	return RT_BOOL(a_pVCpu->fLocalForcedActions & (fFlag)); \
805	}(pVCpu))
806	#endif
807
808	/** @def VM_FF_IS_ANY_SET
809	* Checks if one or more force action in the specified set is pending.
810	*
811	* @param pVM The cross context VM structure.
812	* @param fFlags The flags to check for.
813	* @sa VM_FF_IS_SET
814	*/
815	#define VM_FF_IS_ANY_SET(pVM, fFlags) RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
816
817	/** @def VMCPU_FF_IS_ANY_SET
818	* Checks if two or more force action flags in the specified set is set for the given VCPU.
819	*
820	* @param pVCpu The cross context virtual CPU structure.
821	* @param fFlags The flags to check for.
822	* @sa VMCPU_FF_IS_SET
823	*/
824	#define VMCPU_FF_IS_ANY_SET(pVCpu, fFlags) RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
825
826	/** @def VM_FF_TEST_AND_CLEAR
827	* Checks if one (!) force action in the specified set is pending and clears it atomically
828	*
829	* @returns true if the bit was set.
830	* @returns false if the bit was clear.
831	* @param pVM The cross context VM structure.
832	* @param fFlag Flag constant to check and clear (_BIT is appended).
833	*/
834	#define VM_FF_TEST_AND_CLEAR(pVM, fFlag) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, fFlag##_BIT))
835
836	/** @def VMCPU_FF_TEST_AND_CLEAR
837	* Checks if one (!) force action in the specified set is pending and clears it atomically
838	*
839	* @returns true if the bit was set.
840	* @returns false if the bit was clear.
841	* @param pVCpu The cross context virtual CPU structure.
842	* @param fFlag Flag constant to check and clear (_BIT is appended).
843	*/
844	#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, fFlag) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, fFlag##_BIT))
845
846	/** @def VM_FF_IS_PENDING_EXCEPT
847	* Checks if one or more force action in the specified set is pending while one
848	* or more other ones are not.
849	*
850	* @param pVM The cross context VM structure.
851	* @param fFlags The flags to check for.
852	* @param fExcpt The flags that should not be set.
853	*/
854	#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) \
855	( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
856
857	/** @def VM_IS_EMT
858	* Checks if the current thread is the emulation thread (EMT).
859	*
860	* @remark The ring-0 variation will need attention if we expand the ring-0
861	* code to let threads other than EMT mess around with the VM.
862	*/
863	#ifdef IN_RC
864	# define VM_IS_EMT(pVM) true
865	#else
866	# define VM_IS_EMT(pVM) (VMMGetCpu(pVM) != NULL)
867	#endif
868
869	/** @def VMCPU_IS_EMT
870	* Checks if the current thread is the emulation thread (EMT) for the specified
871	* virtual CPU.
872	*/
873	#ifdef IN_RC
874	# define VMCPU_IS_EMT(pVCpu) true
875	#else
876	# define VMCPU_IS_EMT(pVCpu) ((pVCpu) && ((pVCpu) == VMMGetCpu((pVCpu)->CTX_SUFF(pVM))))
877	#endif
878
879	/** @def VM_ASSERT_EMT
880	* Asserts that the current thread IS the emulation thread (EMT).
881	*/
882	#ifdef IN_RC
883	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
884	#elif defined(IN_RING0)
885	# define VM_ASSERT_EMT(pVM) Assert(VM_IS_EMT(pVM))
886	#else
887	# define VM_ASSERT_EMT(pVM) \
888	AssertMsg(VM_IS_EMT(pVM), \
889	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
890	#endif
891
892	/** @def VMCPU_ASSERT_EMT
893	* Asserts that the current thread IS the emulation thread (EMT) of the
894	* specified virtual CPU.
895	*/
896	#ifdef IN_RC
897	# define VMCPU_ASSERT_EMT(pVCpu) Assert(VMCPU_IS_EMT(pVCpu))
898	#elif defined(IN_RING0)
899	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
900	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%u\n", \
901	RTThreadNativeSelf(), (pVCpu) ? (pVCpu)->hNativeThreadR0 : 0, \
902	(pVCpu) ? (pVCpu)->idCpu : 0))
903	#else
904	# define VMCPU_ASSERT_EMT(pVCpu) AssertMsg(VMCPU_IS_EMT(pVCpu), \
905	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
906	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
907	#endif
908
909	/** @def VM_ASSERT_EMT_RETURN
910	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
911	*/
912	#ifdef IN_RC
913	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
914	#elif defined(IN_RING0)
915	# define VM_ASSERT_EMT_RETURN(pVM, rc) AssertReturn(VM_IS_EMT(pVM), (rc))
916	#else
917	# define VM_ASSERT_EMT_RETURN(pVM, rc) \
918	AssertMsgReturn(VM_IS_EMT(pVM), \
919	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
920	(rc))
921	#endif
922
923	/** @def VMCPU_ASSERT_EMT_RETURN
924	* Asserts that the current thread IS the emulation thread (EMT) and returns if it isn't.
925	*/
926	#ifdef IN_RC
927	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
928	#elif defined(IN_RING0)
929	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) AssertReturn(VMCPU_IS_EMT(pVCpu), (rc))
930	#else
931	# define VMCPU_ASSERT_EMT_RETURN(pVCpu, rc) \
932	AssertMsgReturn(VMCPU_IS_EMT(pVCpu), \
933	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
934	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu), \
935	(rc))
936	#endif
937
938	/** @def VMCPU_ASSERT_EMT_OR_GURU
939	* Asserts that the current thread IS the emulation thread (EMT) of the
940	* specified virtual CPU.
941	*/
942	#if defined(IN_RC) \|\| defined(IN_RING0)
943	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) Assert( VMCPU_IS_EMT(pVCpu) \
944	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
945	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS )
946	#else
947	# define VMCPU_ASSERT_EMT_OR_GURU(pVCpu) \
948	AssertMsg( VMCPU_IS_EMT(pVCpu) \
949	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION \
950	\|\| pVCpu->CTX_SUFF(pVM)->enmVMState == VMSTATE_GURU_MEDITATION_LS, \
951	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
952	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
953	#endif
954
955	/** @def VMCPU_ASSERT_EMT_OR_NOT_RUNNING
956	* Asserts that the current thread IS the emulation thread (EMT) of the
957	* specified virtual CPU or the VM is not running.
958	*/
959	#if defined(IN_RC) \|\| defined(IN_RING0)
960	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
961	Assert( VMCPU_IS_EMT(pVCpu) \
962	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)) )
963	#else
964	# define VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu) \
965	AssertMsg( VMCPU_IS_EMT(pVCpu) \
966	\|\| !VM_IS_RUNNING_FOR_ASSERTIONS_ONLY((pVCpu)->CTX_SUFF(pVM)), \
967	("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd idCpu=%#x\n", \
968	RTThreadNativeSelf(), (pVCpu)->hNativeThread, (pVCpu)->idCpu))
969	#endif
970
971	/** @def VMSTATE_IS_RUNNING
972	* Checks if the given state indicates a running VM.
973	*/
974	#define VMSTATE_IS_RUNNING(a_enmVMState) \
975	( (enmVMState) == VMSTATE_RUNNING \
976	\|\| (enmVMState) == VMSTATE_RUNNING_LS )
977
978	/** @def VM_IS_RUNNING_FOR_ASSERTIONS_ONLY
979	* Checks if the VM is running.
980	* @note This is only for pure debug assertions. No AssertReturn or similar!
981	* @sa VMSTATE_IS_RUNNING
982	*/
983	#define VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM) \
984	( (pVM)->enmVMState == VMSTATE_RUNNING \
985	\|\| (pVM)->enmVMState == VMSTATE_RUNNING_LS )
986
987	/** @def VM_ASSERT_IS_NOT_RUNNING
988	* Asserts that the VM is not running.
989	*/
990	#if defined(IN_RC) \|\| defined(IN_RING0)
991	#define VM_ASSERT_IS_NOT_RUNNING(pVM) Assert(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM))
992	#else
993	#define VM_ASSERT_IS_NOT_RUNNING(pVM) AssertMsg(!VM_IS_RUNNING_FOR_ASSERTIONS_ONLY(pVM), \
994	("VM is running. enmVMState=%d\n", (pVM)->enmVMState))
995	#endif
996
997	/** @def VM_ASSERT_EMT0
998	* Asserts that the current thread IS emulation thread \#0 (EMT0).
999	*/
1000	#ifdef IN_RING3
1001	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT((a_pVM)->apCpusR3[0])
1002	#else
1003	# define VM_ASSERT_EMT0(a_pVM) VMCPU_ASSERT_EMT(&(a_pVM)->aCpus[0])
1004	#endif
1005
1006	/** @def VM_ASSERT_EMT0_RETURN
1007	* Asserts that the current thread IS emulation thread \#0 (EMT0) and returns if
1008	* it isn't.
1009	*/
1010	#ifdef IN_RING3
1011	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN((pVM)->apCpusR3[0], (rc))
1012	#else
1013	# define VM_ASSERT_EMT0_RETURN(pVM, rc) VMCPU_ASSERT_EMT_RETURN(&(pVM)->aCpus[0], (rc))
1014	#endif
1015
1016
1017	/**
1018	* Asserts that the current thread is NOT the emulation thread.
1019	*/
1020	#define VM_ASSERT_OTHER_THREAD(pVM) \
1021	AssertMsg(!VM_IS_EMT(pVM), ("Not other thread!!\n"))
1022
1023
1024	/** @def VM_ASSERT_STATE
1025	* Asserts a certain VM state.
1026	*/
1027	#define VM_ASSERT_STATE(pVM, _enmState) \
1028	AssertMsg((pVM)->enmVMState == (_enmState), \
1029	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)))
1030
1031	/** @def VM_ASSERT_STATE_RETURN
1032	* Asserts a certain VM state and returns if it doesn't match.
1033	*/
1034	#define VM_ASSERT_STATE_RETURN(pVM, _enmState, rc) \
1035	AssertMsgReturn((pVM)->enmVMState == (_enmState), \
1036	("state %s, expected %s\n", VMGetStateName((pVM)->enmVMState), VMGetStateName(_enmState)), \
1037	(rc))
1038
1039	/** @def VM_IS_VALID_EXT
1040	* Asserts a the VM handle is valid for external access, i.e. not being destroy
1041	* or terminated. */
1042	#define VM_IS_VALID_EXT(pVM) \
1043	( RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1044	&& ( (unsigned)(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING \
1045	\|\| ( (unsigned)(pVM)->enmVMState == (unsigned)VMSTATE_DESTROYING \
1046	&& VM_IS_EMT(pVM))) )
1047
1048	/** @def VM_ASSERT_VALID_EXT_RETURN
1049	* Asserts a the VM handle is valid for external access, i.e. not being
1050	* destroy or terminated.
1051	*/
1052	#define VM_ASSERT_VALID_EXT_RETURN(pVM, rc) \
1053	AssertMsgReturn(VM_IS_VALID_EXT(pVM), \
1054	("pVM=%p state %s\n", (pVM), RT_VALID_ALIGNED_PTR(pVM, PAGE_SIZE) \
1055	? VMGetStateName(pVM->enmVMState) : ""), \
1056	(rc))
1057
1058	/** @def VMCPU_ASSERT_VALID_EXT_RETURN
1059	* Asserts a the VMCPU handle is valid for external access, i.e. not being
1060	* destroy or terminated.
1061	*/
1062	#define VMCPU_ASSERT_VALID_EXT_RETURN(pVCpu, rc) \
1063	AssertMsgReturn( RT_VALID_ALIGNED_PTR(pVCpu, 64) \
1064	&& RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1065	&& (unsigned)(pVCpu)->CTX_SUFF(pVM)->enmVMState < (unsigned)VMSTATE_DESTROYING, \
1066	("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
1067	RT_VALID_ALIGNED_PTR(pVCpu, 64) && RT_VALID_ALIGNED_PTR((pVCpu)->CTX_SUFF(pVM), PAGE_SIZE) \
1068	? VMGetStateName((pVCpu)->pVMR3->enmVMState) : ""), \
1069	(rc))
1070
1071	#endif /* !VBOX_FOR_DTRACE_LIB */
1072
1073
1074	/**
1075	* Helper that HM and NEM uses for safely modifying VM::bMainExecutionEngine.
1076	*
1077	* ONLY HM and NEM MAY USE THIS!
1078	*
1079	* @param a_pVM The cross context VM structure.
1080	* @param a_bValue The new value.
1081	* @internal
1082	*/
1083	#define VM_SET_MAIN_EXECUTION_ENGINE(a_pVM, a_bValue) \
1084	do { \
1085	const_cast<uint8_t >(&(a_pVM)->bMainExecutionEngine) = (a_bValue); \
1086	ASMCompilerBarrier(); /* just to be on the safe side */ \
1087	} while (0)
1088
1089	/**
1090	* Checks whether raw-mode is used.
1091	*
1092	* @retval true if either is used.
1093	* @retval false if software virtualization (raw-mode) is used.
1094	*
1095	* @param a_pVM The cross context VM structure.
1096	* @sa VM_IS_HM_OR_NEM_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1097	* @internal
1098	*/
1099	#ifdef VBOX_WITH_RAW_MODE
1100	# define VM_IS_RAW_MODE_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE)
1101	#else
1102	# define VM_IS_RAW_MODE_ENABLED(a_pVM) (false)
1103	#endif
1104
1105	/**
1106	* Checks whether HM (VT-x/AMD-V) or NEM is being used by this VM.
1107	*
1108	* @retval true if either is used.
1109	* @retval false if software virtualization (raw-mode) is used.
1110	*
1111	* @param a_pVM The cross context VM structure.
1112	* @sa VM_IS_RAW_MODE_ENABLED, VM_IS_HM_ENABLED, VM_IS_NEM_ENABLED.
1113	* @internal
1114	*/
1115	#define VM_IS_HM_OR_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE)
1116
1117	/**
1118	* Checks whether HM is being used by this VM.
1119	*
1120	* @retval true if HM (VT-x/AMD-v) is used.
1121	* @retval false if not.
1122	*
1123	* @param a_pVM The cross context VM structure.
1124	* @sa VM_IS_NEM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1125	* @internal
1126	*/
1127	#define VM_IS_HM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT)
1128
1129	/**
1130	* Checks whether NEM is being used by this VM.
1131	*
1132	* @retval true if a native hypervisor API is used.
1133	* @retval false if not.
1134	*
1135	* @param a_pVM The cross context VM structure.
1136	* @sa VM_IS_HM_ENABLED, VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED.
1137	* @internal
1138	*/
1139	#define VM_IS_NEM_ENABLED(a_pVM) ((a_pVM)->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
1140
1141
1142	/**
1143	* The cross context VM structure.
1144	*
1145	* It contains all the VM data which have to be available in all contexts.
1146	* Even if it contains all the data the idea is to use APIs not to modify all
1147	* the members all around the place. Therefore we make use of unions to hide
1148	* everything which isn't local to the current source module. This means we'll
1149	* have to pay a little bit of attention when adding new members to structures
1150	* in the unions and make sure to keep the padding sizes up to date.
1151	*
1152	* Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
1153	*/
1154	typedef struct VM
1155	{
1156	/** The state of the VM.
1157	* This field is read only to everyone except the VM and EM. */
1158	VMSTATE volatile enmVMState;
1159	/** Forced action flags.
1160	* See the VM_FF_* \#defines. Updated atomically.
1161	*/
1162	volatile uint32_t fGlobalForcedActions;
1163	/** Pointer to the array of page descriptors for the VM structure allocation. */
1164	R3PTRTYPE(PSUPPAGE) paVMPagesR3;
1165	/** Session handle. For use when calling SUPR0 APIs. */
1166	#ifdef IN_RING0
1167	PSUPDRVSESSION pSessionUnsafe;
1168	#else
1169	PSUPDRVSESSION pSession;
1170	#endif
1171	/** Pointer to the ring-3 VM structure. */
1172	PUVM pUVM;
1173	/** Ring-3 Host Context VM Pointer. */
1174	#ifdef IN_RING0
1175	R3PTRTYPE(struct VM *) pVMR3Unsafe;
1176	#else
1177	R3PTRTYPE(struct VM *) pVMR3;
1178	#endif
1179	/** Ring-0 Host Context VM pointer for making ring-0 calls. */
1180	R0PTRTYPE(struct VM *) pVMR0ForCall;
1181	/** Raw-mode Context VM Pointer. */
1182	uint32_t pVMRC;
1183	/** Padding for new raw-mode (long mode). */
1184	uint32_t pVMRCPadding;
1185
1186	/** The GVM VM handle. Only the GVM should modify this field. */
1187	#ifdef IN_RING0
1188	uint32_t hSelfUnsafe;
1189	#else
1190	uint32_t hSelf;
1191	#endif
1192	/** Number of virtual CPUs. */
1193	#ifdef IN_RING0
1194	uint32_t cCpusUnsafe;
1195	#else
1196	uint32_t cCpus;
1197	#endif
1198	/** CPU excution cap (1-100) */
1199	uint32_t uCpuExecutionCap;
1200
1201	/** Size of the VM structure. */
1202	uint32_t cbSelf;
1203	/** Size of the VMCPU structure. */
1204	uint32_t cbVCpu;
1205	/** Structure version number (TBD). */
1206	uint32_t uStructVersion;
1207
1208	/** @name Various items that are frequently accessed.
1209	* @{ */
1210	/** The main execution engine, VM_EXEC_ENGINE_XXX.
1211	* This is set early during vmR3InitRing3 by HM or NEM. */
1212	uint8_t const bMainExecutionEngine;
1213
1214	/** Hardware VM support is available and enabled.
1215	* Determined very early during init.
1216	* This is placed here for performance reasons.
1217	* @todo obsoleted by bMainExecutionEngine, eliminate. */
1218	bool fHMEnabled;
1219	/** @} */
1220
1221	/** Alignment padding. */
1222	uint8_t uPadding1[6];
1223
1224	/** @name Debugging
1225	* @{ */
1226	/** Ring-3 Host Context VM Pointer. */
1227	R3PTRTYPE(RTTRACEBUF) hTraceBufR3;
1228	/** Ring-0 Host Context VM Pointer. */
1229	R0PTRTYPE(RTTRACEBUF) hTraceBufR0;
1230	/** @} */
1231
1232	/** Max EMT hash lookup collisions (in GVMM). */
1233	uint8_t cMaxEmtHashCollisions;
1234
1235	/** Padding - the unions must be aligned on a 64 bytes boundary. */
1236	uint8_t abAlignment3[HC_ARCH_BITS == 64 ? 23 : 51];
1237
1238	/** CPUM part. */
1239	union
1240	{
1241	#ifdef VMM_INCLUDED_SRC_include_CPUMInternal_h
1242	struct CPUM s;
1243	#endif
1244	#ifdef VBOX_INCLUDED_vmm_cpum_h
1245	/** Read only info exposed about the host and guest CPUs. */
1246	struct
1247	{
1248	/** Padding for hidden fields. */
1249	uint8_t abHidden0[64];
1250	/** Host CPU feature information. */
1251	CPUMFEATURES HostFeatures;
1252	/** Guest CPU feature information. */
1253	CPUMFEATURES GuestFeatures;
1254	} const ro;
1255	#endif
1256	/** @todo this is rather bloated because of static MSR range allocation.
1257	* Probably a good idea to move it to a separate R0 allocation... */
1258	uint8_t padding[8832 + 1288192]; / multiple of 64 */
1259	} cpum;
1260
1261	/** VMM part. */
1262	union
1263	{
1264	#ifdef VMM_INCLUDED_SRC_include_VMMInternal_h
1265	struct VMM s;
1266	#endif
1267	uint8_t padding[1600]; /* multiple of 64 */
1268	} vmm;
1269
1270	/** PGM part. */
1271	union
1272	{
1273	#ifdef VMM_INCLUDED_SRC_include_PGMInternal_h
1274	struct PGM s;
1275	#endif
1276	uint8_t padding[21120]; /* multiple of 64 */
1277	} pgm;
1278
1279	/** HM part. */
1280	union
1281	{
1282	#ifdef VMM_INCLUDED_SRC_include_HMInternal_h
1283	struct HM s;
1284	#endif
1285	uint8_t padding[5504]; /* multiple of 64 */
1286	} hm;
1287
1288	/** TRPM part. */
1289	union
1290	{
1291	#ifdef VMM_INCLUDED_SRC_include_TRPMInternal_h
1292	struct TRPM s;
1293	#endif
1294	uint8_t padding[2048]; /* multiple of 64 */
1295	} trpm;
1296
1297	/** SELM part. */
1298	union
1299	{
1300	#ifdef VMM_INCLUDED_SRC_include_SELMInternal_h
1301	struct SELM s;
1302	#endif
1303	uint8_t padding[768]; /* multiple of 64 */
1304	} selm;
1305
1306	/** MM part. */
1307	union
1308	{
1309	#ifdef VMM_INCLUDED_SRC_include_MMInternal_h
1310	struct MM s;
1311	#endif
1312	uint8_t padding[192]; /* multiple of 64 */
1313	} mm;
1314
1315	/** PDM part. */
1316	union
1317	{
1318	#ifdef VMM_INCLUDED_SRC_include_PDMInternal_h
1319	struct PDM s;
1320	#endif
1321	uint8_t padding[8320]; /* multiple of 64 */
1322	} pdm;
1323
1324	/** IOM part. */
1325	union
1326	{
1327	#ifdef VMM_INCLUDED_SRC_include_IOMInternal_h
1328	struct IOM s;
1329	#endif
1330	uint8_t padding[1152]; /* multiple of 64 */
1331	} iom;
1332
1333	/** EM part. */
1334	union
1335	{
1336	#ifdef VMM_INCLUDED_SRC_include_EMInternal_h
1337	struct EM s;
1338	#endif
1339	uint8_t padding[256]; /* multiple of 64 */
1340	} em;
1341
1342	/** NEM part. */
1343	union
1344	{
1345	#ifdef VMM_INCLUDED_SRC_include_NEMInternal_h
1346	struct NEM s;
1347	#endif
1348	uint8_t padding[256]; /* multiple of 64 */
1349	} nem;
1350
1351	/** TM part. */
1352	union
1353	{
1354	#ifdef VMM_INCLUDED_SRC_include_TMInternal_h
1355	struct TM s;
1356	#endif
1357	uint8_t padding[10112]; /* multiple of 64 */
1358	} tm;
1359
1360	/** DBGF part. */
1361	union
1362	{
1363	#ifdef VMM_INCLUDED_SRC_include_DBGFInternal_h
1364	struct DBGF s;
1365	#endif
1366	#ifdef VBOX_INCLUDED_vmm_dbgf_h
1367	/** Read only info exposed about interrupt breakpoints and selected events. */
1368	struct
1369	{
1370	/** Bitmap of enabled hardware interrupt breakpoints. */
1371	uint32_t bmHardIntBreakpoints[256 / 32];
1372	/** Bitmap of enabled software interrupt breakpoints. */
1373	uint32_t bmSoftIntBreakpoints[256 / 32];
1374	/** Bitmap of selected events.
1375	* This includes non-selectable events too for simplicity, we maintain the
1376	* state for some of these, as it may come in handy. */
1377	uint64_t bmSelectedEvents[(DBGFEVENT_END + 63) / 64];
1378	/** Enabled hardware interrupt breakpoints. */
1379	uint32_t cHardIntBreakpoints;
1380	/** Enabled software interrupt breakpoints. */
1381	uint32_t cSoftIntBreakpoints;
1382	/** The number of selected events. */
1383	uint32_t cSelectedEvents;
1384	/** The number of enabled hardware breakpoints. */
1385	uint8_t cEnabledHwBreakpoints;
1386	/** The number of enabled hardware I/O breakpoints. */
1387	uint8_t cEnabledHwIoBreakpoints;
1388	uint8_t au8Alignment1[2]; /*< Alignment padding. /
1389	/** The number of enabled INT3 breakpoints. */
1390	uint32_t volatile cEnabledInt3Breakpoints;
1391	} const ro;
1392	#endif
1393	uint8_t padding[2432]; /* multiple of 64 */
1394	} dbgf;
1395
1396	/** SSM part. */
1397	union
1398	{
1399	#ifdef VMM_INCLUDED_SRC_include_SSMInternal_h
1400	struct SSM s;
1401	#endif
1402	uint8_t padding[128]; /* multiple of 64 */
1403	} ssm;
1404
1405	union
1406	{
1407	#ifdef VMM_INCLUDED_SRC_include_GIMInternal_h
1408	struct GIM s;
1409	#endif
1410	uint8_t padding[448]; /* multiple of 64 */
1411	} gim;
1412
1413	union
1414	{
1415	#ifdef VMM_INCLUDED_SRC_include_APICInternal_h
1416	struct APIC s;
1417	#endif
1418	uint8_t padding[128]; /* multiple of 8 */
1419	} apic;
1420
1421	/* ---- begin small stuff ---- */
1422
1423	/** VM part. */
1424	union
1425	{
1426	#ifdef VMM_INCLUDED_SRC_include_VMInternal_h
1427	struct VMINT s;
1428	#endif
1429	uint8_t padding[32]; /* multiple of 8 */
1430	} vm;
1431
1432	/** CFGM part. */
1433	union
1434	{
1435	#ifdef VMM_INCLUDED_SRC_include_CFGMInternal_h
1436	struct CFGM s;
1437	#endif
1438	uint8_t padding[8]; /* multiple of 8 */
1439	} cfgm;
1440
1441	/** Statistics for ring-0 only components. */
1442	struct
1443	{
1444	/** GMMR0 stats. */
1445	struct
1446	{
1447	/** Chunk TLB hits. */
1448	uint64_t cChunkTlbHits;
1449	/** Chunk TLB misses. */
1450	uint64_t cChunkTlbMisses;
1451	} gmm;
1452	uint64_t au64Padding[6]; /* probably more comming here... */
1453	} R0Stats;
1454
1455	/** Padding for aligning the structure size on a page boundrary. */
1456	uint8_t abAlignment2[2008 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
1457
1458	/* ---- end small stuff ---- */
1459
1460	/** Array of VMCPU ring-3 pointers. */
1461	PVMCPUR3 apCpusR3[VMM_MAX_CPU_COUNT];
1462	} VM;
1463
1464
1465	#ifdef IN_RC
1466	RT_C_DECLS_BEGIN
1467
1468	/** The VM structure.
1469	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1470	* globals which we should avoid using.
1471	*/
1472	extern DECLIMPORT(VM) g_VM;
1473
1474	/** The VMCPU structure for virtual CPU \#0.
1475	* This is imported from the VMMRCBuiltin module, i.e. it's a one of those magic
1476	* globals which we should avoid using.
1477	*/
1478	extern DECLIMPORT(VMCPU) g_VCpu0;
1479
1480	RT_C_DECLS_END
1481	#endif
1482
1483	/** @} */
1484
1485	#endif /* !VBOX_INCLUDED_vmm_vm_h */
1486

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source: vbox/trunk/include/VBox/vmm/vm.h@ 92070

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