1 | /** @file
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2 | * IPRT - ARM Specific Assembly Functions.
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3 | */
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4 |
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5 | /*
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6 | * Copyright (C) 2015-2021 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | *
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16 | * The contents of this file may alternatively be used under the terms
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17 | * of the Common Development and Distribution License Version 1.0
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18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | * VirtualBox OSE distribution, in which case the provisions of the
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20 | * CDDL are applicable instead of those of the GPL.
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21 | *
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22 | * You may elect to license modified versions of this file under the
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23 | * terms and conditions of either the GPL or the CDDL or both.
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24 | */
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25 |
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26 | #ifndef IPRT_INCLUDED_asm_arm_h
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27 | #define IPRT_INCLUDED_asm_arm_h
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28 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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29 | # pragma once
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30 | #endif
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31 |
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32 | #include <iprt/types.h>
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33 | #if !defined(RT_ARCH_ARM64) && !defined(RT_ARCH_ARM32)
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34 | # error "Not on ARM64 or ARM32"
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35 | #endif
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36 |
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37 | /** @defgroup grp_rt_asm_arm ARM Specific ASM Routines
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38 | * @ingroup grp_rt_asm
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39 | * @{
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40 | */
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41 |
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42 |
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43 | #if 0 /* figure out arm64 */
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44 |
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45 | /**
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46 | * Get the CPSR (Current Program Status) register.
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47 | * @returns CPSR.
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48 | */
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49 | #if RT_INLINE_ASM_EXTERNAL
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50 | DECLASM(RTCCUINTREG) ASMGetFlags(void);
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51 | #else
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52 | DECLINLINE(RTCCUINTREG) ASMGetFlags(void)
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53 | {
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54 | RTCCUINTREG uFlags;
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55 | # if RT_INLINE_ASM_GNU_STYLE
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56 | # ifdef RT_ARCH_ARM64
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57 | __asm__ __volatile__("mrs %0, nzcv\n\t" : "=r" (uFlags));
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58 | # else
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59 | __asm__ __volatile__("mrs %0, cpsr\n\t" : "=r" (uFlags));
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60 | # endif
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61 | # else
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62 | # error "Unsupported compiler"
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63 | # endif
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64 | return uFlags;
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65 | }
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66 | #endif
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67 |
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68 |
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69 | /**
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70 | * Set the CPSR register.
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71 | * @param uFlags The new CPSR value.
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72 | */
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73 | #if RT_INLINE_ASM_EXTERNAL
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74 | DECLASM(void) ASMSetFlags(RTCCUINTREG uFlags);
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75 | #else
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76 | DECLINLINE(void) ASMSetFlags(RTCCUINTREG uFlags)
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77 | {
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78 | # if RT_INLINE_ASM_GNU_STYLE
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79 | __asm__ __volatile__("msr cpsr_c, %0\n\t"
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80 | : : "r" (uFlags));
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81 | # else
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82 | # error "Unsupported compiler"
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83 | # endif
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84 | }
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85 | #endif
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86 |
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87 | #endif
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88 |
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89 | #if 0
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90 | /**
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91 | * Gets the content of the CPU timestamp counter register.
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92 | *
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93 | * @returns TSC.
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94 | */
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95 | #if RT_INLINE_ASM_EXTERNAL
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96 | DECLASM(uint64_t) ASMReadTSC(void);
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97 | #else
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98 | DECLINLINE(uint64_t) ASMReadTSC(void)
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99 | {
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100 | RTUINT64U u;
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101 | # if RT_INLINE_ASM_GNU_STYLE
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102 | # else
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103 | # error "Unsupported compiler"
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104 | # endif
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105 | return u.u;
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106 | }
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107 | #endif
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108 | #endif
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109 |
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110 | #if 0 /* port to arm64, armv7 and check */
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111 |
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112 | /**
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113 | * Enables interrupts (IRQ and FIQ).
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114 | */
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115 | #if RT_INLINE_ASM_EXTERNAL
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116 | DECLASM(void) ASMIntEnable(void);
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117 | #else
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118 | DECLINLINE(void) ASMIntEnable(void)
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119 | {
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120 | RTCCUINTREG uFlags;
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121 | # if RT_INLINE_ASM_GNU_STYLE
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122 | __asm__ __volatile__("mrs %0, cpsr\n\t"
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123 | "bic %0, %0, #0xc0\n\t"
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124 | "msr cpsr_c, %0\n\t"
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125 | : "=r" (uFlags));
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126 | # else
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127 | # error "Unsupported compiler"
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128 | # endif
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129 | }
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130 | #endif
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131 |
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132 |
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133 | /**
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134 | * Disables interrupts (IRQ and FIQ).
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135 | */
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136 | #if RT_INLINE_ASM_EXTERNAL
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137 | DECLASM(void) ASMIntDisable(void);
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138 | #else
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139 | DECLINLINE(void) ASMIntDisable(void)
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140 | {
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141 | RTCCUINTREG uFlags;
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142 | # if RT_INLINE_ASM_GNU_STYLE
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143 | __asm__ __volatile__("mrs %0, cpsr\n\t"
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144 | "orr %0, %0, #0xc0\n\t"
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145 | "msr cpsr_c, %0\n\t"
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146 | : "=r" (uFlags));
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147 | # else
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148 | # error "Unsupported compiler"
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149 | # endif
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150 | }
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151 | #endif
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152 |
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153 |
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154 | /**
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155 | * Disables interrupts and returns previous uFLAGS.
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156 | */
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157 | #if RT_INLINE_ASM_EXTERNAL
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158 | DECLASM(RTCCUINTREG) ASMIntDisableFlags(void);
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159 | #else
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160 | DECLINLINE(RTCCUINTREG) ASMIntDisableFlags(void)
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161 | {
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162 | RTCCUINTREG uFlags;
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163 | # if RT_INLINE_ASM_GNU_STYLE
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164 | RTCCUINTREG uNewFlags;
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165 | __asm__ __volatile__("mrs %0, cpsr\n\t"
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166 | "orr %1, %0, #0xc0\n\t"
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167 | "msr cpsr_c, %1\n\t"
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168 | : "=r" (uFlags)
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169 | , "=r" (uNewFlags));
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170 | # else
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171 | # error "Unsupported compiler"
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172 | # endif
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173 | return uFlags;
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174 | }
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175 | #endif
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176 |
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177 |
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178 | /**
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179 | * Are interrupts enabled?
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180 | *
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181 | * @returns true / false.
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182 | */
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183 | DECLINLINE(bool) ASMIntAreEnabled(void)
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184 | {
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185 | /** @todo r=bird: reversed, but does both need to be enabled? */
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186 | return ASMGetFlags() & 0xc0 /* IRQ and FIQ bits */ ? true : false;
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187 | }
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188 |
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189 | #endif
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190 |
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191 | /**
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192 | * Halts the CPU until interrupted.
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193 | */
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194 | #if RT_INLINE_ASM_EXTERNAL
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195 | DECLASM(void) ASMHalt(void);
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196 | #else
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197 | DECLINLINE(void) ASMHalt(void)
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198 | {
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199 | # if RT_INLINE_ASM_GNU_STYLE
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200 | __asm__ __volatile__ ("wfi\n\t"); /* wait for interrupt */
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201 | # else
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202 | # error "Unsupported compiler"
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203 | # endif
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204 | }
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205 | #endif
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206 |
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207 | #if 0
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208 | /**
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209 | * Gets the CPU ID of the current CPU.
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210 | *
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211 | * @returns the CPU ID.
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212 | * @note the name of this method is a bit misleading but serves the purpose
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213 | * and prevents #ifdef orgies in other places.
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214 | */
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215 | #if RT_INLINE_ASM_EXTERNAL
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216 | DECLASM(uint8_t) ASMGetApicId(void);
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217 | #else
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218 | DECLINLINE(uint8_t) ASMGetApicId(void)
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219 | {
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220 | # if RT_INLINE_ASM_GNU_STYLE
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221 | RTCCUINTREG uCpuId;
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222 | __asm__ ("mrc p15, 0, %0, c0, c0, 5\n\t" /* CPU ID Register, privileged */
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223 | : "=r" (uCpuId));
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224 | return uCpuId;
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225 | # else
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226 | # error "Unsupported compiler"
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227 | # endif
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228 | }
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229 | #endif
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230 | #endif
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231 |
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232 | #if 0
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233 |
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234 | /**
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235 | * Invalidate page.
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236 | *
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237 | * @param pv Address of the page to invalidate.
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238 | */
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239 | #if RT_INLINE_ASM_EXTERNAL
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240 | DECLASM(void) ASMInvalidatePage(void *pv);
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241 | #else
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242 | DECLINLINE(void) ASMInvalidatePage(void *pv)
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243 | {
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244 | # if RT_INLINE_ASM_GNU_STYLE
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245 |
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246 | # else
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247 | # error "Unsupported compiler"
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248 | # endif
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249 | }
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250 | #endif
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251 |
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252 |
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253 | /**
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254 | * Write back the internal caches and invalidate them.
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255 | */
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256 | #if RT_INLINE_ASM_EXTERNAL
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257 | DECLASM(void) ASMWriteBackAndInvalidateCaches(void);
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258 | #else
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259 | DECLINLINE(void) ASMWriteBackAndInvalidateCaches(void)
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260 | {
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261 | # if RT_INLINE_ASM_GNU_STYLE
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262 |
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263 | # else
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264 | # error "Unsupported compiler"
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265 | # endif
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266 | }
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267 | #endif
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268 |
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269 |
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270 | /**
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271 | * Invalidate internal and (perhaps) external caches without first
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272 | * flushing dirty cache lines. Use with extreme care.
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273 | */
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274 | #if RT_INLINE_ASM_EXTERNAL
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275 | DECLASM(void) ASMInvalidateInternalCaches(void);
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276 | #else
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277 | DECLINLINE(void) ASMInvalidateInternalCaches(void)
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278 | {
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279 | # if RT_INLINE_ASM_GNU_STYLE
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280 |
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281 | # else
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282 | # error "Unsupported compiler"
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283 | # endif
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284 | }
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285 | #endif
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286 |
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287 | #endif
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288 |
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289 |
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290 | /** @} */
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291 | #endif /* !IPRT_INCLUDED_asm_arm_h */
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292 |
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