| 1 | /** @file
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| 2 | * innotek Portable Runtime / No-CRT - fenv.h, AMD64.
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| 3 | */
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| 4 |
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| 5 | /*
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| 6 | * Copyright (C) 2006-2007 innotek GmbH
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| 7 | *
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| 8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 9 | * available from http://www.virtualbox.org. This file is free software;
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| 10 | * you can redistribute it and/or modify it under the terms of the GNU
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| 11 | * General Public License as published by the Free Software Foundation,
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| 12 | * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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| 13 | * distribution. VirtualBox OSE is distributed in the hope that it will
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| 14 | * be useful, but WITHOUT ANY WARRANTY of any kind.
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| 15 | * --------------------------------------------------------------------
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| 16 | *
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| 17 | * This code is based on:
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| 18 | *
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| 19 | * Copyright (c) 2004-2005 David Schultz <[email protected]>
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| 20 | * All rights reserved.
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| 21 | *
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| 22 | * Redistribution and use in source and binary forms, with or without
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| 23 | * modification, are permitted provided that the following conditions
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| 24 | * are met:
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| 25 | * 1. Redistributions of source code must retain the above copyright
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| 26 | * notice, this list of conditions and the following disclaimer.
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| 27 | * 2. Redistributions in binary form must reproduce the above copyright
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| 28 | * notice, this list of conditions and the following disclaimer in the
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| 29 | * documentation and/or other materials provided with the distribution.
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| 30 | *
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| 31 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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| 32 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 33 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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| 34 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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| 35 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 36 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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| 37 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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| 38 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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| 39 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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| 40 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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| 41 | * SUCH DAMAGE.
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| 42 | */
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| 43 |
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| 44 | #ifndef ___iprt_nocrt_amd64_fenv_h
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| 45 | #define ___iprt_nocrt_amd64_fenv_h
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| 46 |
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| 47 | #include <iprt/types.h>
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| 48 |
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| 49 | typedef struct {
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| 50 | struct {
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| 51 | uint32_t __control;
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| 52 | uint32_t __status;
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| 53 | uint32_t __tag;
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| 54 | char __other[16];
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| 55 | } __x87;
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| 56 | uint32_t __mxcsr;
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| 57 | } fenv_t;
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| 58 |
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| 59 | typedef uint16_t fexcept_t;
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| 60 |
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| 61 | /* Exception flags */
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| 62 | #define FE_INVALID 0x01
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| 63 | #define FE_DENORMAL 0x02
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| 64 | #define FE_DIVBYZERO 0x04
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| 65 | #define FE_OVERFLOW 0x08
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| 66 | #define FE_UNDERFLOW 0x10
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| 67 | #define FE_INEXACT 0x20
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| 68 | #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
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| 69 | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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| 70 |
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| 71 | /* Rounding modes */
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| 72 | #define FE_TONEAREST 0x0000
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| 73 | #define FE_DOWNWARD 0x0400
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| 74 | #define FE_UPWARD 0x0800
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| 75 | #define FE_TOWARDZERO 0x0c00
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| 76 | #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
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| 77 | FE_UPWARD | FE_TOWARDZERO)
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| 78 |
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| 79 | /*
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| 80 | * As compared to the x87 control word, the SSE unit's control word
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| 81 | * has the rounding control bits offset by 3 and the exception mask
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| 82 | * bits offset by 7.
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| 83 | */
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| 84 | #define _SSE_ROUND_SHIFT 3
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| 85 | #define _SSE_EMASK_SHIFT 7
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| 86 |
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| 87 | __BEGIN_DECLS
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| 88 |
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| 89 | /* Default floating-point environment */
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| 90 | extern const fenv_t RT_NOCRT(__fe_dfl_env);
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| 91 | #define FE_DFL_ENV (&__fe_dfl_env)
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| 92 |
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| 93 | #define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
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| 94 | #define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
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| 95 | #define __fnclex() __asm __volatile("fnclex")
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| 96 | #define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
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| 97 | #define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
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| 98 | #define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw)))
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| 99 | #define __fwait() __asm __volatile("fwait")
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| 100 | #define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
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| 101 | #define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
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| 102 |
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| 103 | DECLINLINE(int)
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| 104 | feclearexcept(int __excepts)
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| 105 | {
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| 106 | fenv_t __env;
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| 107 |
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| 108 | if (__excepts == FE_ALL_EXCEPT) {
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| 109 | __fnclex();
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| 110 | } else {
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| 111 | __fnstenv(&__env.__x87);
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| 112 | __env.__x87.__status &= ~__excepts;
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| 113 | __fldenv(__env.__x87);
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| 114 | }
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| 115 | __stmxcsr(&__env.__mxcsr);
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| 116 | __env.__mxcsr &= ~__excepts;
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| 117 | __ldmxcsr(__env.__mxcsr);
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| 118 | return (0);
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| 119 | }
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| 120 |
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| 121 | DECLINLINE(int)
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| 122 | fegetexceptflag(fexcept_t *__flagp, int __excepts)
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| 123 | {
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| 124 | int __mxcsr, __status;
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| 125 |
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| 126 | __stmxcsr(&__mxcsr);
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| 127 | __fnstsw(&__status);
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| 128 | *__flagp = (__mxcsr | __status) & __excepts;
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| 129 | return (0);
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| 130 | }
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| 131 |
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| 132 | int RT_NOCRT(fesetexceptflag)(const fexcept_t *__flagp, int __excepts);
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| 133 | int RT_NOCRT(feraiseexcept)(int __excepts);
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| 134 |
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| 135 | DECLINLINE(int)
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| 136 | fetestexcept(int __excepts)
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| 137 | {
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| 138 | int __mxcsr, __status;
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| 139 |
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| 140 | __stmxcsr(&__mxcsr);
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| 141 | __fnstsw(&__status);
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| 142 | return ((__status | __mxcsr) & __excepts);
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| 143 | }
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| 144 |
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| 145 | DECLINLINE(int)
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| 146 | fegetround(void)
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| 147 | {
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| 148 | int __control;
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| 149 |
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| 150 | /*
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| 151 | * We assume that the x87 and the SSE unit agree on the
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| 152 | * rounding mode. Reading the control word on the x87 turns
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| 153 | * out to be about 5 times faster than reading it on the SSE
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| 154 | * unit on an Opteron 244.
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| 155 | */
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| 156 | __fnstcw(&__control);
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| 157 | return (__control & _ROUND_MASK);
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| 158 | }
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| 159 |
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| 160 | DECLINLINE(int)
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| 161 | fesetround(int __round)
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| 162 | {
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| 163 | int __mxcsr, __control;
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| 164 |
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| 165 | if (__round & ~_ROUND_MASK)
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| 166 | return (-1);
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| 167 |
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| 168 | __fnstcw(&__control);
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| 169 | __control &= ~_ROUND_MASK;
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| 170 | __control |= __round;
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| 171 | __fldcw(__control);
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| 172 |
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| 173 | __stmxcsr(&__mxcsr);
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| 174 | __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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| 175 | __mxcsr |= __round << _SSE_ROUND_SHIFT;
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| 176 | __ldmxcsr(__mxcsr);
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| 177 |
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| 178 | return (0);
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| 179 | }
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| 180 |
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| 181 | int RT_NOCRT(fegetenv)(fenv_t *__envp);
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| 182 | int RT_NOCRT(feholdexcept)(fenv_t *__envp);
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| 183 |
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| 184 | DECLINLINE(int)
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| 185 | fesetenv(const fenv_t *__envp)
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| 186 | {
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| 187 |
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| 188 | __fldenv(__envp->__x87);
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| 189 | __ldmxcsr(__envp->__mxcsr);
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| 190 | return (0);
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| 191 | }
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| 192 |
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| 193 | int RT_NOCRT(feupdateenv)(const fenv_t *__envp);
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| 194 | int RT_NOCRT(feenableexcept)(int __mask);
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| 195 | int RT_NOCRT(fedisableexcept)(int __mask);
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| 196 |
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| 197 | DECLINLINE(int)
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| 198 | fegetexcept(void)
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| 199 | {
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| 200 | int __control;
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| 201 |
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| 202 | /*
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| 203 | * We assume that the masks for the x87 and the SSE unit are
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| 204 | * the same.
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| 205 | */
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| 206 | __fnstcw(&__control);
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| 207 | return (~__control & FE_ALL_EXCEPT);
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| 208 | }
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| 209 |
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| 210 | __END_DECLS
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| 211 |
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| 212 | #ifndef RT_WITHOUT_NOCRT_WRAPPERS
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| 213 | # define fesetexceptflag RT_NOCRT(fesetexceptflag)
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| 214 | # define feraiseexcept RT_NOCRT(feraiseexcept)
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| 215 | # define fegetenv RT_NOCRT(fegetenv)
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| 216 | # define feholdexcept RT_NOCRT(feholdexcept)
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| 217 | # define feupdateenv RT_NOCRT(feupdateenv)
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| 218 | # define feenableexcept RT_NOCRT(feenableexcept)
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| 219 | # define fedisableexcept RT_NOCRT(fedisableexcept)
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| 220 | # define __fe_dfl_env RT_NOCRT(__fe_dfl_env)
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| 221 | #endif
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| 222 |
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| 223 | #endif /* !__iprt_nocrt_amd64_fenv_h__ */
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