VirtualBox

source: vbox/trunk/include/iprt/nt/hyperv.h@ 72262

Last change on this file since 72262 was 72262, checked in by vboxsync, 7 years ago

NEM/win: Intercept all (for now) CPUIDs. bugref:9044
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1/** @file
2 * Hyper-V related types and definitions.
3 */
4
5/*
6 * Copyright (C) 2018 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26
27#ifndef ___iprt_nt_hyperv_h
28#define ___iprt_nt_hyperv_h
29
30
31#ifndef IN_IDA_PRO
32# include <iprt/types.h>
33# include <iprt/assertcompile.h>
34#else
35# define RT_FLEXIBLE_ARRAY
36# define AssertCompile(expr)
37# define AssertCompileSize(type, size)
38# define AssertCompileMemberOffset(type, member, off)
39#endif
40
41
42/** Hyper-V partition ID. */
43typedef uint64_t HV_PARTITION_ID;
44/** Invalid Hyper-V partition ID. */
45#define HV_PARTITION_ID_INVALID UINT64_C(0)
46/** Hyper-V virtual processor index (== VMCPUID). */
47typedef uint32_t HV_VP_INDEX;
48/** Guest physical address (== RTGCPHYS). */
49typedef uint64_t HV_GPA;
50/** Guest physical page number. */
51typedef uint64_t HV_GPA_PAGE_NUMBER;
52/** System(/parent) physical page number. */
53typedef uint64_t HV_SPA_PAGE_NUMBER;
54/** Hyper-V unsigned 128-bit integer type. */
55typedef struct { uint64_t Low64, High64; } HV_UINT128;
56/** Hyper-V port ID. */
57typedef union
58{
59 uint32_t AsUINT32;
60 struct
61 {
62 uint32_t Id : 24;
63 uint32_t Reserved : 8;
64 };
65} HV_PORT_ID;
66/** Pointer to a Hyper-V port ID. */
67typedef HV_PORT_ID *PHV_PORT_ID;
68
69
70/**
71 * Hypercall IDs.
72 */
73typedef enum
74{
75 HvCallReserved0000 = 0,
76
77 HvCallSwitchVirtualAddressSpace,
78 HvCallFlushVirtualAddressSpace,
79 HvCallFlushVirtualAddressList,
80 HvCallGetLogicalProcessorRunTime,
81 /* 5, 6 & 7 are deprecated / reserved. */
82 HvCallNotifyLongSpinWait = 8,
83 HvCallParkLogicalProcessors, /**< @since v2 */
84 HvCallInvokeHypervisorDebugger, /**< @since v2 - not mentioned in TLFS v5.0b */
85 HvCallSendSyntheticClusterIpi, /**< @since v? */
86 HvCallModifyVtlProtectionMask, /**< @since v? */
87 HvCallEnablePartitionVtl, /**< @since v? */
88 HvCallDisablePartitionVtl, /**< @since v? */
89 HvCallEnableVpVtl, /**< @since v? */
90 HvCallDisableVpVtl, /**< @since v? */
91 HvCallVtlCall, /**< @since v? */
92 HvCallVtlReturn, /**< @since v? */
93 HvCallFlushVirtualAddressSpaceEx, /**< @since v? */
94 HvCallFlushVirtualAddressListEx, /**< @since v? */
95 HvCallSendSyntheticClusterIpiEx, /**< @since v? */
96 /* Reserved: 0x16..0x3f */
97
98 HvCallCreatePartition = 0x40,
99 HvCallInitializePartition,
100 HvCallFinalizePartition,
101 HvCallDeletePartition,
102 HvCallGetPartitionProperty,
103 HvCallSetPartitionProperty,
104 HvCallGetPartitionId,
105 HvCallGetNextChildPartition,
106 HvCallDepositMemory, /**< 0x48 - Repeat call. */
107 HvCallWithdrawMemory, /**< 0x49 - Repeat call. */
108 HvCallGetMemoryBalance,
109 HvCallMapGpaPages, /**< 0X4b - Repeat call. */
110 HvCallUnmapGpaPages, /**< 0X4c - Repeat call. */
111 HvCallInstallIntercept,
112 HvCallCreateVp,
113 HvCallDeleteVp, /**< 0x4f - Fast call. */
114 HvCallGetVpRegisters, /**< 0x50 - Repeat call. */
115 HvCallSetVpRegisters, /**< 0x51 - Repeat call. */
116 HvCallTranslateVirtualAddress,
117 HvCallReadGpa,
118 HvCallWriteGpa,
119 HvCallAssertVirtualInterruptV1,
120 HvCallClearVirtualInterrupt, /**< 0x56 - Fast call. */
121 HvCallCreatePortV1,
122 HvCallDeletePort, /**< 0x58 - Fast call. */
123 HvCallConnectPortV1,
124 HvCallGetPortProperty,
125 HvCallDisconnectPort,
126 HvCallPostMessage,
127 HvCallSignalEvent,
128 HvCallSavePartitionState,
129 HvCallRestorePartitionState,
130 HvCallInitializeEventLogBufferGroup,
131 HvCallFinalizeEventLogBufferGroup,
132 HvCallCreateEventLogBuffer,
133 HvCallDeleteEventLogBuffer,
134 HvCallMapEventLogBuffer,
135 HvCallUnmapEventLogBuffer,
136 HvCallSetEventLogGroupSources,
137 HvCallReleaseEventLogBuffer,
138 HvCallFlushEventLogBuffer,
139 HvCallPostDebugData,
140 HvCallRetrieveDebugData,
141 HvCallResetDebugSession,
142 HvCallMapStatsPage,
143 HvCallUnmapStatsPage,
144 HvCallMapSparseGpaPages, /**< @since v2 */
145 HvCallSetSystemProperty, /**< @since v2 */
146 HvCallSetPortProperty, /**< @since v2 */
147 /* 0x71..0x75 reserved/deprecated (was v2 test IDs). */
148 HvCallAddLogicalProcessor = 0x76,
149 HvCallRemoveLogicalProcessor,
150 HvCallQueryNumaDistance,
151 HvCallSetLogicalProcessorProperty,
152 HvCallGetLogicalProcessorProperty,
153 HvCallGetSystemProperty,
154 HvCallMapDeviceInterrupt,
155 HvCallUnmapDeviceInterrupt,
156 HvCallRetargetDeviceInterrupt,
157 /* 0x7f is reserved. */
158 HvCallMapDevicePages = 0x80,
159 HvCallUnmapDevicePages,
160 HvCallAttachDevice,
161 HvCallDetachDevice,
162 HvCallNotifyStandbyTransition,
163 HvCallPrepareForSleep,
164 HvCallPrepareForHibernate,
165 HvCallNotifyPartitionEvent,
166 HvCallGetLogicalProcessorRegisters,
167 HvCallSetLogicalProcessorRegisters,
168 HvCallQueryAssociatedLpsforMca,
169 HvCallNotifyRingEmpty,
170 HvCallInjectSyntheticMachineCheck,
171 HvCallScrubPartition,
172 HvCallCollectLivedump,
173 HvCallDisableHypervisor,
174 HvCallModifySparseGpaPages,
175 HvCallRegisterInterceptResult,
176 HvCallUnregisterInterceptResult,
177 /* 0x93 is reserved/undocumented. */
178 HvCallAssertVirtualInterrupt = 0x94,
179 HvCallCreatePort,
180 HvCallConnectPort,
181 HvCallGetSpaPageList,
182 /* 0x98 is reserved. */
183 HvCallStartVirtualProcessor = 0x99,
184 HvCallGetVpIndexFromApicId,
185 /* 0x9b..0xae are reserved/undocumented.
186 0xad: New version of HvCallGetVpRegisters? Perhaps on logical CPU or smth. */
187 HvCallFlushGuestPhysicalAddressSpace = 0xaf,
188 HvCallFlushGuestPhysicalAddressList,
189 /* 0xb1..0xb4 are unknown */
190 HvCallCreateCpuGroup = 0xb5,
191 HvCallDeleteCpuGroup,
192 HvCallGetCpuGroupProperty,
193 HvCallSetCpuGroupProperty,
194 HvCallGetCpuGroupAffinit,
195 HvCallGetNextCpuGroup = 0xba,
196 HvCallGetNextCpuGroupPartition,
197 HvCallPrecommitGpaPages = 0xbe,
198 HvCallUncommitGpaPages, /**< Happens when VidDestroyGpaRangeCheckSecure/WHvUnmapGpaRange is called. */
199 /* 0xc0..0xcb are unknown */
200 HvCallVpRunloopRelated = 0xc2, /**< Fast */
201 HvCallQueryVtlProtectionMaskRange = 0xcc,
202 HvCallModifyVtlProtectionMaskRange,
203 /* 0xce..0xd1 are unknown */
204 HvCallAcquireSparseGpaPageHostAccess = 0xd2,
205 HvCallReleaseSparseGpaPageHostAccess,
206 HvCallCheckSparseGpaPageVtlAccess,
207 HvCallAcquireSparseSpaPageHostAccess = 0xd7,
208 HvCallReleaseSparseSpaPageHostAccess,
209 HvCallAcceptGpaPages, /**< 0x18 byte input, zero rep, no output. */
210
211 /** Number of defined hypercalls (varies with version). */
212 HvCallCount
213} HV_CALL_CODE;
214AssertCompile(HvCallSendSyntheticClusterIpiEx == 0x15);
215AssertCompile(HvCallMapGpaPages == 0x4b);
216AssertCompile(HvCallSetPortProperty == 0x70);
217AssertCompile(HvCallRetargetDeviceInterrupt == 0x7e);
218AssertCompile(HvCallUnregisterInterceptResult == 0x92);
219AssertCompile(HvCallGetSpaPageList == 0x97);
220AssertCompile(HvCallFlushGuestPhysicalAddressList == 0xb0);
221AssertCompile(HvCallUncommitGpaPages == 0xbf);
222AssertCompile(HvCallCount == 0xda);
223
224/** Makes the first parameter to a hypercall (rcx). */
225#define HV_MAKE_CALL_INFO(a_enmCallCode, a_cReps) ( (uint64_t)(a_enmCallCode) | ((uint64_t)(a_cReps) << 32) )
226/** Makes the return value (success) for a rep hypercall. */
227#define HV_MAKE_CALL_REP_RET(a_cReps) ((uint64_t)(a_cReps) << 32)
228
229/** Hypercall status code. */
230typedef uint16_t HV_STATUS;
231
232/** @name Hyper-V Hypercall status codes
233 * @{ */
234#define HV_STATUS_SUCCESS (0x0000)
235#define HV_STATUS_RESERVED_1 (0x0001)
236#define HV_STATUS_INVALID_HYPERCALL_CODE (0x0002)
237#define HV_STATUS_INVALID_HYPERCALL_INPUT (0x0003)
238#define HV_STATUS_INVALID_ALIGNMENT (0x0004)
239#define HV_STATUS_INVALID_PARAMETER (0x0005)
240#define HV_STATUS_ACCESS_DENIED (0x0006)
241#define HV_STATUS_INVALID_PARTITION_STATE (0x0007)
242#define HV_STATUS_OPERATION_DENIED (0x0008)
243#define HV_STATUS_UNKNOWN_PROPERTY (0x0009)
244#define HV_STATUS_PROPERTY_VALUE_OUT_OF_RANGE (0x000a)
245#define HV_STATUS_INSUFFICIENT_MEMORY (0x000b)
246#define HV_STATUS_PARTITION_TOO_DEEP (0x000c)
247#define HV_STATUS_INVALID_PARTITION_ID (0x000d)
248#define HV_STATUS_INVALID_VP_INDEX (0x000e)
249#define HV_STATUS_RESERVED_F (0x000f)
250#define HV_STATUS_NOT_FOUND (0x0010)
251#define HV_STATUS_INVALID_PORT_ID (0x0011)
252#define HV_STATUS_INVALID_CONNECTION_ID (0x0012)
253#define HV_STATUS_INSUFFICIENT_BUFFERS (0x0013)
254#define HV_STATUS_NOT_ACKNOWLEDGED (0x0014)
255#define HV_STATUS_INVALID_VP_STATE (0x0015)
256#define HV_STATUS_ACKNOWLEDGED (0x0016)
257#define HV_STATUS_INVALID_SAVE_RESTORE_STATE (0x0017)
258#define HV_STATUS_INVALID_SYNIC_STATE (0x0018)
259#define HV_STATUS_OBJECT_IN_USE (0x0019)
260#define HV_STATUS_INVALID_PROXIMITY_DOMAIN_INFO (0x001a)
261#define HV_STATUS_NO_DATA (0x001b)
262#define HV_STATUS_INACTIVE (0x001c)
263#define HV_STATUS_NO_RESOURCES (0x001d)
264#define HV_STATUS_FEATURE_UNAVAILABLE (0x001e)
265#define HV_STATUS_PARTIAL_PACKET (0x001f)
266#define HV_STATUS_PROCESSOR_FEATURE_SSE3_NOT_SUPPORTED (0x0020)
267#define HV_STATUS_PROCESSOR_FEATURE_LAHFSAHF_NOT_SUPPORTED (0x0021)
268#define HV_STATUS_PROCESSOR_FEATURE_SSSE3_NOT_SUPPORTED (0x0022)
269#define HV_STATUS_PROCESSOR_FEATURE_SSE4_1_NOT_SUPPORTED (0x0023)
270#define HV_STATUS_PROCESSOR_FEATURE_SSE4_2_NOT_SUPPORTED (0x0024)
271#define HV_STATUS_PROCESSOR_FEATURE_SSE4A_NOT_SUPPORTED (0x0025)
272#define HV_STATUS_PROCESSOR_FEATURE_XOP_NOT_SUPPORTED (0x0026)
273#define HV_STATUS_PROCESSOR_FEATURE_POPCNT_NOT_SUPPORTED (0x0027)
274#define HV_STATUS_PROCESSOR_FEATURE_CMPXCHG16B_NOT_SUPPORTED (0x0028)
275#define HV_STATUS_PROCESSOR_FEATURE_ALTMOVCR8_NOT_SUPPORTED (0x0029)
276#define HV_STATUS_PROCESSOR_FEATURE_LZCNT_NOT_SUPPORTED (0x002a)
277#define HV_STATUS_PROCESSOR_FEATURE_MISALIGNED_SSE_NOT_SUPPORTED (0x002b)
278#define HV_STATUS_PROCESSOR_FEATURE_MMX_EXT_NOT_SUPPORTED (0x002c)
279#define HV_STATUS_PROCESSOR_FEATURE_3DNOW_NOT_SUPPORTED (0x002d)
280#define HV_STATUS_PROCESSOR_FEATURE_EXTENDED_3DNOW_NOT_SUPPORTED (0x002e)
281#define HV_STATUS_PROCESSOR_FEATURE_PAGE_1GB_NOT_SUPPORTED (0x002f)
282#define HV_STATUS_PROCESSOR_CACHE_LINE_FLUSH_SIZE_INCOMPATIBLE (0x0030)
283#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_NOT_SUPPORTED (0x0031)
284#define HV_STATUS_PROCESSOR_FEATURE_XSAVEOPT_NOT_SUPPORTED (0x0032)
285#define HV_STATUS_INSUFFICIENT_BUFFER (0x0033)
286#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX_NOT_SUPPORTED (0x0034)
287#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_ FEATURE_NOT_SUPPORTED (0x0035)
288#define HV_STATUS_PROCESSOR_XSAVE_SAVE_AREA_INCOMPATIBLE (0x0036)
289#define HV_STATUS_INCOMPATIBLE_PROCESSOR (0x0037)
290#define HV_STATUS_INSUFFICIENT_DEVICE_DOMAINS (0x0038)
291#define HV_STATUS_PROCESSOR_FEATURE_AES_NOT_SUPPORTED (0x0039)
292#define HV_STATUS_PROCESSOR_FEATURE_PCLMULQDQ_NOT_SUPPORTED (0x003a)
293#define HV_STATUS_PROCESSOR_FEATURE_INCOMPATIBLE_XSAVE_FEATURES (0x003b)
294#define HV_STATUS_CPUID_FEATURE_VALIDATION_ERROR (0x003c)
295#define HV_STATUS_CPUID_XSAVE_FEATURE_VALIDATION_ERROR (0x003d)
296#define HV_STATUS_PROCESSOR_STARTUP_TIMEOUT (0x003e)
297#define HV_STATUS_SMX_ENABLED (0x003f)
298#define HV_STATUS_PROCESSOR_FEATURE_PCID_NOT_SUPPORTED (0x0040)
299#define HV_STATUS_INVALID_LP_INDEX (0x0041)
300#define HV_STATUS_FEATURE_FMA4_NOT_SUPPORTED (0x0042)
301#define HV_STATUS_FEATURE_F16C_NOT_SUPPORTED (0x0043)
302#define HV_STATUS_PROCESSOR_FEATURE_RDRAND_NOT_SUPPORTED (0x0044)
303#define HV_STATUS_PROCESSOR_FEATURE_RDWRFSGS_NOT_SUPPORTED (0x0045)
304#define HV_STATUS_PROCESSOR_FEATURE_SMEP_NOT_SUPPORTED (0x0046)
305#define HV_STATUS_PROCESSOR_FEATURE_ENHANCED_FAST_STRING_NOT_SUPPORTED (0x0047)
306#define HV_STATUS_PROCESSOR_FEATURE_MOVBE_NOT_SUPPORTED (0x0048)
307#define HV_STATUS_PROCESSOR_FEATURE_BMI1_NOT_SUPPORTED (0x0049)
308#define HV_STATUS_PROCESSOR_FEATURE_BMI2_NOT_SUPPORTED (0x004a)
309#define HV_STATUS_PROCESSOR_FEATURE_HLE_NOT_SUPPORTED (0x004b)
310#define HV_STATUS_PROCESSOR_FEATURE_RTM_NOT_SUPPORTED (0x004c)
311#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_FMA_NOT_SUPPORTED (0x004d)
312#define HV_STATUS_PROCESSOR_FEATURE_XSAVE_AVX2_NOT_SUPPORTED (0x004e)
313#define HV_STATUS_PROCESSOR_FEATURE_NPIEP1_NOT_SUPPORTED (0x004f)
314#define HV_STATUS_INVALID_REGISTER_VALUE (0x0050)
315#define HV_STATUS_PROCESSOR_FEATURE_RDSEED_NOT_SUPPORTED (0x0052)
316#define HV_STATUS_PROCESSOR_FEATURE_ADX_NOT_SUPPORTED (0x0053)
317#define HV_STATUS_PROCESSOR_FEATURE_SMAP_NOT_SUPPORTED (0x0054)
318#define HV_STATUS_NX_NOT_DETECTED (0x0055)
319#define HV_STATUS_PROCESSOR_FEATURE_INTEL_PREFETCH_NOT_SUPPORTED (0x0056)
320#define HV_STATUS_INVALID_DEVICE_ID (0x0057)
321#define HV_STATUS_INVALID_DEVICE_STATE (0x0058)
322#define HV_STATUS_PENDING_PAGE_REQUESTS (0x0059)
323#define HV_STATUS_PAGE_REQUEST_INVALID (0x0060)
324#define HV_STATUS_OPERATION_FAILED (0x0071)
325#define HV_STATUS_NOT_ALLOWED_WITH_NESTED_VIRT_ACTIVE (0x0072)
326/** @} */
327
328
329/** @name Flags used with HvCallMapGpaPages and HvCallMapSparseGpaPages.
330 * @note There seems to be a more flags defined after v2.
331 * @{ */
332typedef uint32_t HV_MAP_GPA_FLAGS;
333#define HV_MAP_GPA_READABLE UINT32_C(0x0001)
334#define HV_MAP_GPA_WRITABLE UINT32_C(0x0002)
335#define HV_MAP_GPA_EXECUTABLE UINT32_C(0x0004)
336/** Seems this have to be set when HV_MAP_GPA_EXECUTABLE is (17101). */
337#define HV_MAP_GPA_EXECUTABLE_AGAIN UINT32_C(0x0008)
338/** Dunno what this is yet, but it requires HV_MAP_GPA_DUNNO_1000.
339 * The readable bit gets put here when both HV_MAP_GPA_DUNNO_1000 and
340 * HV_MAP_GPA_DUNNO_MASK_0700 are clear. */
341#define HV_MAP_GPA_DUNNO_ACCESS UINT32_C(0x0010)
342/** Guess work. */
343#define HV_MAP_GPA_MAYBE_ACCESS_MASK UINT32_C(0x001f)
344/** Some kind of mask. */
345#define HV_MAP_GPA_DUNNO_MASK_0700 UINT32_C(0x0700)
346/** Dunno what this is, but required for HV_MAP_GPA_DUNNO_ACCESS. */
347#define HV_MAP_GPA_DUNNO_1000 UINT32_C(0x1000)
348/** Working with large 2MB pages. */
349#define HV_MAP_GPA_LARGE UINT32_C(0x2000)
350/** Valid mask as per build 17101. */
351#define HV_MAP_GPA_VALID_MASK UINT32_C(0x7f1f)
352/** @} */
353
354/** Input for HvCallMapGpaPages. */
355typedef struct
356{
357 HV_PARTITION_ID TargetPartitionId;
358 HV_GPA_PAGE_NUMBER TargetGpaBase;
359 HV_MAP_GPA_FLAGS MapFlags;
360 uint32_t u32ExplicitPadding;
361 /* The repeating part: */
362 HV_SPA_PAGE_NUMBER PageList[RT_FLEXIBLE_ARRAY];
363} HV_INPUT_MAP_GPA_PAGES;
364AssertCompileMemberOffset(HV_INPUT_MAP_GPA_PAGES, PageList, 24);
365/** Pointer to the input for HvCallMapGpaPages. */
366typedef HV_INPUT_MAP_GPA_PAGES *PHV_INPUT_MAP_GPA_PAGES;
367
368
369/** A parent to guest mapping pair for HvCallMapSparseGpaPages. */
370typedef struct
371{
372 HV_GPA_PAGE_NUMBER TargetGpaPageNumber;
373 HV_SPA_PAGE_NUMBER SourceSpaPageNumber;
374} HV_GPA_MAPPING;
375/** Pointer to a parent->guest mapping pair for HvCallMapSparseGpaPages. */
376typedef HV_GPA_MAPPING *PHV_GPA_MAPPING;
377
378/** Input for HvCallMapSparseGpaPages. */
379typedef struct
380{
381 HV_PARTITION_ID TargetPartitionId;
382 HV_MAP_GPA_FLAGS MapFlags;
383 uint32_t u32ExplicitPadding;
384 /* The repeating part: */
385 HV_GPA_MAPPING PageList[RT_FLEXIBLE_ARRAY];
386} HV_INPUT_MAP_SPARSE_GPA_PAGES;
387AssertCompileMemberOffset(HV_INPUT_MAP_SPARSE_GPA_PAGES, PageList, 16);
388/** Pointer to the input for HvCallMapSparseGpaPages. */
389typedef HV_INPUT_MAP_SPARSE_GPA_PAGES *PHV_INPUT_MAP_SPARSE_GPA_PAGES;
390
391
392/** Input for HvCallUnmapGpaPages. */
393typedef struct
394{
395 HV_PARTITION_ID TargetPartitionId;
396 HV_GPA_PAGE_NUMBER TargetGpaBase;
397 /** This field is either an omission in the 7600 WDK or a later additions.
398 * Anyway, not quite sure what it does. Bit 2 seems to indicate 2MB pages. */
399 uint64_t fFlags;
400} HV_INPUT_UNMAP_GPA_PAGES;
401AssertCompileSize(HV_INPUT_UNMAP_GPA_PAGES, 24);
402/** Pointer to the input for HvCallUnmapGpaPages. */
403typedef HV_INPUT_UNMAP_GPA_PAGES *PHV_INPUT_UNMAP_GPA_PAGES;
404
405
406
407/** Cache types used by HvCallReadGpa and HvCallWriteGpa. */
408typedef enum
409{
410 HvCacheTypeX64Uncached = 0,
411 HvCacheTypeX64WriteCombining,
412 /* 2 & 3 are undefined. */
413 HvCacheTypeX64WriteThrough = 4,
414 HvCacheTypeX64WriteProtected,
415 HvCacheTypeX64WriteBack
416} HV_CACHE_TYPE;
417
418/** Control flags for HvCallReadGpa and HvCallWriteGpa. */
419typedef union
420{
421 uint64_t AsUINT64;
422 struct
423 {
424 uint64_t CacheType : 8; /**< HV_CACHE_TYPE */
425 uint64_t Reserved : 56;
426 };
427} HV_ACCESS_GPA_CONTROL_FLAGS;
428
429/** Results codes for HvCallReadGpa and HvCallWriteGpa. */
430typedef enum
431{
432 HvAccessGpaSuccess = 0,
433 HvAccessGpaUnmapped,
434 HvAccessGpaReadIntercept,
435 HvAccessGpaWriteIntercept,
436 HvAccessGpaIllegalOverlayAccess
437} HV_ACCESS_GPA_RESULT_CODE;
438
439/** The result of HvCallReadGpa and HvCallWriteGpa. */
440typedef union
441{
442 uint64_t AsUINT64;
443 struct
444 {
445 HV_ACCESS_GPA_RESULT_CODE ResultCode;
446 uint32_t Reserved;
447 };
448} HV_ACCESS_GPA_RESULT;
449
450
451/** Input for HvCallReadGpa. */
452typedef struct
453{
454 HV_PARTITION_ID PartitionId;
455 HV_VP_INDEX VpIndex;
456 uint32_t ByteCount;
457 HV_GPA BaseGpa;
458 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
459} HV_INPUT_READ_GPA;
460AssertCompileSize(HV_INPUT_READ_GPA, 32);
461/** Pointer to the input for HvCallReadGpa. */
462typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
463
464/** Output for HvCallReadGpa. */
465typedef struct
466{
467 HV_ACCESS_GPA_RESULT AccessResult;
468 uint8_t Data[16];
469} HV_OUTPUT_READ_GPA;
470AssertCompileSize(HV_OUTPUT_READ_GPA, 24);
471/** Pointer to the output for HvCallReadGpa. */
472typedef HV_OUTPUT_READ_GPA *PHV_OUTPUT_READ_GPA;
473
474
475/** Input for HvCallWriteGpa. */
476typedef struct
477{
478 HV_PARTITION_ID PartitionId;
479 HV_VP_INDEX VpIndex;
480 uint32_t ByteCount;
481 HV_GPA BaseGpa;
482 HV_ACCESS_GPA_CONTROL_FLAGS ControlFlags;
483 uint8_t Data[16];
484} HV_INPUT_WRITE_GPA;
485AssertCompileSize(HV_INPUT_READ_GPA, 32);
486/** Pointer to the input for HvCallWriteGpa. */
487typedef HV_INPUT_READ_GPA *PHV_INPUT_READ_GPA;
488
489/** Output for HvCallWriteGpa. */
490typedef struct
491{
492 HV_ACCESS_GPA_RESULT AccessResult;
493} HV_OUTPUT_WRITE_GPA;
494AssertCompileSize(HV_OUTPUT_WRITE_GPA, 8);
495/** Pointer to the output for HvCallWriteGpa. */
496typedef HV_OUTPUT_WRITE_GPA *PHV_OUTPUT_WRITE_GPA;
497
498
499/**
500 * Register names used by HvCallGetVpRegisters and HvCallSetVpRegisters.
501 */
502typedef enum _HV_REGISTER_NAME
503{
504 HvRegisterExplicitSuspend = 0x00000000,
505 HvRegisterInterceptSuspend,
506
507 HvRegisterHypervisorVersion = 0x00000100, /**< @since v5 */
508
509 HvRegisterPrivilegesAndFeaturesInfo = 0x00000200, /**< @since v5 */
510 HvRegisterFeaturesInfo, /**< @since v5 */
511 HvRegisterImplementationLimitsInfo, /**< @since v5 */
512 HvRegisterHardwareFeaturesInfo, /**< @since v5 */
513
514 HvRegisterGuestCrashP0 = 0x00000210, /**< @since v5 */
515 HvRegisterGuestCrashP1, /**< @since v5 */
516 HvRegisterGuestCrashP2, /**< @since v5 */
517 HvRegisterGuestCrashP3, /**< @since v5 */
518 HvRegisterGuestCrashP4, /**< @since v5 */
519 HvRegisterGuestCrashCtl, /**< @since v5 */
520
521 HvRegisterPowerStateConfigC1 = 0x00000220, /**< @since v5 */
522 HvRegisterPowerStateTriggerC1, /**< @since v5 */
523 HvRegisterPowerStateConfigC2, /**< @since v5 */
524 HvRegisterPowerStateTriggerC2, /**< @since v5 */
525 HvRegisterPowerStateConfigC3, /**< @since v5 */
526 HvRegisterPowerStateTriggerC3, /**< @since v5 */
527
528 HvRegisterSystemReset = 0x00000230, /**< @since v5 */
529
530 HvRegisterProcessorClockFrequency = 0x00000240, /**< @since v5 */
531 HvRegisterInterruptClockFrequency, /**< @since v5 */
532
533 HvRegisterGuestIdle = 0x00000250, /**< @since v5 */
534
535 HvRegisterDebugDeviceOptions = 0x00000260, /**< @since v5 */
536
537 HvRegisterPendingInterruption = 0x00010002,
538 HvRegisterInterruptState,
539 HvRegisterPendingEvent0, /**< @since v5 */
540 HvRegisterPendingEvent1, /**< @since v5 */
541 HvX64RegisterDeliverabilityNotifications, /**< @since v5c? Late 2017? */
542
543 HvX64RegisterRax = 0x00020000,
544 HvX64RegisterRcx,
545 HvX64RegisterRdx,
546 HvX64RegisterRbx,
547 HvX64RegisterRsp,
548 HvX64RegisterRbp,
549 HvX64RegisterRsi,
550 HvX64RegisterRdi,
551 HvX64RegisterR8,
552 HvX64RegisterR9,
553 HvX64RegisterR10,
554 HvX64RegisterR11,
555 HvX64RegisterR12,
556 HvX64RegisterR13,
557 HvX64RegisterR14,
558 HvX64RegisterR15,
559 HvX64RegisterRip,
560 HvX64RegisterRflags,
561
562 HvX64RegisterXmm0 = 0x00030000,
563 HvX64RegisterXmm1,
564 HvX64RegisterXmm2,
565 HvX64RegisterXmm3,
566 HvX64RegisterXmm4,
567 HvX64RegisterXmm5,
568 HvX64RegisterXmm6,
569 HvX64RegisterXmm7,
570 HvX64RegisterXmm8,
571 HvX64RegisterXmm9,
572 HvX64RegisterXmm10,
573 HvX64RegisterXmm11,
574 HvX64RegisterXmm12,
575 HvX64RegisterXmm13,
576 HvX64RegisterXmm14,
577 HvX64RegisterXmm15,
578 HvX64RegisterFpMmx0,
579 HvX64RegisterFpMmx1,
580 HvX64RegisterFpMmx2,
581 HvX64RegisterFpMmx3,
582 HvX64RegisterFpMmx4,
583 HvX64RegisterFpMmx5,
584 HvX64RegisterFpMmx6,
585 HvX64RegisterFpMmx7,
586 HvX64RegisterFpControlStatus,
587 HvX64RegisterXmmControlStatus,
588
589 HvX64RegisterCr0 = 0x00040000,
590 HvX64RegisterCr2,
591 HvX64RegisterCr3,
592 HvX64RegisterCr4,
593 HvX64RegisterCr8,
594 HvX64RegisterXfem,
595
596 HvX64RegisterIntermediateCr0 = 0x00041000, /**< @since v5 */
597 HvX64RegisterIntermediateCr4 = 0x00041003, /**< @since v5 */
598 HvX64RegisterIntermediateCr8, /**< @since v5 */
599
600 HvX64RegisterDr0 = 0x00050000,
601 HvX64RegisterDr1,
602 HvX64RegisterDr2,
603 HvX64RegisterDr3,
604 HvX64RegisterDr6,
605 HvX64RegisterDr7,
606
607 HvX64RegisterEs = 0x00060000,
608 HvX64RegisterCs,
609 HvX64RegisterSs,
610 HvX64RegisterDs,
611 HvX64RegisterFs,
612 HvX64RegisterGs,
613 HvX64RegisterLdtr,
614 HvX64RegisterTr,
615
616 HvX64RegisterIdtr = 0x00070000,
617 HvX64RegisterGdtr,
618
619 HvX64RegisterTsc = 0x00080000,
620 HvX64RegisterEfer,
621 HvX64RegisterKernelGsBase,
622 HvX64RegisterApicBase,
623 HvX64RegisterPat,
624 HvX64RegisterSysenterCs,
625 HvX64RegisterSysenterEip,
626 HvX64RegisterSysenterEsp,
627 HvX64RegisterStar,
628 HvX64RegisterLstar,
629 HvX64RegisterCstar,
630 HvX64RegisterSfmask,
631 HvX64RegisterInitialApicId,
632
633 HvX64RegisterMtrrCap,
634 HvX64RegisterMtrrDefType,
635
636 HvX64RegisterMtrrPhysBase0 = 0x00080010,
637 HvX64RegisterMtrrPhysBase1,
638 HvX64RegisterMtrrPhysBase2,
639 HvX64RegisterMtrrPhysBase3,
640 HvX64RegisterMtrrPhysBase4,
641 HvX64RegisterMtrrPhysBase5,
642 HvX64RegisterMtrrPhysBase6,
643 HvX64RegisterMtrrPhysBase7,
644 HvX64RegisterMtrrPhysBase8, /**< @since v4 */
645 HvX64RegisterMtrrPhysBase9, /**< @since v4 */
646 HvX64RegisterMtrrPhysBaseA, /**< @since v4 */
647 HvX64RegisterMtrrPhysBaseB, /**< @since v4 */
648 HvX64RegisterMtrrPhysBaseC, /**< @since v4 */
649 HvX64RegisterMtrrPhysBaseD, /**< @since v4 */
650 HvX64RegisterMtrrPhysBaseE, /**< @since v4 */
651 HvX64RegisterMtrrPhysBaseF, /**< @since v4 */
652
653 HvX64RegisterMtrrPhysMask0 = 0x00080040,
654 HvX64RegisterMtrrPhysMask1,
655 HvX64RegisterMtrrPhysMask2,
656 HvX64RegisterMtrrPhysMask3,
657 HvX64RegisterMtrrPhysMask4,
658 HvX64RegisterMtrrPhysMask5,
659 HvX64RegisterMtrrPhysMask6,
660 HvX64RegisterMtrrPhysMask7,
661 HvX64RegisterMtrrPhysMask8, /**< @since v4 */
662 HvX64RegisterMtrrPhysMask9, /**< @since v4 */
663 HvX64RegisterMtrrPhysMaskA, /**< @since v4 */
664 HvX64RegisterMtrrPhysMaskB, /**< @since v4 */
665 HvX64RegisterMtrrPhysMaskC, /**< @since v4 */
666 HvX64RegisterMtrrPhysMaskD, /**< @since v4 */
667 HvX64RegisterMtrrPhysMaskE, /**< @since v4 */
668 HvX64RegisterMtrrPhysMaskF, /**< @since v4 */
669
670 HvX64RegisterMtrrFix64k00000 = 0x00080070,
671 HvX64RegisterMtrrFix16k80000,
672 HvX64RegisterMtrrFix16kA0000,
673 HvX64RegisterMtrrFix4kC0000,
674 HvX64RegisterMtrrFix4kC8000,
675 HvX64RegisterMtrrFix4kD0000,
676 HvX64RegisterMtrrFix4kD8000,
677 HvX64RegisterMtrrFix4kE0000,
678 HvX64RegisterMtrrFix4kE8000,
679 HvX64RegisterMtrrFix4kF0000,
680 HvX64RegisterMtrrFix4kF8000,
681
682 HvX64RegisterIa32MiscEnable = 0x000800a0, /**< @since v5 */
683 HvX64RegisterIa32FeatureControl, /**< @since v5 */
684
685 HvX64RegisterVpRuntime = 0x00090000,
686 HvX64RegisterHypercall,
687 HvRegisterGuestOsId,
688 HvRegisterVpIndex,
689 HvRegisterTimeRefCount,
690
691 HvRegisterCpuManagementVersion = 0x00090007, /**< @since v5 */
692
693 HvX64RegisterEoi = 0x00090010,
694 HvX64RegisterIcr,
695 HvX64RegisterTpr,
696 HvRegisterVpAssistPage,
697
698 HvRegisterStatsPartitionRetail = 0x00090020,
699 HvRegisterStatsPartitionInternal,
700 HvRegisterStatsVpRetail,
701 HvRegisterStatsVpInternal,
702
703 HvRegisterSint0 = 0x000a0000,
704 HvRegisterSint1,
705 HvRegisterSint2,
706 HvRegisterSint3,
707 HvRegisterSint4,
708 HvRegisterSint5,
709 HvRegisterSint6,
710 HvRegisterSint7,
711 HvRegisterSint8,
712 HvRegisterSint9,
713 HvRegisterSint10,
714 HvRegisterSint11,
715 HvRegisterSint12,
716 HvRegisterSint13,
717 HvRegisterSint14,
718 HvRegisterSint15,
719 HvRegisterScontrol,
720 HvRegisterSversion,
721 HvRegisterSifp,
722 HvRegisterSipp,
723 HvRegisterEom,
724 HvRegisterSirbp, /**< @since v4 */
725
726 HvRegisterStimer0Config = 0x000b0000,
727 HvRegisterStimer0Count,
728 HvRegisterStimer1Config,
729 HvRegisterStimer1Count,
730 HvRegisterStimer2Config,
731 HvRegisterStimer2Count,
732 HvRegisterStimer3Config,
733 HvRegisterStimer3Count,
734
735 HvX64RegisterYmm0Low = 0x000c0000,
736 HvX64RegisterYmm1Low,
737 HvX64RegisterYmm2Low,
738 HvX64RegisterYmm3Low,
739 HvX64RegisterYmm4Low,
740 HvX64RegisterYmm5Low,
741 HvX64RegisterYmm6Low,
742 HvX64RegisterYmm7Low,
743 HvX64RegisterYmm8Low,
744 HvX64RegisterYmm9Low,
745 HvX64RegisterYmm10Low,
746 HvX64RegisterYmm11Low,
747 HvX64RegisterYmm12Low,
748 HvX64RegisterYmm13Low,
749 HvX64RegisterYmm14Low,
750 HvX64RegisterYmm15Low,
751 HvX64RegisterYmm0High,
752 HvX64RegisterYmm1High,
753 HvX64RegisterYmm2High,
754 HvX64RegisterYmm3High,
755 HvX64RegisterYmm4High,
756 HvX64RegisterYmm5High,
757 HvX64RegisterYmm6High,
758 HvX64RegisterYmm7High,
759 HvX64RegisterYmm8High,
760 HvX64RegisterYmm9High,
761 HvX64RegisterYmm10High,
762 HvX64RegisterYmm11High,
763 HvX64RegisterYmm12High,
764 HvX64RegisterYmm13High,
765 HvX64RegisterYmm14High,
766 HvX64RegisterYmm15High,
767
768 HvRegisterVsmVpVtlControl = 0x000d0000,
769
770 HvRegisterVsmCodePageOffsets = 0x000d0002,
771 HvRegisterVsmVpStatus,
772 HvRegisterVsmPartitionStatus,
773 HvRegisterVsmVina,
774 HvRegisterVsmCapabilities,
775 HvRegisterVsmPartitionConfig,
776
777 HvRegisterVsmVpSecureConfigVtl0 = 0x000d0010, /**< @since v5 */
778 HvRegisterVsmVpSecureConfigVtl1, /**< @since v5 */
779 HvRegisterVsmVpSecureConfigVtl2, /**< @since v5 */
780 HvRegisterVsmVpSecureConfigVtl3, /**< @since v5 */
781 HvRegisterVsmVpSecureConfigVtl4, /**< @since v5 */
782 HvRegisterVsmVpSecureConfigVtl5, /**< @since v5 */
783 HvRegisterVsmVpSecureConfigVtl6, /**< @since v5 */
784 HvRegisterVsmVpSecureConfigVtl7, /**< @since v5 */
785 HvRegisterVsmVpSecureConfigVtl8, /**< @since v5 */
786 HvRegisterVsmVpSecureConfigVtl9, /**< @since v5 */
787 HvRegisterVsmVpSecureConfigVtl10, /**< @since v5 */
788 HvRegisterVsmVpSecureConfigVtl11, /**< @since v5 */
789 HvRegisterVsmVpSecureConfigVtl12, /**< @since v5 */
790 HvRegisterVsmVpSecureConfigVtl13, /**< @since v5 */
791 HvRegisterVsmVpSecureConfigVtl14 /**< @since v5 */
792
793} HV_REGISTER_NAME;
794AssertCompile(HvRegisterInterceptSuspend == 0x00000001);
795AssertCompile(HvRegisterPendingEvent1 == 0x00010005);
796AssertCompile(HvX64RegisterDeliverabilityNotifications == 0x00010006);
797AssertCompile(HvX64RegisterRflags == 0x00020011);
798AssertCompile(HvX64RegisterXmmControlStatus == 0x00030019);
799AssertCompile(HvX64RegisterXfem == 0x00040005);
800AssertCompile(HvX64RegisterIntermediateCr0 == 0x00041000);
801AssertCompile(HvX64RegisterIntermediateCr4 == 0x00041003);
802AssertCompile(HvX64RegisterDr7 == 0x00050005);
803AssertCompile(HvX64RegisterTr == 0x00060007);
804AssertCompile(HvX64RegisterGdtr == 0x00070001);
805AssertCompile(HvX64RegisterInitialApicId == 0x0008000c);
806AssertCompile(HvX64RegisterMtrrDefType == 0x0008000e);
807AssertCompile(HvX64RegisterMtrrPhysBaseF == 0x0008001f);
808AssertCompile(HvX64RegisterMtrrPhysMaskF == 0x0008004f);
809AssertCompile(HvX64RegisterMtrrFix4kF8000 == 0x0008007a);
810AssertCompile(HvRegisterTimeRefCount == 0x00090004);
811AssertCompile(HvRegisterCpuManagementVersion == 0x00090007);
812AssertCompile(HvRegisterVpAssistPage == 0x00090013);
813AssertCompile(HvRegisterStatsVpInternal == 0x00090023);
814AssertCompile(HvRegisterSirbp == 0x000a0015);
815AssertCompile(HvRegisterStimer3Count == 0x000b0007);
816AssertCompile(HvX64RegisterYmm15High == 0x000c001f);
817AssertCompile(HvRegisterVsmVpSecureConfigVtl14 == 0x000d001e);
818AssertCompileSize(HV_REGISTER_NAME, 4);
819
820
821/** Value format for HvRegisterExplicitSuspend. */
822typedef union
823{
824 uint64_t AsUINT64;
825 struct
826 {
827 uint64_t Suspended : 1;
828 uint64_t Reserved : 63;
829 };
830} HV_EXPLICIT_SUSPEND_REGISTER;
831/** Pointer to a value of HvRegisterExplicitSuspend. */
832typedef HV_EXPLICIT_SUSPEND_REGISTER *PHV_EXPLICIT_SUSPEND_REGISTER;
833
834/** Value format for HvRegisterInterceptSuspend. */
835typedef union
836{
837 uint64_t AsUINT64;
838 struct
839 {
840 uint64_t Suspended : 1;
841 uint64_t TlbLocked : 1;
842 uint64_t Reserved : 62;
843 };
844} HV_INTERCEPT_SUSPEND_REGISTER;
845/** Pointer to a value of HvRegisterInterceptSuspend. */
846typedef HV_INTERCEPT_SUSPEND_REGISTER *PHV_INTERCEPT_SUSPEND_REGISTER;
847
848/** Value format for HvRegisterInterruptState.
849 * @sa WHV_X64_INTERRUPT_STATE_REGISTER */
850typedef union
851{
852 uint64_t AsUINT64;
853 struct
854 {
855 uint64_t InterruptShadow : 1;
856 uint64_t NmiMasked : 1;
857 uint64_t Reserved : 62;
858 };
859} HV_X64_INTERRUPT_STATE_REGISTER;
860/** Pointer to a value of HvRegisterInterruptState. */
861typedef HV_X64_INTERRUPT_STATE_REGISTER *PHV_X64_INTERRUPT_STATE_REGISTER;
862
863/** Pending exception type for HvRegisterPendingInterruption.
864 * @sa WHV_X64_PENDING_INTERRUPTION_TYPE */
865typedef enum
866{
867 HvX64PendingInterrupt = 0,
868 /* what is/was 1? */
869 HvX64PendingNmi = 2,
870 HvX64PendingException
871 /* any more? */
872} HV_X64_PENDING_INTERRUPTION_TYPE;
873
874/** Value format for HvRegisterPendingInterruption.
875 * @sa WHV_X64_PENDING_INTERRUPTION_REGISTER */
876typedef union
877{
878 uint64_t AsUINT64;
879 struct
880 {
881 uint32_t InterruptionPending : 1;
882 uint32_t InterruptionType : 3; /**< HV_X64_PENDING_INTERRUPTION_TYPE */
883 uint32_t DeliverErrorCode : 1;
884 uint32_t InstructionLength : 4; /**< @since v5? Wasn't in 7600 WDK */
885 uint32_t NestedEvent : 1; /**< @since v5? Wasn't in 7600 WDK */
886 uint32_t Reserved : 6;
887 uint32_t InterruptionVector : 16;
888 uint32_t ErrorCode;
889 };
890} HV_X64_PENDING_INTERRUPTION_REGISTER;
891/** Pointer to a value of HvRegisterPendingInterruption. */
892typedef HV_X64_PENDING_INTERRUPTION_REGISTER *PHV_X64_PENDING_INTERRUPTION_REGISTER;
893
894/** Value format for HvX64RegisterDeliverabilityNotifications.
895 * Value format for HvRegisterPendingEvent0/1.
896 * @sa WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER */
897typedef union
898{
899 uint64_t AsUINT64;
900 struct
901 {
902 uint64_t NmiNotification : 1;
903 uint64_t InterruptNotification : 1;
904 uint64_t InterruptPriority : 4;
905 uint64_t Reserved : 58;
906 };
907} HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
908/** Pointer to a value of HvRegisterPendingEvent0/1. */
909typedef HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER *PHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER;
910
911
912/** Value format for HvX64RegisterEs..Tr.
913 * @sa WHV_X64_SEGMENT_REGISTER */
914typedef struct _HV_X64_SEGMENT_REGISTER
915{
916 uint64_t Base;
917 uint32_t Limit;
918 uint16_t Selector;
919 union
920 {
921 struct
922 {
923 uint16_t SegmentType : 4;
924 uint16_t NonSystemSegment : 1;
925 uint16_t DescriptorPrivilegeLevel : 2;
926 uint16_t Present : 1;
927 uint16_t Reserved : 4;
928 uint16_t Available : 1;
929 uint16_t Long : 1;
930 uint16_t Default : 1;
931 uint16_t Granularity : 1;
932 };
933 uint16_t Attributes;
934 };
935} HV_X64_SEGMENT_REGISTER;
936AssertCompileSize(HV_X64_SEGMENT_REGISTER, 16);
937/** Pointer to a value of HvX64RegisterEs..Tr. */
938typedef HV_X64_SEGMENT_REGISTER *PHV_X64_SEGMENT_REGISTER;
939
940/** Value format for HvX64RegisterIdtr/Gdtr.
941 * @sa WHV_X64_TABLE_REGISTER */
942typedef struct
943{
944 uint16_t Pad[3];
945 uint16_t Limit;
946 uint64_t Base;
947} HV_X64_TABLE_REGISTER;
948AssertCompileSize(HV_X64_TABLE_REGISTER, 16);
949/** Pointer to a value of HvX64RegisterIdtr/Gdtrr. */
950typedef HV_X64_TABLE_REGISTER *PHV_X64_TABLE_REGISTER;
951
952/** Value format for HvX64RegisterFpMmx0..7 in floating pointer mode.
953 * @sa WHV_X64_FP_REGISTER, RTFLOAT80U2 */
954typedef union
955{
956 HV_UINT128 AsUINT128;
957 struct
958 {
959 uint64_t Mantissa;
960 uint64_t BiasedExponent : 15;
961 uint64_t Sign : 1;
962 uint64_t Reserved : 48;
963 };
964} HV_X64_FP_REGISTER;
965/** Pointer to a value of HvX64RegisterFpMmx0..7 in floating point mode. */
966typedef HV_X64_FP_REGISTER *PHV_X64_FP_REGISTER;
967
968/** Value union for HvX64RegisterFpMmx0..7. */
969typedef union
970{
971 HV_UINT128 AsUINT128;
972 HV_X64_FP_REGISTER Fp;
973 uint64_t Mmx;
974} HV_X64_FP_MMX_REGISTER;
975/** Pointer to a value of HvX64RegisterFpMmx0..7. */
976typedef HV_X64_FP_MMX_REGISTER *PHV_X64_FP_MMX_REGISTER;
977
978/** Value format for HvX64RegisterFpControlStatus.
979 * @sa WHV_X64_FP_CONTROL_STATUS_REGISTER */
980typedef union
981{
982 HV_UINT128 AsUINT128;
983 struct
984 {
985 uint16_t FpControl;
986 uint16_t FpStatus;
987 uint8_t FpTag;
988 uint8_t IgnNe : 1;
989 uint8_t Reserved : 7;
990 uint16_t LastFpOp;
991 union
992 {
993 uint64_t LastFpRip;
994 struct
995 {
996 uint32_t LastFpEip;
997 uint16_t LastFpCs;
998 };
999 };
1000 };
1001} HV_X64_FP_CONTROL_STATUS_REGISTER;
1002/** Pointer to a value of HvX64RegisterFpControlStatus. */
1003typedef HV_X64_FP_CONTROL_STATUS_REGISTER *PHV_X64_FP_CONTROL_STATUS_REGISTER;
1004
1005/** Value format for HvX64RegisterXmmControlStatus.
1006 * @sa WHV_X64_XMM_CONTROL_STATUS_REGISTER */
1007typedef union
1008{
1009 HV_UINT128 AsUINT128;
1010 struct
1011 {
1012 union
1013 {
1014 uint64_t LastFpRdp;
1015 struct
1016 {
1017 uint32_t LastFpDp;
1018 uint16_t LastFpDs;
1019 };
1020 };
1021 uint32_t XmmStatusControl;
1022 uint32_t XmmStatusControlMask;
1023 };
1024} HV_X64_XMM_CONTROL_STATUS_REGISTER;
1025/** Pointer to a value of HvX64RegisterXmmControlStatus. */
1026typedef HV_X64_XMM_CONTROL_STATUS_REGISTER *PHV_X64_XMM_CONTROL_STATUS_REGISTER;
1027
1028/** Register value union.
1029 * @sa WHV_REGISTER_VALUE */
1030typedef union
1031{
1032 HV_UINT128 Reg128;
1033 uint64_t Reg64;
1034 uint32_t Reg32;
1035 uint16_t Reg16;
1036 uint8_t Reg8;
1037 HV_EXPLICIT_SUSPEND_REGISTER ExplicitSuspend;
1038 HV_INTERCEPT_SUSPEND_REGISTER InterceptSuspend;
1039 HV_X64_INTERRUPT_STATE_REGISTER InterruptState;
1040 HV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption;
1041 HV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications;
1042 HV_X64_TABLE_REGISTER Table;
1043 HV_X64_SEGMENT_REGISTER Segment;
1044 HV_X64_FP_REGISTER Fp;
1045 HV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus;
1046 HV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus;
1047} HV_REGISTER_VALUE;
1048AssertCompileSize(HV_REGISTER_VALUE, 16);
1049/** Pointer to a Hyper-V register value union. */
1050typedef HV_REGISTER_VALUE *PHV_REGISTER_VALUE;
1051/** Pointer to a const Hyper-V register value union. */
1052typedef HV_REGISTER_VALUE const *PCHV_REGISTER_VALUE;
1053
1054
1055/** Input for HvCallGetVpRegister. */
1056typedef struct
1057{
1058 HV_PARTITION_ID PartitionId;
1059 HV_VP_INDEX VpIndex;
1060 /** Was this introduced after v2? Dunno what it it really is. */
1061 uint32_t fFlags;
1062 /* The repeating part: */
1063 HV_REGISTER_NAME Names[RT_FLEXIBLE_ARRAY];
1064} HV_INPUT_GET_VP_REGISTERS;
1065AssertCompileMemberOffset(HV_INPUT_GET_VP_REGISTERS, Names, 16);
1066/** Pointer to input for HvCallGetVpRegister. */
1067typedef HV_INPUT_GET_VP_REGISTERS *PHV_INPUT_GET_VP_REGISTERS;
1068/* Output for HvCallGetVpRegister is an array of HV_REGISTER_VALUE parallel to HV_INPUT_GET_VP_REGISTERS::Names. */
1069
1070
1071/** Register and value pair for HvCallSetVpRegister. */
1072typedef struct
1073{
1074 HV_REGISTER_NAME Name;
1075 uint32_t Pad0;
1076 uint64_t Pad1;
1077 HV_REGISTER_VALUE Value;
1078} HV_REGISTER_ASSOC;
1079AssertCompileSize(HV_REGISTER_ASSOC, 32);
1080AssertCompileMemberOffset(HV_REGISTER_ASSOC, Value, 16);
1081/** Pointer to a register and value pair for HvCallSetVpRegister. */
1082typedef HV_REGISTER_ASSOC *PHV_REGISTER_ASSOC;
1083/** Helper for clearing the alignment padding members. */
1084#define HV_REGISTER_ASSOC_ZERO_PADDING(a_pRegAssoc) do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; } while (0)
1085/** Helper for clearing the alignment padding members and the high 64-bit
1086 * part of the value. */
1087#define HV_REGISTER_ASSOC_ZERO_PADDING_AND_HI64(a_pRegAssoc) \
1088 do { (a_pRegAssoc)->Pad0 = 0; (a_pRegAssoc)->Pad1 = 0; (a_pRegAssoc)->Value.Reg128.High64 = 0; } while (0)
1089
1090/** Input for HvCallSetVpRegister. */
1091typedef struct
1092{
1093 HV_PARTITION_ID PartitionId;
1094 HV_VP_INDEX VpIndex;
1095 uint32_t RsvdZ;
1096 /* The repeating part: */
1097 HV_REGISTER_ASSOC Elements[RT_FLEXIBLE_ARRAY];
1098} HV_INPUT_SET_VP_REGISTERS;
1099AssertCompileMemberOffset(HV_INPUT_SET_VP_REGISTERS, Elements, 16);
1100/** Pointer to input for HvCallSetVpRegister. */
1101typedef HV_INPUT_SET_VP_REGISTERS *PHV_INPUT_SET_VP_REGISTERS;
1102
1103
1104
1105/**
1106 * Hyper-V SyncIC message types.
1107 */
1108typedef enum
1109{
1110 HvMessageTypeNone = 0x00000000,
1111
1112 HvMessageTypeUnmappedGpa = 0x80000000,
1113 HvMessageTypeGpaIntercept,
1114
1115 HvMessageTimerExpired = 0x80000010,
1116
1117 HvMessageTypeInvalidVpRegisterValue = 0x80000020,
1118 HvMessageTypeUnrecoverableException,
1119 HvMessageTypeUnsupportedFeature,
1120 HvMessageTypeTlbPageSizeMismatch, /**< @since v5 */
1121
1122 /** @note Same as HvMessageTypeX64ApicEoi? Gone in 5.0. Missing from 7600 WDK
1123 * headers even if it's in the 2.0 docs. */
1124 HvMessageTypeApicEoi = 0x80000030,
1125 /** @note Same as HvMessageTypeX64LegacyFpError? Gone in 5.0, whereas 4.0b
1126 * calls it HvMessageTypeX64LegacyFpError. Missing from 7600 WDK
1127 * headers even if it's in the 2.0 docs. */
1128 HvMessageTypeFerrAsserted,
1129
1130 HvMessageTypeEventLogBufferComplete = 0x80000040,
1131
1132 HvMessageTypeX64IoPortIntercept = 0x80010000,
1133 HvMessageTypeX64MsrIntercept,
1134 HvMessageTypeX64CpuidIntercept,
1135 HvMessageTypeX64ExceptionIntercept,
1136 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1137 HvMessageTypeX64ApicEoi,
1138 /** @note Appeared in 5.0 docs, but were here in 7600 WDK headers already. */
1139 HvMessageTypeX64LegacyFpError,
1140 /** @since v5 */
1141 HvMessageTypeX64RegisterIntercept,
1142 /** @since WinHvPlatform? */
1143 HvMessageTypeX64Halt,
1144 /** @since WinHvPlatform? */
1145 HvMessageTypeX64InterruptWindow
1146
1147} HV_MESSAGE_TYPE;
1148AssertCompileSize(HV_MESSAGE_TYPE, 4);
1149AssertCompile(HvMessageTypeX64RegisterIntercept == 0x80010006);
1150AssertCompile(HvMessageTypeX64Halt == 0x80010007);
1151AssertCompile(HvMessageTypeX64InterruptWindow == 0x80010008);
1152/** Pointer to a Hyper-V SyncIC message type. */
1153typedef HV_MESSAGE_TYPE *PHV_MESSAGE_TYPE;
1154
1155/** Flag set for hypervisor messages, guest cannot send messages with this
1156 * flag set. */
1157#define HV_MESSAGE_TYPE_HYPERVISOR_MASK UINT32_C(0x80000000)
1158
1159/** Hyper-V SynIC message size (they are fixed sized). */
1160#define HV_MESSAGE_SIZE 256
1161/** Maximum Hyper-V SynIC message payload size in bytes. */
1162#define HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT (HV_MESSAGE_SIZE - 16)
1163/** Maximum Hyper-V SynIC message payload size in QWORDs (uint64_t). */
1164#define HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT (HV_MESSAGE_MAX_PAYLOAD_BYTE_COUNT / 8)
1165
1166/** SynIC message flags. */
1167typedef union
1168{
1169 uint8_t AsUINT8;
1170 struct
1171 {
1172 /** Messages are pending in the queue. */
1173 uint8_t MessagePending : 1;
1174 uint8_t Reserved : 7;
1175 };
1176} HV_MESSAGE_FLAGS;
1177AssertCompileSize(HV_MESSAGE_FLAGS, 1);
1178
1179/** SynIC message header. */
1180typedef struct
1181{
1182 HV_MESSAGE_TYPE MessageType;
1183 /** The 2.0-5.0b docs all have this incorrectly switched with 'Reserved', WDK 7600 got it right. */
1184 uint8_t PayloadSize;
1185 HV_MESSAGE_FLAGS MessageFlags;
1186 uint16_t Reserved;
1187 union
1188 {
1189 uint64_t OriginationId;
1190 HV_PARTITION_ID Sender;
1191 HV_PORT_ID Port;
1192 };
1193} HV_MESSAGE_HEADER;
1194AssertCompileSize(HV_MESSAGE_HEADER, 16);
1195/** Pointer to a Hyper-V message header. */
1196typedef HV_MESSAGE_HEADER *PHV_MESSAGE_HEADER;
1197/** Pointer to a const Hyper-V message header. */
1198typedef HV_MESSAGE_HEADER const *PCHV_MESSAGE_HEADER;
1199
1200
1201
1202/** @name Intercept access type.
1203 * @{ */
1204typedef uint8_t HV_INTERCEPT_ACCESS_TYPE;
1205#define HV_INTERCEPT_ACCESS_READ 0
1206#define HV_INTERCEPT_ACCESS_WRITE 1
1207#define HV_INTERCEPT_ACCESS_EXECUTE 2
1208/** @} */
1209
1210/** @name Intercept access type mask.
1211 * @{ */
1212typedef uint32_t HV_INTERCEPT_ACCESS_TYPE_MASK;
1213#define HV_INTERCEPT_ACCESS_MASK_NONE 0
1214#define HV_INTERCEPT_ACCESS_MASK_READ 1
1215#define HV_INTERCEPT_ACCESS_MASK_WRITE 2
1216#define HV_INTERCEPT_ACCESS_MASK_EXECUTE 4
1217/** @} */
1218
1219/** X64 intercept execution state.
1220 * @sa WHV_X64_VP_EXECUTION_STATE */
1221typedef union
1222{
1223 uint16_t AsUINT16;
1224 struct
1225 {
1226 uint16_t Cpl : 2;
1227 uint16_t Cr0Pe : 1;
1228 uint16_t Cr0Am : 1;
1229 uint16_t EferLma : 1;
1230 uint16_t DebugActive : 1;
1231 uint16_t InterruptionPending : 1;
1232 uint16_t Reserved0 : 5;
1233 uint16_t InterruptShadow : 1;
1234 uint16_t Reserved1 : 3;
1235 };
1236} HV_X64_VP_EXECUTION_STATE;
1237AssertCompileSize(HV_X64_VP_EXECUTION_STATE, 2);
1238/** Pointer to X86 intercept execution state. */
1239typedef HV_X64_VP_EXECUTION_STATE *PHV_X64_VP_EXECUTION_STATE;
1240/** Pointer to const X86 intercept execution state. */
1241typedef HV_X64_VP_EXECUTION_STATE const *PCHV_X64_VP_EXECUTION_STATE;
1242
1243/** X64 intercept message header. */
1244typedef struct
1245{
1246 HV_VP_INDEX VpIndex; /**< 0x00 */
1247 uint8_t InstructionLength; /**< 0x04: Zero if not available, instruction fetch exit, ... */
1248 HV_INTERCEPT_ACCESS_TYPE InterceptAccessType; /**< 0x05 */
1249 HV_X64_VP_EXECUTION_STATE ExecutionState; /**< 0x06 */
1250 HV_X64_SEGMENT_REGISTER CsSegment; /**< 0x08 */
1251 uint64_t Rip; /**< 0x18 */
1252 uint64_t Rflags; /**< 0x20 */
1253} HV_X64_INTERCEPT_MESSAGE_HEADER;
1254AssertCompileSize(HV_X64_INTERCEPT_MESSAGE_HEADER, 40);
1255/** Pointer to a x86 intercept message header. */
1256typedef HV_X64_INTERCEPT_MESSAGE_HEADER *PHV_X64_INTERCEPT_MESSAGE_HEADER;
1257
1258
1259/** X64 memory access flags (HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa).
1260 * @sa WHV_MEMORY_ACCESS_INFO */
1261typedef union
1262{
1263 uint8_t AsUINT8;
1264 struct
1265 {
1266 uint8_t GvaValid : 1;
1267 uint8_t Reserved : 7;
1268 };
1269} HV_X64_MEMORY_ACCESS_INFO;
1270AssertCompileSize(HV_X64_MEMORY_ACCESS_INFO, 1);
1271
1272/** The payload format for HvMessageTypeGpaIntercept and HvMessageTypeUnmappedGpa.
1273 * @sa WHV_MEMORY_ACCESS_CONTEXT
1274 * @note max message size. */
1275typedef struct
1276{
1277 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1278 HV_CACHE_TYPE CacheType; /**< 0x28 */
1279 uint8_t InstructionByteCount; /**< 0x2c */
1280 HV_X64_MEMORY_ACCESS_INFO MemoryAccessInfo; /**< 0x2d */
1281 uint16_t Reserved1; /**< 0x2e */
1282 uint64_t GuestVirtualAddress; /**< 0x30 */
1283 uint64_t GuestPhysicalAddress; /**< 0x38 */
1284 uint8_t InstructionBytes[16]; /**< 0x40 */
1285 /* We don't the following (v5 / WinHvPlatform): */
1286 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1287 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1288 uint64_t Rax; /**< 0x70 */
1289 uint64_t Rcx; /**< 0x78 */
1290 uint64_t Rdx; /**< 0x80 */
1291 uint64_t Rbx; /**< 0x88 */
1292 uint64_t Rsp; /**< 0x90 */
1293 uint64_t Rbp; /**< 0x98 */
1294 uint64_t Rsi; /**< 0xa0 */
1295 uint64_t Rdi; /**< 0xa8 */
1296 uint64_t R8; /**< 0xb0 */
1297 uint64_t R9; /**< 0xb8 */
1298 uint64_t R10; /**< 0xc0 */
1299 uint64_t R11; /**< 0xc8 */
1300 uint64_t R12; /**< 0xd0 */
1301 uint64_t R13; /**< 0xd8 */
1302 uint64_t R14; /**< 0xe0 */
1303 uint64_t R15; /**< 0xe8 */
1304} HV_X64_MEMORY_INTERCEPT_MESSAGE;
1305AssertCompileSize(HV_X64_MEMORY_INTERCEPT_MESSAGE, 0xf0);
1306AssertCompileMemberOffset(HV_X64_MEMORY_INTERCEPT_MESSAGE, DsSegment, 0x50);
1307/** Pointer to a HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1308typedef HV_X64_MEMORY_INTERCEPT_MESSAGE *PHV_X64_MEMORY_INTERCEPT_MESSAGE;
1309/** Pointer to a const HvMessageTypeGpaIntercept or HvMessageTypeUnmappedGpa payload. */
1310typedef HV_X64_MEMORY_INTERCEPT_MESSAGE const *PCHV_X64_MEMORY_INTERCEPT_MESSAGE;
1311
1312
1313/** X64 I/O port access information (HvMessageTypeX64IoPortIntercept). */
1314typedef union HV_X64_IO_PORT_ACCESS_INFO
1315{
1316 uint8_t AsUINT8;
1317 struct
1318 {
1319 uint8_t AccessSize : 3;
1320 uint8_t StringOp : 1;
1321 uint8_t RepPrefix : 1;
1322 uint8_t Reserved : 3;
1323 };
1324} HV_X64_IO_PORT_ACCESS_INFO;
1325AssertCompileSize(HV_X64_IO_PORT_ACCESS_INFO, 1);
1326
1327/** The payload format for HvMessageTypeX64IoPortIntercept. */
1328typedef struct _HV_X64_IO_PORT_INTERCEPT_MESSAGE
1329{
1330 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1331 uint16_t PortNumber; /**< 0x28 */
1332 HV_X64_IO_PORT_ACCESS_INFO AccessInfo; /**< 0x2a */
1333 uint8_t InstructionByteCount; /**< 0x2b */
1334 uint32_t Reserved; /**< 0x2c */
1335 uint64_t Rax; /**< 0x30 */
1336 uint8_t InstructionBytes[16]; /**< 0x38 */
1337 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x48 */
1338 HV_X64_SEGMENT_REGISTER EsSegment; /**< 0x58 */
1339 uint64_t Rcx; /**< 0x68 */
1340 uint64_t Rsi; /**< 0x70 */
1341 uint64_t Rdi; /**< 0x78 */
1342} HV_X64_IO_PORT_INTERCEPT_MESSAGE;
1343AssertCompileSize(HV_X64_IO_PORT_INTERCEPT_MESSAGE, 128);
1344/** Pointer to a HvMessageTypeX64IoPortIntercept payload. */
1345typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE *PHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1346/** Pointer to a const HvMessageTypeX64IoPortIntercept payload. */
1347typedef HV_X64_IO_PORT_INTERCEPT_MESSAGE const *PCHV_X64_IO_PORT_INTERCEPT_MESSAGE;
1348
1349/** Full I/O port message. */
1350typedef struct
1351{
1352 HV_MESSAGE_HEADER MsgHdr;
1353 HV_X64_IO_PORT_INTERCEPT_MESSAGE Payload;
1354} HV_X64_IO_PORT_INTERCEPT_MESSAGE_FULL;
1355
1356
1357/**
1358 * The payload format for HvMessageTypeX64CpuidIntercept,
1359 *
1360 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1361 */
1362typedef struct
1363{
1364 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00: The usual intercept header. */
1365 uint64_t Rax; /**< 0x28: Input RAX. */
1366 uint64_t Rcx; /**< 0x30: Input RCX. */
1367 uint64_t Rdx; /**< 0x38: Input RDX. */
1368 uint64_t Rbx; /**< 0x40: Input RBX. */
1369 uint64_t DefaultResultRax; /**< 0x48: Default result RAX. */
1370 uint64_t DefaultResultRcx; /**< 0x50: Default result RCX. */
1371 uint64_t DefaultResultRdx; /**< 0x58: Default result RDX. */
1372 uint64_t DefaultResultRbx; /**< 0x60: Default result RBX. */
1373} HV_X64_CPUID_INTERCEPT_MESSAGE;
1374AssertCompileSize(HV_X64_CPUID_INTERCEPT_MESSAGE, 0x68);
1375/** Pointer to a HvMessageTypeX64CpuidIntercept payload. */
1376typedef HV_X64_CPUID_INTERCEPT_MESSAGE *PHV_X64_CPUID_INTERCEPT_MESSAGE;
1377/** Pointer to a const HvMessageTypeX64CpuidIntercept payload. */
1378typedef HV_X64_CPUID_INTERCEPT_MESSAGE const *PCHV_X64_CPUID_INTERCEPT_MESSAGE;
1379
1380/** Full HvMessageTypeX64CpuidIntercept message. */
1381typedef struct
1382{
1383 HV_MESSAGE_HEADER MsgHdr;
1384 HV_X64_CPUID_INTERCEPT_MESSAGE Payload;
1385} HV_X64_CPUID_INTERCEPT_MESSAGE_FULL;
1386
1387
1388/** X64 exception information (HvMessageTypeX64ExceptionIntercept).
1389 * @sa WHV_VP_EXCEPTION_INFO */
1390typedef union
1391{
1392 uint8_t AsUINT8;
1393 struct
1394 {
1395 uint8_t ErrorCodeValid : 1;
1396 /** @todo WHV_VP_EXCEPTION_INFO::SoftwareException */
1397 uint8_t Reserved : 7;
1398 };
1399} HV_X64_EXCEPTION_INFO;
1400AssertCompileSize(HV_X64_EXCEPTION_INFO, 1);
1401
1402/** The payload format for HvMessageTypeX64ExceptionIntercept.
1403 * @sa WHV_VP_EXCEPTION_CONTEXT
1404 * @note max message size. */
1405typedef struct
1406{
1407 HV_X64_INTERCEPT_MESSAGE_HEADER Header; /**< 0x00 */
1408 uint16_t ExceptionVector; /**< 0x28 */
1409 HV_X64_EXCEPTION_INFO ExceptionInfo; /**< 0x2a */
1410 uint8_t InstructionByteCount; /**< 0x2b */
1411 uint32_t ErrorCode; /**< 0x2c */
1412 uint64_t ExceptionParameter; /**< 0x30 */
1413 uint64_t Reserved; /**< 0x38 */
1414 uint8_t InstructionBytes[16]; /**< 0x40 */
1415 HV_X64_SEGMENT_REGISTER DsSegment; /**< 0x50 */
1416 HV_X64_SEGMENT_REGISTER SsSegment; /**< 0x60 */
1417 uint64_t Rax; /**< 0x70 */
1418 uint64_t Rcx; /**< 0x78 */
1419 uint64_t Rdx; /**< 0x80 */
1420 uint64_t Rbx; /**< 0x88 */
1421 uint64_t Rsp; /**< 0x90 */
1422 uint64_t Rbp; /**< 0x98 */
1423 uint64_t Rsi; /**< 0xa0 */
1424 uint64_t Rdi; /**< 0xa8 */
1425 uint64_t R8; /**< 0xb0 */
1426 uint64_t R9; /**< 0xb8 */
1427 uint64_t R10; /**< 0xc0 */
1428 uint64_t R11; /**< 0xc8 */
1429 uint64_t R12; /**< 0xd0 */
1430 uint64_t R13; /**< 0xd8 */
1431 uint64_t R14; /**< 0xe0 */
1432 uint64_t R15; /**< 0xe8 */
1433} HV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1434AssertCompileSize(HV_X64_EXCEPTION_INTERCEPT_MESSAGE, 0xf0);
1435/** Pointer to a HvMessageTypeX64ExceptionIntercept payload. */
1436typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE *PHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1437/** Pointer to a ocnst HvMessageTypeX64ExceptionIntercept payload. */
1438typedef HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *PCHV_X64_EXCEPTION_INTERCEPT_MESSAGE;
1439
1440
1441/**
1442 * The payload format for HvMessageTypeX64Halt,
1443 *
1444 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1445 */
1446typedef struct
1447{
1448 /** Seems to be a zero 64-bit field here. */
1449 uint64_t u64Reserved;
1450} HV_X64_HALT_MESSAGE;
1451/** Pointer to a HvMessageTypeX64Halt payload. */
1452typedef HV_X64_HALT_MESSAGE *PHV_X64_HALT_MESSAGE;
1453/** Pointer to a const HvMessageTypeX64Halt payload. */
1454typedef HV_X64_HALT_MESSAGE const *PCHV_X64_HALT_MESSAGE;
1455
1456/** Full HvMessageTypeX64Halt message. */
1457typedef struct
1458{
1459 HV_MESSAGE_HEADER MsgHdr;
1460 HV_X64_HALT_MESSAGE Payload;
1461} HV_X64_HALT_MESSAGE_FULL;
1462
1463
1464/**
1465 * The payload format for HvMessageTypeX64InterruptWindow,
1466 *
1467 * @note This message does not include HV_X64_INTERCEPT_MESSAGE_HEADER!
1468 */
1469typedef struct
1470{
1471 /** 0x00: The usual intercept header. */
1472 HV_X64_INTERCEPT_MESSAGE_HEADER Header;
1473 /** 0x28: What's pending. */
1474 HV_X64_PENDING_INTERRUPTION_TYPE Type;
1475 /** 0x2c: Explicit structure alignment padding. */
1476 uint32_t u32ExplicitPadding;
1477} HV_X64_INTERRUPT_WINDOW_MESSAGE;
1478AssertCompileSize(HV_X64_INTERRUPT_WINDOW_MESSAGE, 0x30);
1479/** Pointer to a HvMessageTypeX64InterruptWindow payload. */
1480typedef HV_X64_INTERRUPT_WINDOW_MESSAGE *PHV_X64_INTERRUPT_WINDOW_MESSAGE;
1481/** Pointer to a const HvMessageTypeX64InterruptWindow payload. */
1482typedef HV_X64_INTERRUPT_WINDOW_MESSAGE const *PCHV_X64_INTERRUPT_WINDOW_MESSAGE;
1483
1484/** Full HvMessageTypeX64InterruptWindow message. */
1485typedef struct
1486{
1487 /** Payload size is 0x30. */
1488 HV_MESSAGE_HEADER MsgHdr;
1489 HV_X64_INTERRUPT_WINDOW_MESSAGE Payload;
1490} HV_X64_INTERRUPT_WINDOW_MESSAGE_FULL;
1491
1492
1493
1494/** Hyper-V SynIC message. */
1495typedef struct
1496{
1497 HV_MESSAGE_HEADER Header;
1498 /** 0x10 */
1499 union
1500 {
1501 uint64_t Payload[HV_MESSAGE_MAX_PAYLOAD_QWORD_COUNT];
1502
1503 /** Common header for X64 intercept messages.
1504 * The HvMessageTypeUnrecoverableException message only has this. */
1505 HV_X64_INTERCEPT_MESSAGE_HEADER X64InterceptHeader;
1506 /** HvMessageTypeGpaIntercept, HvMessageTypeUnmappedGpa. */
1507 HV_X64_MEMORY_INTERCEPT_MESSAGE X64MemoryIntercept;
1508 /** HvMessageTypeX64IoPortIntercept */
1509 HV_X64_IO_PORT_INTERCEPT_MESSAGE X64IoPortIntercept;
1510 /** HvMessageTypeX64CpuidIntercept */
1511 HV_X64_CPUID_INTERCEPT_MESSAGE X64CpuIdIntercept;
1512 /** HvMessageTypeX64ExceptionIntercept */
1513 HV_X64_EXCEPTION_INTERCEPT_MESSAGE X64ExceptionIntercept;
1514 /** HvMessageTypeX64Halt.
1515 * @note No intercept header? */
1516 HV_X64_HALT_MESSAGE X64Halt;
1517 /** HvMessageTypeX64InterruptWindow. */
1518 HV_X64_INTERRUPT_WINDOW_MESSAGE X64InterruptWindow;
1519 };
1520} HV_MESSAGE;
1521AssertCompileSize(HV_MESSAGE, HV_MESSAGE_SIZE);
1522/** Pointer to a Hyper-V SynIC message. */
1523typedef HV_MESSAGE *PHV_MESSAGE;
1524/** Pointer to const a Hyper-V SynIC message. */
1525typedef HV_MESSAGE const *PCHV_MESSAGE;
1526
1527#endif
1528
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