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source: vbox/trunk/include/iprt/nt/nt-structures.h@ 73916

Last change on this file since 73916 was 73458, checked in by vboxsync, 6 years ago

iprt/nt/nt-structures.h: Added AMD64 trap frame structures.

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File size: 6.1 KB
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1/* $Id: nt-structures.h 73458 2018-08-02 21:03:36Z vboxsync $ */
2/** @file
3 * IPRT - Header for NT structures.
4 */
5
6/*
7 * Copyright (C) 2010-2018 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27#ifndef ___iprt_nt_nt_structures_h___
28#define ___iprt_nt_nt_structures_h___
29
30
31#include <iprt/types.h>
32
33
34/** @name NT Kernel Structures
35 * @{ */
36typedef struct KTRAP_FRAME_AMD64
37{
38 uint64_t P1Home; /**< 0x00 */
39 uint64_t P2Home; /**< 0x08 */
40 uint64_t P3Home; /**< 0x10 */
41 uint64_t P4Home; /**< 0x18 */
42 uint64_t P5; /**< 0x20 */
43 uint8_t PreviousMode; /**< 0x28: KPROCESSOR_MODE / MODE - unused? */
44 uint8_t PreviousIrql; /**< 0x29: KIRQL - Interrupts? */
45 uint8_t FaultIndicator; /**< 0x2a: Holds (ErrCd >> 1) & 9) for \#PF. */
46 uint8_t ExceptionActive; /**< 0x2b: 0 if interrupt, 1 if exception, 2 if service call, */
47 uint32_t MxCsr; /**< 0x2c */
48 /** @name Volatile general register state. Only saved on interrupts and exceptions.
49 * @{ */
50 uint64_t Rax; /**< 0x30 */
51 uint64_t Rcx; /**< 0x38 */
52 uint64_t Rdx; /**< 0x40 */
53 uint64_t R8; /**< 0x48 */
54 uint64_t R9; /**< 0x50 */
55 uint64_t R10; /**< 0x58 */
56 uint64_t R11; /**< 0x60 */
57 /** @} */
58 uint64_t GsBaseOrSwap; /**< 0x68: GsBase if previous mode is kernel, GsSwap if pervious mode was user. */
59 /** @name Volatile SSE state. Only saved on interrupts and exceptions.
60 * @{ */
61 RTUINT128U Xmm0; /**< 0x70 */
62 RTUINT128U Xmm1; /**< 0x80: RBP points here. */
63 RTUINT128U Xmm2; /**< 0x90 */
64 RTUINT128U Xmm3; /**< 0xa0 */
65 RTUINT128U Xmm4; /**< 0xb0 */
66 RTUINT128U Xmm5; /**< 0xc0 */
67 /** @} */
68 uint64_t FaultAddrOrCtxRecOrTS; /**< 0xd0: Used to save CR2 in \#PF and NMI handlers. */
69 /** @name Usermode debug state.
70 * @{ */
71 uint64_t Dr0; /**< 0xd8: Only if DR7 indicates active. */
72 uint64_t Dr1; /**< 0xe0: Only if DR7 indicates active. */
73 uint64_t Dr2; /**< 0xe8: Only if DR7 indicates active. */
74 uint64_t Dr3; /**< 0xf0: Only if DR7 indicates active. */
75 uint64_t Dr6; /**< 0xf8: Only if DR7 indicates active. */
76 uint64_t Dr7; /**< 0x100: Considered active any of these bits are set:
77 X86_DR7_LE_ALL | X86_DR7_LE | X86_DR7_GE. */
78 union
79 {
80 struct
81 {
82 uint64_t LastBranchControl; /**< 0x108 */
83 uint32_t LastBranchMSR; /**< 0x110 */
84 } amd;
85 struct
86 {
87 uint64_t DebugControl; /**< 0x108 */
88 uint64_t LastBranchToRip; /**< 0x110 */
89 uint64_t LastBranchFromRip; /**< 0x118 */
90 uint64_t LastExceptionToRip; /**< 0x120 */
91 uint64_t LastExceptionFromRip; /**< 0x128 */
92 } intel;
93 } u;
94 /** @} */
95 /** @name Segment registers. Not sure when these would actually be used.
96 * @{ */
97 uint16_t SegDs; /**< 0x130 */
98 uint16_t SegEs; /**< 0x132 */
99 uint16_t SegFs; /**< 0x134 */
100 uint16_t SegGs; /**< 0x136 */
101 /** @} */
102 uint64_t TrapFrame; /**< 0x138 */
103 /** @name Some non-volatile registers only saved in service calls.
104 * @{ */
105 uint64_t Rbx; /**< 0x140 */
106 uint64_t Rdi; /**< 0x148 */
107 uint64_t Rsi; /**< 0x150 */
108 /** @} */
109 uint64_t Rbp; /**< 0x158: Typically restored by: MOV RBP, [RBP + 0xd8] */
110 uint64_t ErrCdOrXcptFrameOrS; /**< 0x160 */
111 uint64_t Rip; /**< 0x168 - IRET RIP */
112 uint16_t SegCs; /**< 0x170 - IRET CS */
113 uint8_t Fill0; /**< 0x172 */
114 uint8_t Logging; /**< 0x173 */
115 uint16_t Fill1[2]; /**< 0x174 */
116 uint32_t EFlags; /**< 0x178 - IRET EFLAGS - Uninitialized for stack switching/growth code path. */
117 uint32_t Fill2; /**< 0x17c */
118 uint64_t Rsp; /**< 0x180 - IRET RSP */
119 uint16_t SegSs; /**< 0x188 - IRET SS */
120 uint16_t Fill3; /**< 0x18a */
121 uint32_t Fill4; /**< 0x18c */
122} KTRAP_FRAME_AMD64;
123AssertCompileSize(KTRAP_FRAME_AMD64, 0x190);
124/** Pointer to an AMD64 NT trap frame. */
125typedef KTRAP_FRAME_AMD64 *PKTRAP_FRAME_AMD64;
126/** Pointer to a const AMD64 NT trap frame. */
127typedef KTRAP_FRAME_AMD64 const *PCKTRAP_FRAME_AMD64;
128
129/** @} */
130
131
132#endif
133
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