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source: vbox/trunk/src/VBox/Additions/3D/mesa/mesa-17.3.9/docs/relnotes/17.0.2.html@ 75443

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Exported Mesa related code to OSE.

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1<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
2<html lang="en">
3<head>
4 <meta http-equiv="content-type" content="text/html; charset=utf-8">
5 <title>Mesa Release Notes</title>
6 <link rel="stylesheet" type="text/css" href="../mesa.css">
7</head>
8<body>
9
10<div class="header">
11 <h1>The Mesa 3D Graphics Library</h1>
12</div>
13
14<iframe src="../contents.html"></iframe>
15<div class="content">
16
17<h1>Mesa 17.0.2 Release Notes / March 20, 2017</h1>
18
19<p>
20Mesa 17.0.2 is a bug fix release which fixes bugs found since the 17.0.1 release.
21</p>
22<p>
23Mesa 17.0.2 implements the OpenGL 4.5 API, but the version reported by
24glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
25glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
26Some drivers don't support all the features required in OpenGL 4.5. OpenGL
274.5 is <strong>only</strong> available if requested at context creation
28because compatibility contexts are not supported.
29</p>
30
31
32<h2>SHA256 checksums</h2>
33<pre>
342e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5 mesa-17.0.2.tar.gz
35f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4 mesa-17.0.2.tar.xz
36</pre>
37
38
39<h2>New features</h2>
40<p>None</p>
41
42
43<h2>Bug fixes</h2>
44
45<ul>
46
47<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=68504">Bug 68504</a> - 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot convert 'bool' to '__vector(4) __bool int' in return</li>
48
49<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=97988">Bug 97988</a> - [radeonsi] playing back videos with VDPAU exhibits deinterlacing/anti-aliasing issues not visible with VA-API</li>
50
51<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99484">Bug 99484</a> - Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not render correctly</li>
52
53<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=99715">Bug 99715</a> - Don't print: &quot;Note: Buggy applications may crash, if they do please report to vendor&quot;</li>
54
55<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100049">Bug 100049</a> - &quot;ralloc: Make sure ralloc() allocations match malloc()'s alignment.&quot; causes seg fault in 32bit build</li>
56
57</ul>
58
59
60<h2>Changes</h2>
61
62<p>Alex Smith (3):</p>
63<ul>
64 <li>radv: Emit pending flushes before executing a secondary command buffer</li>
65 <li>radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer</li>
66 <li>radv/ac: Fix shared memory offset calculation</li>
67</ul>
68
69<p>Bas Nieuwenhuizen (3):</p>
70<ul>
71 <li>radv: Disable HTILE for textures with multiple layers/levels.</li>
72 <li>radv: Emit cache flushes before CP DMA.</li>
73 <li>Revert "radv: Emit cache flushes before CP DMA."</li>
74</ul>
75
76<p>Dave Airlie (3):</p>
77<ul>
78 <li>radv: drop Z24 support.</li>
79 <li>radv: disable mip point pre clamping.</li>
80 <li>radv: setup llvm target data layout</li>
81</ul>
82
83<p>Emil Velikov (4):</p>
84<ul>
85 <li>docs: add sha256 checksums for 17.0.1</li>
86 <li>cherry-ignore: add the swizzle blorp_clear fix</li>
87 <li>i965: move brw_define.h ifndef guard to the top</li>
88 <li>Update version to 17.0.2</li>
89</ul>
90
91<p>Fredrik Höglund (2):</p>
92<ul>
93 <li>radv: fix the dynamic buffer index in vkCmdBindDescriptorSets</li>
94 <li>radv/ac: fix multiple descriptor sets with dynamic buffers</li>
95</ul>
96
97<p>Gregory Hainaut (1):</p>
98<ul>
99 <li>glapi: fix typo in count_scale</li>
100</ul>
101
102<p>Ilia Mirkin (2):</p>
103<ul>
104 <li>nvc0: take extra pushbuf space into account for pushbuf_space calls</li>
105 <li>nvc0: increase alignment to 256 for texture buffers on fermi</li>
106</ul>
107
108<p>Jacob Lifshay (1):</p>
109<ul>
110 <li>vulkan/wsi: Improve the DRI3 error message</li>
111</ul>
112
113<p>James Legg (1):</p>
114<ul>
115 <li>radv: Fix using more than 4 bound descriptor sets</li>
116</ul>
117
118<p>Jason Ekstrand (7):</p>
119<ul>
120 <li>anv/blorp/clear_subpass: Only set surface clear color for fast clears</li>
121 <li>anv: Accurately advertise dynamic descriptor limits</li>
122 <li>anv: Stall before fast-clear operations</li>
123 <li>anv: Properly handle destroying NULL devices and instances</li>
124 <li>anv/blorp: Turn off AUX after doing a CCS_D resolve</li>
125 <li>anv/blorp: Only set a clear color for resolves if fast-cleared</li>
126 <li>nir/intrinsics: Make load_barycentric_input take a 2-component coor</li>
127</ul>
128
129<p>Jonas Pfeil (1):</p>
130<ul>
131 <li>ralloc: Make sure ralloc() allocations match malloc()'s alignment.</li>
132</ul>
133
134<p>Kenneth Graunke (1):</p>
135<ul>
136 <li>egl: Ensure ResetNotificationStrategy matches for shared contexts.</li>
137</ul>
138
139<p>Marek Olšák (3):</p>
140<ul>
141 <li>st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops</li>
142 <li>st/mesa: set blend state for PBO readbacks</li>
143 <li>radeonsi: mark all bound shader buffer ranges as initialized</li>
144</ul>
145
146<p>Matt Turner (1):</p>
147<ul>
148 <li>clover: Work around build failure with AltiVec.</li>
149</ul>
150
151<p>Nanley Chery (2):</p>
152<ul>
153 <li>anv/pass: Avoid accessing attachment array out of bounds</li>
154 <li>anv/image: Remove extra dependency on HiZ-specific variable</li>
155</ul>
156
157<p>Nicolai Hähnle (2):</p>
158<ul>
159 <li>st/glsl_to_tgsi: avoid iterating past the head of the instruction list</li>
160 <li>st/mesa: inform the driver of framebuffer changes before compute dispatches</li>
161</ul>
162
163<p>Robert Foss (1):</p>
164<ul>
165 <li>mesa: Avoid read of uninitialized variable</li>
166</ul>
167
168<p>Samuel Iglesias Gonsálvez (5):</p>
169<ul>
170 <li>i965/fs: mark last DF uniform array element as 64 bit live one</li>
171 <li>i965/fs: detect different bit size accesses to uniforms to push them in proper locations</li>
172 <li>i965/fs: fix indirect load DF uniforms on BSW/BXT</li>
173 <li>i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles</li>
174 <li>i965/fs: emit MOV_INDIRECT with the source with the right register type</li>
175</ul>
176
177<p>Samuel Pitoiset (1):</p>
178<ul>
179 <li>radeonsi: disable sinking common instructions down to the end block</li>
180</ul>
181
182
183</div>
184</body>
185</html>
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