VirtualBox

source: vbox/trunk/src/VBox/Additions/WINNT/Graphics/Video/common/wddm/VBoxMPIf.h@ 94746

Last change on this file since 94746 was 94746, checked in by vboxsync, 3 years ago

WDDM: shader and other commands. bugref:9845

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 34.8 KB
Line 
1/* $Id: VBoxMPIf.h 94746 2022-04-28 18:25:29Z vboxsync $ */
2/** @file
3 * VBox WDDM Miniport driver.
4 *
5 * Contains base definitions of constants & structures used to control & perform
6 * rendering, such as DMA commands types, allocation types, escape codes, etc.
7 * used by both miniport & display drivers.
8 *
9 * The latter uses these and only these defs to communicate with the former
10 * by posting appropriate requests via D3D RT Krnl Svc accessing callbacks.
11 */
12
13/*
14 * Copyright (C) 2011-2022 Oracle Corporation
15 *
16 * This file is part of VirtualBox Open Source Edition (OSE), as
17 * available from http://www.virtualbox.org. This file is free software;
18 * you can redistribute it and/or modify it under the terms of the GNU
19 * General Public License (GPL) as published by the Free Software
20 * Foundation, in version 2 as it comes in the "COPYING" file of the
21 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
22 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
23 */
24
25#ifndef GA_INCLUDED_SRC_WINNT_Graphics_Video_common_wddm_VBoxMPIf_h
26#define GA_INCLUDED_SRC_WINNT_Graphics_Video_common_wddm_VBoxMPIf_h
27#ifndef RT_WITHOUT_PRAGMA_ONCE
28# pragma once
29#endif
30
31#include <VBoxVideo.h>
32#include "../../../../include/VBoxDisplay.h"
33#include "../VBoxVideoTools.h"
34#include <VBoxUhgsmi.h>
35#include <VBox/VBoxGuestCoreTypes.h> /* for VBGLIOCHGCMCALL */
36
37/* One would increase this whenever definitions in this file are changed */
38#define VBOXVIDEOIF_VERSION 22
39
40/** @todo VBOXVIDEO_HWTYPE probably needs to be in VBoxVideo.h */
41typedef enum VBOXVIDEO_HWTYPE
42{
43 VBOXVIDEO_HWTYPE_VBOX = 0,
44 VBOXVIDEO_HWTYPE_VMSVGA = 1,
45 VBOXVIDEO_HWTYPE_32BIT = 0x7fffffff
46} VBOXVIDEO_HWTYPE;
47AssertCompileSize(VBOXVIDEO_HWTYPE, 4);
48
49#define VBOXWDDM_NODE_ID_SYSTEM 0
50#define VBOXWDDM_NODE_ID_3D (VBOXWDDM_NODE_ID_SYSTEM)
51#define VBOXWDDM_NODE_ID_3D_KMT (VBOXWDDM_NODE_ID_3D)
52#define VBOXWDDM_NODE_ID_2D_VIDEO (VBOXWDDM_NODE_ID_3D_KMT + 1)
53#define VBOXWDDM_NUM_NODES (VBOXWDDM_NODE_ID_2D_VIDEO + 1)
54
55#define VBOXWDDM_ENGINE_ID_SYSTEM 0
56#if (VBOXWDDM_NODE_ID_3D == VBOXWDDM_NODE_ID_SYSTEM)
57# define VBOXWDDM_ENGINE_ID_3D (VBOXWDDM_ENGINE_ID_SYSTEM + 1)
58#else
59# define VBOXWDDM_ENGINE_ID_3D 0
60#endif
61#if (VBOXWDDM_NODE_ID_3D_KMT == VBOXWDDM_NODE_ID_3D)
62# define VBOXWDDM_ENGINE_ID_3D_KMT VBOXWDDM_ENGINE_ID_3D
63#else
64# define VBOXWDDM_ENGINE_ID_3D_KMT 0
65#endif
66#if (VBOXWDDM_NODE_ID_2D_VIDEO == VBOXWDDM_NODE_ID_3D)
67# define VBOXWDDM_ENGINE_ID_2D_VIDEO VBOXWDDM_ENGINE_ID_3D
68#else
69# define VBOXWDDM_ENGINE_ID_2D_VIDEO 0
70#endif
71
72
73#ifdef VBOX_WITH_VMSVGA3D_DX
74/*
75 * Structures for the new D3D user mode driver.
76 */
77#pragma pack(1) /* VMSVGA structures are '__packed'. */
78#include <svga3d_reg.h>
79#pragma pack()
80
81/* D3DDDI_ALLOCATIONINFO::pPrivateDriverData */
82typedef enum VBOXDXALLOCATIONTYPE
83{
84 VBOXDXALLOCATIONTYPE_UNKNOWN = 0,
85 VBOXDXALLOCATIONTYPE_SURFACE = 1,
86 VBOXDXALLOCATIONTYPE_SHADERS = 2,
87 VBOXDXALLOCATIONTYPE_MAX,
88 VBOXDXALLOCATIONTYPE_32BIT = 0xFFFFFFFF
89} VBOXDXALLOCATIONTYPE;
90
91/* Information for DxgkDdiCreateAllocation and for SVGA3dCmdDefine[GB]Surface. */
92typedef struct VBOXDXALLOCATIONDESC
93{
94 VBOXDXALLOCATIONTYPE enmAllocationType;
95 uint32_t cbAllocation;
96 struct
97 {
98 SVGA3dSurfaceAllFlags surfaceFlags;
99 SVGA3dSurfaceFormat format;
100 uint32 numMipLevels;
101 uint32 multisampleCount;
102 SVGA3dMSPattern multisamplePattern;
103 SVGA3dMSQualityLevel qualityLevel;
104 SVGA3dTextureFilter autogenFilter;
105 SVGA3dSize size;
106 uint32 arraySize;
107 uint32 bufferByteStride;
108 } surfaceInfo;
109} VBOXDXALLOCATIONDESC, *PVBOXDXALLOCATIONDESC;
110#endif /* VBOX_WITH_VMSVGA3D_DX */
111
112/* create allocation func */
113typedef enum
114{
115 VBOXWDDM_ALLOC_TYPE_UNEFINED = 0,
116 VBOXWDDM_ALLOC_TYPE_STD_SHAREDPRIMARYSURFACE,
117 VBOXWDDM_ALLOC_TYPE_STD_SHADOWSURFACE,
118 VBOXWDDM_ALLOC_TYPE_STD_STAGINGSURFACE,
119 /* this one is win 7-specific and hence unused for now */
120 VBOXWDDM_ALLOC_TYPE_STD_GDISURFACE
121 /* custom allocation types requested from user-mode d3d module will go here */
122 , VBOXWDDM_ALLOC_TYPE_UMD_RC_GENERIC
123 , VBOXWDDM_ALLOC_TYPE_UMD_HGSMI_BUFFER
124#ifdef VBOX_WITH_VMSVGA3D_DX
125 , VBOXWDDM_ALLOC_TYPE_D3D /* Direct3D UMD driver allocation. Actual type is a VBOXDXALLOCATIONTYPE value. */
126#endif /* VBOX_WITH_VMSVGA3D_DX */
127} VBOXWDDM_ALLOC_TYPE;
128
129/* usage */
130typedef enum
131{
132 VBOXWDDM_ALLOCUSAGE_TYPE_UNEFINED = 0,
133 /* set for the allocation being primary */
134 VBOXWDDM_ALLOCUSAGE_TYPE_PRIMARY,
135} VBOXWDDM_ALLOCUSAGE_TYPE;
136
137typedef struct VBOXWDDM_SURFACE_DESC
138{
139 UINT width;
140 UINT height;
141 D3DDDIFORMAT format;
142 UINT bpp;
143 UINT pitch;
144 UINT depth;
145 UINT slicePitch;
146 UINT d3dWidth;
147 UINT cbSize;
148 D3DDDI_VIDEO_PRESENT_SOURCE_ID VidPnSourceId;
149 D3DDDI_RATIONAL RefreshRate;
150} VBOXWDDM_SURFACE_DESC, *PVBOXWDDM_SURFACE_DESC;
151
152typedef struct VBOXWDDM_ALLOCINFO
153{
154 VBOXWDDM_ALLOC_TYPE enmType;
155 union
156 {
157 struct
158 {
159 D3DDDI_RESOURCEFLAGS fFlags;
160 /* id used to identify the allocation on the host */
161 uint32_t hostID;
162 uint64_t hSharedHandle;
163 VBOXWDDM_SURFACE_DESC SurfDesc;
164 };
165
166 struct
167 {
168 uint32_t cbBuffer;
169 VBOXUHGSMI_BUFFER_TYPE_FLAGS fUhgsmiType;
170 };
171 };
172} VBOXWDDM_ALLOCINFO, *PVBOXWDDM_ALLOCINFO;
173
174#ifdef VBOX_WITH_VMSVGA3D_DX
175AssertCompile(sizeof(VBOXDXALLOCATIONDESC) != sizeof(VBOXWDDM_ALLOCINFO));
176#endif
177
178typedef struct VBOXWDDM_RC_DESC
179{
180 D3DDDI_RESOURCEFLAGS fFlags;
181 D3DDDIFORMAT enmFormat;
182 D3DDDI_POOL enmPool;
183 D3DDDIMULTISAMPLE_TYPE enmMultisampleType;
184 UINT MultisampleQuality;
185 UINT MipLevels;
186 UINT Fvf;
187 D3DDDI_VIDEO_PRESENT_SOURCE_ID VidPnSourceId;
188 D3DDDI_RATIONAL RefreshRate;
189 D3DDDI_ROTATION enmRotation;
190} VBOXWDDM_RC_DESC, *PVBOXWDDM_RC_DESC;
191
192typedef struct VBOXWDDMDISP_RESOURCE_FLAGS
193{
194 union
195 {
196 struct
197 {
198 UINT Opened : 1; /* this resource is OpenResource'd rather than CreateResource'd */
199 UINT Generic : 1; /* identifies this is a resource created with CreateResource, the VBOXWDDMDISP_RESOURCE::fRcFlags is valid */
200 UINT KmResource : 1; /* this resource has underlying km resource */
201 UINT Reserved : 29; /* reserved */
202 };
203 UINT Value;
204 };
205} VBOXWDDMDISP_RESOURCE_FLAGS, *PVBOXWDDMDISP_RESOURCE_FLAGS;
206
207typedef struct VBOXWDDM_RCINFO
208{
209 VBOXWDDMDISP_RESOURCE_FLAGS fFlags;
210 VBOXWDDM_RC_DESC RcDesc;
211 uint32_t cAllocInfos;
212// VBOXWDDM_ALLOCINFO aAllocInfos[1];
213} VBOXWDDM_RCINFO, *PVBOXWDDM_RCINFO;
214
215typedef struct VBOXWDDM_DMA_PRIVATEDATA_FLAFS
216{
217 union
218 {
219 struct
220 {
221 UINT bCmdInDmaBuffer : 1;
222 UINT bReserved : 31;
223 };
224 uint32_t Value;
225 };
226} VBOXWDDM_DMA_PRIVATEDATA_FLAFS, *PVBOXWDDM_DMA_PRIVATEDATA_FLAFS;
227
228typedef struct VBOXWDDM_DMA_PRIVATEDATA_BASEHDR
229{
230 VBOXVDMACMD_TYPE enmCmd;
231 union
232 {
233 VBOXWDDM_DMA_PRIVATEDATA_FLAFS fFlags;
234 uint32_t u32CmdReserved;
235 };
236} VBOXWDDM_DMA_PRIVATEDATA_BASEHDR, *PVBOXWDDM_DMA_PRIVATEDATA_BASEHDR;
237
238typedef struct VBOXWDDM_UHGSMI_BUFFER_UI_SUBMIT_INFO
239{
240 uint32_t offData;
241 uint32_t cbData;
242} VBOXWDDM_UHGSMI_BUFFER_UI_SUBMIT_INFO, *PVBOXWDDM_UHGSMI_BUFFER_UI_SUBMIT_INFO;
243
244typedef struct VBOXWDDM_DMA_PRIVATEDATA_UM_CHROMIUM_CMD
245{
246 VBOXWDDM_DMA_PRIVATEDATA_BASEHDR Base;
247 VBOXWDDM_UHGSMI_BUFFER_UI_SUBMIT_INFO aBufInfos[1];
248} VBOXWDDM_DMA_PRIVATEDATA_UM_CHROMIUM_CMD, *PVBOXWDDM_DMA_PRIVATEDATA_UM_CHROMIUM_CMD;
249
250
251#define VBOXVHWA_F_ENABLED 0x00000001
252#define VBOXVHWA_F_CKEY_DST 0x00000002
253#define VBOXVHWA_F_CKEY_SRC 0x00000004
254
255#define VBOXVHWA_MAX_FORMATS 8
256
257typedef struct VBOXVHWA_INFO
258{
259 uint32_t fFlags;
260 uint32_t cOverlaysSupported;
261 uint32_t cFormats;
262 D3DDDIFORMAT aFormats[VBOXVHWA_MAX_FORMATS];
263} VBOXVHWA_INFO;
264
265#define VBOXWDDM_OVERLAY_F_CKEY_DST 0x00000001
266#define VBOXWDDM_OVERLAY_F_CKEY_DSTRANGE 0x00000002
267#define VBOXWDDM_OVERLAY_F_CKEY_SRC 0x00000004
268#define VBOXWDDM_OVERLAY_F_CKEY_SRCRANGE 0x00000008
269#define VBOXWDDM_OVERLAY_F_BOB 0x00000010
270#define VBOXWDDM_OVERLAY_F_INTERLEAVED 0x00000020
271#define VBOXWDDM_OVERLAY_F_MIRROR_LR 0x00000040
272#define VBOXWDDM_OVERLAY_F_MIRROR_UD 0x00000080
273#define VBOXWDDM_OVERLAY_F_DEINTERLACED 0x00000100
274
275typedef struct VBOXWDDM_OVERLAY_DESC
276{
277 uint32_t fFlags;
278 UINT DstColorKeyLow;
279 UINT DstColorKeyHigh;
280 UINT SrcColorKeyLow;
281 UINT SrcColorKeyHigh;
282} VBOXWDDM_OVERLAY_DESC, *PVBOXWDDM_OVERLAY_DESC;
283
284typedef struct VBOXWDDM_OVERLAY_INFO
285{
286 VBOXWDDM_OVERLAY_DESC OverlayDesc;
287 VBOXWDDM_DIRTYREGION DirtyRegion; /* <- the dirty region of the overlay surface */
288} VBOXWDDM_OVERLAY_INFO, *PVBOXWDDM_OVERLAY_INFO;
289
290typedef struct VBOXWDDM_OVERLAYFLIP_INFO
291{
292 VBOXWDDM_DIRTYREGION DirtyRegion; /* <- the dirty region of the overlay surface */
293} VBOXWDDM_OVERLAYFLIP_INFO, *PVBOXWDDM_OVERLAYFLIP_INFO;
294
295
296typedef enum
297{
298 VBOXWDDM_CONTEXT_TYPE_UNDEFINED = 0,
299 /* system-created context (for GDI rendering) */
300 VBOXWDDM_CONTEXT_TYPE_SYSTEM,
301 /* context created by the D3D User-mode driver when crogl IS available */
302 obsolete_VBOXWDDM_CONTEXT_TYPE_CUSTOM_3D,
303 /* context created by the D3D User-mode driver when crogl is NOT available or for ddraw overlay acceleration */
304 obsolete_VBOXWDDM_CONTEXT_TYPE_CUSTOM_2D,
305 /* contexts created by the cromium HGSMI transport for HGSMI commands submission */
306 obsolete_VBOXWDDM_CONTEXT_TYPE_CUSTOM_UHGSMI_3D,
307 obsolete_VBOXWDDM_CONTEXT_TYPE_CUSTOM_UHGSMI_GL,
308 /* context created by the kernel->user communication mechanism for visible rects reporting, etc. */
309 VBOXWDDM_CONTEXT_TYPE_CUSTOM_SESSION,
310 /* context created by VBoxTray to handle resize operations */
311 VBOXWDDM_CONTEXT_TYPE_CUSTOM_DISPIF_RESIZE,
312 /* context created by VBoxTray to handle seamless operations */
313 VBOXWDDM_CONTEXT_TYPE_CUSTOM_DISPIF_SEAMLESS,
314 /* Gallium driver context. */
315 VBOXWDDM_CONTEXT_TYPE_GA_3D,
316 /* Direct3D UMD context for VMSVGA device. */
317 VBOXWDDM_CONTEXT_TYPE_VMSVGA_D3D,
318} VBOXWDDM_CONTEXT_TYPE;
319
320typedef struct VBOXWDDM_CREATECONTEXT_INFO
321{
322 /* interface version, i.e. 9 for d3d9, 8 for d3d8, etc. */
323 uint32_t u32IfVersion;
324 /* What kind of context to create. */
325 VBOXWDDM_CONTEXT_TYPE enmType;
326 union
327 {
328 struct
329 {
330 uint32_t crVersionMajor;
331 uint32_t crVersionMinor;
332 /* we use uint64_t instead of HANDLE to ensure structure def is the same for both 32-bit and 64-bit
333 * since x64 kernel driver can be called by 32-bit UMD */
334 uint64_t hUmEvent;
335 /* info to be passed to UMD notification to identify the context */
336 uint64_t u64UmInfo;
337 } vbox;
338#ifdef VBOX_WITH_VMSVGA
339 struct
340 {
341 /* VBOXWDDM_F_GA_CONTEXT_* */
342 uint32_t u32Flags;
343 } vmsvga;
344#endif
345 } u;
346} VBOXWDDM_CREATECONTEXT_INFO, *PVBOXWDDM_CREATECONTEXT_INFO;
347
348typedef uint64_t VBOXDISP_UMHANDLE;
349typedef uint32_t VBOXDISP_KMHANDLE;
350
351typedef struct VBOXWDDM_RECTS_FLAFS
352{
353 union
354 {
355 struct
356 {
357 /* used only in conjunction with bSetVisibleRects.
358 * if set - VBOXWDDM_RECTS_INFO::aRects[0] contains view rectangle */
359 UINT bSetViewRect : 1;
360 /* adds visible regions */
361 UINT bAddVisibleRects : 1;
362 /* adds hidden regions */
363 UINT bAddHiddenRects : 1;
364 /* hide entire window */
365 UINT bHide : 1;
366 /* reserved */
367 UINT Reserved : 28;
368 };
369 uint32_t Value;
370 };
371} VBOXWDDM_RECTS_FLAFS, *PVBOXWDDM_RECTS_FLAFS;
372
373typedef struct VBOXWDDM_RECTS_INFO
374{
375 uint32_t cRects;
376 RECT aRects[1];
377} VBOXWDDM_RECTS_INFO, *PVBOXWDDM_RECTS_INFO;
378
379#define VBOXWDDM_RECTS_INFO_SIZE4CRECTS(_cRects) (RT_UOFFSETOF_DYN(VBOXWDDM_RECTS_INFO, aRects[(_cRects)]))
380#define VBOXWDDM_RECTS_INFO_SIZE(_pRects) (VBOXVIDEOCM_CMD_RECTS_SIZE4CRECTS((_pRects)->cRects))
381
382typedef enum
383{
384 /* command to be post to user mode */
385 VBOXVIDEOCM_CMD_TYPE_UM = 0,
386 /* control command processed in kernel mode */
387 VBOXVIDEOCM_CMD_TYPE_CTL_KM,
388 VBOXVIDEOCM_CMD_DUMMY_32BIT = 0x7fffffff
389} VBOXVIDEOCM_CMD_TYPE;
390
391typedef struct VBOXVIDEOCM_CMD_HDR
392{
393 uint64_t u64UmData;
394 uint32_t cbCmd;
395 VBOXVIDEOCM_CMD_TYPE enmType;
396}VBOXVIDEOCM_CMD_HDR, *PVBOXVIDEOCM_CMD_HDR;
397
398AssertCompile((sizeof (VBOXVIDEOCM_CMD_HDR) & 7) == 0);
399
400typedef struct VBOXVIDEOCM_CMD_RECTS
401{
402 VBOXWDDM_RECTS_FLAFS fFlags;
403 VBOXWDDM_RECTS_INFO RectsInfo;
404} VBOXVIDEOCM_CMD_RECTS, *PVBOXVIDEOCM_CMD_RECTS;
405
406typedef struct VBOXWDDM_GETVBOXVIDEOCMCMD_HDR
407{
408 uint32_t cbCmdsReturned;
409 uint32_t cbRemainingCmds;
410 uint32_t cbRemainingFirstCmd;
411 uint32_t u32Reserved;
412} VBOXWDDM_GETVBOXVIDEOCMCMD_HDR, *PVBOXWDDM_GETVBOXVIDEOCMCMD_HDR;
413
414typedef struct VBOXDISPIFESCAPE_GETVBOXVIDEOCMCMD
415{
416 VBOXDISPIFESCAPE EscapeHdr;
417 VBOXWDDM_GETVBOXVIDEOCMCMD_HDR Hdr;
418} VBOXDISPIFESCAPE_GETVBOXVIDEOCMCMD, *PVBOXDISPIFESCAPE_GETVBOXVIDEOCMCMD;
419
420AssertCompile((sizeof (VBOXDISPIFESCAPE_GETVBOXVIDEOCMCMD) & 7) == 0);
421AssertCompile(RT_OFFSETOF(VBOXDISPIFESCAPE_GETVBOXVIDEOCMCMD, EscapeHdr) == 0);
422
423typedef struct VBOXDISPIFESCAPE_DBGPRINT
424{
425 VBOXDISPIFESCAPE EscapeHdr;
426 /* null-terminated string to DbgPrint including \0 */
427 char aStringBuf[1];
428} VBOXDISPIFESCAPE_DBGPRINT, *PVBOXDISPIFESCAPE_DBGPRINT;
429AssertCompile(RT_OFFSETOF(VBOXDISPIFESCAPE_DBGPRINT, EscapeHdr) == 0);
430
431typedef enum
432{
433 VBOXDISPIFESCAPE_DBGDUMPBUF_TYPE_UNDEFINED = 0,
434 VBOXDISPIFESCAPE_DBGDUMPBUF_TYPE_D3DCAPS9 = 1,
435 VBOXDISPIFESCAPE_DBGDUMPBUF_TYPE_DUMMY32BIT = 0x7fffffff
436} VBOXDISPIFESCAPE_DBGDUMPBUF_TYPE;
437
438typedef struct VBOXDISPIFESCAPE_DBGDUMPBUF_FLAGS
439{
440 union
441 {
442 struct
443 {
444 UINT WoW64 : 1;
445 UINT Reserved : 31; /* reserved */
446 };
447 UINT Value;
448 };
449} VBOXDISPIFESCAPE_DBGDUMPBUF_FLAGS, *PVBOXDISPIFESCAPE_DBGDUMPBUF_FLAGS;
450
451typedef struct VBOXDISPIFESCAPE_DBGDUMPBUF
452{
453 VBOXDISPIFESCAPE EscapeHdr;
454 VBOXDISPIFESCAPE_DBGDUMPBUF_TYPE enmType;
455 VBOXDISPIFESCAPE_DBGDUMPBUF_FLAGS Flags;
456 char aBuf[1];
457} VBOXDISPIFESCAPE_DBGDUMPBUF, *PVBOXDISPIFESCAPE_DBGDUMPBUF;
458AssertCompile(RT_OFFSETOF(VBOXDISPIFESCAPE_DBGDUMPBUF, EscapeHdr) == 0);
459
460typedef struct VBOXVIDEOCM_UM_ALLOC
461{
462 VBOXDISP_KMHANDLE hAlloc;
463 uint32_t cbData;
464 uint64_t pvData;
465 uint64_t hSynch;
466 VBOXUHGSMI_BUFFER_TYPE_FLAGS fUhgsmiType;
467} VBOXVIDEOCM_UM_ALLOC, *PVBOXVIDEOCM_UM_ALLOC;
468
469typedef struct VBOXDISPIFESCAPE_SETALLOCHOSTID
470{
471 VBOXDISPIFESCAPE EscapeHdr;
472 int32_t rc;
473 uint32_t hostID;
474 uint64_t hAlloc;
475
476} VBOXDISPIFESCAPE_SETALLOCHOSTID, *PVBOXDISPIFESCAPE_SETALLOCHOSTID;
477
478#ifdef VBOX_WITH_VMSVGA
479
480#define VBOXWDDM_F_GA_CONTEXT_EXTENDED 0x00000001
481#define VBOXWDDM_F_GA_CONTEXT_VGPU10 0x00000002
482
483#define VBOXESC_GAGETCID 0xA0000002
484#define VBOXESC_GAREGION 0xA0000003
485#define VBOXESC_GAPRESENT 0xA0000004
486#define VBOXESC_GASURFACEDEFINE 0xA0000005
487#define VBOXESC_GASURFACEDESTROY 0xA0000006
488#define VBOXESC_GASHAREDSID 0xA0000008
489#define VBOXESC_GAFENCECREATE 0xA0000020
490#define VBOXESC_GAFENCEQUERY 0xA0000021
491#define VBOXESC_GAFENCEWAIT 0xA0000022
492#define VBOXESC_GAFENCEUNREF 0xA0000023
493
494/* Get Gallium context id (cid) of the WDDM context. */
495typedef struct VBOXDISPIFESCAPE_GAGETCID
496{
497 VBOXDISPIFESCAPE EscapeHdr;
498 uint32_t u32Cid;
499} VBOXDISPIFESCAPE_GAGETCID;
500
501/* Create or delete a Guest Memory Region (GMR). */
502#define GA_REGION_CMD_CREATE 0
503#define GA_REGION_CMD_DESTROY 1
504typedef struct VBOXDISPIFESCAPE_GAREGION
505{
506 VBOXDISPIFESCAPE EscapeHdr;
507 uint32_t u32Command;
508 uint32_t u32GmrId;
509 uint32_t u32NumPages;
510 uint32_t u32Reserved;
511 uint64_t u64UserAddress;
512} VBOXDISPIFESCAPE_GAREGION;
513
514/* Debug helper. Present the specified surface by copying to the guest screen VRAM. */
515typedef struct VBOXDISPIFESCAPE_GAPRESENT
516{
517 VBOXDISPIFESCAPE EscapeHdr;
518 uint32_t u32Sid;
519 uint32_t u32Width;
520 uint32_t u32Height;
521} VBOXDISPIFESCAPE_GAPRESENT;
522
523/* Create a host surface. */
524typedef struct VBOXDISPIFESCAPE_GASURFACEDEFINE
525{
526 VBOXDISPIFESCAPE EscapeHdr;
527 uint32_t u32Sid; /* Returned surface id. */
528 uint32_t cbReq; /* Size of data after cSizes field. */
529 uint32_t cSizes; /* Number of GASURFSIZE structures. */
530 /* GASURFCREATE */
531 /* GASURFSIZE[cSizes] */
532} VBOXDISPIFESCAPE_GASURFACEDEFINE;
533
534/* Delete a host surface. */
535typedef struct VBOXDISPIFESCAPE_GASURFACEDESTROY
536{
537 VBOXDISPIFESCAPE EscapeHdr;
538 uint32_t u32Sid;
539} VBOXDISPIFESCAPE_GASURFACEDESTROY;
540
541/* Inform the miniport that 'u32Sid' actually maps to 'u32SharedSid'.
542 * If 'u32SharedSid' is ~0, then remove the mapping.
543 */
544typedef struct VBOXDISPIFESCAPE_GASHAREDSID
545{
546 VBOXDISPIFESCAPE EscapeHdr;
547 uint32_t u32Sid;
548 uint32_t u32SharedSid;
549} VBOXDISPIFESCAPE_GASHAREDSID;
550
551/* Create a user mode fence object. */
552typedef struct VBOXDISPIFESCAPE_GAFENCECREATE
553{
554 VBOXDISPIFESCAPE EscapeHdr;
555
556 /* IN: The miniport's handle of the fence.
557 * Assigned by the miniport. Not DXGK fence id!
558 */
559 uint32_t u32FenceHandle;
560} VBOXDISPIFESCAPE_GAFENCECREATE;
561
562/* Query a user mode fence object state. */
563#define GA_FENCE_STATUS_NULL 0 /* Fence not found */
564#define GA_FENCE_STATUS_IDLE 1
565#define GA_FENCE_STATUS_SUBMITTED 2
566#define GA_FENCE_STATUS_SIGNALED 3
567typedef struct VBOXDISPIFESCAPE_GAFENCEQUERY
568{
569 VBOXDISPIFESCAPE EscapeHdr;
570
571 /* IN: The miniport's handle of the fence.
572 * Assigned by the miniport. Not DXGK fence id!
573 */
574 uint32_t u32FenceHandle;
575
576 /* OUT: The miniport's sequence number associated with the command buffer.
577 */
578 uint32_t u32SubmittedSeqNo;
579
580 /* OUT: The miniport's sequence number associated with the last command buffer completed on host.
581 */
582 uint32_t u32ProcessedSeqNo;
583
584 /* OUT: GA_FENCE_STATUS_*. */
585 uint32_t u32FenceStatus;
586} VBOXDISPIFESCAPE_GAFENCEQUERY;
587
588/* Wait on a user mode fence object. */
589typedef struct VBOXDISPIFESCAPE_GAFENCEWAIT
590{
591 VBOXDISPIFESCAPE EscapeHdr;
592
593 /* IN: The miniport's handle of the fence.
594 * Assigned by the miniport. Not DXGK fence id!
595 */
596 uint32_t u32FenceHandle;
597
598 /* IN: Timeout in microseconds.
599 */
600 uint32_t u32TimeoutUS;
601} VBOXDISPIFESCAPE_GAFENCEWAIT;
602
603/* Delete a user mode fence object. */
604typedef struct VBOXDISPIFESCAPE_GAFENCEUNREF
605{
606 VBOXDISPIFESCAPE EscapeHdr;
607
608 /* IN: The miniport's handle of the fence.
609 * Assigned by the miniport. Not DXGK fence id!
610 */
611 uint32_t u32FenceHandle;
612} VBOXDISPIFESCAPE_GAFENCEUNREF;
613
614#include <VBoxGaHWInfo.h>
615#endif
616
617#define VBOXWDDM_QAI_CAP_3D 0x00000001 /* 3D is enabled in the VM settings. */
618#define VBOXWDDM_QAI_CAP_DXVA 0x00000002 /* DXVA is not disabled in the guest registry. */
619#define VBOXWDDM_QAI_CAP_DXVAHD 0x00000004 /* DXVA-HD is not disabled in the guest registry. */
620#define VBOXWDDM_QAI_CAP_WIN7 0x00000008 /* User mode driver can report D3D_UMD_INTERFACE_VERSION_WIN7. */
621
622/* D3DDDICB_QUERYADAPTERINFO::pPrivateDriverData */
623typedef struct VBOXWDDM_QAI
624{
625 uint32_t u32Version; /* VBOXVIDEOIF_VERSION */
626 uint32_t u32Reserved; /* Must be 0. */
627 VBOXVIDEO_HWTYPE enmHwType; /* Hardware type. Determines what kind of data is returned. */
628 uint32_t u32AdapterCaps; /* VBOXWDDM_QAI_CAP_* */
629 uint32_t cInfos; /* Number of initialized elements in aInfos (equal to number of guest
630 * displays). 0 if VBOX_WITH_VIDEOHWACCEL is not defined. */
631 VBOXVHWA_INFO aInfos[VBOX_VIDEO_MAX_SCREENS]; /* cInfos elements are initialized. */
632 union
633 {
634 struct
635 {
636 /* VBOXVIDEO_HWTYPE_VBOX */
637 uint32_t u32VBox3DCaps; /* CR_VBOX_CAP_* */
638 } vbox;
639#if defined(VBOX_WITH_VMSVGA)
640 struct
641 {
642 /* VBOXVIDEO_HWTYPE_VMSVGA */
643 VBOXGAHWINFO HWInfo;
644 } vmsvga;
645#endif
646 } u;
647} VBOXWDDM_QAI;
648
649/** Convert a given FourCC code to a D3DDDIFORMAT enum. */
650#define VBOXWDDM_D3DDDIFORMAT_FROM_FOURCC(_a, _b, _c, _d) \
651 ((D3DDDIFORMAT)MAKEFOURCC(_a, _b, _c, _d))
652
653/* submit cmd func */
654DECLINLINE(D3DDDIFORMAT) vboxWddmFmtNoAlphaFormat(D3DDDIFORMAT enmFormat)
655{
656 switch (enmFormat)
657 {
658 case D3DDDIFMT_A8R8G8B8:
659 return D3DDDIFMT_X8R8G8B8;
660 case D3DDDIFMT_A1R5G5B5:
661 return D3DDDIFMT_X1R5G5B5;
662 case D3DDDIFMT_A4R4G4B4:
663 return D3DDDIFMT_X4R4G4B4;
664 case D3DDDIFMT_A8B8G8R8:
665 return D3DDDIFMT_X8B8G8R8;
666 default:
667 return enmFormat;
668 }
669}
670
671/* tooling */
672DECLINLINE(UINT) vboxWddmCalcBitsPerPixel(D3DDDIFORMAT enmFormat)
673{
674#ifdef _MSC_VER
675# pragma warning(push)
676# pragma warning(disable:4063) /* VBOXWDDM_D3DDDIFORMAT_FROM_FOURCC('Y', 'V', '1', '2'): isn't part of the enum */
677#endif
678 switch (enmFormat)
679 {
680 case D3DDDIFMT_R8G8B8:
681 return 24;
682 case D3DDDIFMT_A8R8G8B8:
683 case D3DDDIFMT_X8R8G8B8:
684 return 32;
685 case D3DDDIFMT_R5G6B5:
686 case D3DDDIFMT_X1R5G5B5:
687 case D3DDDIFMT_A1R5G5B5:
688 case D3DDDIFMT_A4R4G4B4:
689 return 16;
690 case D3DDDIFMT_R3G3B2:
691 case D3DDDIFMT_A8:
692 return 8;
693 case D3DDDIFMT_A8R3G3B2:
694 case D3DDDIFMT_X4R4G4B4:
695 return 16;
696 case D3DDDIFMT_A2B10G10R10:
697 case D3DDDIFMT_A8B8G8R8:
698 case D3DDDIFMT_X8B8G8R8:
699 case D3DDDIFMT_G16R16:
700 case D3DDDIFMT_A2R10G10B10:
701 return 32;
702 case D3DDDIFMT_A16B16G16R16:
703 case D3DDDIFMT_A16B16G16R16F:
704 return 64;
705 case D3DDDIFMT_A32B32G32R32F:
706 return 128;
707 case D3DDDIFMT_A8P8:
708 return 16;
709 case D3DDDIFMT_P8:
710 case D3DDDIFMT_L8:
711 return 8;
712 case D3DDDIFMT_L16:
713 case D3DDDIFMT_A8L8:
714 return 16;
715 case D3DDDIFMT_A4L4:
716 return 8;
717 case D3DDDIFMT_V8U8:
718 case D3DDDIFMT_L6V5U5:
719 return 16;
720 case D3DDDIFMT_X8L8V8U8:
721 case D3DDDIFMT_Q8W8V8U8:
722 case D3DDDIFMT_V16U16:
723 case D3DDDIFMT_W11V11U10:
724 case D3DDDIFMT_A2W10V10U10:
725 return 32;
726 case D3DDDIFMT_D16_LOCKABLE:
727 case D3DDDIFMT_D16:
728 case D3DDDIFMT_D15S1:
729 return 16;
730 case D3DDDIFMT_D32:
731 case D3DDDIFMT_D24S8:
732 case D3DDDIFMT_D24X8:
733 case D3DDDIFMT_D24X4S4:
734 case D3DDDIFMT_D24FS8:
735 case D3DDDIFMT_D32_LOCKABLE:
736 case D3DDDIFMT_D32F_LOCKABLE:
737 return 32;
738 case D3DDDIFMT_S8_LOCKABLE:
739 return 8;
740 case D3DDDIFMT_DXT1:
741 return 4;
742 case D3DDDIFMT_DXT2:
743 case D3DDDIFMT_DXT3:
744 case D3DDDIFMT_DXT4:
745 case D3DDDIFMT_DXT5:
746 case D3DDDIFMT_VERTEXDATA:
747 case D3DDDIFMT_INDEX16: /* <- yes, dx runtime treats it as such */
748 return 8;
749 case D3DDDIFMT_INDEX32:
750 return 8;
751 case D3DDDIFMT_R32F:
752 return 32;
753 case D3DDDIFMT_G32R32F:
754 return 64;
755 case D3DDDIFMT_R16F:
756 return 16;
757 case D3DDDIFMT_G16R16F:
758 return 32;
759 case D3DDDIFMT_YUY2: /* 4 bytes per 2 pixels. */
760 case VBOXWDDM_D3DDDIFORMAT_FROM_FOURCC('Y', 'V', '1', '2'):
761 return 16;
762 default:
763 AssertBreakpoint();
764 return 0;
765 }
766#ifdef _MSC_VER
767# pragma warning(pop)
768#endif
769}
770
771DECLINLINE(uint32_t) vboxWddmFormatToFourcc(D3DDDIFORMAT enmFormat)
772{
773 uint32_t uFormat = (uint32_t)enmFormat;
774 /* assume that in case both four bytes are non-zero, this is a fourcc */
775 if ((uFormat & 0xff000000)
776 && (uFormat & 0x00ff0000)
777 && (uFormat & 0x0000ff00)
778 && (uFormat & 0x000000ff)
779 )
780 return uFormat;
781 return 0;
782}
783
784#define VBOXWDDM_ROUNDBOUND(_v, _b) (((_v) + ((_b) - 1)) & ~((_b) - 1))
785
786DECLINLINE(UINT) vboxWddmCalcOffXru(UINT w, D3DDDIFORMAT enmFormat)
787{
788 switch (enmFormat)
789 {
790 /* pitch for the DXT* (aka compressed) formats is the size in bytes of blocks that fill in an image width
791 * i.e. each block decompressed into 4 x 4 pixels, so we have ((Width + 3) / 4) blocks for Width.
792 * then each block has 64 bits (8 bytes) for DXT1 and 64+64 bits (16 bytes) for DXT2-DXT5, so.. : */
793 case D3DDDIFMT_DXT1:
794 {
795 UINT Pitch = (w + 3) / 4; /* <- pitch size in blocks */
796 Pitch *= 8; /* <- pitch size in bytes */
797 return Pitch;
798 }
799 case D3DDDIFMT_DXT2:
800 case D3DDDIFMT_DXT3:
801 case D3DDDIFMT_DXT4:
802 case D3DDDIFMT_DXT5:
803 {
804 UINT Pitch = (w + 3) / 4; /* <- pitch size in blocks */
805 Pitch *= 16; /* <- pitch size in bytes */
806 return Pitch;
807 }
808 default:
809 {
810 /* the default is just to calculate the pitch from bpp */
811 UINT bpp = vboxWddmCalcBitsPerPixel(enmFormat);
812 UINT Pitch = bpp * w;
813 /* pitch is now in bits, translate in bytes */
814 return VBOXWDDM_ROUNDBOUND(Pitch, 8) >> 3;
815 }
816 }
817}
818
819DECLINLINE(UINT) vboxWddmCalcOffXrd(UINT w, D3DDDIFORMAT enmFormat)
820{
821 switch (enmFormat)
822 {
823 /* pitch for the DXT* (aka compressed) formats is the size in bytes of blocks that fill in an image width
824 * i.e. each block decompressed into 4 x 4 pixels, so we have ((Width + 3) / 4) blocks for Width.
825 * then each block has 64 bits (8 bytes) for DXT1 and 64+64 bits (16 bytes) for DXT2-DXT5, so.. : */
826 case D3DDDIFMT_DXT1:
827 {
828 UINT Pitch = w / 4; /* <- pitch size in blocks */
829 Pitch *= 8; /* <- pitch size in bytes */
830 return Pitch;
831 }
832 case D3DDDIFMT_DXT2:
833 case D3DDDIFMT_DXT3:
834 case D3DDDIFMT_DXT4:
835 case D3DDDIFMT_DXT5:
836 {
837 UINT Pitch = w / 4; /* <- pitch size in blocks */
838 Pitch *= 16; /* <- pitch size in bytes */
839 return Pitch;
840 }
841 default:
842 {
843 /* the default is just to calculate the pitch from bpp */
844 UINT bpp = vboxWddmCalcBitsPerPixel(enmFormat);
845 UINT Pitch = bpp * w;
846 /* pitch is now in bits, translate in bytes */
847 return Pitch >> 3;
848 }
849 }
850}
851
852DECLINLINE(UINT) vboxWddmCalcHightPacking(D3DDDIFORMAT enmFormat)
853{
854 switch (enmFormat)
855 {
856 /* for the DXT* (aka compressed) formats each block is decompressed into 4 x 4 pixels,
857 * so packing is 4
858 */
859 case D3DDDIFMT_DXT1:
860 case D3DDDIFMT_DXT2:
861 case D3DDDIFMT_DXT3:
862 case D3DDDIFMT_DXT4:
863 case D3DDDIFMT_DXT5:
864 return 4;
865 default:
866 return 1;
867 }
868}
869
870DECLINLINE(UINT) vboxWddmCalcOffYru(UINT height, D3DDDIFORMAT enmFormat)
871{
872 UINT packing = vboxWddmCalcHightPacking(enmFormat);
873 /* round it up */
874 return (height + packing - 1) / packing;
875}
876
877DECLINLINE(UINT) vboxWddmCalcOffYrd(UINT height, D3DDDIFORMAT enmFormat)
878{
879 UINT packing = vboxWddmCalcHightPacking(enmFormat);
880 /* round it up */
881 return height / packing;
882}
883
884DECLINLINE(UINT) vboxWddmCalcPitch(UINT w, D3DDDIFORMAT enmFormat)
885{
886 return vboxWddmCalcOffXru(w, enmFormat);
887}
888
889DECLINLINE(UINT) vboxWddmCalcWidthForPitch(UINT Pitch, D3DDDIFORMAT enmFormat)
890{
891 switch (enmFormat)
892 {
893 /* pitch for the DXT* (aka compressed) formats is the size in bytes of blocks that fill in an image width
894 * i.e. each block decompressed into 4 x 4 pixels, so we have ((Width + 3) / 4) blocks for Width.
895 * then each block has 64 bits (8 bytes) for DXT1 and 64+64 bits (16 bytes) for DXT2-DXT5, so.. : */
896 case D3DDDIFMT_DXT1:
897 {
898 return (Pitch / 8) * 4;
899 }
900 case D3DDDIFMT_DXT2:
901 case D3DDDIFMT_DXT3:
902 case D3DDDIFMT_DXT4:
903 case D3DDDIFMT_DXT5:
904 {
905 return (Pitch / 16) * 4;;
906 }
907 default:
908 {
909 /* the default is just to calculate it from bpp */
910 UINT bpp = vboxWddmCalcBitsPerPixel(enmFormat);
911 return (Pitch << 3) / bpp;
912 }
913 }
914}
915
916DECLINLINE(UINT) vboxWddmCalcNumRows(UINT top, UINT bottom, D3DDDIFORMAT enmFormat)
917{
918 Assert(bottom > top);
919 top = top ? vboxWddmCalcOffYrd(top, enmFormat) : 0; /* <- just to optimize it a bit */
920 bottom = vboxWddmCalcOffYru(bottom, enmFormat);
921 return bottom - top;
922}
923
924DECLINLINE(UINT) vboxWddmCalcRowSize(UINT left, UINT right, D3DDDIFORMAT enmFormat)
925{
926 Assert(right > left);
927 left = left ? vboxWddmCalcOffXrd(left, enmFormat) : 0; /* <- just to optimize it a bit */
928 right = vboxWddmCalcOffXru(right, enmFormat);
929 return right - left;
930}
931
932DECLINLINE(UINT) vboxWddmCalcSize(UINT pitch, UINT height, D3DDDIFORMAT enmFormat)
933{
934 UINT cRows = vboxWddmCalcNumRows(0, height, enmFormat);
935 return pitch * cRows;
936}
937
938DECLINLINE(UINT) vboxWddmCalcOffXYrd(UINT x, UINT y, UINT pitch, D3DDDIFORMAT enmFormat)
939{
940 UINT offY = 0;
941 if (y)
942 offY = vboxWddmCalcSize(pitch, y, enmFormat);
943
944 return offY + vboxWddmCalcOffXrd(x, enmFormat);
945}
946
947#if defined(VBOX_WITH_VMSVGA3D_DX)
948#include <dxgiformat.h>
949DECLINLINE(UINT) vboxWddmCalcBitsPerPixelDXGI(DXGI_FORMAT enmFormat)
950{
951 switch (enmFormat)
952 {
953 case DXGI_FORMAT_UNKNOWN:
954 return 8;
955 case DXGI_FORMAT_R32G32B32A32_TYPELESS:
956 case DXGI_FORMAT_R32G32B32A32_FLOAT:
957 case DXGI_FORMAT_R32G32B32A32_UINT:
958 case DXGI_FORMAT_R32G32B32A32_SINT:
959 return 128;
960 case DXGI_FORMAT_R32G32B32_TYPELESS:
961 case DXGI_FORMAT_R32G32B32_FLOAT:
962 case DXGI_FORMAT_R32G32B32_UINT:
963 case DXGI_FORMAT_R32G32B32_SINT:
964 return 96;
965 case DXGI_FORMAT_R16G16B16A16_TYPELESS:
966 case DXGI_FORMAT_R16G16B16A16_FLOAT:
967 case DXGI_FORMAT_R16G16B16A16_UNORM:
968 case DXGI_FORMAT_R16G16B16A16_UINT:
969 case DXGI_FORMAT_R16G16B16A16_SNORM:
970 case DXGI_FORMAT_R16G16B16A16_SINT:
971 case DXGI_FORMAT_R32G32_TYPELESS:
972 case DXGI_FORMAT_R32G32_FLOAT:
973 case DXGI_FORMAT_R32G32_UINT:
974 case DXGI_FORMAT_R32G32_SINT:
975 return 64;
976 case DXGI_FORMAT_R32G8X24_TYPELESS:
977 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
978 case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
979 case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
980 return 64;
981 case DXGI_FORMAT_R10G10B10A2_TYPELESS:
982 case DXGI_FORMAT_R10G10B10A2_UNORM:
983 case DXGI_FORMAT_R10G10B10A2_UINT:
984 return 32;
985 case DXGI_FORMAT_R11G11B10_FLOAT:
986 return 32;
987 case DXGI_FORMAT_R8G8B8A8_TYPELESS:
988 case DXGI_FORMAT_R8G8B8A8_UNORM:
989 case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
990 case DXGI_FORMAT_R8G8B8A8_UINT:
991 case DXGI_FORMAT_R8G8B8A8_SNORM:
992 case DXGI_FORMAT_R8G8B8A8_SINT:
993 return 32;
994 case DXGI_FORMAT_R16G16_TYPELESS:
995 case DXGI_FORMAT_R16G16_FLOAT:
996 case DXGI_FORMAT_R16G16_UNORM:
997 case DXGI_FORMAT_R16G16_UINT:
998 case DXGI_FORMAT_R16G16_SNORM:
999 case DXGI_FORMAT_R16G16_SINT:
1000 return 32;
1001 case DXGI_FORMAT_R32_TYPELESS:
1002 case DXGI_FORMAT_D32_FLOAT:
1003 case DXGI_FORMAT_R32_FLOAT:
1004 case DXGI_FORMAT_R32_UINT:
1005 case DXGI_FORMAT_R32_SINT:
1006 case DXGI_FORMAT_R24G8_TYPELESS:
1007 case DXGI_FORMAT_D24_UNORM_S8_UINT:
1008 case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
1009 case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
1010 return 32;
1011 case DXGI_FORMAT_R8G8_TYPELESS:
1012 case DXGI_FORMAT_R8G8_UNORM:
1013 case DXGI_FORMAT_R8G8_UINT:
1014 case DXGI_FORMAT_R8G8_SNORM:
1015 case DXGI_FORMAT_R8G8_SINT:
1016 case DXGI_FORMAT_R16_TYPELESS:
1017 case DXGI_FORMAT_R16_FLOAT:
1018 case DXGI_FORMAT_D16_UNORM:
1019 case DXGI_FORMAT_R16_UNORM:
1020 case DXGI_FORMAT_R16_UINT:
1021 case DXGI_FORMAT_R16_SNORM:
1022 case DXGI_FORMAT_R16_SINT:
1023 return 16;
1024 case DXGI_FORMAT_R8_TYPELESS:
1025 case DXGI_FORMAT_R8_UNORM:
1026 case DXGI_FORMAT_R8_UINT:
1027 case DXGI_FORMAT_R8_SNORM:
1028 case DXGI_FORMAT_R8_SINT:
1029 case DXGI_FORMAT_A8_UNORM:
1030 return 8;
1031 case DXGI_FORMAT_R1_UNORM:
1032 return 1;
1033 case DXGI_FORMAT_R9G9B9E5_SHAREDEXP:
1034 case DXGI_FORMAT_R8G8_B8G8_UNORM:
1035 case DXGI_FORMAT_G8R8_G8B8_UNORM:
1036 return 32;
1037 case DXGI_FORMAT_BC1_TYPELESS:
1038 case DXGI_FORMAT_BC1_UNORM:
1039 case DXGI_FORMAT_BC1_UNORM_SRGB:
1040 return 4;
1041 case DXGI_FORMAT_BC2_TYPELESS:
1042 case DXGI_FORMAT_BC2_UNORM:
1043 case DXGI_FORMAT_BC2_UNORM_SRGB:
1044 case DXGI_FORMAT_BC3_TYPELESS:
1045 case DXGI_FORMAT_BC3_UNORM:
1046 case DXGI_FORMAT_BC3_UNORM_SRGB:
1047 return 8;
1048 case DXGI_FORMAT_BC4_TYPELESS:
1049 case DXGI_FORMAT_BC4_UNORM:
1050 case DXGI_FORMAT_BC4_SNORM:
1051 return 4;
1052 case DXGI_FORMAT_BC5_TYPELESS:
1053 case DXGI_FORMAT_BC5_UNORM:
1054 case DXGI_FORMAT_BC5_SNORM:
1055 return 8;
1056 case DXGI_FORMAT_B5G6R5_UNORM:
1057 case DXGI_FORMAT_B5G5R5A1_UNORM:
1058 return 16;
1059 case DXGI_FORMAT_B8G8R8A8_UNORM:
1060 case DXGI_FORMAT_B8G8R8X8_UNORM:
1061 case DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM:
1062 case DXGI_FORMAT_B8G8R8A8_TYPELESS:
1063 case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
1064 case DXGI_FORMAT_B8G8R8X8_TYPELESS:
1065 case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
1066 return 32;
1067 case DXGI_FORMAT_BC6H_TYPELESS:
1068 case DXGI_FORMAT_BC6H_UF16:
1069 case DXGI_FORMAT_BC6H_SF16:
1070 case DXGI_FORMAT_BC7_TYPELESS:
1071 case DXGI_FORMAT_BC7_UNORM:
1072 case DXGI_FORMAT_BC7_UNORM_SRGB:
1073 return 8;
1074 case DXGI_FORMAT_AYUV:
1075 case DXGI_FORMAT_Y410:
1076 return 32;
1077 case DXGI_FORMAT_Y416:
1078 return 64;
1079 case DXGI_FORMAT_NV12:
1080 return 12;
1081 case DXGI_FORMAT_P010:
1082 case DXGI_FORMAT_P016:
1083 return 24;
1084 case DXGI_FORMAT_420_OPAQUE:
1085 return 12;
1086 case DXGI_FORMAT_YUY2:
1087 return 32;
1088 case DXGI_FORMAT_Y210:
1089 case DXGI_FORMAT_Y216:
1090 return 64;
1091 case DXGI_FORMAT_NV11:
1092 return 12;
1093 case DXGI_FORMAT_AI44:
1094 case DXGI_FORMAT_IA44:
1095 case DXGI_FORMAT_P8:
1096 return 8;
1097 case DXGI_FORMAT_A8P8:
1098 case DXGI_FORMAT_B4G4R4A4_UNORM:
1099 case DXGI_FORMAT_P208:
1100 case DXGI_FORMAT_V208:
1101 return 16;
1102 case DXGI_FORMAT_V408:
1103 return 24;
1104 default:
1105 AssertBreakpoint();
1106 return 0;
1107 }
1108}
1109#endif /* VBOX_WITH_VMSVGA3D_DX */
1110
1111#define VBOXWDDM_ARRAY_MAXELEMENTSU32(_t) ((uint32_t)((UINT32_MAX) / sizeof (_t)))
1112#define VBOXWDDM_TRAILARRAY_MAXELEMENTSU32(_t, _af) ((uint32_t)(((~(0UL)) - (uint32_t)RT_OFFSETOF(_t, _af[0])) / RT_SIZEOFMEMB(_t, _af[0])))
1113
1114#endif /* !GA_INCLUDED_SRC_WINNT_Graphics_Video_common_wddm_VBoxMPIf_h */
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette