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source: vbox/trunk/src/VBox/Additions/WINNT/Graphics/Wine/include/ddk/ntddser.h@ 16477

Last change on this file since 16477 was 16477, checked in by vboxsync, 16 years ago

LGPL disclaimer by filemuncher

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1/*
2 * DDK definitions for serial port
3 *
4 * Copyright (C) 2006 Eric Pouech
5 * From w32api package
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
20 */
21
22/*
23 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
24 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
25 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
26 * a choice of LGPL license versions is made available with the language indicating
27 * that LGPLv2 or any later version may be used, or where a choice of which version
28 * of the LGPL is applied is otherwise unspecified.
29 */
30
31#ifndef _NTDDSER_H_
32#define _NTDDSER_H_
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#define IOCTL_SERIAL_CLEAR_STATS \
39 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS)
40#define IOCTL_SERIAL_CLR_DTR \
41 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS)
42#define IOCTL_SERIAL_CLR_RTS \
43 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
44#define IOCTL_SERIAL_CONFIG_SIZE \
45 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
46#define IOCTL_SERIAL_GET_BAUD_RATE \
47 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
48#define IOCTL_SERIAL_GET_CHARS \
49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
50#define IOCTL_SERIAL_GET_COMMSTATUS \
51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS)
52#define IOCTL_SERIAL_GET_DTRRTS \
53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
54#define IOCTL_SERIAL_GET_HANDFLOW \
55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
56#define IOCTL_SERIAL_GET_LINE_CONTROL \
57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
58#define IOCTL_SERIAL_GET_MODEM_CONTROL \
59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
60#define IOCTL_SERIAL_GET_MODEMSTATUS \
61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS)
62#define IOCTL_SERIAL_GET_PROPERTIES \
63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS)
64#define IOCTL_SERIAL_GET_STATS \
65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS)
66#define IOCTL_SERIAL_GET_TIMEOUTS \
67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS)
68#define IOCTL_SERIAL_GET_WAIT_MASK \
69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS)
70#define IOCTL_SERIAL_IMMEDIATE_CHAR \
71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS)
72#ifndef IOCTL_SERIAL_LSRMST_INSERT
73/* it's already defined in winioctl.h */
74#define IOCTL_SERIAL_LSRMST_INSERT \
75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
76#endif
77#define IOCTL_SERIAL_PURGE \
78 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
79#define IOCTL_SERIAL_RESET_DEVICE \
80 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
81#define IOCTL_SERIAL_SET_BAUD_RATE \
82 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
83#define IOCTL_SERIAL_SET_BREAK_ON \
84 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
85#define IOCTL_SERIAL_SET_BREAK_OFF \
86 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS)
87#define IOCTL_SERIAL_SET_CHARS \
88 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
89#define IOCTL_SERIAL_SET_DTR \
90 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS)
91#define IOCTL_SERIAL_SET_FIFO_CONTROL \
92 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS)
93#define IOCTL_SERIAL_SET_HANDFLOW \
94 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS)
95#define IOCTL_SERIAL_SET_LINE_CONTROL \
96 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
97#define IOCTL_SERIAL_SET_MODEM_CONTROL \
98 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
99#define IOCTL_SERIAL_SET_QUEUE_SIZE \
100 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
101#define IOCTL_SERIAL_SET_RTS \
102 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
103#define IOCTL_SERIAL_SET_TIMEOUTS \
104 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS)
105#define IOCTL_SERIAL_SET_WAIT_MASK \
106 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
107#define IOCTL_SERIAL_SET_XOFF \
108 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
109#define IOCTL_SERIAL_SET_XON \
110 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
111#define IOCTL_SERIAL_WAIT_ON_MASK \
112 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS)
113#define IOCTL_SERIAL_XOFF_COUNTER \
114 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS)
115
116typedef struct _SERIAL_BAUD_RATE
117{
118 ULONG BaudRate;
119} SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE;
120
121/* SERIAL_BAUD_RATE.BaudRate constants */
122#define SERIAL_BAUD_075 0x00000001
123#define SERIAL_BAUD_110 0x00000002
124#define SERIAL_BAUD_134_5 0x00000004
125#define SERIAL_BAUD_150 0x00000008
126#define SERIAL_BAUD_300 0x00000010
127#define SERIAL_BAUD_600 0x00000020
128#define SERIAL_BAUD_1200 0x00000040
129#define SERIAL_BAUD_1800 0x00000080
130#define SERIAL_BAUD_2400 0x00000100
131#define SERIAL_BAUD_4800 0x00000200
132#define SERIAL_BAUD_7200 0x00000400
133#define SERIAL_BAUD_9600 0x00000800
134#define SERIAL_BAUD_14400 0x00001000
135#define SERIAL_BAUD_19200 0x00002000
136#define SERIAL_BAUD_38400 0x00004000
137#define SERIAL_BAUD_56K 0x00008000
138#define SERIAL_BAUD_128K 0x00010000
139#define SERIAL_BAUD_115200 0x00020000
140#define SERIAL_BAUD_57600 0x00040000
141#define SERIAL_BAUD_USER 0x10000000
142
143typedef struct _SERIAL_CHARS
144{
145 UCHAR EofChar;
146 UCHAR ErrorChar;
147 UCHAR BreakChar;
148 UCHAR EventChar;
149 UCHAR XonChar;
150 UCHAR XoffChar;
151} SERIAL_CHARS, *PSERIAL_CHARS;
152
153typedef struct _SERIAL_STATUS
154{
155 ULONG Errors;
156 ULONG HoldReasons;
157 ULONG AmountInInQueue;
158 ULONG AmountInOutQueue;
159 BOOLEAN EofReceived;
160 BOOLEAN WaitForImmediate;
161} SERIAL_STATUS, *PSERIAL_STATUS;
162
163typedef struct _SERIAL_HANDFLOW
164{
165 ULONG ControlHandShake;
166 ULONG FlowReplace;
167 LONG XonLimit;
168 LONG XoffLimit;
169} SERIAL_HANDFLOW, *PSERIAL_HANDFLOW;
170
171#define SERIAL_DTR_MASK 0x00000003
172#define SERIAL_DTR_CONTROL 0x00000001
173#define SERIAL_DTR_HANDSHAKE 0x00000002
174#define SERIAL_CTS_HANDSHAKE 0x00000008
175#define SERIAL_DSR_HANDSHAKE 0x00000010
176#define SERIAL_DCD_HANDSHAKE 0x00000020
177#define SERIAL_OUT_HANDSHAKEMASK 0x00000038
178#define SERIAL_DSR_SENSITIVITY 0x00000040
179#define SERIAL_ERROR_ABORT 0x80000000
180#define SERIAL_CONTROL_INVALID 0x7fffff84
181#define SERIAL_AUTO_TRANSMIT 0x00000001
182#define SERIAL_AUTO_RECEIVE 0x00000002
183#define SERIAL_ERROR_CHAR 0x00000004
184#define SERIAL_NULL_STRIPPING 0x00000008
185#define SERIAL_BREAK_CHAR 0x00000010
186#define SERIAL_RTS_MASK 0x000000c0
187#define SERIAL_RTS_CONTROL 0x00000040
188#define SERIAL_RTS_HANDSHAKE 0x00000080
189#define SERIAL_TRANSMIT_TOGGLE 0x000000c0
190#define SERIAL_XOFF_CONTINUE 0x80000000
191#define SERIAL_FLOW_INVALID 0x7fffff20
192
193typedef struct _SERIAL_LINE_CONTROL
194{
195 UCHAR StopBits;
196 UCHAR Parity;
197 UCHAR WordLength;
198} SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL;
199
200/* SERIAL_LINE_CONTROL.StopBits constants */
201#define STOP_BIT_1 0x00
202#define STOP_BITS_1_5 0x01
203#define STOP_BITS_2 0x02
204
205/* SERIAL_LINE_CONTROL.Parity constants */
206#define NO_PARITY 0x00
207#define ODD_PARITY 0x01
208#define EVEN_PARITY 0x02
209#define MARK_PARITY 0x03
210#define SPACE_PARITY 0x04
211
212/* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */
213#define SERIAL_IOC_MCR_DTR 0x00000001
214#define SERIAL_IOC_MCR_RTS 0x00000002
215#define SERIAL_IOC_MCR_OUT1 0x00000004
216#define SERIAL_IOC_MCR_OUT2 0x00000008
217#define SERIAL_IOC_MCR_LOOP 0x00000010
218
219typedef struct _SERIAL_COMMPROP
220{
221 USHORT PacketLength;
222 USHORT PacketVersion;
223 ULONG ServiceMask;
224 ULONG Reserved1;
225 ULONG MaxTxQueue;
226 ULONG MaxRxQueue;
227 ULONG MaxBaud;
228 ULONG ProvSubType;
229 ULONG ProvCapabilities;
230 ULONG SettableParams;
231 ULONG SettableBaud;
232 USHORT SettableData;
233 USHORT SettableStopParity;
234 ULONG CurrentTxQueue;
235 ULONG CurrentRxQueue;
236 ULONG ProvSpec1;
237 ULONG ProvSpec2;
238 WCHAR ProvChar[1];
239} SERIAL_COMMPROP, *PSERIAL_COMMPROP;
240
241/* SERIAL_COMMPROP.SettableParams flags */
242#define SERIAL_SP_PARITY 0x0001
243#define SERIAL_SP_BAUD 0x0002
244#define SERIAL_SP_DATABITS 0x0004
245#define SERIAL_SP_STOPBITS 0x0008
246#define SERIAL_SP_HANDSHAKING 0x0010
247#define SERIAL_SP_PARITY_CHECK 0x0020
248#define SERIAL_SP_CARRIER_DETECT 0x0040
249
250/* SERIAL_COMMPROP.ProvCapabilities flags */
251#define SERIAL_PCF_DTRDSR 0x00000001
252#define SERIAL_PCF_RTSCTS 0x00000002
253#define SERIAL_PCF_CD 0x00000004
254#define SERIAL_PCF_PARITY_CHECK 0x00000008
255#define SERIAL_PCF_XONXOFF 0x00000010
256#define SERIAL_PCF_SETXCHAR 0x00000020
257#define SERIAL_PCF_TOTALTIMEOUTS 0x00000040
258#define SERIAL_PCF_INTTIMEOUTS 0x00000080
259#define SERIAL_PCF_SPECIALCHARS 0x00000100
260#define SERIAL_PCF_16BITMODE 0x00000200
261
262/* SERIAL_COMMPROP.SettableData flags */
263#define SERIAL_DATABITS_5 0x0001
264#define SERIAL_DATABITS_6 0x0002
265#define SERIAL_DATABITS_7 0x0004
266#define SERIAL_DATABITS_8 0x0008
267#define SERIAL_DATABITS_16 0x0010
268#define SERIAL_DATABITS_16X 0x0020
269
270/* SERIAL_COMMPROP.SettableStopParity flags */
271#define SERIAL_STOPBITS_10 0x0001
272#define SERIAL_STOPBITS_15 0x0002
273#define SERIAL_STOPBITS_20 0x0004
274#define SERIAL_PARITY_NONE 0x0100
275#define SERIAL_PARITY_ODD 0x0200
276#define SERIAL_PARITY_EVEN 0x0400
277#define SERIAL_PARITY_MARK 0x0800
278#define SERIAL_PARITY_SPACE 0x1000
279
280typedef struct _SERIALPERF_STATS
281{
282 ULONG ReceivedCount;
283 ULONG TransmittedCount;
284 ULONG FrameErrorCount;
285 ULONG SerialOverrunErrorCount;
286 ULONG BufferOverrunErrorCount;
287 ULONG ParityErrorCount;
288} SERIALPERF_STATS, *PSERIALPERF_STATS;
289
290typedef struct _SERIAL_TIMEOUTS
291{
292 ULONG ReadIntervalTimeout;
293 ULONG ReadTotalTimeoutMultiplier;
294 ULONG ReadTotalTimeoutConstant;
295 ULONG WriteTotalTimeoutMultiplier;
296 ULONG WriteTotalTimeoutConstant;
297} SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS;
298
299/* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */
300#define SERIAL_EV_RXCHAR 0x0001
301#define SERIAL_EV_RXFLAG 0x0002
302#define SERIAL_EV_TXEMPTY 0x0004
303#define SERIAL_EV_CTS 0x0008
304#define SERIAL_EV_DSR 0x0010
305#define SERIAL_EV_RLSD 0x0020
306#define SERIAL_EV_BREAK 0x0040
307#define SERIAL_EV_ERR 0x0080
308#define SERIAL_EV_RING 0x0100
309#define SERIAL_EV_PERR 0x0200
310#define SERIAL_EV_RX80FULL 0x0400
311#define SERIAL_EV_EVENT1 0x0800
312#define SERIAL_EV_EVENT2 0x1000
313
314/* IOCTL_SERIAL_LSRMST_INSERT constants */
315#define SERIAL_LSRMST_LSR_DATA 0x01
316#define SERIAL_LSRMST_LSR_NODATA 0x02
317#define SERIAL_LSRMST_MST 0x03
318#define SERIAL_LSRMST_ESCAPE 0x00
319
320/* IOCTL_SERIAL_PURGE constants */
321#define SERIAL_PURGE_TXABORT 0x00000001
322#define SERIAL_PURGE_RXABORT 0x00000002
323#define SERIAL_PURGE_TXCLEAR 0x00000004
324#define SERIAL_PURGE_RXCLEAR 0x00000008
325
326/* IOCTL_SERIAL_SET_FIFO_CONTROL constants */
327#define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001
328#define SERIAL_IOC_FCR_RCVR_RESET 0x00000002
329#define SERIAL_IOC_FCR_XMIT_RESET 0x00000004
330#define SERIAL_IOC_FCR_DMA_MODE 0x00000008
331#define SERIAL_IOC_FCR_RES1 0x00000010
332#define SERIAL_IOC_FCR_RES2 0x00000020
333#define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040
334#define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080
335
336typedef struct _SERIAL_QUEUE_SIZE
337{
338 ULONG InSize;
339 ULONG OutSize;
340} SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE;
341
342typedef struct _SERIAL_XOFF_COUNTER
343{
344 ULONG Timeout;
345 LONG Counter;
346 UCHAR XoffChar;
347} SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER;
348
349typedef struct _SERIAL_BASIC_SETTINGS
350{
351 SERIAL_TIMEOUTS Timeouts;
352 SERIAL_HANDFLOW HandFlow;
353 ULONG RxFifo;
354 ULONG TxFifo;
355} SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS;
356
357#define SERIAL_ERROR_BREAK 0x00000001
358#define SERIAL_ERROR_FRAMING 0x00000002
359#define SERIAL_ERROR_OVERRUN 0x00000004
360#define SERIAL_ERROR_QUEUEOVERRUN 0x00000008
361#define SERIAL_ERROR_PARITY 0x00000010
362
363#define SERIAL_SP_UNSPECIFIED 0x00000000
364#define SERIAL_SP_RS232 0x00000001
365#define SERIAL_SP_PARALLEL 0x00000002
366#define SERIAL_SP_RS422 0x00000003
367#define SERIAL_SP_RS423 0x00000004
368#define SERIAL_SP_RS449 0x00000005
369#define SERIAL_SP_MODEM 0X00000006
370#define SERIAL_SP_FAX 0x00000021
371#define SERIAL_SP_SCANNER 0x00000022
372#define SERIAL_SP_BRIDGE 0x00000100
373#define SERIAL_SP_LAT 0x00000101
374#define SERIAL_SP_TELNET 0x00000102
375#define SERIAL_SP_X25 0x00000103
376#define SERIAL_SP_SERIALCOMM 0x00000001
377
378#define SERIAL_TX_WAITING_FOR_CTS 0x00000001
379#define SERIAL_TX_WAITING_FOR_DSR 0x00000002
380#define SERIAL_TX_WAITING_FOR_DCD 0x00000004
381#define SERIAL_TX_WAITING_FOR_XON 0x00000008
382#define SERIAL_TX_WAITING_XOFF_SENT 0x00000010
383#define SERIAL_TX_WAITING_ON_BREAK 0x00000020
384#define SERIAL_RX_WAITING_FOR_DSR 0x00000040
385
386#define SERIAL_DTR_STATE 0x00000001
387#define SERIAL_RTS_STATE 0x00000002
388#define SERIAL_CTS_STATE 0x00000010
389#define SERIAL_DSR_STATE 0x00000020
390#define SERIAL_RI_STATE 0x00000040
391#define SERIAL_DCD_STATE 0x00000080
392
393typedef struct _SERIALCONFIG
394{
395 ULONG Size;
396 USHORT Version;
397 ULONG SubType;
398 ULONG ProvOffset;
399 ULONG ProviderSize;
400 WCHAR ProviderData[1];
401} SERIALCONFIG,*PSERIALCONFIG;
402
403#ifdef __cplusplus
404}
405#endif
406
407#endif /* _NTDDSER_H_ */
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