drm.h@ 24323

Last change on this file since 24323 was 18057, checked in by vboxsync, 16 years ago
Solaris/VBoxVideoDRM: initial commit.
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1	/* BEGIN CSTYLED */
2
3	/**
4	* \file drm.h
5	* Header for the Direct Rendering Manager
6	*
7	* \author Rickard E. (Rik) Faith <[email protected]>
8	*
9	* \par Acknowledgments:
10	* Dec 1999, Richard Henderson <[email protected]>, move to generic \c cmpxchg.
11	*/
12
13	/*
14	* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
15	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
16	* All rights reserved.
17	*
18	* Permission is hereby granted, free of charge, to any person obtaining a
19	* copy of this software and associated documentation files (the "Software"),
20	* to deal in the Software without restriction, including without limitation
21	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
22	* and/or sell copies of the Software, and to permit persons to whom the
23	* Software is furnished to do so, subject to the following conditions:
24	*
25	* The above copyright notice and this permission notice (including the next
26	* paragraph) shall be included in all copies or substantial portions of the
27	* Software.
28	*
29	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
30	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
31	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
32	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
33	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
34	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
35	* OTHER DEALINGS IN THE SOFTWARE.
36	*/
37
38	/**
39	* \mainpage
40	*
41	* The Direct Rendering Manager (DRM) is a device-independent kernel-level
42	* device driver that provides support for the XFree86 Direct Rendering
43	* Infrastructure (DRI).
44	*
45	* The DRM supports the Direct Rendering Infrastructure (DRI) in four major
46	* ways:
47	* -# The DRM provides synchronized access to the graphics hardware via
48	* the use of an optimized two-tiered lock.
49	* -# The DRM enforces the DRI security policy for access to the graphics
50	* hardware by only allowing authenticated X11 clients access to
51	* restricted regions of memory.
52	* -# The DRM provides a generic DMA engine, complete with multiple
53	* queues and the ability to detect the need for an OpenGL context
54	* switch.
55	* -# The DRM is extensible via the use of small device-specific modules
56	* that rely extensively on the API exported by the DRM module.
57	*
58	*/
59
60	/*
61	* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
62	* Use is subject to license terms.
63	*/
64
65	#ifndef _DRM_H_
66	#define _DRM_H_
67
68	#include <sys/types32.h>
69
70	#ifndef __user
71	#define __user
72	#endif
73
74	#ifdef __GNUC__
75	# define DEPRECATED __attribute__ ((deprecated))
76	#else
77	# define DEPRECATED
78	# define __volatile__ volatile
79	#endif
80
81	#if defined(__linux__)
82	#include <asm/ioctl.h> /* For _IO* macros */
83	#define DRM_IOCTL_NR(n) _IOC_NR(n)
84	#define DRM_IOC_VOID _IOC_NONE
85	#define DRM_IOC_READ _IOC_READ
86	#define DRM_IOC_WRITE _IOC_WRITE
87	#define DRM_IOC_READWRITE _IOC_READ\|_IOC_WRITE
88	#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
89	#elif defined(__FreeBSD__) \|\| defined(__FreeBSD_kernel__) \|\| defined(__NetBSD__) \|\| defined(__OpenBSD__) \|\| defined(__DragonFly__)
90	#if (defined(__FreeBSD__) \|\| defined(__FreeBSD_kernel__)) && defined(IN_MODULE)
91	/* Prevent name collision when including sys/ioccom.h */
92	#undef ioctl
93	#include <sys/ioccom.h>
94	#define ioctl(a,b,c) xf86ioctl(a,b,c)
95	#else
96	#include <sys/ioccom.h>
97	#endif /* __FreeBSD__ && xf86ioctl */
98	#define DRM_IOCTL_NR(n) ((n) & 0xff)
99	#define DRM_IOC_VOID IOC_VOID
100	#define DRM_IOC_READ IOC_OUT
101	#define DRM_IOC_WRITE IOC_IN
102	#define DRM_IOC_READWRITE IOC_INOUT
103	#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
104	#endif
105
106	/* Solaris-specific. */
107	#if defined(__SOLARIS__) \|\| defined(sun)
108	#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
109
110	#define _IOC_NRBITS 8
111	#define _IOC_TYPEBITS 8
112	#define _IOC_SIZEBITS 14
113	#define _IOC_DIRBITS 2
114
115	#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
116	#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
117	#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
118	#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
119
120	#define _IOC_NRSHIFT 0
121	#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
122	#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
123	#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
124
125	#define _IOC_NONE 0U
126	#define _IOC_WRITE 1U
127	#define _IOC_READ 2U
128
129	#define _IOC(dir, type, nr, size) \
130	(((dir) << _IOC_DIRSHIFT) \| \
131	((type) << _IOC_TYPESHIFT) \| \
132	((nr) << _IOC_NRSHIFT) \| \
133	((size) << _IOC_SIZESHIFT))
134
135	/* used for X server compile */
136	#if !defined(_KERNEL)
137	#define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0)
138	#define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof (size))
139	#define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof (size))
140	#define _IOWR(type, nr, size) _IOC(_IOC_READ\|_IOC_WRITE, \
141	(type), (nr), sizeof (size))
142
143	#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
144	#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
145	#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
146	#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
147
148	#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
149	#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
150	#define IOC_INOUT ((_IOC_WRITE\|_IOC_READ) << _IOC_DIRSHIFT)
151	#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
152	#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
153	#endif /* _KERNEL */
154
155	#define DRM_IOCTL_NR(n) _IOC_NR(n)
156	#define DRM_IOC_VOID IOC_VOID
157	#define DRM_IOC_READ IOC_OUT
158	#define DRM_IOC_WRITE IOC_IN
159	#define DRM_IOC_READWRITE IOC_INOUT
160	#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
161
162	#endif /* __Solaris__ or sun */
163	#define XFREE86_VERSION(major,minor,patch,snap) \
164	((major << 16) \| (minor << 8) \| patch)
165
166	#ifndef CONFIG_XFREE86_VERSION
167	#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
168	#endif
169
170	#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
171	#define DRM_PROC_DEVICES "/proc/devices"
172	#define DRM_PROC_MISC "/proc/misc"
173	#define DRM_PROC_DRM "/proc/drm"
174	#define DRM_DEV_DRM "/dev/drm"
175	#define DRM_DEV_MODE (S_IRUSR\|S_IWUSR\|S_IRGRP\|S_IWGRP)
176	#define DRM_DEV_UID 0
177	#define DRM_DEV_GID 0
178	#endif
179
180	#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
181	#ifdef __OpenBSD__
182	#define DRM_MAJOR 81
183	#endif
184	#if defined(__linux__) \|\| defined(__NetBSD__)
185	#define DRM_MAJOR 226
186	#endif
187	#define DRM_MAX_MINOR 15
188	#endif
189	#define DRM_NAME "drm" /*< Name in kernel, /dev, and /proc /
190	#define DRM_MIN_ORDER 5 /*< At least 2^5 bytes = 32 bytes /
191	#define DRM_MAX_ORDER 22 /*< Up to 2^22 bytes = 4MB /
192	#define DRM_RAM_PERCENT 10 /*< How much system ram can we lock? /
193
194	#define _DRM_LOCK_HELD 0x80000000U /*< Hardware lock is held /
195	#define _DRM_LOCK_CONT 0x40000000U /*< Hardware lock is contended /
196	#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
197	#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
198	#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD\|_DRM_LOCK_CONT))
199
200	#if defined(__linux__)
201	#if defined(__KERNEL__)
202	typedef __u64 drm_u64_t;
203	#else
204	typedef unsigned long long drm_u64_t;
205	#endif
206
207	typedef unsigned int drm_handle_t;
208	#else
209	#include <sys/types.h>
210	typedef uint64_t drm_u64_t;
211	typedef unsigned long long drm_handle_t; /*< To mapped regions /
212	#endif
213	typedef unsigned int drm_context_t; /*< GLXContext handle /
214	typedef unsigned int drm_drawable_t;
215	typedef unsigned int drm_magic_t; /*< Magic for authentication /
216
217	/**
218	* Cliprect.
219	*
220	* \warning If you change this structure, make sure you change
221	* XF86DRIClipRectRec in the server as well
222	*
223	* \note KW: Actually it's illegal to change either for
224	* backwards-compatibility reasons.
225	*/
226	typedef struct drm_clip_rect {
227	unsigned short x1;
228	unsigned short y1;
229	unsigned short x2;
230	unsigned short y2;
231	} drm_clip_rect_t;
232
233	/**
234	* Drawable information.
235	*/
236	typedef struct drm_drawable_info {
237	unsigned int num_rects;
238	drm_clip_rect_t *rects;
239	} drm_drawable_info_t;
240
241	/**
242	* Texture region,
243	*/
244	typedef struct drm_tex_region {
245	unsigned char next;
246	unsigned char prev;
247	unsigned char in_use;
248	unsigned char padding;
249	unsigned int age;
250	} drm_tex_region_t;
251
252	/**
253	* Hardware lock.
254	*
255	* The lock structure is a simple cache-line aligned integer. To avoid
256	* processor bus contention on a multiprocessor system, there should not be any
257	* other data stored in the same cache line.
258	*/
259	typedef struct drm_hw_lock {
260	__volatile__ unsigned int lock; /*< lock variable /
261	char padding[60]; /*< Pad to cache line /
262	} drm_hw_lock_t;
263
264	/* This is beyond ugly, and only works on GCC. However, it allows me to use
265	* drm.h in places (i.e., in the X-server) where I can't use size_t. The real
266	* fix is to use uint32_t instead of size_t, but that fix will break existing
267	* LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That will
268	* eventually happen, though. I chose 'unsigned long' to be the fallback type
269	* because that works on all the platforms I know about. Hopefully, the
270	* real fix will happen before that bites us.
271	*/
272
273	#ifdef __SIZE_TYPE__
274	# define DRM_SIZE_T __SIZE_TYPE__
275	#else
276	#if !defined(__SOLARIS__) && !defined(sun)
277	# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!"
278	#endif
279	# define DRM_SIZE_T unsigned long
280	#endif
281
282	/**
283	* DRM_IOCTL_VERSION ioctl argument type.
284	*
285	* \sa drmGetVersion().
286	*/
287	typedef struct drm_version {
288	int version_major; /*< Major version /
289	int version_minor; /*< Minor version /
290	int version_patchlevel; /*< Patch level /
291	DRM_SIZE_T name_len; /*< Length of name buffer /
292	char __user name; /< Name of driver /
293	DRM_SIZE_T date_len; /*< Length of date buffer /
294	char __user date; /< User-space buffer to hold date /
295	DRM_SIZE_T desc_len; /*< Length of desc buffer /
296	char __user desc; /< User-space buffer to hold desc /
297	} drm_version_t;
298
299	/**
300	* DRM_IOCTL_GET_UNIQUE ioctl argument type.
301	*
302	* \sa drmGetBusid() and drmSetBusId().
303	*/
304	typedef struct drm_unique {
305	DRM_SIZE_T unique_len; /*< Length of unique /
306	char __user unique; /< Unique name for driver instantiation /
307	} drm_unique_t;
308
309	#undef DRM_SIZE_T
310
311	typedef struct drm_list {
312	int count; /*< Length of user-space structures /
313	drm_version_t __user *version;
314	} drm_list_t;
315
316	typedef struct drm_block {
317	int unused;
318	} drm_block_t;
319
320	/**
321	* DRM_IOCTL_CONTROL ioctl argument type.
322	*
323	* \sa drmCtlInstHandler() and drmCtlUninstHandler().
324	*/
325	typedef struct drm_control {
326	enum {
327	DRM_ADD_COMMAND,
328	DRM_RM_COMMAND,
329	DRM_INST_HANDLER,
330	DRM_UNINST_HANDLER
331	} func;
332	int irq;
333	} drm_control_t;
334
335	/**
336	* Type of memory to map.
337	*/
338	typedef enum drm_map_type {
339	_DRM_FRAME_BUFFER = 0, /*< WC (no caching), no core dump /
340	_DRM_REGISTERS = 1, /*< no caching, no core dump /
341	_DRM_SHM = 2, /*< shared, cached /
342	_DRM_AGP = 3, /*< AGP/GART /
343	_DRM_SCATTER_GATHER = 4, /*< Scatter/gather memory for PCI DMA /
344	_DRM_CONSISTENT = 5, /*< Consistent memory for PCI DMA /
345	_DRM_TTM = 6
346	} drm_map_type_t;
347
348	/**
349	* Memory mapping flags.
350	*/
351	typedef enum drm_map_flags {
352	_DRM_RESTRICTED = 0x01, /*< Cannot be mapped to user-virtual /
353	_DRM_READ_ONLY = 0x02,
354	_DRM_LOCKED = 0x04, /*< shared, cached, locked /
355	_DRM_KERNEL = 0x08, /*< kernel requires access /
356	_DRM_WRITE_COMBINING = 0x10, /*< use write-combining if available /
357	_DRM_CONTAINS_LOCK = 0x20, /*< SHM page that contains lock /
358	_DRM_REMOVABLE = 0x40, /*< Removable mapping /
359	_DRM_DRIVER = 0x80 /*< Managed by driver /
360	} drm_map_flags_t;
361
362	typedef struct drm_ctx_priv_map {
363	unsigned int ctx_id; /*< Context requesting private mapping /
364	void handle; /< Handle of map /
365	} drm_ctx_priv_map_t;
366
367	/**
368	* DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
369	* argument type.
370	*
371	* \sa drmAddMap().
372	*/
373	typedef struct drm_map {
374	unsigned long long offset; /*< Requested physical address (0 for SAREA)/
375	unsigned long long handle;
376	/*< User-space: "Handle" to pass to mmap() /
377	/*< Kernel-space: kernel-virtual address /
378	unsigned long size; /*< Requested physical size (bytes) /
379	drm_map_type_t type; /*< Type of memory to map /
380	drm_map_flags_t flags; /*< Flags /
381	int mtrr; /*< MTRR slot used /
382	/* Private data */
383	} drm_map_t;
384
385	/**
386	* DRM_IOCTL_GET_CLIENT ioctl argument type.
387	*/
388	typedef struct drm_client {
389	int idx; /*< Which client desired? /
390	int auth; /*< Is client authenticated? /
391	unsigned long pid; /*< Process ID /
392	unsigned long uid; /*< User ID /
393	unsigned long magic; /*< Magic /
394	unsigned long iocs; /*< Ioctl count /
395	} drm_client_t;
396
397	typedef enum {
398	_DRM_STAT_LOCK,
399	_DRM_STAT_OPENS,
400	_DRM_STAT_CLOSES,
401	_DRM_STAT_IOCTLS,
402	_DRM_STAT_LOCKS,
403	_DRM_STAT_UNLOCKS,
404	_DRM_STAT_VALUE, /*< Generic value /
405	_DRM_STAT_BYTE, /*< Generic byte counter (1024bytes/K) /
406	_DRM_STAT_COUNT, /*< Generic non-byte counter (1000/k) /
407
408	_DRM_STAT_IRQ, /*< IRQ /
409	_DRM_STAT_PRIMARY, /*< Primary DMA bytes /
410	_DRM_STAT_SECONDARY, /*< Secondary DMA bytes /
411	_DRM_STAT_DMA, /*< DMA /
412	_DRM_STAT_SPECIAL, /*< Special DMA (e.g., priority or polled) /
413	_DRM_STAT_MISSED /*< Missed DMA opportunity /
414	/* Add to the END of the list */
415	} drm_stat_type_t;
416
417	/**
418	* DRM_IOCTL_GET_STATS ioctl argument type.
419	*/
420	typedef struct drm_stats {
421	unsigned long count;
422	struct {
423	unsigned long value;
424	drm_stat_type_t type;
425	} data[15];
426	} drm_stats_t;
427
428	/**
429	* Hardware locking flags.
430	*/
431	typedef enum drm_lock_flags {
432	_DRM_LOCK_READY = 0x01, /*< Wait until hardware is ready for DMA /
433	_DRM_LOCK_QUIESCENT = 0x02, /*< Wait until hardware quiescent /
434	_DRM_LOCK_FLUSH = 0x04, /*< Flush this context's DMA queue first /
435	_DRM_LOCK_FLUSH_ALL = 0x08, /*< Flush all DMA queues first /
436	/* These HALT flags aren't supported yet
437	-- they will be used to support the
438	full-screen DGA-like mode. */
439	_DRM_HALT_ALL_QUEUES = 0x10, /*< Halt all current and future queues /
440	_DRM_HALT_CUR_QUEUES = 0x20 /*< Halt all current queues /
441	} drm_lock_flags_t;
442
443	/**
444	* DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
445	*
446	* \sa drmGetLock() and drmUnlock().
447	*/
448	typedef struct drm_lock {
449	int context;
450	drm_lock_flags_t flags;
451	} drm_lock_t;
452
453	/**
454	* DMA flags
455	*
456	* \warning
457	* These values \e must match xf86drm.h.
458	*
459	* \sa drm_dma.
460	*/
461	typedef enum drm_dma_flags {
462	/* Flags for DMA buffer dispatch */
463	_DRM_DMA_BLOCK = 0x01, /**<
464	* Block until buffer dispatched.
465	*
466	* \note The buffer may not yet have
467	* been processed by the hardware --
468	* getting a hardware lock with the
469	* hardware quiescent will ensure
470	* that the buffer has been
471	* processed.
472	*/
473	_DRM_DMA_WHILE_LOCKED = 0x02, /*< Dispatch while lock held /
474	_DRM_DMA_PRIORITY = 0x04, /*< High priority dispatch /
475
476	/* Flags for DMA buffer request */
477	_DRM_DMA_WAIT = 0x10, /*< Wait for free buffers /
478	_DRM_DMA_SMALLER_OK = 0x20, /*< Smaller-than-requested buffers OK /
479	_DRM_DMA_LARGER_OK = 0x40 /*< Larger-than-requested buffers OK /
480	} drm_dma_flags_t;
481
482	/**
483	* DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
484	*
485	* \sa drmAddBufs().
486	*/
487	typedef enum {
488	_DRM_PAGE_ALIGN = 0x01, /*< Align on page boundaries for DMA /
489	_DRM_AGP_BUFFER = 0x02, /*< Buffer is in AGP space /
490	_DRM_SG_BUFFER = 0x04, /*< Scatter/gather memory buffer /
491	_DRM_FB_BUFFER = 0x08, /*< Buffer is in frame buffer /
492	_DRM_PCI_BUFFER_RO = 0x10 /*< Map PCI DMA buffer read-only /
493	} drm_buf_flag;
494	typedef struct drm_buf_desc {
495	int count; /*< Number of buffers of this size /
496	int size; /*< Size in bytes /
497	int low_mark; /*< Low water mark /
498	int high_mark; /*< High water mark /
499	drm_buf_flag flags;
500	unsigned long agp_start; /**<
501	* Start address of where the AGP buffers are
502	* in the AGP aperture
503	*/
504	} drm_buf_desc_t;
505
506	/**
507	* DRM_IOCTL_INFO_BUFS ioctl argument type.
508	*/
509	typedef struct drm_buf_info {
510	int count; /*< Number of buffers described in list /
511	drm_buf_desc_t __user list; /< List of buffer descriptions /
512	} drm_buf_info_t;
513
514	/**
515	* DRM_IOCTL_FREE_BUFS ioctl argument type.
516	*/
517	typedef struct drm_buf_free {
518	int count;
519	int __user *list;
520	} drm_buf_free_t;
521
522	/**
523	* Buffer information
524	*
525	* \sa drm_buf_map.
526	*/
527	typedef struct drm_buf_pub {
528	int idx; /*< Index into the master buffer list /
529	int total; /*< Buffer size /
530	int used; /*< Amount of buffer in use (for DMA) /
531	void __user address; /< Address of buffer /
532	} drm_buf_pub_t;
533
534	/**
535	* DRM_IOCTL_MAP_BUFS ioctl argument type.
536	*/
537	typedef struct drm_buf_map {
538	int count; /*< Length of the buffer list /
539	#if defined(__cplusplus)
540	void __user *c_virtual;
541	#else
542	void __user virtual; /< Mmap'd area in user-virtual /
543	#endif
544	drm_buf_pub_t __user list; /< Buffer information /
545	int fd;
546	} drm_buf_map_t;
547
548	/**
549	* DRM_IOCTL_DMA ioctl argument type.
550	*
551	* Indices here refer to the offset into the buffer list in drm_buf_get.
552	*
553	* \sa drmDMA().
554	*/
555	typedef struct drm_dma {
556	int context; /*< Context handle /
557	int send_count; /*< Number of buffers to send /
558	int __user send_indices; /< List of handles to buffers /
559	int __user send_sizes; /< Lengths of data to send /
560	drm_dma_flags_t flags; /*< Flags /
561	int request_count; /*< Number of buffers requested /
562	int request_size; /*< Desired size for buffers /
563	int __user request_indices; /< Buffer information /
564	int __user *request_sizes;
565	int granted_count; /*< Number of buffers granted /
566	} drm_dma_t;
567
568	typedef enum {
569	_DRM_CONTEXT_PRESERVED = 0x01,
570	_DRM_CONTEXT_2DONLY = 0x02
571	} drm_ctx_flags_t;
572
573	/**
574	* DRM_IOCTL_ADD_CTX ioctl argument type.
575	*
576	* \sa drmCreateContext() and drmDestroyContext().
577	*/
578	typedef struct drm_ctx {
579	drm_context_t handle;
580	drm_ctx_flags_t flags;
581	} drm_ctx_t;
582
583	/**
584	* DRM_IOCTL_RES_CTX ioctl argument type.
585	*/
586	typedef struct drm_ctx_res {
587	int count;
588	drm_ctx_t __user *contexts;
589	} drm_ctx_res_t;
590
591
592	/**
593	* DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
594	*/
595	typedef struct drm_draw {
596	drm_drawable_t handle;
597	} drm_draw_t;
598
599	/**
600	* DRM_IOCTL_UPDATE_DRAW ioctl argument type.
601	*/
602	typedef enum {
603	DRM_DRAWABLE_CLIPRECTS,
604	} drm_drawable_info_type_t;
605
606	typedef struct drm_update_draw {
607	drm_drawable_t handle;
608	unsigned int type;
609	unsigned int num;
610	unsigned long long data;
611	} drm_update_draw_t;
612
613	/**
614	* DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
615	*/
616	typedef struct drm_auth {
617	drm_magic_t magic;
618	} drm_auth_t;
619
620	/**
621	* DRM_IOCTL_IRQ_BUSID ioctl argument type.
622	*
623	* \sa drmGetInterruptFromBusID().
624	*/
625	typedef struct drm_irq_busid {
626	int irq; /*< IRQ number /
627	int busnum; /*< bus number /
628	int devnum; /*< device number /
629	int funcnum; /*< function number /
630	} drm_irq_busid_t;
631
632	typedef enum {
633	_DRM_VBLANK_ABSOLUTE = 0x0, /*< Wait for specific vblank sequence number /
634	_DRM_VBLANK_RELATIVE = 0x1, /*< Wait for given number of vblanks /
635	_DRM_VBLANK_FLIP = 0x8000000, /*< Scheduled buffer swap should flip /
636	_DRM_VBLANK_NEXTONMISS = 0x10000000, /*< If missed, wait for next vblank /
637	_DRM_VBLANK_SECONDARY = 0x20000000, /*< Secondary display controller /
638	_DRM_VBLANK_SIGNAL = 0x40000000 /*< Send signal instead of blocking /
639	} drm_vblank_seq_type_t;
640
641	#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE \| _DRM_VBLANK_RELATIVE)
642	#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL \| _DRM_VBLANK_SECONDARY \| \
643	_DRM_VBLANK_NEXTONMISS)
644
645	struct drm_wait_vblank_request {
646	drm_vblank_seq_type_t type;
647	unsigned int sequence;
648	unsigned long signal;
649	};
650
651	struct drm_wait_vblank_reply {
652	drm_vblank_seq_type_t type;
653	unsigned int sequence;
654	long tval_sec;
655	long tval_usec;
656	};
657
658	/**
659	* DRM_IOCTL_WAIT_VBLANK ioctl argument type.
660	*
661	* \sa drmWaitVBlank().
662	*/
663	typedef union drm_wait_vblank {
664	struct drm_wait_vblank_request request;
665	struct drm_wait_vblank_reply reply;
666	} drm_wait_vblank_t;
667
668	/**
669	* DRM_IOCTL_AGP_ENABLE ioctl argument type.
670	*
671	* \sa drmAgpEnable().
672	*/
673	typedef struct drm_agp_mode {
674	unsigned long mode; /*< AGP mode /
675	} drm_agp_mode_t;
676
677	/**
678	* DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
679	*
680	* \sa drmAgpAlloc() and drmAgpFree().
681	*/
682	typedef struct drm_agp_buffer {
683	unsigned long size; /*< In bytes -- will round to page boundary /
684	unsigned long handle; /*< Used for binding / unbinding /
685	unsigned long type; /*< Type of memory to allocate /
686	unsigned long physical; /*< Physical used by i810 /
687	} drm_agp_buffer_t;
688
689	/**
690	* DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
691	*
692	* \sa drmAgpBind() and drmAgpUnbind().
693	*/
694	typedef struct drm_agp_binding {
695	unsigned long handle; /*< From drm_agp_buffer /
696	unsigned long offset; /*< In bytes -- will round to page boundary /
697	} drm_agp_binding_t;
698
699	/**
700	* DRM_IOCTL_AGP_INFO ioctl argument type.
701	*
702	* \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
703	* drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
704	* drmAgpVendorId() and drmAgpDeviceId().
705	*/
706	typedef struct drm_agp_info {
707	int agp_version_major;
708	int agp_version_minor;
709	unsigned long mode;
710	unsigned long aperture_base; /*< physical address /
711	unsigned long aperture_size; /*< bytes /
712	unsigned long memory_allowed; /*< bytes /
713	unsigned long memory_used;
714
715	/** \name PCI information */
716	/@{ /
717	unsigned short id_vendor;
718	unsigned short id_device;
719	/@} /
720	} drm_agp_info_t;
721
722	/**
723	* DRM_IOCTL_SG_ALLOC ioctl argument type.
724	*/
725	typedef struct drm_scatter_gather {
726	unsigned long size; /*< In bytes -- will round to page boundary /
727	unsigned long handle; /*< Used for mapping / unmapping /
728	} drm_scatter_gather_t;
729
730	/**
731	* DRM_IOCTL_SET_VERSION ioctl argument type.
732	*/
733	typedef struct drm_set_version {
734	int drm_di_major;
735	int drm_di_minor;
736	int drm_dd_major;
737	int drm_dd_minor;
738	} drm_set_version_t;
739
740	/**
741	* \name Ioctls Definitions
742	*/
743	/@{/
744
745	#define DRM_IOCTL_BASE 'd'
746	#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
747	#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
748	#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
749	#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
750
751	#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
752	#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
753	#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
754	#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
755	#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
756	#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
757	#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
758	#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t)
759
760	#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
761	#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
762	#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
763	#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
764	#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
765	#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
766	#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
767	#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
768	#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
769	#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
770	#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
771
772	#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
773
774	#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
775	#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
776
777	#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
778	#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
779	#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
780	#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
781	#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
782	#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
783	#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
784	#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
785	#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
786	#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
787	#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
788	#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
789	#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
790
791	#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
792	#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
793	#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
794	#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
795	#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
796	#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
797	#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
798	#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
799
800	#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t)
801	#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t)
802
803	#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
804
805	#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, drm_update_draw_t)
806	/@}/
807
808	/**
809	* Device specific ioctls should only be in their respective headers
810	* The device specific ioctl range is from 0x40 to 0x99.
811	* Generic IOCTLS restart at 0xA0.
812	*
813	* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
814	* drmCommandReadWrite().
815	*/
816	#define DRM_COMMAND_BASE 0x40
817	#define DRM_COMMAND_END 0xA0
818
819	#endif /* _DRM_H_ */

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source: vbox/trunk/src/VBox/Additions/solaris/DRM/include/drm.h@ 24323

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