| 1 | /**************************************************************************
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| 2 |
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| 3 | Copyright (C) 2004-2005 Nicolai Haehnle et al.
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| 4 |
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| 5 | Permission is hereby granted, free of charge, to any person obtaining a
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| 6 | copy of this software and associated documentation files (the "Software"),
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| 7 | to deal in the Software without restriction, including without limitation
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| 8 | on the rights to use, copy, modify, merge, publish, distribute, sub
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| 9 | license, and/or sell copies of the Software, and to permit persons to whom
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| 10 | the Software is furnished to do so, subject to the following conditions:
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| 11 |
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| 12 | The above copyright notice and this permission notice (including the next
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| 13 | paragraph) shall be included in all copies or substantial portions of the
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| 14 | Software.
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| 15 |
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| 16 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 17 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 18 | FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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| 19 | THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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| 20 | DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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| 21 | OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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| 22 | USE OR OTHER DEALINGS IN THE SOFTWARE.
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| 23 |
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| 24 | **************************************************************************/
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| 25 |
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| 26 | #ifndef _R300_REG_H
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| 27 | #define _R300_REG_H
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| 28 |
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| 29 | #define R300_MC_INIT_MISC_LAT_TIMER 0x180
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| 30 | # define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT 0
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| 31 | # define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT 4
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| 32 | # define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT 8
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| 33 | # define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT 12
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| 34 | # define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT 16
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| 35 | # define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT 20
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| 36 | # define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT 24
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| 37 | # define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT 28
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| 38 |
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| 39 |
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| 40 | #define R300_MC_INIT_GFX_LAT_TIMER 0x154
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| 41 | # define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT 0
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| 42 | # define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT 4
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| 43 | # define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT 8
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| 44 | # define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT 12
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| 45 | # define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT 16
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| 46 | # define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT 20
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| 47 | # define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT 24
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| 48 | # define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT 28
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| 49 |
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| 50 | /*
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| 51 | This file contains registers and constants for the R300. They have been
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| 52 | found mostly by examining command buffers captured using glxtest, as well
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| 53 | as by extrapolating some known registers and constants from the R200.
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| 54 |
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| 55 | I am fairly certain that they are correct unless stated otherwise in comments.
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| 56 | */
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| 57 |
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| 58 | #define R300_SE_VPORT_XSCALE 0x1D98
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| 59 | #define R300_SE_VPORT_XOFFSET 0x1D9C
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| 60 | #define R300_SE_VPORT_YSCALE 0x1DA0
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| 61 | #define R300_SE_VPORT_YOFFSET 0x1DA4
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| 62 | #define R300_SE_VPORT_ZSCALE 0x1DA8
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| 63 | #define R300_SE_VPORT_ZOFFSET 0x1DAC
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| 64 |
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| 65 |
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| 66 | /* This register is written directly and also starts data section in many 3d CP_PACKET3's */
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| 67 | #define R300_VAP_VF_CNTL 0x2084
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| 68 |
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| 69 | # define R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT 0
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| 70 | # define R300_VAP_VF_CNTL__PRIM_NONE (0<<0)
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| 71 | # define R300_VAP_VF_CNTL__PRIM_POINTS (1<<0)
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| 72 | # define R300_VAP_VF_CNTL__PRIM_LINES (2<<0)
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| 73 | # define R300_VAP_VF_CNTL__PRIM_LINE_STRIP (3<<0)
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| 74 | # define R300_VAP_VF_CNTL__PRIM_TRIANGLES (4<<0)
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| 75 | # define R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN (5<<0)
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| 76 | # define R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP (6<<0)
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| 77 | # define R300_VAP_VF_CNTL__PRIM_LINE_LOOP (12<<0)
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| 78 | # define R300_VAP_VF_CNTL__PRIM_QUADS (13<<0)
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| 79 | # define R300_VAP_VF_CNTL__PRIM_QUAD_STRIP (14<<0)
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| 80 | # define R300_VAP_VF_CNTL__PRIM_POLYGON (15<<0)
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| 81 |
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| 82 | # define R300_VAP_VF_CNTL__PRIM_WALK__SHIFT 4
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| 83 | /* State based - direct writes to registers trigger vertex generation */
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| 84 | # define R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED (0<<4)
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| 85 | # define R300_VAP_VF_CNTL__PRIM_WALK_INDICES (1<<4)
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| 86 | # define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST (2<<4)
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| 87 | # define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED (3<<4)
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| 88 |
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| 89 | /* I don't think I saw these three used.. */
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| 90 | # define R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT 6
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| 91 | # define R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT 9
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| 92 | # define R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT 10
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| 93 |
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| 94 | /* index size - when not set the indices are assumed to be 16 bit */
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| 95 | # define R300_VAP_VF_CNTL__INDEX_SIZE_32bit (1<<11)
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| 96 | /* number of vertices */
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| 97 | # define R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT 16
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| 98 |
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| 99 | /* BEGIN: Wild guesses */
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| 100 | #define R300_VAP_OUTPUT_VTX_FMT_0 0x2090
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| 101 | # define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT (1<<0)
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| 102 | # define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT (1<<1)
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| 103 | # define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2) /* GUESS */
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| 104 | # define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3) /* GUESS */
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| 105 | # define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4) /* GUESS */
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| 106 | # define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */
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| 107 |
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| 108 | #define R300_VAP_OUTPUT_VTX_FMT_1 0x2094
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| 109 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
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| 110 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
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| 111 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
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| 112 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
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| 113 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
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| 114 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
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| 115 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
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| 116 | # define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
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| 117 | /* END */
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| 118 |
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| 119 | #define R300_SE_VTE_CNTL 0x20b0
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| 120 | # define R300_VPORT_X_SCALE_ENA 0x00000001
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| 121 | # define R300_VPORT_X_OFFSET_ENA 0x00000002
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| 122 | # define R300_VPORT_Y_SCALE_ENA 0x00000004
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| 123 | # define R300_VPORT_Y_OFFSET_ENA 0x00000008
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| 124 | # define R300_VPORT_Z_SCALE_ENA 0x00000010
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| 125 | # define R300_VPORT_Z_OFFSET_ENA 0x00000020
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| 126 | # define R300_VTX_XY_FMT 0x00000100
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| 127 | # define R300_VTX_Z_FMT 0x00000200
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| 128 | # define R300_VTX_W0_FMT 0x00000400
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| 129 | # define R300_VTX_W0_NORMALIZE 0x00000800
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| 130 | # define R300_VTX_ST_DENORMALIZED 0x00001000
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| 131 |
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| 132 | /* BEGIN: Vertex data assembly - lots of uncertainties */
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| 133 | /* gap */
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| 134 | /* Where do we get our vertex data?
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| 135 | //
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| 136 | // Vertex data either comes either from immediate mode registers or from
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| 137 | // vertex arrays.
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| 138 | // There appears to be no mixed mode (though we can force the pitch of
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| 139 | // vertex arrays to 0, effectively reusing the same element over and over
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| 140 | // again).
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| 141 | //
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| 142 | // Immediate mode is controlled by the INPUT_CNTL registers. I am not sure
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| 143 | // if these registers influence vertex array processing.
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| 144 | //
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| 145 | // Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3.
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| 146 | //
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| 147 | // In both cases, vertex attributes are then passed through INPUT_ROUTE.
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| 148 |
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| 149 | // Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data
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| 150 | // into the vertex processor's input registers.
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| 151 | // The first word routes the first input, the second word the second, etc.
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| 152 | // The corresponding input is routed into the register with the given index.
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| 153 | // The list is ended by a word with INPUT_ROUTE_END set.
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| 154 | //
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| 155 | // Always set COMPONENTS_4 in immediate mode. */
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| 156 |
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| 157 | #define R300_VAP_INPUT_ROUTE_0_0 0x2150
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| 158 | # define R300_INPUT_ROUTE_COMPONENTS_1 (0 << 0)
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| 159 | # define R300_INPUT_ROUTE_COMPONENTS_2 (1 << 0)
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| 160 | # define R300_INPUT_ROUTE_COMPONENTS_3 (2 << 0)
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| 161 | # define R300_INPUT_ROUTE_COMPONENTS_4 (3 << 0)
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| 162 | # define R300_INPUT_ROUTE_COMPONENTS_RGBA (4 << 0) /* GUESS */
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| 163 | # define R300_VAP_INPUT_ROUTE_IDX_SHIFT 8
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| 164 | # define R300_VAP_INPUT_ROUTE_IDX_MASK (31 << 8) /* GUESS */
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| 165 | # define R300_VAP_INPUT_ROUTE_END (1 << 13)
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| 166 | # define R300_INPUT_ROUTE_IMMEDIATE_MODE (0 << 14) /* GUESS */
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| 167 | # define R300_INPUT_ROUTE_FLOAT (1 << 14) /* GUESS */
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| 168 | # define R300_INPUT_ROUTE_UNSIGNED_BYTE (2 << 14) /* GUESS */
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| 169 | # define R300_INPUT_ROUTE_FLOAT_COLOR (3 << 14) /* GUESS */
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| 170 | #define R300_VAP_INPUT_ROUTE_0_1 0x2154
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| 171 | #define R300_VAP_INPUT_ROUTE_0_2 0x2158
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| 172 | #define R300_VAP_INPUT_ROUTE_0_3 0x215C
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| 173 | #define R300_VAP_INPUT_ROUTE_0_4 0x2160
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| 174 | #define R300_VAP_INPUT_ROUTE_0_5 0x2164
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| 175 | #define R300_VAP_INPUT_ROUTE_0_6 0x2168
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| 176 | #define R300_VAP_INPUT_ROUTE_0_7 0x216C
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| 177 |
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| 178 | /* gap */
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| 179 | /* Notes:
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| 180 | // - always set up to produce at least two attributes:
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| 181 | // if vertex program uses only position, fglrx will set normal, too
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| 182 | // - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal */
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| 183 | #define R300_VAP_INPUT_CNTL_0 0x2180
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| 184 | # define R300_INPUT_CNTL_0_COLOR 0x00000001
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| 185 | #define R300_VAP_INPUT_CNTL_1 0x2184
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| 186 | # define R300_INPUT_CNTL_POS 0x00000001
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| 187 | # define R300_INPUT_CNTL_NORMAL 0x00000002
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| 188 | # define R300_INPUT_CNTL_COLOR 0x00000004
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| 189 | # define R300_INPUT_CNTL_TC0 0x00000400
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| 190 | # define R300_INPUT_CNTL_TC1 0x00000800
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| 191 | # define R300_INPUT_CNTL_TC2 0x00001000 /* GUESS */
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| 192 | # define R300_INPUT_CNTL_TC3 0x00002000 /* GUESS */
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| 193 | # define R300_INPUT_CNTL_TC4 0x00004000 /* GUESS */
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| 194 | # define R300_INPUT_CNTL_TC5 0x00008000 /* GUESS */
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| 195 | # define R300_INPUT_CNTL_TC6 0x00010000 /* GUESS */
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| 196 | # define R300_INPUT_CNTL_TC7 0x00020000 /* GUESS */
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| 197 |
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| 198 | /* gap */
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| 199 | /* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
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| 200 | // are set to a swizzling bit pattern, other words are 0.
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| 201 | //
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| 202 | // In immediate mode, the pattern is always set to xyzw. In vertex array
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| 203 | // mode, the swizzling pattern is e.g. used to set zw components in texture
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| 204 | // coordinates with only tweo components. */
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| 205 | #define R300_VAP_INPUT_ROUTE_1_0 0x21E0
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| 206 | # define R300_INPUT_ROUTE_SELECT_X 0
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| 207 | # define R300_INPUT_ROUTE_SELECT_Y 1
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| 208 | # define R300_INPUT_ROUTE_SELECT_Z 2
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| 209 | # define R300_INPUT_ROUTE_SELECT_W 3
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| 210 | # define R300_INPUT_ROUTE_SELECT_ZERO 4
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| 211 | # define R300_INPUT_ROUTE_SELECT_ONE 5
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| 212 | # define R300_INPUT_ROUTE_SELECT_MASK 7
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| 213 | # define R300_INPUT_ROUTE_X_SHIFT 0
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| 214 | # define R300_INPUT_ROUTE_Y_SHIFT 3
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| 215 | # define R300_INPUT_ROUTE_Z_SHIFT 6
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| 216 | # define R300_INPUT_ROUTE_W_SHIFT 9
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| 217 | # define R300_INPUT_ROUTE_ENABLE (15 << 12)
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| 218 | #define R300_VAP_INPUT_ROUTE_1_1 0x21E4
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| 219 | #define R300_VAP_INPUT_ROUTE_1_2 0x21E8
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| 220 | #define R300_VAP_INPUT_ROUTE_1_3 0x21EC
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| 221 | #define R300_VAP_INPUT_ROUTE_1_4 0x21F0
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| 222 | #define R300_VAP_INPUT_ROUTE_1_5 0x21F4
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| 223 | #define R300_VAP_INPUT_ROUTE_1_6 0x21F8
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| 224 | #define R300_VAP_INPUT_ROUTE_1_7 0x21FC
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| 225 |
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| 226 | /* END */
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| 227 |
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| 228 | /* gap */
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| 229 | /* BEGIN: Upload vertex program and data
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| 230 | // The programmable vertex shader unit has a memory bank of unknown size
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| 231 | // that can be written to in 16 byte units by writing the address into
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| 232 | // UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs).
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| 233 | //
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| 234 | // Pointers into the memory bank are always in multiples of 16 bytes.
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| 235 | //
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| 236 | // The memory bank is divided into areas with fixed meaning.
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| 237 | //
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| 238 | // Starting at address UPLOAD_PROGRAM: Vertex program instructions.
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| 239 | // Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB),
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| 240 | // whereas the difference between known addresses suggests size 512.
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| 241 | //
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| 242 | // Starting at address UPLOAD_PARAMETERS: Vertex program parameters.
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| 243 | // Native reported limits and the VPI layout suggest size 256, whereas
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| 244 | // difference between known addresses suggests size 512.
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| 245 | //
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| 246 | // At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the
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| 247 | // floating point pointsize. The exact purpose of this state is uncertain,
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| 248 | // as there is also the R300_RE_POINTSIZE register.
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| 249 | //
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| 250 | // Multiple vertex programs and parameter sets can be loaded at once,
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| 251 | // which could explain the size discrepancy. */
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| 252 | #define R300_VAP_PVS_UPLOAD_ADDRESS 0x2200
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| 253 | # define R300_PVS_UPLOAD_PROGRAM 0x00000000
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| 254 | # define R300_PVS_UPLOAD_PARAMETERS 0x00000200
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| 255 | # define R300_PVS_UPLOAD_POINTSIZE 0x00000406
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| 256 | /* gap */
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| 257 | #define R300_VAP_PVS_UPLOAD_DATA 0x2208
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| 258 | /* END */
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| 259 |
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| 260 | /* gap */
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| 261 | /* I do not know the purpose of this register. However, I do know that
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| 262 | // it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
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| 263 | // for normal rendering. */
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| 264 | #define R300_VAP_UNKNOWN_221C 0x221C
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| 265 | # define R300_221C_NORMAL 0x00000000
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| 266 | # define R300_221C_CLEAR 0x0001C000
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| 267 |
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| 268 | /* gap */
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| 269 | /* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between
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| 270 | // rendering commands and overwriting vertex program parameters.
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| 271 | // Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
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| 272 | // avoids bugs caused by still running shaders reading bad data from memory. */
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| 273 | #define R300_VAP_PVS_WAITIDLE 0x2284 /* GUESS */
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| 274 |
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| 275 | /* Absolutely no clue what this register is about. */
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| 276 | #define R300_VAP_UNKNOWN_2288 0x2288
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| 277 | # define R300_2288_R300 0x00750000 /* -- nh */
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| 278 | # define R300_2288_RV350 0x0000FFFF /* -- Vladimir */
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| 279 |
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| 280 | /* gap */
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| 281 | /* Addresses are relative to the vertex program instruction area of the
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| 282 | // memory bank. PROGRAM_END points to the last instruction of the active
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| 283 | // program
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| 284 | //
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| 285 | // The meaning of the two UNKNOWN fields is obviously not known. However,
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| 286 | // experiments so far have shown that both *must* point to an instruction
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| 287 | // inside the vertex program, otherwise the GPU locks up.
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| 288 | // fglrx usually sets CNTL_3_UNKNOWN to the end of the program and
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| 289 | // CNTL_1_UNKNOWN points to instruction where last write to position takes place.
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| 290 | // Most likely this is used to ignore rest of the program in cases where group of verts arent visible.
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| 291 | // For some reason this "section" is sometimes accepted other instruction that have
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| 292 | // no relationship with position calculations.
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| 293 | */
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| 294 | #define R300_VAP_PVS_CNTL_1 0x22D0
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| 295 | # define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0
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| 296 | # define R300_PVS_CNTL_1_POS_END_SHIFT 10
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| 297 | # define R300_PVS_CNTL_1_PROGRAM_END_SHIFT 20
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| 298 | /* Addresses are relative the the vertex program parameters area. */
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| 299 | #define R300_VAP_PVS_CNTL_2 0x22D4
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| 300 | # define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
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| 301 | # define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
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| 302 | #define R300_VAP_PVS_CNTL_3 0x22D8
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| 303 | # define R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT 10
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| 304 | # define R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT 0
|
|---|
| 305 |
|
|---|
| 306 | /* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
|
|---|
| 307 | // immediate vertices */
|
|---|
| 308 | #define R300_VAP_VTX_COLOR_R 0x2464
|
|---|
| 309 | #define R300_VAP_VTX_COLOR_G 0x2468
|
|---|
| 310 | #define R300_VAP_VTX_COLOR_B 0x246C
|
|---|
| 311 | #define R300_VAP_VTX_POS_0_X_1 0x2490 /* used for glVertex2*() */
|
|---|
| 312 | #define R300_VAP_VTX_POS_0_Y_1 0x2494
|
|---|
| 313 | #define R300_VAP_VTX_COLOR_PKD 0x249C /* RGBA */
|
|---|
| 314 | #define R300_VAP_VTX_POS_0_X_2 0x24A0 /* used for glVertex3*() */
|
|---|
| 315 | #define R300_VAP_VTX_POS_0_Y_2 0x24A4
|
|---|
| 316 | #define R300_VAP_VTX_POS_0_Z_2 0x24A8
|
|---|
| 317 | #define R300_VAP_VTX_END_OF_PKT 0x24AC /* write 0 to indicate end of packet? */
|
|---|
| 318 |
|
|---|
| 319 | /* gap */
|
|---|
| 320 |
|
|---|
| 321 | /* These are values from r300_reg/r300_reg.h - they are known to be correct
|
|---|
| 322 | and are here so we can use one register file instead of several
|
|---|
| 323 | - Vladimir */
|
|---|
| 324 | #define R300_GB_VAP_RASTER_VTX_FMT_0 0x4000
|
|---|
| 325 | # define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT (1<<0)
|
|---|
| 326 | # define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT (1<<1)
|
|---|
| 327 | # define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT (1<<2)
|
|---|
| 328 | # define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT (1<<3)
|
|---|
| 329 | # define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT (1<<4)
|
|---|
| 330 | # define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE (0xf<<5)
|
|---|
| 331 | # define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT (0x1<<16)
|
|---|
| 332 |
|
|---|
| 333 | #define R300_GB_VAP_RASTER_VTX_FMT_1 0x4004
|
|---|
| 334 | /* each of the following is 3 bits wide, specifies number
|
|---|
| 335 | of components */
|
|---|
| 336 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
|
|---|
| 337 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
|
|---|
| 338 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
|
|---|
| 339 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
|
|---|
| 340 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
|
|---|
| 341 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
|
|---|
| 342 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
|
|---|
| 343 | # define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
|
|---|
| 344 |
|
|---|
| 345 | /* UNK30 seems to enables point to quad transformation on textures
|
|---|
| 346 | (or something closely related to that).
|
|---|
| 347 | This bit is rather fatal at the time being due to lackings at pixel shader side */
|
|---|
| 348 | #define R300_GB_ENABLE 0x4008
|
|---|
| 349 | # define R300_GB_POINT_STUFF_ENABLE (1<<0)
|
|---|
| 350 | # define R300_GB_LINE_STUFF_ENABLE (1<<1)
|
|---|
| 351 | # define R300_GB_TRIANGLE_STUFF_ENABLE (1<<2)
|
|---|
| 352 | # define R300_GB_STENCIL_AUTO_ENABLE (1<<4)
|
|---|
| 353 | # define R300_GB_UNK30 (1<<30)
|
|---|
| 354 | /* each of the following is 2 bits wide */
|
|---|
| 355 | #define R300_GB_TEX_REPLICATE 0
|
|---|
| 356 | #define R300_GB_TEX_ST 1
|
|---|
| 357 | #define R300_GB_TEX_STR 2
|
|---|
| 358 | # define R300_GB_TEX0_SOURCE_SHIFT 16
|
|---|
| 359 | # define R300_GB_TEX1_SOURCE_SHIFT 18
|
|---|
| 360 | # define R300_GB_TEX2_SOURCE_SHIFT 20
|
|---|
| 361 | # define R300_GB_TEX3_SOURCE_SHIFT 22
|
|---|
| 362 | # define R300_GB_TEX4_SOURCE_SHIFT 24
|
|---|
| 363 | # define R300_GB_TEX5_SOURCE_SHIFT 26
|
|---|
| 364 | # define R300_GB_TEX6_SOURCE_SHIFT 28
|
|---|
| 365 | # define R300_GB_TEX7_SOURCE_SHIFT 30
|
|---|
| 366 |
|
|---|
| 367 | /* MSPOS - positions for multisample antialiasing (?) */
|
|---|
| 368 | #define R300_GB_MSPOS0 0x4010
|
|---|
| 369 | /* shifts - each of the fields is 4 bits */
|
|---|
| 370 | # define R300_GB_MSPOS0__MS_X0_SHIFT 0
|
|---|
| 371 | # define R300_GB_MSPOS0__MS_Y0_SHIFT 4
|
|---|
| 372 | # define R300_GB_MSPOS0__MS_X1_SHIFT 8
|
|---|
| 373 | # define R300_GB_MSPOS0__MS_Y1_SHIFT 12
|
|---|
| 374 | # define R300_GB_MSPOS0__MS_X2_SHIFT 16
|
|---|
| 375 | # define R300_GB_MSPOS0__MS_Y2_SHIFT 20
|
|---|
| 376 | # define R300_GB_MSPOS0__MSBD0_Y 24
|
|---|
| 377 | # define R300_GB_MSPOS0__MSBD0_X 28
|
|---|
| 378 |
|
|---|
| 379 | #define R300_GB_MSPOS1 0x4014
|
|---|
| 380 | # define R300_GB_MSPOS1__MS_X3_SHIFT 0
|
|---|
| 381 | # define R300_GB_MSPOS1__MS_Y3_SHIFT 4
|
|---|
| 382 | # define R300_GB_MSPOS1__MS_X4_SHIFT 8
|
|---|
| 383 | # define R300_GB_MSPOS1__MS_Y4_SHIFT 12
|
|---|
| 384 | # define R300_GB_MSPOS1__MS_X5_SHIFT 16
|
|---|
| 385 | # define R300_GB_MSPOS1__MS_Y5_SHIFT 20
|
|---|
| 386 | # define R300_GB_MSPOS1__MSBD1 24
|
|---|
| 387 |
|
|---|
| 388 |
|
|---|
| 389 | #define R300_GB_TILE_CONFIG 0x4018
|
|---|
| 390 | # define R300_GB_TILE_ENABLE (1<<0)
|
|---|
| 391 | # define R300_GB_TILE_PIPE_COUNT_RV300 0
|
|---|
| 392 | # define R300_GB_TILE_PIPE_COUNT_R300 (3<<1)
|
|---|
| 393 | # define R300_GB_TILE_PIPE_COUNT_R420 (7<<1)
|
|---|
| 394 | # define R300_GB_TILE_SIZE_8 0
|
|---|
| 395 | # define R300_GB_TILE_SIZE_16 (1<<4)
|
|---|
| 396 | # define R300_GB_TILE_SIZE_32 (2<<4)
|
|---|
| 397 | # define R300_GB_SUPER_SIZE_1 (0<<6)
|
|---|
| 398 | # define R300_GB_SUPER_SIZE_2 (1<<6)
|
|---|
| 399 | # define R300_GB_SUPER_SIZE_4 (2<<6)
|
|---|
| 400 | # define R300_GB_SUPER_SIZE_8 (3<<6)
|
|---|
| 401 | # define R300_GB_SUPER_SIZE_16 (4<<6)
|
|---|
| 402 | # define R300_GB_SUPER_SIZE_32 (5<<6)
|
|---|
| 403 | # define R300_GB_SUPER_SIZE_64 (6<<6)
|
|---|
| 404 | # define R300_GB_SUPER_SIZE_128 (7<<6)
|
|---|
| 405 | # define R300_GB_SUPER_X_SHIFT 9 /* 3 bits wide */
|
|---|
| 406 | # define R300_GB_SUPER_Y_SHIFT 12 /* 3 bits wide */
|
|---|
| 407 | # define R300_GB_SUPER_TILE_A 0
|
|---|
| 408 | # define R300_GB_SUPER_TILE_B (1<<15)
|
|---|
| 409 | # define R300_GB_SUBPIXEL_1_12 0
|
|---|
| 410 | # define R300_GB_SUBPIXEL_1_16 (1<<16)
|
|---|
| 411 |
|
|---|
| 412 | #define R300_GB_FIFO_SIZE 0x4024
|
|---|
| 413 | /* each of the following is 2 bits wide */
|
|---|
| 414 | #define R300_GB_FIFO_SIZE_32 0
|
|---|
| 415 | #define R300_GB_FIFO_SIZE_64 1
|
|---|
| 416 | #define R300_GB_FIFO_SIZE_128 2
|
|---|
| 417 | #define R300_GB_FIFO_SIZE_256 3
|
|---|
| 418 | # define R300_SC_IFIFO_SIZE_SHIFT 0
|
|---|
| 419 | # define R300_SC_TZFIFO_SIZE_SHIFT 2
|
|---|
| 420 | # define R300_SC_BFIFO_SIZE_SHIFT 4
|
|---|
| 421 |
|
|---|
| 422 | # define R300_US_OFIFO_SIZE_SHIFT 12
|
|---|
| 423 | # define R300_US_WFIFO_SIZE_SHIFT 14
|
|---|
| 424 | /* the following use the same constants as above, but meaning is
|
|---|
| 425 | is times 2 (i.e. instead of 32 words it means 64 */
|
|---|
| 426 | # define R300_RS_TFIFO_SIZE_SHIFT 6
|
|---|
| 427 | # define R300_RS_CFIFO_SIZE_SHIFT 8
|
|---|
| 428 | # define R300_US_RAM_SIZE_SHIFT 10
|
|---|
| 429 | /* watermarks, 3 bits wide */
|
|---|
| 430 | # define R300_RS_HIGHWATER_COL_SHIFT 16
|
|---|
| 431 | # define R300_RS_HIGHWATER_TEX_SHIFT 19
|
|---|
| 432 | # define R300_OFIFO_HIGHWATER_SHIFT 22 /* two bits only */
|
|---|
| 433 | # define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT 24
|
|---|
| 434 |
|
|---|
| 435 | #define R300_GB_SELECT 0x401C
|
|---|
| 436 | # define R300_GB_FOG_SELECT_C0A 0
|
|---|
| 437 | # define R300_GB_FOG_SELECT_C1A 1
|
|---|
| 438 | # define R300_GB_FOG_SELECT_C2A 2
|
|---|
| 439 | # define R300_GB_FOG_SELECT_C3A 3
|
|---|
| 440 | # define R300_GB_FOG_SELECT_1_1_W 4
|
|---|
| 441 | # define R300_GB_FOG_SELECT_Z 5
|
|---|
| 442 | # define R300_GB_DEPTH_SELECT_Z 0
|
|---|
| 443 | # define R300_GB_DEPTH_SELECT_1_1_W (1<<3)
|
|---|
| 444 | # define R300_GB_W_SELECT_1_W 0
|
|---|
| 445 | # define R300_GB_W_SELECT_1 (1<<4)
|
|---|
| 446 |
|
|---|
| 447 | #define R300_GB_AA_CONFIG 0x4020
|
|---|
| 448 | # define R300_AA_ENABLE 0x01
|
|---|
| 449 | # define R300_AA_SUBSAMPLES_2 0
|
|---|
| 450 | # define R300_AA_SUBSAMPLES_3 (1<<1)
|
|---|
| 451 | # define R300_AA_SUBSAMPLES_4 (2<<1)
|
|---|
| 452 | # define R300_AA_SUBSAMPLES_6 (3<<1)
|
|---|
| 453 |
|
|---|
| 454 | /* END */
|
|---|
| 455 |
|
|---|
| 456 | /* gap */
|
|---|
| 457 | /* The upper enable bits are guessed, based on fglrx reported limits. */
|
|---|
| 458 | #define R300_TX_ENABLE 0x4104
|
|---|
| 459 | # define R300_TX_ENABLE_0 (1 << 0)
|
|---|
| 460 | # define R300_TX_ENABLE_1 (1 << 1)
|
|---|
| 461 | # define R300_TX_ENABLE_2 (1 << 2)
|
|---|
| 462 | # define R300_TX_ENABLE_3 (1 << 3)
|
|---|
| 463 | # define R300_TX_ENABLE_4 (1 << 4)
|
|---|
| 464 | # define R300_TX_ENABLE_5 (1 << 5)
|
|---|
| 465 | # define R300_TX_ENABLE_6 (1 << 6)
|
|---|
| 466 | # define R300_TX_ENABLE_7 (1 << 7)
|
|---|
| 467 | # define R300_TX_ENABLE_8 (1 << 8)
|
|---|
| 468 | # define R300_TX_ENABLE_9 (1 << 9)
|
|---|
| 469 | # define R300_TX_ENABLE_10 (1 << 10)
|
|---|
| 470 | # define R300_TX_ENABLE_11 (1 << 11)
|
|---|
| 471 | # define R300_TX_ENABLE_12 (1 << 12)
|
|---|
| 472 | # define R300_TX_ENABLE_13 (1 << 13)
|
|---|
| 473 | # define R300_TX_ENABLE_14 (1 << 14)
|
|---|
| 474 | # define R300_TX_ENABLE_15 (1 << 15)
|
|---|
| 475 |
|
|---|
| 476 | /* The pointsize is given in multiples of 6. The pointsize can be
|
|---|
| 477 | // enormous: Clear() renders a single point that fills the entire
|
|---|
| 478 | // framebuffer. */
|
|---|
| 479 | #define R300_RE_POINTSIZE 0x421C
|
|---|
| 480 | # define R300_POINTSIZE_Y_SHIFT 0
|
|---|
| 481 | # define R300_POINTSIZE_Y_MASK (0xFFFF << 0) /* GUESS */
|
|---|
| 482 | # define R300_POINTSIZE_X_SHIFT 16
|
|---|
| 483 | # define R300_POINTSIZE_X_MASK (0xFFFF << 16) /* GUESS */
|
|---|
| 484 | # define R300_POINTSIZE_MAX (R300_POINTSIZE_Y_MASK / 6)
|
|---|
| 485 |
|
|---|
| 486 | /* The line width is given in multiples of 6.
|
|---|
| 487 | In default mode lines are classified as vertical lines.
|
|---|
| 488 | HO: horizontal
|
|---|
| 489 | VE: vertical or horizontal
|
|---|
| 490 | HO & VE: no classification
|
|---|
| 491 | */
|
|---|
| 492 | #define R300_RE_LINE_CNT 0x4234
|
|---|
| 493 | # define R300_LINESIZE_SHIFT 0
|
|---|
| 494 | # define R300_LINESIZE_MASK (0xFFFF << 0) /* GUESS */
|
|---|
| 495 | # define R300_LINESIZE_MAX (R300_LINESIZE_MASK / 6)
|
|---|
| 496 | # define R300_LINE_CNT_HO (1 << 16)
|
|---|
| 497 | # define R300_LINE_CNT_VE (1 << 17)
|
|---|
| 498 |
|
|---|
| 499 | /* Some sort of scale or clamp value for texcoordless textures. */
|
|---|
| 500 | #define R300_RE_UNK4238 0x4238
|
|---|
| 501 |
|
|---|
| 502 | #define R300_RE_SHADE_MODEL 0x4278
|
|---|
| 503 | # define R300_RE_SHADE_MODEL_SMOOTH 0x3aaaa
|
|---|
| 504 | # define R300_RE_SHADE_MODEL_FLAT 0x39595
|
|---|
| 505 |
|
|---|
| 506 | /* Dangerous */
|
|---|
| 507 | #define R300_RE_POLYGON_MODE 0x4288
|
|---|
| 508 | # define R300_PM_ENABLED (1 << 0)
|
|---|
| 509 | # define R300_PM_FRONT_POINT (0 << 0)
|
|---|
| 510 | # define R300_PM_BACK_POINT (0 << 0)
|
|---|
| 511 | # define R300_PM_FRONT_LINE (1 << 4)
|
|---|
| 512 | # define R300_PM_FRONT_FILL (1 << 5)
|
|---|
| 513 | # define R300_PM_BACK_LINE (1 << 7)
|
|---|
| 514 | # define R300_PM_BACK_FILL (1 << 8)
|
|---|
| 515 |
|
|---|
| 516 | /* Not sure why there are duplicate of factor and constant values.
|
|---|
| 517 | My best guess so far is that there are seperate zbiases for test and write.
|
|---|
| 518 | Ordering might be wrong.
|
|---|
| 519 | Some of the tests indicate that fgl has a fallback implementation of zbias
|
|---|
| 520 | via pixel shaders. */
|
|---|
| 521 | #define R300_RE_ZBIAS_T_FACTOR 0x42A4
|
|---|
| 522 | #define R300_RE_ZBIAS_T_CONSTANT 0x42A8
|
|---|
| 523 | #define R300_RE_ZBIAS_W_FACTOR 0x42AC
|
|---|
| 524 | #define R300_RE_ZBIAS_W_CONSTANT 0x42B0
|
|---|
| 525 |
|
|---|
| 526 | /* This register needs to be set to (1<<1) for RV350 to correctly
|
|---|
| 527 | perform depth test (see --vb-triangles in r300_demo)
|
|---|
| 528 | Don't know about other chips. - Vladimir
|
|---|
| 529 | This is set to 3 when GL_POLYGON_OFFSET_FILL is on.
|
|---|
| 530 | My guess is that there are two bits for each zbias primitive (FILL, LINE, POINT).
|
|---|
| 531 | One to enable depth test and one for depth write.
|
|---|
| 532 | Yet this doesnt explain why depth writes work ...
|
|---|
| 533 | */
|
|---|
| 534 | #define R300_RE_OCCLUSION_CNTL 0x42B4
|
|---|
| 535 | # define R300_OCCLUSION_ON (1<<1)
|
|---|
| 536 |
|
|---|
| 537 | #define R300_RE_CULL_CNTL 0x42B8
|
|---|
| 538 | # define R300_CULL_FRONT (1 << 0)
|
|---|
| 539 | # define R300_CULL_BACK (1 << 1)
|
|---|
| 540 | # define R300_FRONT_FACE_CCW (0 << 2)
|
|---|
| 541 | # define R300_FRONT_FACE_CW (1 << 2)
|
|---|
| 542 |
|
|---|
| 543 |
|
|---|
| 544 | /* BEGIN: Rasterization / Interpolators - many guesses
|
|---|
| 545 | // 0_UNKNOWN_18 has always been set except for clear operations.
|
|---|
| 546 | // TC_CNT is the number of incoming texture coordinate sets (i.e. it depends
|
|---|
| 547 | // on the vertex program, *not* the fragment program) */
|
|---|
| 548 | #define R300_RS_CNTL_0 0x4300
|
|---|
| 549 | # define R300_RS_CNTL_TC_CNT_SHIFT 2
|
|---|
| 550 | # define R300_RS_CNTL_TC_CNT_MASK (7 << 2)
|
|---|
| 551 | # define R300_RS_CNTL_CI_CNT_SHIFT 7 /* number of color interpolators used */
|
|---|
| 552 | # define R300_RS_CNTL_0_UNKNOWN_18 (1 << 18)
|
|---|
| 553 | /* Guess: RS_CNTL_1 holds the index of the highest used RS_ROUTE_n register. */
|
|---|
| 554 | #define R300_RS_CNTL_1 0x4304
|
|---|
| 555 |
|
|---|
| 556 | /* gap */
|
|---|
| 557 | /* Only used for texture coordinates.
|
|---|
| 558 | // Use the source field to route texture coordinate input from the vertex program
|
|---|
| 559 | // to the desired interpolator. Note that the source field is relative to the
|
|---|
| 560 | // outputs the vertex program *actually* writes. If a vertex program only writes
|
|---|
| 561 | // texcoord[1], this will be source index 0.
|
|---|
| 562 | // Set INTERP_USED on all interpolators that produce data used by the
|
|---|
| 563 | // fragment program. INTERP_USED looks like a swizzling mask, but
|
|---|
| 564 | // I haven't seen it used that way.
|
|---|
| 565 | //
|
|---|
| 566 | // Note: The _UNKNOWN constants are always set in their respective register.
|
|---|
| 567 | // I don't know if this is necessary. */
|
|---|
| 568 | #define R300_RS_INTERP_0 0x4310
|
|---|
| 569 | #define R300_RS_INTERP_1 0x4314
|
|---|
| 570 | # define R300_RS_INTERP_1_UNKNOWN 0x40
|
|---|
| 571 | #define R300_RS_INTERP_2 0x4318
|
|---|
| 572 | # define R300_RS_INTERP_2_UNKNOWN 0x80
|
|---|
| 573 | #define R300_RS_INTERP_3 0x431C
|
|---|
| 574 | # define R300_RS_INTERP_3_UNKNOWN 0xC0
|
|---|
| 575 | #define R300_RS_INTERP_4 0x4320
|
|---|
| 576 | #define R300_RS_INTERP_5 0x4324
|
|---|
| 577 | #define R300_RS_INTERP_6 0x4328
|
|---|
| 578 | #define R300_RS_INTERP_7 0x432C
|
|---|
| 579 | # define R300_RS_INTERP_SRC_SHIFT 2
|
|---|
| 580 | # define R300_RS_INTERP_SRC_MASK (7 << 2)
|
|---|
| 581 | # define R300_RS_INTERP_USED 0x00D10000
|
|---|
| 582 |
|
|---|
| 583 | /* These DWORDs control how vertex data is routed into fragment program
|
|---|
| 584 | // registers, after interpolators. */
|
|---|
| 585 | #define R300_RS_ROUTE_0 0x4330
|
|---|
| 586 | #define R300_RS_ROUTE_1 0x4334
|
|---|
| 587 | #define R300_RS_ROUTE_2 0x4338
|
|---|
| 588 | #define R300_RS_ROUTE_3 0x433C /* GUESS */
|
|---|
| 589 | #define R300_RS_ROUTE_4 0x4340 /* GUESS */
|
|---|
| 590 | #define R300_RS_ROUTE_5 0x4344 /* GUESS */
|
|---|
| 591 | #define R300_RS_ROUTE_6 0x4348 /* GUESS */
|
|---|
| 592 | #define R300_RS_ROUTE_7 0x434C /* GUESS */
|
|---|
| 593 | # define R300_RS_ROUTE_SOURCE_INTERP_0 0
|
|---|
| 594 | # define R300_RS_ROUTE_SOURCE_INTERP_1 1
|
|---|
| 595 | # define R300_RS_ROUTE_SOURCE_INTERP_2 2
|
|---|
| 596 | # define R300_RS_ROUTE_SOURCE_INTERP_3 3
|
|---|
| 597 | # define R300_RS_ROUTE_SOURCE_INTERP_4 4
|
|---|
| 598 | # define R300_RS_ROUTE_SOURCE_INTERP_5 5 /* GUESS */
|
|---|
| 599 | # define R300_RS_ROUTE_SOURCE_INTERP_6 6 /* GUESS */
|
|---|
| 600 | # define R300_RS_ROUTE_SOURCE_INTERP_7 7 /* GUESS */
|
|---|
| 601 | # define R300_RS_ROUTE_ENABLE (1 << 3) /* GUESS */
|
|---|
| 602 | # define R300_RS_ROUTE_DEST_SHIFT 6
|
|---|
| 603 | # define R300_RS_ROUTE_DEST_MASK (31 << 6) /* GUESS */
|
|---|
| 604 |
|
|---|
| 605 | /* Special handling for color: When the fragment program uses color,
|
|---|
| 606 | // the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the
|
|---|
| 607 | // color register index. */
|
|---|
| 608 | # define R300_RS_ROUTE_0_COLOR (1 << 14)
|
|---|
| 609 | # define R300_RS_ROUTE_0_COLOR_DEST_SHIFT 17
|
|---|
| 610 | # define R300_RS_ROUTE_0_COLOR_DEST_MASK (31 << 17) /* GUESS */
|
|---|
| 611 | /* As above, but for secondary color */
|
|---|
| 612 | # define R300_RS_ROUTE_1_COLOR1 (1 << 14)
|
|---|
| 613 | # define R300_RS_ROUTE_1_COLOR1_DEST_SHIFT 17
|
|---|
| 614 | # define R300_RS_ROUTE_1_COLOR1_DEST_MASK (31 << 17)
|
|---|
| 615 | # define R300_RS_ROUTE_1_UNKNOWN11 (1 << 11)
|
|---|
| 616 | /* END */
|
|---|
| 617 |
|
|---|
| 618 | /* BEGIN: Scissors and cliprects
|
|---|
| 619 | // There are four clipping rectangles. Their corner coordinates are inclusive.
|
|---|
| 620 | // Every pixel is assigned a number from 0 and 15 by setting bits 0-3 depending
|
|---|
| 621 | // on whether the pixel is inside cliprects 0-3, respectively. For example,
|
|---|
| 622 | // if a pixel is inside cliprects 0 and 1, but outside 2 and 3, it is assigned
|
|---|
| 623 | // the number 3 (binary 0011).
|
|---|
| 624 | // Iff the bit corresponding to the pixel's number in RE_CLIPRECT_CNTL is set,
|
|---|
| 625 | // the pixel is rasterized.
|
|---|
| 626 | //
|
|---|
| 627 | // In addition to this, there is a scissors rectangle. Only pixels inside the
|
|---|
| 628 | // scissors rectangle are drawn. (coordinates are inclusive)
|
|---|
| 629 | //
|
|---|
| 630 | // For some reason, the top-left corner of the framebuffer is at (1440, 1440)
|
|---|
| 631 | // for the purpose of clipping and scissors. */
|
|---|
| 632 | #define R300_RE_CLIPRECT_TL_0 0x43B0
|
|---|
| 633 | #define R300_RE_CLIPRECT_BR_0 0x43B4
|
|---|
| 634 | #define R300_RE_CLIPRECT_TL_1 0x43B8
|
|---|
| 635 | #define R300_RE_CLIPRECT_BR_1 0x43BC
|
|---|
| 636 | #define R300_RE_CLIPRECT_TL_2 0x43C0
|
|---|
| 637 | #define R300_RE_CLIPRECT_BR_2 0x43C4
|
|---|
| 638 | #define R300_RE_CLIPRECT_TL_3 0x43C8
|
|---|
| 639 | #define R300_RE_CLIPRECT_BR_3 0x43CC
|
|---|
| 640 | # define R300_CLIPRECT_OFFSET 1440
|
|---|
| 641 | # define R300_CLIPRECT_MASK 0x1FFF
|
|---|
| 642 | # define R300_CLIPRECT_X_SHIFT 0
|
|---|
| 643 | # define R300_CLIPRECT_X_MASK (0x1FFF << 0)
|
|---|
| 644 | # define R300_CLIPRECT_Y_SHIFT 13
|
|---|
| 645 | # define R300_CLIPRECT_Y_MASK (0x1FFF << 13)
|
|---|
| 646 | #define R300_RE_CLIPRECT_CNTL 0x43D0
|
|---|
| 647 | # define R300_CLIP_OUT (1 << 0)
|
|---|
| 648 | # define R300_CLIP_0 (1 << 1)
|
|---|
| 649 | # define R300_CLIP_1 (1 << 2)
|
|---|
| 650 | # define R300_CLIP_10 (1 << 3)
|
|---|
| 651 | # define R300_CLIP_2 (1 << 4)
|
|---|
| 652 | # define R300_CLIP_20 (1 << 5)
|
|---|
| 653 | # define R300_CLIP_21 (1 << 6)
|
|---|
| 654 | # define R300_CLIP_210 (1 << 7)
|
|---|
| 655 | # define R300_CLIP_3 (1 << 8)
|
|---|
| 656 | # define R300_CLIP_30 (1 << 9)
|
|---|
| 657 | # define R300_CLIP_31 (1 << 10)
|
|---|
| 658 | # define R300_CLIP_310 (1 << 11)
|
|---|
| 659 | # define R300_CLIP_32 (1 << 12)
|
|---|
| 660 | # define R300_CLIP_320 (1 << 13)
|
|---|
| 661 | # define R300_CLIP_321 (1 << 14)
|
|---|
| 662 | # define R300_CLIP_3210 (1 << 15)
|
|---|
| 663 |
|
|---|
| 664 | /* gap */
|
|---|
| 665 | #define R300_RE_SCISSORS_TL 0x43E0
|
|---|
| 666 | #define R300_RE_SCISSORS_BR 0x43E4
|
|---|
| 667 | # define R300_SCISSORS_OFFSET 1440
|
|---|
| 668 | # define R300_SCISSORS_X_SHIFT 0
|
|---|
| 669 | # define R300_SCISSORS_X_MASK (0x1FFF << 0)
|
|---|
| 670 | # define R300_SCISSORS_Y_SHIFT 13
|
|---|
| 671 | # define R300_SCISSORS_Y_MASK (0x1FFF << 13)
|
|---|
| 672 | /* END */
|
|---|
| 673 |
|
|---|
| 674 | /* BEGIN: Texture specification
|
|---|
| 675 | // The texture specification dwords are grouped by meaning and not by texture unit.
|
|---|
| 676 | // This means that e.g. the offset for texture image unit N is found in register
|
|---|
| 677 | // TX_OFFSET_0 + (4*N) */
|
|---|
| 678 | #define R300_TX_FILTER_0 0x4400
|
|---|
| 679 | # define R300_TX_REPEAT 0
|
|---|
| 680 | # define R300_TX_MIRRORED 1
|
|---|
| 681 | # define R300_TX_CLAMP 4
|
|---|
| 682 | # define R300_TX_CLAMP_TO_EDGE 2
|
|---|
| 683 | # define R300_TX_CLAMP_TO_BORDER 6
|
|---|
| 684 | # define R300_TX_WRAP_S_SHIFT 0
|
|---|
| 685 | # define R300_TX_WRAP_S_MASK (7 << 0)
|
|---|
| 686 | # define R300_TX_WRAP_T_SHIFT 3
|
|---|
| 687 | # define R300_TX_WRAP_T_MASK (7 << 3)
|
|---|
| 688 | # define R300_TX_WRAP_Q_SHIFT 6
|
|---|
| 689 | # define R300_TX_WRAP_Q_MASK (7 << 6)
|
|---|
| 690 | # define R300_TX_MAG_FILTER_NEAREST (1 << 9)
|
|---|
| 691 | # define R300_TX_MAG_FILTER_LINEAR (2 << 9)
|
|---|
| 692 | # define R300_TX_MAG_FILTER_MASK (3 << 9)
|
|---|
| 693 | # define R300_TX_MIN_FILTER_NEAREST (1 << 11)
|
|---|
| 694 | # define R300_TX_MIN_FILTER_LINEAR (2 << 11)
|
|---|
| 695 | # define R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST (5 << 11)
|
|---|
| 696 | # define R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR (9 << 11)
|
|---|
| 697 | # define R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 11)
|
|---|
| 698 | # define R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR (10 << 11)
|
|---|
| 699 |
|
|---|
| 700 | /* NOTE: NEAREST doesnt seem to exist.
|
|---|
| 701 | Im not seting MAG_FILTER_MASK and (3 << 11) on for all
|
|---|
| 702 | anisotropy modes because that would void selected mag filter */
|
|---|
| 703 | # define R300_TX_MIN_FILTER_ANISO_NEAREST ((0 << 13) /*|R300_TX_MAG_FILTER_MASK|(3<<11)*/)
|
|---|
| 704 | # define R300_TX_MIN_FILTER_ANISO_LINEAR ((0 << 13) /*|R300_TX_MAG_FILTER_MASK|(3<<11)*/)
|
|---|
| 705 | # define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST ((1 << 13) /*|R300_TX_MAG_FILTER_MASK|(3<<11)*/)
|
|---|
| 706 | # define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR ((2 << 13) /*|R300_TX_MAG_FILTER_MASK|(3<<11)*/)
|
|---|
| 707 | # define R300_TX_MIN_FILTER_MASK ( (15 << 11) | (3 << 13) )
|
|---|
| 708 | # define R300_TX_MAX_ANISO_1_TO_1 (0 << 21)
|
|---|
| 709 | # define R300_TX_MAX_ANISO_2_TO_1 (2 << 21)
|
|---|
| 710 | # define R300_TX_MAX_ANISO_4_TO_1 (4 << 21)
|
|---|
| 711 | # define R300_TX_MAX_ANISO_8_TO_1 (6 << 21)
|
|---|
| 712 | # define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
|
|---|
| 713 | # define R300_TX_MAX_ANISO_MASK (14 << 21)
|
|---|
| 714 |
|
|---|
| 715 | #define R300_TX_UNK1_0 0x4440
|
|---|
| 716 | # define R300_LOD_BIAS_MASK 0x1fff
|
|---|
| 717 |
|
|---|
| 718 | #define R300_TX_SIZE_0 0x4480
|
|---|
| 719 | # define R300_TX_WIDTHMASK_SHIFT 0
|
|---|
| 720 | # define R300_TX_WIDTHMASK_MASK (2047 << 0)
|
|---|
| 721 | # define R300_TX_HEIGHTMASK_SHIFT 11
|
|---|
| 722 | # define R300_TX_HEIGHTMASK_MASK (2047 << 11)
|
|---|
| 723 | # define R300_TX_UNK23 (1 << 23)
|
|---|
| 724 | # define R300_TX_SIZE_SHIFT 26 /* largest of width, height */
|
|---|
| 725 | # define R300_TX_SIZE_MASK (15 << 26)
|
|---|
| 726 | #define R300_TX_FORMAT_0 0x44C0
|
|---|
| 727 | /* The interpretation of the format word by Wladimir van der Laan */
|
|---|
| 728 | /* The X, Y, Z and W refer to the layout of the components.
|
|---|
| 729 | They are given meanings as R, G, B and Alpha by the swizzle
|
|---|
| 730 | specification */
|
|---|
| 731 | # define R300_TX_FORMAT_X8 0x0
|
|---|
| 732 | # define R300_TX_FORMAT_X16 0x1
|
|---|
| 733 | # define R300_TX_FORMAT_Y4X4 0x2
|
|---|
| 734 | # define R300_TX_FORMAT_Y8X8 0x3
|
|---|
| 735 | # define R300_TX_FORMAT_Y16X16 0x4
|
|---|
| 736 | # define R300_TX_FORMAT_Z3Y3X2 0x5
|
|---|
| 737 | # define R300_TX_FORMAT_Z5Y6X5 0x6
|
|---|
| 738 | # define R300_TX_FORMAT_Z6Y5X5 0x7
|
|---|
| 739 | # define R300_TX_FORMAT_Z11Y11X10 0x8
|
|---|
| 740 | # define R300_TX_FORMAT_Z10Y11X11 0x9
|
|---|
| 741 | # define R300_TX_FORMAT_W4Z4Y4X4 0xA
|
|---|
| 742 | # define R300_TX_FORMAT_W1Z5Y5X5 0xB
|
|---|
| 743 | # define R300_TX_FORMAT_W8Z8Y8X8 0xC
|
|---|
| 744 | # define R300_TX_FORMAT_W2Z10Y10X10 0xD
|
|---|
| 745 | # define R300_TX_FORMAT_W16Z16Y16X16 0xE
|
|---|
| 746 | # define R300_TX_FORMAT_DXT1 0xF
|
|---|
| 747 | # define R300_TX_FORMAT_DXT3 0x10
|
|---|
| 748 | # define R300_TX_FORMAT_DXT5 0x11
|
|---|
| 749 | # define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */
|
|---|
| 750 | # define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */
|
|---|
| 751 | # define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */
|
|---|
| 752 | # define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */
|
|---|
| 753 | /* 0x16 - some 16 bit green format.. ?? */
|
|---|
| 754 | # define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */
|
|---|
| 755 |
|
|---|
| 756 | /* gap */
|
|---|
| 757 | /* Floating point formats */
|
|---|
| 758 | /* Note - hardware supports both 16 and 32 bit floating point */
|
|---|
| 759 | # define R300_TX_FORMAT_FL_I16 0x18
|
|---|
| 760 | # define R300_TX_FORMAT_FL_I16A16 0x19
|
|---|
| 761 | # define R300_TX_FORMAT_FL_R16G16B16A16 0x1A
|
|---|
| 762 | # define R300_TX_FORMAT_FL_I32 0x1B
|
|---|
| 763 | # define R300_TX_FORMAT_FL_I32A32 0x1C
|
|---|
| 764 | # define R300_TX_FORMAT_FL_R32G32B32A32 0x1D
|
|---|
| 765 | /* alpha modes, convenience mostly */
|
|---|
| 766 | /* if you have alpha, pick constant appropriate to the
|
|---|
| 767 | number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
|
|---|
| 768 | # define R300_TX_FORMAT_ALPHA_1CH 0x000
|
|---|
| 769 | # define R300_TX_FORMAT_ALPHA_2CH 0x200
|
|---|
| 770 | # define R300_TX_FORMAT_ALPHA_4CH 0x600
|
|---|
| 771 | # define R300_TX_FORMAT_ALPHA_NONE 0xA00
|
|---|
| 772 | /* Swizzling */
|
|---|
| 773 | /* constants */
|
|---|
| 774 | # define R300_TX_FORMAT_X 0
|
|---|
| 775 | # define R300_TX_FORMAT_Y 1
|
|---|
| 776 | # define R300_TX_FORMAT_Z 2
|
|---|
| 777 | # define R300_TX_FORMAT_W 3
|
|---|
| 778 | # define R300_TX_FORMAT_ZERO 4
|
|---|
| 779 | # define R300_TX_FORMAT_ONE 5
|
|---|
| 780 | # define R300_TX_FORMAT_CUT_Z 6 /* 2.0*Z, everything above 1.0 is set to 0.0 */
|
|---|
| 781 | # define R300_TX_FORMAT_CUT_W 7 /* 2.0*W, everything above 1.0 is set to 0.0 */
|
|---|
| 782 |
|
|---|
| 783 | # define R300_TX_FORMAT_B_SHIFT 18
|
|---|
| 784 | # define R300_TX_FORMAT_G_SHIFT 15
|
|---|
| 785 | # define R300_TX_FORMAT_R_SHIFT 12
|
|---|
| 786 | # define R300_TX_FORMAT_A_SHIFT 9
|
|---|
| 787 | /* Convenience macro to take care of layout and swizzling */
|
|---|
| 788 | # define R300_EASY_TX_FORMAT(B, G, R, A, FMT) (\
|
|---|
| 789 | ((R300_TX_FORMAT_##B)<<R300_TX_FORMAT_B_SHIFT) \
|
|---|
| 790 | | ((R300_TX_FORMAT_##G)<<R300_TX_FORMAT_G_SHIFT) \
|
|---|
| 791 | | ((R300_TX_FORMAT_##R)<<R300_TX_FORMAT_R_SHIFT) \
|
|---|
| 792 | | ((R300_TX_FORMAT_##A)<<R300_TX_FORMAT_A_SHIFT) \
|
|---|
| 793 | | (R300_TX_FORMAT_##FMT) \
|
|---|
| 794 | )
|
|---|
| 795 | /* These can be ORed with result of R300_EASY_TX_FORMAT() */
|
|---|
| 796 | /* We don't really know what they do. Take values from a constant color ? */
|
|---|
| 797 | # define R300_TX_FORMAT_CONST_X (1<<5)
|
|---|
| 798 | # define R300_TX_FORMAT_CONST_Y (2<<5)
|
|---|
| 799 | # define R300_TX_FORMAT_CONST_Z (4<<5)
|
|---|
| 800 | # define R300_TX_FORMAT_CONST_W (8<<5)
|
|---|
| 801 |
|
|---|
| 802 | # define R300_TX_FORMAT_YUV_MODE 0x00800000
|
|---|
| 803 |
|
|---|
| 804 | #define R300_TX_OFFSET_0 0x4540
|
|---|
| 805 | /* BEGIN: Guess from R200 */
|
|---|
| 806 | # define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
|
|---|
| 807 | # define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
|
|---|
| 808 | # define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
|
|---|
| 809 | # define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
|
|---|
| 810 | # define R300_TXO_OFFSET_MASK 0xffffffe0
|
|---|
| 811 | # define R300_TXO_OFFSET_SHIFT 5
|
|---|
| 812 | /* END */
|
|---|
| 813 | #define R300_TX_UNK4_0 0x4580
|
|---|
| 814 | #define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
|
|---|
| 815 |
|
|---|
| 816 | /* END */
|
|---|
| 817 |
|
|---|
| 818 | /* BEGIN: Fragment program instruction set
|
|---|
| 819 | // Fragment programs are written directly into register space.
|
|---|
| 820 | // There are separate instruction streams for texture instructions and ALU
|
|---|
| 821 | // instructions.
|
|---|
| 822 | // In order to synchronize these streams, the program is divided into up
|
|---|
| 823 | // to 4 nodes. Each node begins with a number of TEX operations, followed
|
|---|
| 824 | // by a number of ALU operations.
|
|---|
| 825 | // The first node can have zero TEX ops, all subsequent nodes must have at least
|
|---|
| 826 | // one TEX ops.
|
|---|
| 827 | // All nodes must have at least one ALU op.
|
|---|
| 828 | //
|
|---|
| 829 | // The index of the last node is stored in PFS_CNTL_0: A value of 0 means
|
|---|
| 830 | // 1 node, a value of 3 means 4 nodes.
|
|---|
| 831 | // The total amount of instructions is defined in PFS_CNTL_2. The offsets are
|
|---|
| 832 | // offsets into the respective instruction streams, while *_END points to the
|
|---|
| 833 | // last instruction relative to this offset. */
|
|---|
| 834 | #define R300_PFS_CNTL_0 0x4600
|
|---|
| 835 | # define R300_PFS_CNTL_LAST_NODES_SHIFT 0
|
|---|
| 836 | # define R300_PFS_CNTL_LAST_NODES_MASK (3 << 0)
|
|---|
| 837 | # define R300_PFS_CNTL_FIRST_NODE_HAS_TEX (1 << 3)
|
|---|
| 838 | #define R300_PFS_CNTL_1 0x4604
|
|---|
| 839 | /* There is an unshifted value here which has so far always been equal to the
|
|---|
| 840 | // index of the highest used temporary register. */
|
|---|
| 841 | #define R300_PFS_CNTL_2 0x4608
|
|---|
| 842 | # define R300_PFS_CNTL_ALU_OFFSET_SHIFT 0
|
|---|
| 843 | # define R300_PFS_CNTL_ALU_OFFSET_MASK (63 << 0)
|
|---|
| 844 | # define R300_PFS_CNTL_ALU_END_SHIFT 6
|
|---|
| 845 | # define R300_PFS_CNTL_ALU_END_MASK (63 << 0)
|
|---|
| 846 | # define R300_PFS_CNTL_TEX_OFFSET_SHIFT 12
|
|---|
| 847 | # define R300_PFS_CNTL_TEX_OFFSET_MASK (31 << 12) /* GUESS */
|
|---|
| 848 | # define R300_PFS_CNTL_TEX_END_SHIFT 18
|
|---|
| 849 | # define R300_PFS_CNTL_TEX_END_MASK (31 << 18) /* GUESS */
|
|---|
| 850 |
|
|---|
| 851 | /* gap */
|
|---|
| 852 | /* Nodes are stored backwards. The last active node is always stored in
|
|---|
| 853 | // PFS_NODE_3.
|
|---|
| 854 | // Example: In a 2-node program, NODE_0 and NODE_1 are set to 0. The
|
|---|
| 855 | // first node is stored in NODE_2, the second node is stored in NODE_3.
|
|---|
| 856 | //
|
|---|
| 857 | // Offsets are relative to the master offset from PFS_CNTL_2.
|
|---|
| 858 | // LAST_NODE is set for the last node, and only for the last node. */
|
|---|
| 859 | #define R300_PFS_NODE_0 0x4610
|
|---|
| 860 | #define R300_PFS_NODE_1 0x4614
|
|---|
| 861 | #define R300_PFS_NODE_2 0x4618
|
|---|
| 862 | #define R300_PFS_NODE_3 0x461C
|
|---|
| 863 | # define R300_PFS_NODE_ALU_OFFSET_SHIFT 0
|
|---|
| 864 | # define R300_PFS_NODE_ALU_OFFSET_MASK (63 << 0)
|
|---|
| 865 | # define R300_PFS_NODE_ALU_END_SHIFT 6
|
|---|
| 866 | # define R300_PFS_NODE_ALU_END_MASK (63 << 6)
|
|---|
| 867 | # define R300_PFS_NODE_TEX_OFFSET_SHIFT 12
|
|---|
| 868 | # define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12)
|
|---|
| 869 | # define R300_PFS_NODE_TEX_END_SHIFT 17
|
|---|
| 870 | # define R300_PFS_NODE_TEX_END_MASK (31 << 17)
|
|---|
| 871 | # define R300_PFS_NODE_LAST_NODE (1 << 22)
|
|---|
| 872 |
|
|---|
| 873 | /* TEX
|
|---|
| 874 | // As far as I can tell, texture instructions cannot write into output
|
|---|
| 875 | // registers directly. A subsequent ALU instruction is always necessary,
|
|---|
| 876 | // even if it's just MAD o0, r0, 1, 0 */
|
|---|
| 877 | #define R300_PFS_TEXI_0 0x4620
|
|---|
| 878 | # define R300_FPITX_SRC_SHIFT 0
|
|---|
| 879 | # define R300_FPITX_SRC_MASK (31 << 0)
|
|---|
| 880 | # define R300_FPITX_SRC_CONST (1 << 5) /* GUESS */
|
|---|
| 881 | # define R300_FPITX_DST_SHIFT 6
|
|---|
| 882 | # define R300_FPITX_DST_MASK (31 << 6)
|
|---|
| 883 | # define R300_FPITX_IMAGE_SHIFT 11
|
|---|
| 884 | # define R300_FPITX_IMAGE_MASK (15 << 11) /* GUESS based on layout and native limits */
|
|---|
| 885 | /* Unsure if these are opcodes, or some kind of bitfield, but this is how
|
|---|
| 886 | * they were set when I checked
|
|---|
| 887 | */
|
|---|
| 888 | # define R300_FPITX_OPCODE_SHIFT 15
|
|---|
| 889 | # define R300_FPITX_OP_TEX 1
|
|---|
| 890 | # define R300_FPITX_OP_TXP 3
|
|---|
| 891 | # define R300_FPITX_OP_TXB 4
|
|---|
| 892 |
|
|---|
| 893 | /* ALU
|
|---|
| 894 | // The ALU instructions register blocks are enumerated according to the order
|
|---|
| 895 | // in which fglrx. I assume there is space for 64 instructions, since
|
|---|
| 896 | // each block has space for a maximum of 64 DWORDs, and this matches reported
|
|---|
| 897 | // native limits.
|
|---|
| 898 | //
|
|---|
| 899 | // The basic functional block seems to be one MAD for each color and alpha,
|
|---|
| 900 | // and an adder that adds all components after the MUL.
|
|---|
| 901 | // - ADD, MUL, MAD etc.: use MAD with appropriate neutral operands
|
|---|
| 902 | // - DP4: Use OUTC_DP4, OUTA_DP4
|
|---|
| 903 | // - DP3: Use OUTC_DP3, OUTA_DP4, appropriate alpha operands
|
|---|
| 904 | // - DPH: Use OUTC_DP4, OUTA_DP4, appropriate alpha operands
|
|---|
| 905 | // - CMP: If ARG2 < 0, return ARG1, else return ARG0
|
|---|
| 906 | // - FLR: use FRC+MAD
|
|---|
| 907 | // - XPD: use MAD+MAD
|
|---|
| 908 | // - SGE, SLT: use MAD+CMP
|
|---|
| 909 | // - RSQ: use ABS modifier for argument
|
|---|
| 910 | // - Use OUTC_REPL_ALPHA to write results of an alpha-only operation (e.g. RCP)
|
|---|
| 911 | // into color register
|
|---|
| 912 | // - apparently, there's no quick DST operation
|
|---|
| 913 | // - fglrx set FPI2_UNKNOWN_31 on a "MAD fragment.color, tmp0, tmp1, tmp2"
|
|---|
| 914 | // - fglrx set FPI2_UNKNOWN_31 on a "MAX r2, r1, c0"
|
|---|
| 915 | // - fglrx once set FPI0_UNKNOWN_31 on a "FRC r1, r1"
|
|---|
| 916 | //
|
|---|
| 917 | // Operand selection
|
|---|
| 918 | // First stage selects three sources from the available registers and
|
|---|
| 919 | // constant parameters. This is defined in INSTR1 (color) and INSTR3 (alpha).
|
|---|
| 920 | // fglrx sorts the three source fields: Registers before constants,
|
|---|
| 921 | // lower indices before higher indices; I do not know whether this is necessary.
|
|---|
| 922 | // fglrx fills unused sources with "read constant 0"
|
|---|
| 923 | // According to specs, you cannot select more than two different constants.
|
|---|
| 924 | //
|
|---|
| 925 | // Second stage selects the operands from the sources. This is defined in
|
|---|
| 926 | // INSTR0 (color) and INSTR2 (alpha). You can also select the special constants
|
|---|
| 927 | // zero and one.
|
|---|
| 928 | // Swizzling and negation happens in this stage, as well.
|
|---|
| 929 | //
|
|---|
| 930 | // Important: Color and alpha seem to be mostly separate, i.e. their sources
|
|---|
| 931 | // selection appears to be fully independent (the register storage is probably
|
|---|
| 932 | // physically split into a color and an alpha section).
|
|---|
| 933 | // However (because of the apparent physical split), there is some interaction
|
|---|
| 934 | // WRT swizzling. If, for example, you want to load an R component into an
|
|---|
| 935 | // Alpha operand, this R component is taken from a *color* source, not from
|
|---|
| 936 | // an alpha source. The corresponding register doesn't even have to appear in
|
|---|
| 937 | // the alpha sources list. (I hope this alll makes sense to you)
|
|---|
| 938 | //
|
|---|
| 939 | // Destination selection
|
|---|
| 940 | // The destination register index is in FPI1 (color) and FPI3 (alpha) together
|
|---|
| 941 | // with enable bits.
|
|---|
| 942 | // There are separate enable bits for writing into temporary registers
|
|---|
| 943 | // (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* /DSTA_OUTPUT).
|
|---|
| 944 | // You can write to both at once, or not write at all (the same index
|
|---|
| 945 | // must be used for both).
|
|---|
| 946 | //
|
|---|
| 947 | // Note: There is a special form for LRP
|
|---|
| 948 | // - Argument order is the same as in ARB_fragment_program.
|
|---|
| 949 | // - Operation is MAD
|
|---|
| 950 | // - ARG1 is set to ARGC_SRC1C_LRP/ARGC_SRC1A_LRP
|
|---|
| 951 | // - Set FPI0/FPI2_SPECIAL_LRP
|
|---|
| 952 | // Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD */
|
|---|
| 953 | #define R300_PFS_INSTR1_0 0x46C0
|
|---|
| 954 | # define R300_FPI1_SRC0C_SHIFT 0
|
|---|
| 955 | # define R300_FPI1_SRC0C_MASK (31 << 0)
|
|---|
| 956 | # define R300_FPI1_SRC0C_CONST (1 << 5)
|
|---|
| 957 | # define R300_FPI1_SRC1C_SHIFT 6
|
|---|
| 958 | # define R300_FPI1_SRC1C_MASK (31 << 6)
|
|---|
| 959 | # define R300_FPI1_SRC1C_CONST (1 << 11)
|
|---|
| 960 | # define R300_FPI1_SRC2C_SHIFT 12
|
|---|
| 961 | # define R300_FPI1_SRC2C_MASK (31 << 12)
|
|---|
| 962 | # define R300_FPI1_SRC2C_CONST (1 << 17)
|
|---|
| 963 | # define R300_FPI1_DSTC_SHIFT 18
|
|---|
| 964 | # define R300_FPI1_DSTC_MASK (31 << 18)
|
|---|
| 965 | # define R300_FPI1_DSTC_REG_X (1 << 23)
|
|---|
| 966 | # define R300_FPI1_DSTC_REG_Y (1 << 24)
|
|---|
| 967 | # define R300_FPI1_DSTC_REG_Z (1 << 25)
|
|---|
| 968 | # define R300_FPI1_DSTC_OUTPUT_X (1 << 26)
|
|---|
| 969 | # define R300_FPI1_DSTC_OUTPUT_Y (1 << 27)
|
|---|
| 970 | # define R300_FPI1_DSTC_OUTPUT_Z (1 << 28)
|
|---|
| 971 |
|
|---|
| 972 | #define R300_PFS_INSTR3_0 0x47C0
|
|---|
| 973 | # define R300_FPI3_SRC0A_SHIFT 0
|
|---|
| 974 | # define R300_FPI3_SRC0A_MASK (31 << 0)
|
|---|
| 975 | # define R300_FPI3_SRC0A_CONST (1 << 5)
|
|---|
| 976 | # define R300_FPI3_SRC1A_SHIFT 6
|
|---|
| 977 | # define R300_FPI3_SRC1A_MASK (31 << 6)
|
|---|
| 978 | # define R300_FPI3_SRC1A_CONST (1 << 11)
|
|---|
| 979 | # define R300_FPI3_SRC2A_SHIFT 12
|
|---|
| 980 | # define R300_FPI3_SRC2A_MASK (31 << 12)
|
|---|
| 981 | # define R300_FPI3_SRC2A_CONST (1 << 17)
|
|---|
| 982 | # define R300_FPI3_DSTA_SHIFT 18
|
|---|
| 983 | # define R300_FPI3_DSTA_MASK (31 << 18)
|
|---|
| 984 | # define R300_FPI3_DSTA_REG (1 << 23)
|
|---|
| 985 | # define R300_FPI3_DSTA_OUTPUT (1 << 24)
|
|---|
| 986 |
|
|---|
| 987 | #define R300_PFS_INSTR0_0 0x48C0
|
|---|
| 988 | # define R300_FPI0_ARGC_SRC0C_XYZ 0
|
|---|
| 989 | # define R300_FPI0_ARGC_SRC0C_XXX 1
|
|---|
| 990 | # define R300_FPI0_ARGC_SRC0C_YYY 2
|
|---|
| 991 | # define R300_FPI0_ARGC_SRC0C_ZZZ 3
|
|---|
| 992 | # define R300_FPI0_ARGC_SRC1C_XYZ 4
|
|---|
| 993 | # define R300_FPI0_ARGC_SRC1C_XXX 5
|
|---|
| 994 | # define R300_FPI0_ARGC_SRC1C_YYY 6
|
|---|
| 995 | # define R300_FPI0_ARGC_SRC1C_ZZZ 7
|
|---|
| 996 | # define R300_FPI0_ARGC_SRC2C_XYZ 8
|
|---|
| 997 | # define R300_FPI0_ARGC_SRC2C_XXX 9
|
|---|
| 998 | # define R300_FPI0_ARGC_SRC2C_YYY 10
|
|---|
| 999 | # define R300_FPI0_ARGC_SRC2C_ZZZ 11
|
|---|
| 1000 | # define R300_FPI0_ARGC_SRC0A 12
|
|---|
| 1001 | # define R300_FPI0_ARGC_SRC1A 13
|
|---|
| 1002 | # define R300_FPI0_ARGC_SRC2A 14
|
|---|
| 1003 | # define R300_FPI0_ARGC_SRC1C_LRP 15
|
|---|
| 1004 | # define R300_FPI0_ARGC_ZERO 20
|
|---|
| 1005 | # define R300_FPI0_ARGC_ONE 21
|
|---|
| 1006 | # define R300_FPI0_ARGC_HALF 22 /* GUESS */
|
|---|
| 1007 | # define R300_FPI0_ARGC_SRC0C_YZX 23
|
|---|
| 1008 | # define R300_FPI0_ARGC_SRC1C_YZX 24
|
|---|
| 1009 | # define R300_FPI0_ARGC_SRC2C_YZX 25
|
|---|
| 1010 | # define R300_FPI0_ARGC_SRC0C_ZXY 26
|
|---|
| 1011 | # define R300_FPI0_ARGC_SRC1C_ZXY 27
|
|---|
| 1012 | # define R300_FPI0_ARGC_SRC2C_ZXY 28
|
|---|
| 1013 | # define R300_FPI0_ARGC_SRC0CA_WZY 29
|
|---|
| 1014 | # define R300_FPI0_ARGC_SRC1CA_WZY 30
|
|---|
| 1015 | # define R300_FPI0_ARGC_SRC2CA_WZY 31
|
|---|
| 1016 |
|
|---|
| 1017 | # define R300_FPI0_ARG0C_SHIFT 0
|
|---|
| 1018 | # define R300_FPI0_ARG0C_MASK (31 << 0)
|
|---|
| 1019 | # define R300_FPI0_ARG0C_NEG (1 << 5)
|
|---|
| 1020 | # define R300_FPI0_ARG0C_ABS (1 << 6)
|
|---|
| 1021 | # define R300_FPI0_ARG1C_SHIFT 7
|
|---|
| 1022 | # define R300_FPI0_ARG1C_MASK (31 << 7)
|
|---|
| 1023 | # define R300_FPI0_ARG1C_NEG (1 << 12)
|
|---|
| 1024 | # define R300_FPI0_ARG1C_ABS (1 << 13)
|
|---|
| 1025 | # define R300_FPI0_ARG2C_SHIFT 14
|
|---|
| 1026 | # define R300_FPI0_ARG2C_MASK (31 << 14)
|
|---|
| 1027 | # define R300_FPI0_ARG2C_NEG (1 << 19)
|
|---|
| 1028 | # define R300_FPI0_ARG2C_ABS (1 << 20)
|
|---|
| 1029 | # define R300_FPI0_SPECIAL_LRP (1 << 21)
|
|---|
| 1030 | # define R300_FPI0_OUTC_MAD (0 << 23)
|
|---|
| 1031 | # define R300_FPI0_OUTC_DP3 (1 << 23)
|
|---|
| 1032 | # define R300_FPI0_OUTC_DP4 (2 << 23)
|
|---|
| 1033 | # define R300_FPI0_OUTC_MIN (4 << 23)
|
|---|
| 1034 | # define R300_FPI0_OUTC_MAX (5 << 23)
|
|---|
| 1035 | # define R300_FPI0_OUTC_CMP (8 << 23)
|
|---|
| 1036 | # define R300_FPI0_OUTC_FRC (9 << 23)
|
|---|
| 1037 | # define R300_FPI0_OUTC_REPL_ALPHA (10 << 23)
|
|---|
| 1038 | # define R300_FPI0_OUTC_SAT (1 << 30)
|
|---|
| 1039 | # define R300_FPI0_UNKNOWN_31 (1 << 31)
|
|---|
| 1040 |
|
|---|
| 1041 | #define R300_PFS_INSTR2_0 0x49C0
|
|---|
| 1042 | # define R300_FPI2_ARGA_SRC0C_X 0
|
|---|
| 1043 | # define R300_FPI2_ARGA_SRC0C_Y 1
|
|---|
| 1044 | # define R300_FPI2_ARGA_SRC0C_Z 2
|
|---|
| 1045 | # define R300_FPI2_ARGA_SRC1C_X 3
|
|---|
| 1046 | # define R300_FPI2_ARGA_SRC1C_Y 4
|
|---|
| 1047 | # define R300_FPI2_ARGA_SRC1C_Z 5
|
|---|
| 1048 | # define R300_FPI2_ARGA_SRC2C_X 6
|
|---|
| 1049 | # define R300_FPI2_ARGA_SRC2C_Y 7
|
|---|
| 1050 | # define R300_FPI2_ARGA_SRC2C_Z 8
|
|---|
| 1051 | # define R300_FPI2_ARGA_SRC0A 9
|
|---|
| 1052 | # define R300_FPI2_ARGA_SRC1A 10
|
|---|
| 1053 | # define R300_FPI2_ARGA_SRC2A 11
|
|---|
| 1054 | # define R300_FPI2_ARGA_SRC1A_LRP 15
|
|---|
| 1055 | # define R300_FPI2_ARGA_ZERO 16
|
|---|
| 1056 | # define R300_FPI2_ARGA_ONE 17
|
|---|
| 1057 | # define R300_FPI2_ARGA_HALF 18 /* GUESS */
|
|---|
| 1058 |
|
|---|
| 1059 | # define R300_FPI2_ARG0A_SHIFT 0
|
|---|
| 1060 | # define R300_FPI2_ARG0A_MASK (31 << 0)
|
|---|
| 1061 | # define R300_FPI2_ARG0A_NEG (1 << 5)
|
|---|
| 1062 | # define R300_FPI2_ARG0A_ABS (1 << 6) /* GUESS */
|
|---|
| 1063 | # define R300_FPI2_ARG1A_SHIFT 7
|
|---|
| 1064 | # define R300_FPI2_ARG1A_MASK (31 << 7)
|
|---|
| 1065 | # define R300_FPI2_ARG1A_NEG (1 << 12)
|
|---|
| 1066 | # define R300_FPI2_ARG1A_ABS (1 << 13) /* GUESS */
|
|---|
| 1067 | # define R300_FPI2_ARG2A_SHIFT 14
|
|---|
| 1068 | # define R300_FPI2_ARG2A_MASK (31 << 14)
|
|---|
| 1069 | # define R300_FPI2_ARG2A_NEG (1 << 19)
|
|---|
| 1070 | # define R300_FPI2_ARG2A_ABS (1 << 20) /* GUESS */
|
|---|
| 1071 | # define R300_FPI2_SPECIAL_LRP (1 << 21)
|
|---|
| 1072 | # define R300_FPI2_OUTA_MAD (0 << 23)
|
|---|
| 1073 | # define R300_FPI2_OUTA_DP4 (1 << 23)
|
|---|
| 1074 | # define R300_FPI2_OUTA_MIN (2 << 23)
|
|---|
| 1075 | # define R300_FPI2_OUTA_MAX (3 << 23)
|
|---|
| 1076 | # define R300_FPI2_OUTA_CMP (6 << 23)
|
|---|
| 1077 | # define R300_FPI2_OUTA_FRC (7 << 23)
|
|---|
| 1078 | # define R300_FPI2_OUTA_EX2 (8 << 23)
|
|---|
| 1079 | # define R300_FPI2_OUTA_LG2 (9 << 23)
|
|---|
| 1080 | # define R300_FPI2_OUTA_RCP (10 << 23)
|
|---|
| 1081 | # define R300_FPI2_OUTA_RSQ (11 << 23)
|
|---|
| 1082 | # define R300_FPI2_OUTA_SAT (1 << 30)
|
|---|
| 1083 | # define R300_FPI2_UNKNOWN_31 (1 << 31)
|
|---|
| 1084 | /* END */
|
|---|
| 1085 |
|
|---|
| 1086 | /* gap */
|
|---|
| 1087 | #define R300_PP_ALPHA_TEST 0x4BD4
|
|---|
| 1088 | # define R300_REF_ALPHA_MASK 0x000000ff
|
|---|
| 1089 | # define R300_ALPHA_TEST_FAIL (0 << 8)
|
|---|
| 1090 | # define R300_ALPHA_TEST_LESS (1 << 8)
|
|---|
| 1091 | # define R300_ALPHA_TEST_LEQUAL (3 << 8)
|
|---|
| 1092 | # define R300_ALPHA_TEST_EQUAL (2 << 8)
|
|---|
| 1093 | # define R300_ALPHA_TEST_GEQUAL (6 << 8)
|
|---|
| 1094 | # define R300_ALPHA_TEST_GREATER (4 << 8)
|
|---|
| 1095 | # define R300_ALPHA_TEST_NEQUAL (5 << 8)
|
|---|
| 1096 | # define R300_ALPHA_TEST_PASS (7 << 8)
|
|---|
| 1097 | # define R300_ALPHA_TEST_OP_MASK (7 << 8)
|
|---|
| 1098 | # define R300_ALPHA_TEST_ENABLE (1 << 11)
|
|---|
| 1099 |
|
|---|
| 1100 | /* gap */
|
|---|
| 1101 | /* Fragment program parameters in 7.16 floating point */
|
|---|
| 1102 | #define R300_PFS_PARAM_0_X 0x4C00
|
|---|
| 1103 | #define R300_PFS_PARAM_0_Y 0x4C04
|
|---|
| 1104 | #define R300_PFS_PARAM_0_Z 0x4C08
|
|---|
| 1105 | #define R300_PFS_PARAM_0_W 0x4C0C
|
|---|
| 1106 | /* GUESS: PARAM_31 is last, based on native limits reported by fglrx */
|
|---|
| 1107 | #define R300_PFS_PARAM_31_X 0x4DF0
|
|---|
| 1108 | #define R300_PFS_PARAM_31_Y 0x4DF4
|
|---|
| 1109 | #define R300_PFS_PARAM_31_Z 0x4DF8
|
|---|
| 1110 | #define R300_PFS_PARAM_31_W 0x4DFC
|
|---|
| 1111 |
|
|---|
| 1112 | /* Notes:
|
|---|
| 1113 | // - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in the application
|
|---|
| 1114 | // - AFAIK fglrx always sets BLEND_NO_SEPARATE when CBLEND and ABLEND are set to the same
|
|---|
| 1115 | // function (both registers are always set up completely in any case)
|
|---|
| 1116 | // - Most blend flags are simply copied from R200 and not tested yet */
|
|---|
| 1117 | #define R300_RB3D_CBLEND 0x4E04
|
|---|
| 1118 | #define R300_RB3D_ABLEND 0x4E08
|
|---|
| 1119 | /* the following only appear in CBLEND */
|
|---|
| 1120 | # define R300_BLEND_ENABLE (1 << 0)
|
|---|
| 1121 | # define R300_BLEND_UNKNOWN (3 << 1)
|
|---|
| 1122 | # define R300_BLEND_NO_SEPARATE (1 << 3)
|
|---|
| 1123 | /* the following are shared between CBLEND and ABLEND */
|
|---|
| 1124 | # define R300_FCN_MASK (3 << 12)
|
|---|
| 1125 | # define R300_COMB_FCN_ADD_CLAMP (0 << 12)
|
|---|
| 1126 | # define R300_COMB_FCN_ADD_NOCLAMP (1 << 12)
|
|---|
| 1127 | # define R300_COMB_FCN_SUB_CLAMP (2 << 12)
|
|---|
| 1128 | # define R300_COMB_FCN_SUB_NOCLAMP (3 << 12)
|
|---|
| 1129 | # define R300_SRC_BLEND_GL_ZERO (32 << 16)
|
|---|
| 1130 | # define R300_SRC_BLEND_GL_ONE (33 << 16)
|
|---|
| 1131 | # define R300_SRC_BLEND_GL_SRC_COLOR (34 << 16)
|
|---|
| 1132 | # define R300_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 16)
|
|---|
| 1133 | # define R300_SRC_BLEND_GL_DST_COLOR (36 << 16)
|
|---|
| 1134 | # define R300_SRC_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 16)
|
|---|
| 1135 | # define R300_SRC_BLEND_GL_SRC_ALPHA (38 << 16)
|
|---|
| 1136 | # define R300_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 16)
|
|---|
| 1137 | # define R300_SRC_BLEND_GL_DST_ALPHA (40 << 16)
|
|---|
| 1138 | # define R300_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 16)
|
|---|
| 1139 | # define R300_SRC_BLEND_GL_SRC_ALPHA_SATURATE (42 << 16)
|
|---|
| 1140 | # define R300_SRC_BLEND_MASK (63 << 16)
|
|---|
| 1141 | # define R300_DST_BLEND_GL_ZERO (32 << 24)
|
|---|
| 1142 | # define R300_DST_BLEND_GL_ONE (33 << 24)
|
|---|
| 1143 | # define R300_DST_BLEND_GL_SRC_COLOR (34 << 24)
|
|---|
| 1144 | # define R300_DST_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 24)
|
|---|
| 1145 | # define R300_DST_BLEND_GL_DST_COLOR (36 << 24)
|
|---|
| 1146 | # define R300_DST_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 24)
|
|---|
| 1147 | # define R300_DST_BLEND_GL_SRC_ALPHA (38 << 24)
|
|---|
| 1148 | # define R300_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 24)
|
|---|
| 1149 | # define R300_DST_BLEND_GL_DST_ALPHA (40 << 24)
|
|---|
| 1150 | # define R300_DST_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 24)
|
|---|
| 1151 | # define R300_DST_BLEND_MASK (63 << 24)
|
|---|
| 1152 | #define R300_RB3D_COLORMASK 0x4E0C
|
|---|
| 1153 | # define R300_COLORMASK0_B (1<<0)
|
|---|
| 1154 | # define R300_COLORMASK0_G (1<<1)
|
|---|
| 1155 | # define R300_COLORMASK0_R (1<<2)
|
|---|
| 1156 | # define R300_COLORMASK0_A (1<<3)
|
|---|
| 1157 |
|
|---|
| 1158 | /* gap */
|
|---|
| 1159 | #define R300_RB3D_COLOROFFSET0 0x4E28
|
|---|
| 1160 | # define R300_COLOROFFSET_MASK 0xFFFFFFF0 /* GUESS */
|
|---|
| 1161 | #define R300_RB3D_COLOROFFSET1 0x4E2C /* GUESS */
|
|---|
| 1162 | #define R300_RB3D_COLOROFFSET2 0x4E30 /* GUESS */
|
|---|
| 1163 | #define R300_RB3D_COLOROFFSET3 0x4E34 /* GUESS */
|
|---|
| 1164 | /* gap */
|
|---|
| 1165 | /* Bit 16: Larger tiles
|
|---|
| 1166 | // Bit 17: 4x2 tiles
|
|---|
| 1167 | // Bit 18: Extremely weird tile like, but some pixels duplicated? */
|
|---|
| 1168 | #define R300_RB3D_COLORPITCH0 0x4E38
|
|---|
| 1169 | # define R300_COLORPITCH_MASK 0x00001FF8 /* GUESS */
|
|---|
| 1170 | # define R300_COLOR_TILE_ENABLE (1 << 16) /* GUESS */
|
|---|
| 1171 | # define R300_COLOR_MICROTILE_ENABLE (1 << 17) /* GUESS */
|
|---|
| 1172 | # define R300_COLOR_ENDIAN_NO_SWAP (0 << 18) /* GUESS */
|
|---|
| 1173 | # define R300_COLOR_ENDIAN_WORD_SWAP (1 << 18) /* GUESS */
|
|---|
| 1174 | # define R300_COLOR_ENDIAN_DWORD_SWAP (2 << 18) /* GUESS */
|
|---|
| 1175 | # define R300_COLOR_FORMAT_RGB565 (2 << 22)
|
|---|
| 1176 | # define R300_COLOR_FORMAT_ARGB8888 (3 << 22)
|
|---|
| 1177 | #define R300_RB3D_COLORPITCH1 0x4E3C /* GUESS */
|
|---|
| 1178 | #define R300_RB3D_COLORPITCH2 0x4E40 /* GUESS */
|
|---|
| 1179 | #define R300_RB3D_COLORPITCH3 0x4E44 /* GUESS */
|
|---|
| 1180 |
|
|---|
| 1181 | /* gap */
|
|---|
| 1182 | /* Guess by Vladimir.
|
|---|
| 1183 | // Set to 0A before 3D operations, set to 02 afterwards. */
|
|---|
| 1184 | #define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C
|
|---|
| 1185 | # define R300_RB3D_DSTCACHE_02 0x00000002
|
|---|
| 1186 | # define R300_RB3D_DSTCACHE_0A 0x0000000A
|
|---|
| 1187 |
|
|---|
| 1188 | /* gap */
|
|---|
| 1189 | /* There seems to be no "write only" setting, so use Z-test = ALWAYS for this. */
|
|---|
| 1190 | /* Bit (1<<8) is the "test" bit. so plain write is 6 - vd */
|
|---|
| 1191 | #define R300_RB3D_ZSTENCIL_CNTL_0 0x4F00
|
|---|
| 1192 | # define R300_RB3D_Z_DISABLED_1 0x00000010 /* GUESS */
|
|---|
| 1193 | # define R300_RB3D_Z_DISABLED_2 0x00000014 /* GUESS */
|
|---|
| 1194 | # define R300_RB3D_Z_TEST 0x00000012
|
|---|
| 1195 | # define R300_RB3D_Z_TEST_AND_WRITE 0x00000016
|
|---|
| 1196 | # define R300_RB3D_Z_WRITE_ONLY 0x00000006
|
|---|
| 1197 |
|
|---|
| 1198 | # define R300_RB3D_Z_TEST 0x00000012
|
|---|
| 1199 | # define R300_RB3D_Z_TEST_AND_WRITE 0x00000016
|
|---|
| 1200 | # define R300_RB3D_Z_WRITE_ONLY 0x00000006
|
|---|
| 1201 | # define R300_RB3D_STENCIL_ENABLE 0x00000001
|
|---|
| 1202 |
|
|---|
| 1203 | #define R300_RB3D_ZSTENCIL_CNTL_1 0x4F04
|
|---|
| 1204 | /* functions */
|
|---|
| 1205 | # define R300_ZS_NEVER 0
|
|---|
| 1206 | # define R300_ZS_LESS 1
|
|---|
| 1207 | # define R300_ZS_LEQUAL 2
|
|---|
| 1208 | # define R300_ZS_EQUAL 3
|
|---|
| 1209 | # define R300_ZS_GEQUAL 4
|
|---|
| 1210 | # define R300_ZS_GREATER 5
|
|---|
| 1211 | # define R300_ZS_NOTEQUAL 6
|
|---|
| 1212 | # define R300_ZS_ALWAYS 7
|
|---|
| 1213 | # define R300_ZS_MASK 7
|
|---|
| 1214 | /* operations */
|
|---|
| 1215 | # define R300_ZS_KEEP 0
|
|---|
| 1216 | # define R300_ZS_ZERO 1
|
|---|
| 1217 | # define R300_ZS_REPLACE 2
|
|---|
| 1218 | # define R300_ZS_INCR 3
|
|---|
| 1219 | # define R300_ZS_DECR 4
|
|---|
| 1220 | # define R300_ZS_INVERT 5
|
|---|
| 1221 | # define R300_ZS_INCR_WRAP 6
|
|---|
| 1222 | # define R300_ZS_DECR_WRAP 7
|
|---|
| 1223 |
|
|---|
| 1224 | /* front and back refer to operations done for front
|
|---|
| 1225 | and back faces, i.e. separate stencil function support */
|
|---|
| 1226 | # define R300_RB3D_ZS1_DEPTH_FUNC_SHIFT 0
|
|---|
| 1227 | # define R300_RB3D_ZS1_FRONT_FUNC_SHIFT 3
|
|---|
| 1228 | # define R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT 6
|
|---|
| 1229 | # define R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT 9
|
|---|
| 1230 | # define R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT 12
|
|---|
| 1231 | # define R300_RB3D_ZS1_BACK_FUNC_SHIFT 15
|
|---|
| 1232 | # define R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT 18
|
|---|
| 1233 | # define R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT 21
|
|---|
| 1234 | # define R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT 24
|
|---|
| 1235 |
|
|---|
| 1236 |
|
|---|
| 1237 |
|
|---|
| 1238 | #define R300_RB3D_ZSTENCIL_CNTL_2 0x4F08
|
|---|
| 1239 | # define R300_RB3D_ZS2_STENCIL_REF_SHIFT 0
|
|---|
| 1240 | # define R300_RB3D_ZS2_STENCIL_MASK 0xFF
|
|---|
| 1241 | # define R300_RB3D_ZS2_STENCIL_MASK_SHIFT 8
|
|---|
| 1242 | # define R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT 16
|
|---|
| 1243 |
|
|---|
| 1244 | /* gap */
|
|---|
| 1245 |
|
|---|
| 1246 | #define R300_RB3D_ZSTENCIL_FORMAT 0x4F10
|
|---|
| 1247 | # define R300_DEPTH_FORMAT_16BIT_INT_Z (0 << 0)
|
|---|
| 1248 | # define R300_DEPTH_FORMAT_24BIT_INT_Z (2 << 0)
|
|---|
| 1249 |
|
|---|
| 1250 | /* gap */
|
|---|
| 1251 | #define R300_RB3D_DEPTHOFFSET 0x4F20
|
|---|
| 1252 | #define R300_RB3D_DEPTHPITCH 0x4F24
|
|---|
| 1253 | # define R300_DEPTHPITCH_MASK 0x00001FF8 /* GUESS */
|
|---|
| 1254 | # define R300_DEPTH_TILE_ENABLE (1 << 16) /* GUESS */
|
|---|
| 1255 | # define R300_DEPTH_MICROTILE_ENABLE (1 << 17) /* GUESS */
|
|---|
| 1256 | # define R300_DEPTH_ENDIAN_NO_SWAP (0 << 18) /* GUESS */
|
|---|
| 1257 | # define R300_DEPTH_ENDIAN_WORD_SWAP (1 << 18) /* GUESS */
|
|---|
| 1258 | # define R300_DEPTH_ENDIAN_DWORD_SWAP (2 << 18) /* GUESS */
|
|---|
| 1259 |
|
|---|
| 1260 | /* BEGIN: Vertex program instruction set
|
|---|
| 1261 | // Every instruction is four dwords long:
|
|---|
| 1262 | // DWORD 0: output and opcode
|
|---|
| 1263 | // DWORD 1: first argument
|
|---|
| 1264 | // DWORD 2: second argument
|
|---|
| 1265 | // DWORD 3: third argument
|
|---|
| 1266 | //
|
|---|
| 1267 | // Notes:
|
|---|
| 1268 | // - ABS r, a is implemented as MAX r, a, -a
|
|---|
| 1269 | // - MOV is implemented as ADD to zero
|
|---|
| 1270 | // - XPD is implemented as MUL + MAD
|
|---|
| 1271 | // - FLR is implemented as FRC + ADD
|
|---|
| 1272 | // - apparently, fglrx tries to schedule instructions so that there is at least
|
|---|
| 1273 | // one instruction between the write to a temporary and the first read
|
|---|
| 1274 | // from said temporary; however, violations of this scheduling are allowed
|
|---|
| 1275 | // - register indices seem to be unrelated with OpenGL aliasing to conventional state
|
|---|
| 1276 | // - only one attribute and one parameter can be loaded at a time; however, the
|
|---|
| 1277 | // same attribute/parameter can be used for more than one argument
|
|---|
| 1278 | // - the second software argument for POW is the third hardware argument (no idea why)
|
|---|
| 1279 | // - MAD with only temporaries as input seems to use VPI_OUT_SELECT_MAD_2
|
|---|
| 1280 | //
|
|---|
| 1281 | // There is some magic surrounding LIT:
|
|---|
| 1282 | // The single argument is replicated across all three inputs, but swizzled:
|
|---|
| 1283 | // First argument: xyzy
|
|---|
| 1284 | // Second argument: xyzx
|
|---|
| 1285 | // Third argument: xyzw
|
|---|
| 1286 | // Whenever the result is used later in the fragment program, fglrx forces x and w
|
|---|
| 1287 | // to be 1.0 in the input selection; I don't know whether this is strictly necessary */
|
|---|
| 1288 | #define R300_VPI_OUT_OP_DOT (1 << 0)
|
|---|
| 1289 | #define R300_VPI_OUT_OP_MUL (2 << 0)
|
|---|
| 1290 | #define R300_VPI_OUT_OP_ADD (3 << 0)
|
|---|
| 1291 | #define R300_VPI_OUT_OP_MAD (4 << 0)
|
|---|
| 1292 | #define R300_VPI_OUT_OP_DST (5 << 0)
|
|---|
| 1293 | #define R300_VPI_OUT_OP_FRC (6 << 0)
|
|---|
| 1294 | #define R300_VPI_OUT_OP_MAX (7 << 0)
|
|---|
| 1295 | #define R300_VPI_OUT_OP_MIN (8 << 0)
|
|---|
| 1296 | #define R300_VPI_OUT_OP_SGE (9 << 0)
|
|---|
| 1297 | #define R300_VPI_OUT_OP_SLT (10 << 0)
|
|---|
| 1298 | #define R300_VPI_OUT_OP_UNK12 (12 << 0) /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, vector(scalar, vector) */
|
|---|
| 1299 | #define R300_VPI_OUT_OP_EXP (65 << 0)
|
|---|
| 1300 | #define R300_VPI_OUT_OP_LOG (66 << 0)
|
|---|
| 1301 | #define R300_VPI_OUT_OP_UNK67 (67 << 0) /* Used in fog computations, scalar(scalar) */
|
|---|
| 1302 | #define R300_VPI_OUT_OP_LIT (68 << 0)
|
|---|
| 1303 | #define R300_VPI_OUT_OP_POW (69 << 0)
|
|---|
| 1304 | #define R300_VPI_OUT_OP_RCP (70 << 0)
|
|---|
| 1305 | #define R300_VPI_OUT_OP_RSQ (72 << 0)
|
|---|
| 1306 | #define R300_VPI_OUT_OP_UNK73 (73 << 0) /* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, scalar(scalar) */
|
|---|
| 1307 | #define R300_VPI_OUT_OP_EX2 (75 << 0)
|
|---|
| 1308 | #define R300_VPI_OUT_OP_LG2 (76 << 0)
|
|---|
| 1309 | #define R300_VPI_OUT_OP_MAD_2 (128 << 0)
|
|---|
| 1310 | #define R300_VPI_OUT_OP_UNK129 (129 << 0) /* all temps, vector(scalar, vector, vector) */
|
|---|
| 1311 |
|
|---|
| 1312 | #define R300_VPI_OUT_REG_CLASS_TEMPORARY (0 << 8)
|
|---|
| 1313 | #define R300_VPI_OUT_REG_CLASS_RESULT (2 << 8)
|
|---|
| 1314 | #define R300_VPI_OUT_REG_CLASS_MASK (31 << 8)
|
|---|
| 1315 |
|
|---|
| 1316 | #define R300_VPI_OUT_REG_INDEX_SHIFT 13
|
|---|
| 1317 | #define R300_VPI_OUT_REG_INDEX_MASK (31 << 13) /* GUESS based on fglrx native limits */
|
|---|
| 1318 |
|
|---|
| 1319 | #define R300_VPI_OUT_WRITE_X (1 << 20)
|
|---|
| 1320 | #define R300_VPI_OUT_WRITE_Y (1 << 21)
|
|---|
| 1321 | #define R300_VPI_OUT_WRITE_Z (1 << 22)
|
|---|
| 1322 | #define R300_VPI_OUT_WRITE_W (1 << 23)
|
|---|
| 1323 |
|
|---|
| 1324 | #define R300_VPI_IN_REG_CLASS_TEMPORARY (0 << 0)
|
|---|
| 1325 | #define R300_VPI_IN_REG_CLASS_ATTRIBUTE (1 << 0)
|
|---|
| 1326 | #define R300_VPI_IN_REG_CLASS_PARAMETER (2 << 0)
|
|---|
| 1327 | #define R300_VPI_IN_REG_CLASS_NONE (9 << 0)
|
|---|
| 1328 | #define R300_VPI_IN_REG_CLASS_MASK (31 << 0) /* GUESS */
|
|---|
| 1329 |
|
|---|
| 1330 | #define R300_VPI_IN_REG_INDEX_SHIFT 5
|
|---|
| 1331 | #define R300_VPI_IN_REG_INDEX_MASK (255 << 5) /* GUESS based on fglrx native limits */
|
|---|
| 1332 |
|
|---|
| 1333 | /* The R300 can select components from the input register arbitrarily.
|
|---|
| 1334 | // Use the following constants, shifted by the component shift you
|
|---|
| 1335 | // want to select */
|
|---|
| 1336 | #define R300_VPI_IN_SELECT_X 0
|
|---|
| 1337 | #define R300_VPI_IN_SELECT_Y 1
|
|---|
| 1338 | #define R300_VPI_IN_SELECT_Z 2
|
|---|
| 1339 | #define R300_VPI_IN_SELECT_W 3
|
|---|
| 1340 | #define R300_VPI_IN_SELECT_ZERO 4
|
|---|
| 1341 | #define R300_VPI_IN_SELECT_ONE 5
|
|---|
| 1342 | #define R300_VPI_IN_SELECT_MASK 7
|
|---|
| 1343 |
|
|---|
| 1344 | #define R300_VPI_IN_X_SHIFT 13
|
|---|
| 1345 | #define R300_VPI_IN_Y_SHIFT 16
|
|---|
| 1346 | #define R300_VPI_IN_Z_SHIFT 19
|
|---|
| 1347 | #define R300_VPI_IN_W_SHIFT 22
|
|---|
| 1348 |
|
|---|
| 1349 | #define R300_VPI_IN_NEG_X (1 << 25)
|
|---|
| 1350 | #define R300_VPI_IN_NEG_Y (1 << 26)
|
|---|
| 1351 | #define R300_VPI_IN_NEG_Z (1 << 27)
|
|---|
| 1352 | #define R300_VPI_IN_NEG_W (1 << 28)
|
|---|
| 1353 | /* END */
|
|---|
| 1354 |
|
|---|
| 1355 | //BEGIN: Packet 3 commands
|
|---|
| 1356 |
|
|---|
| 1357 | // A primitive emission dword.
|
|---|
| 1358 | #define R300_PRIM_TYPE_NONE (0 << 0)
|
|---|
| 1359 | #define R300_PRIM_TYPE_POINT (1 << 0)
|
|---|
| 1360 | #define R300_PRIM_TYPE_LINE (2 << 0)
|
|---|
| 1361 | #define R300_PRIM_TYPE_LINE_STRIP (3 << 0)
|
|---|
| 1362 | #define R300_PRIM_TYPE_TRI_LIST (4 << 0)
|
|---|
| 1363 | #define R300_PRIM_TYPE_TRI_FAN (5 << 0)
|
|---|
| 1364 | #define R300_PRIM_TYPE_TRI_STRIP (6 << 0)
|
|---|
| 1365 | #define R300_PRIM_TYPE_TRI_TYPE2 (7 << 0)
|
|---|
| 1366 | #define R300_PRIM_TYPE_RECT_LIST (8 << 0)
|
|---|
| 1367 | #define R300_PRIM_TYPE_3VRT_POINT_LIST (9 << 0)
|
|---|
| 1368 | #define R300_PRIM_TYPE_3VRT_LINE_LIST (10 << 0)
|
|---|
| 1369 | #define R300_PRIM_TYPE_POINT_SPRITES (11 << 0) // GUESS (based on r200)
|
|---|
| 1370 | #define R300_PRIM_TYPE_LINE_LOOP (12 << 0)
|
|---|
| 1371 | #define R300_PRIM_TYPE_QUADS (13 << 0)
|
|---|
| 1372 | #define R300_PRIM_TYPE_QUAD_STRIP (14 << 0)
|
|---|
| 1373 | #define R300_PRIM_TYPE_POLYGON (15 << 0)
|
|---|
| 1374 | #define R300_PRIM_TYPE_MASK 0xF
|
|---|
| 1375 | #define R300_PRIM_WALK_IND (1 << 4)
|
|---|
| 1376 | #define R300_PRIM_WALK_LIST (2 << 4)
|
|---|
| 1377 | #define R300_PRIM_WALK_RING (3 << 4)
|
|---|
| 1378 | #define R300_PRIM_WALK_MASK (3 << 4)
|
|---|
| 1379 | #define R300_PRIM_COLOR_ORDER_BGRA (0 << 6) // GUESS (based on r200)
|
|---|
| 1380 | #define R300_PRIM_COLOR_ORDER_RGBA (1 << 6) // GUESS
|
|---|
| 1381 | #define R300_PRIM_NUM_VERTICES_SHIFT 16
|
|---|
| 1382 |
|
|---|
| 1383 | // Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR.
|
|---|
| 1384 | // Two parameter dwords:
|
|---|
| 1385 | // 0. The first parameter appears to be always 0
|
|---|
| 1386 | // 1. The second parameter is a standard primitive emission dword.
|
|---|
| 1387 | #define R300_PACKET3_3D_DRAW_VBUF 0x00002800
|
|---|
| 1388 |
|
|---|
| 1389 | // Specify the full set of vertex arrays as (address, stride).
|
|---|
| 1390 | // The first parameter is the number of vertex arrays specified.
|
|---|
| 1391 | // The rest of the command is a variable length list of blocks, where
|
|---|
| 1392 | // each block is three dwords long and specifies two arrays.
|
|---|
| 1393 | // The first dword of a block is split into two words, the lower significant
|
|---|
| 1394 | // word refers to the first array, the more significant word to the second
|
|---|
| 1395 | // array in the block.
|
|---|
| 1396 | // The low byte of each word contains the size of an array entry in dwords,
|
|---|
| 1397 | // the high byte contains the stride of the array.
|
|---|
| 1398 | // The second dword of a block contains the pointer to the first array,
|
|---|
| 1399 | // the third dword of a block contains the pointer to the second array.
|
|---|
| 1400 | // Note that if the total number of arrays is odd, the third dword of
|
|---|
| 1401 | // the last block is omitted.
|
|---|
| 1402 | #define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00
|
|---|
| 1403 |
|
|---|
| 1404 | #define R300_PACKET3_INDX_BUFFER 0x00003300
|
|---|
| 1405 | # define R300_EB_UNK1_SHIFT 24
|
|---|
| 1406 | # define R300_EB_UNK1 (0x80<<24)
|
|---|
| 1407 | # define R300_EB_UNK2 0x0810
|
|---|
| 1408 | #define R300_PACKET3_3D_DRAW_INDX_2 0x00003600
|
|---|
| 1409 |
|
|---|
| 1410 | //END
|
|---|
| 1411 |
|
|---|
| 1412 | #endif /* _R300_REG_H */
|
|---|
