| 1 | /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
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| 2 | * Created: Wed Apr 5 19:24:19 2000 by [email protected]
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| 3 | */
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| 4 | /*
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| 5 | * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
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| 6 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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| 7 | * All rights reserved.
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| 8 | *
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| 9 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 10 | * copy of this software and associated documentation files (the "Software"),
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| 11 | * to deal in the Software without restriction, including without limitation
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| 12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 13 | * and/or sell copies of the Software, and to permit persons to whom the
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| 14 | * Software is furnished to do so, subject to the following conditions:
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| 15 | *
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| 16 | * The above copyright notice and this permission notice (including the next
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| 17 | * paragraph) shall be included in all copies or substantial portions of the
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| 18 | * Software.
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| 19 | *
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| 20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 23 | * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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| 24 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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| 25 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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| 26 | * DEALINGS IN THE SOFTWARE.
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| 27 | *
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| 28 | * Authors:
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| 29 | * Gareth Hughes <[email protected]>
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| 30 | * Kevin E. Martin <[email protected]>
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| 31 | */
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| 32 |
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| 33 | #ifndef __R128_DRM_H__
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| 34 | #define __R128_DRM_H__
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| 35 |
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| 36 | /* WARNING: If you change any of these defines, make sure to change the
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| 37 | * defines in the X server file (r128_sarea.h)
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| 38 | */
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| 39 | #ifndef __R128_SAREA_DEFINES__
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| 40 | #define __R128_SAREA_DEFINES__
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| 41 |
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| 42 | /* What needs to be changed for the current vertex buffer?
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| 43 | */
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| 44 | #define R128_UPLOAD_CONTEXT 0x001
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| 45 | #define R128_UPLOAD_SETUP 0x002
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| 46 | #define R128_UPLOAD_TEX0 0x004
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| 47 | #define R128_UPLOAD_TEX1 0x008
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| 48 | #define R128_UPLOAD_TEX0IMAGES 0x010
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| 49 | #define R128_UPLOAD_TEX1IMAGES 0x020
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| 50 | #define R128_UPLOAD_CORE 0x040
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| 51 | #define R128_UPLOAD_MASKS 0x080
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| 52 | #define R128_UPLOAD_WINDOW 0x100
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| 53 | #define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
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| 54 | #define R128_REQUIRE_QUIESCENCE 0x400
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| 55 | #define R128_UPLOAD_ALL 0x7ff
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| 56 |
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| 57 | #define R128_FRONT 0x1
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| 58 | #define R128_BACK 0x2
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| 59 | #define R128_DEPTH 0x4
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| 60 |
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| 61 | /* Primitive types
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| 62 | */
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| 63 | #define R128_POINTS 0x1
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| 64 | #define R128_LINES 0x2
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| 65 | #define R128_LINE_STRIP 0x3
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| 66 | #define R128_TRIANGLES 0x4
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| 67 | #define R128_TRIANGLE_FAN 0x5
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| 68 | #define R128_TRIANGLE_STRIP 0x6
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| 69 |
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| 70 | /* Vertex/indirect buffer size
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| 71 | */
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| 72 | #define R128_BUFFER_SIZE 16384
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| 73 |
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| 74 | /* Byte offsets for indirect buffer data
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| 75 | */
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| 76 | #define R128_INDEX_PRIM_OFFSET 20
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| 77 | #define R128_HOSTDATA_BLIT_OFFSET 32
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| 78 |
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| 79 | /* Keep these small for testing.
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| 80 | */
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| 81 | #define R128_NR_SAREA_CLIPRECTS 12
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| 82 |
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| 83 | /* There are 2 heaps (local/AGP). Each region within a heap is a
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| 84 | * minimum of 64k, and there are at most 64 of them per heap.
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| 85 | */
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| 86 | #define R128_LOCAL_TEX_HEAP 0
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| 87 | #define R128_AGP_TEX_HEAP 1
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| 88 | #define R128_NR_TEX_HEAPS 2
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| 89 | #define R128_NR_TEX_REGIONS 64
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| 90 | #define R128_LOG_TEX_GRANULARITY 16
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| 91 |
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| 92 | #define R128_NR_CONTEXT_REGS 12
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| 93 |
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| 94 | #define R128_MAX_TEXTURE_LEVELS 11
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| 95 | #define R128_MAX_TEXTURE_UNITS 2
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| 96 |
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| 97 | #endif /* __R128_SAREA_DEFINES__ */
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| 98 |
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| 99 | typedef struct {
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| 100 | /* Context state - can be written in one large chunk */
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| 101 | unsigned int dst_pitch_offset_c;
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| 102 | unsigned int dp_gui_master_cntl_c;
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| 103 | unsigned int sc_top_left_c;
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| 104 | unsigned int sc_bottom_right_c;
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| 105 | unsigned int z_offset_c;
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| 106 | unsigned int z_pitch_c;
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| 107 | unsigned int z_sten_cntl_c;
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| 108 | unsigned int tex_cntl_c;
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| 109 | unsigned int misc_3d_state_cntl_reg;
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| 110 | unsigned int texture_clr_cmp_clr_c;
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| 111 | unsigned int texture_clr_cmp_msk_c;
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| 112 | unsigned int fog_color_c;
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| 113 |
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| 114 | /* Texture state */
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| 115 | unsigned int tex_size_pitch_c;
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| 116 | unsigned int constant_color_c;
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| 117 |
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| 118 | /* Setup state */
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| 119 | unsigned int pm4_vc_fpu_setup;
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| 120 | unsigned int setup_cntl;
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| 121 |
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| 122 | /* Mask state */
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| 123 | unsigned int dp_write_mask;
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| 124 | unsigned int sten_ref_mask_c;
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| 125 | unsigned int plane_3d_mask_c;
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| 126 |
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| 127 | /* Window state */
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| 128 | unsigned int window_xy_offset;
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| 129 |
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| 130 | /* Core state */
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| 131 | unsigned int scale_3d_cntl;
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| 132 | } drm_r128_context_regs_t;
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| 133 |
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| 134 | /* Setup registers for each texture unit
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| 135 | */
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| 136 | typedef struct {
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| 137 | unsigned int tex_cntl;
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| 138 | unsigned int tex_combine_cntl;
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| 139 | unsigned int tex_size_pitch;
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| 140 | unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
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| 141 | unsigned int tex_border_color;
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| 142 | } drm_r128_texture_regs_t;
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| 143 |
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| 144 | typedef struct drm_r128_sarea {
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| 145 | /* The channel for communication of state information to the kernel
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| 146 | * on firing a vertex buffer.
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| 147 | */
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| 148 | drm_r128_context_regs_t context_state;
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| 149 | drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
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| 150 | unsigned int dirty;
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| 151 | unsigned int vertsize;
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| 152 | unsigned int vc_format;
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| 153 |
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| 154 | /* The current cliprects, or a subset thereof.
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| 155 | */
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| 156 | struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
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| 157 | unsigned int nbox;
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| 158 |
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| 159 | /* Counters for client-side throttling of rendering clients.
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| 160 | */
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| 161 | unsigned int last_frame;
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| 162 | unsigned int last_dispatch;
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| 163 |
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| 164 | struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
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| 165 | unsigned int tex_age[R128_NR_TEX_HEAPS];
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| 166 | int ctx_owner;
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| 167 | int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
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| 168 | int pfCurrentPage; /* which buffer is being displayed? */
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| 169 | } drm_r128_sarea_t;
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| 170 |
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| 171 | /* WARNING: If you change any of these defines, make sure to change the
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| 172 | * defines in the Xserver file (xf86drmR128.h)
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| 173 | */
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| 174 |
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| 175 | /* Rage 128 specific ioctls
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| 176 | * The device specific ioctl range is 0x40 to 0x79.
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| 177 | */
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| 178 | #define DRM_R128_INIT 0x00
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| 179 | #define DRM_R128_CCE_START 0x01
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| 180 | #define DRM_R128_CCE_STOP 0x02
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| 181 | #define DRM_R128_CCE_RESET 0x03
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| 182 | #define DRM_R128_CCE_IDLE 0x04
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| 183 | /* 0x05 not used */
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| 184 | #define DRM_R128_RESET 0x06
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| 185 | #define DRM_R128_SWAP 0x07
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| 186 | #define DRM_R128_CLEAR 0x08
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| 187 | #define DRM_R128_VERTEX 0x09
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| 188 | #define DRM_R128_INDICES 0x0a
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| 189 | #define DRM_R128_BLIT 0x0b
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| 190 | #define DRM_R128_DEPTH 0x0c
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| 191 | #define DRM_R128_STIPPLE 0x0d
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| 192 | /* 0x0e not used */
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| 193 | #define DRM_R128_INDIRECT 0x0f
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| 194 | #define DRM_R128_FULLSCREEN 0x10
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| 195 | #define DRM_R128_CLEAR2 0x11
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| 196 | #define DRM_R128_GETPARAM 0x12
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| 197 | #define DRM_R128_FLIP 0x13
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| 198 |
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| 199 | #define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
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| 200 | #define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
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| 201 | #define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
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| 202 | #define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
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| 203 | #define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
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| 204 | /* 0x05 not used */
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| 205 | #define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
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| 206 | #define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
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| 207 | #define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
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| 208 | #define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
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| 209 | #define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
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| 210 | #define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
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| 211 | #define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
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| 212 | #define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
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| 213 | /* 0x0e not used */
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| 214 | #define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
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| 215 | #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
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| 216 | #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
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| 217 | #define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
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| 218 | #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
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| 219 |
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| 220 | typedef struct drm_r128_init {
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| 221 | enum {
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| 222 | R128_INIT_CCE = 0x01,
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| 223 | R128_CLEANUP_CCE = 0x02
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| 224 | } func;
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| 225 | unsigned long sarea_priv_offset;
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| 226 | int is_pci;
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| 227 | int cce_mode;
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| 228 | int cce_secure;
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| 229 | int ring_size;
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| 230 | int usec_timeout;
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| 231 |
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| 232 | unsigned int fb_bpp;
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| 233 | unsigned int front_offset, front_pitch;
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| 234 | unsigned int back_offset, back_pitch;
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| 235 | unsigned int depth_bpp;
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| 236 | unsigned int depth_offset, depth_pitch;
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| 237 | unsigned int span_offset;
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| 238 |
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| 239 | unsigned long fb_offset;
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| 240 | unsigned long mmio_offset;
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| 241 | unsigned long ring_offset;
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| 242 | unsigned long ring_rptr_offset;
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| 243 | unsigned long buffers_offset;
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| 244 | unsigned long agp_textures_offset;
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| 245 | } drm_r128_init_t;
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| 246 |
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| 247 | typedef struct drm_r128_cce_stop {
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| 248 | int flush;
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| 249 | int idle;
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| 250 | } drm_r128_cce_stop_t;
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| 251 |
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| 252 | typedef struct drm_r128_clear {
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| 253 | unsigned int flags;
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| 254 | unsigned int clear_color;
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| 255 | unsigned int clear_depth;
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| 256 | unsigned int color_mask;
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| 257 | unsigned int depth_mask;
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| 258 | } drm_r128_clear_t;
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| 259 |
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| 260 | typedef struct drm_r128_vertex {
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| 261 | int prim;
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| 262 | int idx; /* Index of vertex buffer */
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| 263 | int count; /* Number of vertices in buffer */
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| 264 | int discard; /* Client finished with buffer? */
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| 265 | } drm_r128_vertex_t;
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| 266 |
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| 267 | typedef struct drm_r128_indices {
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| 268 | int prim;
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| 269 | int idx;
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| 270 | int start;
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| 271 | int end;
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| 272 | int discard; /* Client finished with buffer? */
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| 273 | } drm_r128_indices_t;
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| 274 |
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| 275 | typedef struct drm_r128_blit {
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| 276 | int idx;
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| 277 | int pitch;
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| 278 | int offset;
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| 279 | int format;
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| 280 | unsigned short x, y;
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| 281 | unsigned short width, height;
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| 282 | } drm_r128_blit_t;
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| 283 |
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| 284 | typedef struct drm_r128_depth {
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| 285 | enum {
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| 286 | R128_WRITE_SPAN = 0x01,
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| 287 | R128_WRITE_PIXELS = 0x02,
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| 288 | R128_READ_SPAN = 0x03,
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| 289 | R128_READ_PIXELS = 0x04
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| 290 | } func;
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| 291 | int n;
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| 292 | int __user *x;
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| 293 | int __user *y;
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| 294 | unsigned int __user *buffer;
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| 295 | unsigned char __user *mask;
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| 296 | } drm_r128_depth_t;
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| 297 |
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| 298 | typedef struct drm_r128_stipple {
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| 299 | unsigned int __user *mask;
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| 300 | } drm_r128_stipple_t;
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| 301 |
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| 302 | typedef struct drm_r128_indirect {
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| 303 | int idx;
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| 304 | int start;
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| 305 | int end;
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| 306 | int discard;
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| 307 | } drm_r128_indirect_t;
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| 308 |
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| 309 | typedef struct drm_r128_fullscreen {
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| 310 | enum {
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| 311 | R128_INIT_FULLSCREEN = 0x01,
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| 312 | R128_CLEANUP_FULLSCREEN = 0x02
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| 313 | } func;
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| 314 | } drm_r128_fullscreen_t;
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| 315 |
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| 316 | /* 2.3: An ioctl to get parameters that aren't available to the 3d
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| 317 | * client any other way.
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| 318 | */
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| 319 | #define R128_PARAM_IRQ_NR 1
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| 320 |
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| 321 | typedef struct drm_r128_getparam {
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| 322 | int param;
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| 323 | void __user *value;
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| 324 | } drm_r128_getparam_t;
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| 325 |
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| 326 | #endif
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