VirtualBox

source: vbox/trunk/src/VBox/Additions/x11/x11include/xorg-server-1.10.0/compiler.h

Last change on this file was 36308, checked in by vboxsync, 14 years ago

fix OSE

  • Property svn:eol-style set to native
File size: 48.3 KB
Line 
1/*
2 * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that
7 * copyright notice and this permission notice appear in supporting
8 * documentation, and that the name of Thomas Roell not be used in
9 * advertising or publicity pertaining to distribution of the software without
10 * specific, written prior permission. Thomas Roell makes no representations
11 * about the suitability of this software for any purpose. It is provided
12 * "as is" without express or implied warranty.
13 *
14 * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20 * PERFORMANCE OF THIS SOFTWARE.
21 *
22 */
23/*
24 * Copyright (c) 1994-2003 by The XFree86 Project, Inc.
25 *
26 * Permission is hereby granted, free of charge, to any person obtaining a
27 * copy of this software and associated documentation files (the "Software"),
28 * to deal in the Software without restriction, including without limitation
29 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
30 * and/or sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following conditions:
32 *
33 * The above copyright notice and this permission notice shall be included in
34 * all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
37 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
38 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
39 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
40 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
41 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 *
44 * Except as contained in this notice, the name of the copyright holder(s)
45 * and author(s) shall not be used in advertising or otherwise to promote
46 * the sale, use or other dealings in this Software without prior written
47 * authorization from the copyright holder(s) and author(s).
48 */
49
50#ifndef _COMPILER_H
51
52# define _COMPILER_H
53
54#if defined(__SUNPRO_C)
55# define DO_PROTOTYPES
56#endif
57
58/* Map Sun compiler platform defines to gcc-style used in the code */
59#if defined(__amd64) && !defined(__amd64__)
60# define __amd64__
61#endif
62#if defined(__i386) && !defined(__i386__)
63# define __i386__
64#endif
65#if defined(__sparc) && !defined(__sparc__)
66# define __sparc__
67#endif
68#if defined(__sparcv9) && !defined(__sparc64__)
69# define __sparc64__
70#endif
71
72#ifndef _X_EXPORT
73# include <X11/Xfuncproto.h>
74#endif
75
76# include <pixman.h> /* for uint*_t types */
77
78/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
79# ifndef __inline__
80# if defined(__GNUC__)
81 /* gcc has __inline__ */
82# elif defined(__HIGHC__)
83# define __inline__ _Inline
84# else
85# define __inline__ /**/
86# endif
87# endif /* __inline__ */
88# ifndef __inline
89# if defined(__GNUC__)
90 /* gcc has __inline */
91# elif defined(__HIGHC__)
92# define __inline _Inline
93# else
94# define __inline /**/
95# endif
96# endif /* __inline */
97
98/* Support gcc's __FUNCTION__ for people using other compilers */
99#if !defined(__GNUC__) && !defined(__FUNCTION__)
100# define __FUNCTION__ __func__ /* C99 */
101#endif
102
103# if defined(NO_INLINE) || defined(DO_PROTOTYPES)
104
105# if !defined(__arm__)
106# if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \
107 && !(defined(__alpha__) && defined(linux)) \
108 && !(defined(__ia64__) && defined(linux)) \
109
110extern _X_EXPORT void outb(unsigned short, unsigned char);
111extern _X_EXPORT void outw(unsigned short, unsigned short);
112extern _X_EXPORT void outl(unsigned short, unsigned int);
113extern _X_EXPORT unsigned int inb(unsigned short);
114extern _X_EXPORT unsigned int inw(unsigned short);
115extern _X_EXPORT unsigned int inl(unsigned short);
116
117# else /* __sparc__, __arm32__, __alpha__, __nds32__ */
118
119extern _X_EXPORT void outb(unsigned long, unsigned char);
120extern _X_EXPORT void outw(unsigned long, unsigned short);
121extern _X_EXPORT void outl(unsigned long, unsigned int);
122extern _X_EXPORT unsigned int inb(unsigned long);
123extern _X_EXPORT unsigned int inw(unsigned long);
124extern _X_EXPORT unsigned int inl(unsigned long);
125
126# endif /* __sparc__, __arm32__, __alpha__, __nds32__ */
127# endif /* __arm__ */
128
129# if defined(__powerpc__) && !defined(__OpenBSD__)
130extern unsigned long ldq_u(unsigned long *);
131extern unsigned long ldl_u(unsigned int *);
132extern unsigned long ldw_u(unsigned short *);
133extern void stq_u(unsigned long, unsigned long *);
134extern void stl_u(unsigned long, unsigned int *);
135extern void stw_u(unsigned long, unsigned short *);
136extern void mem_barrier(void);
137extern void write_mem_barrier(void);
138extern void stl_brx(unsigned long, volatile unsigned char *, int);
139extern void stw_brx(unsigned short, volatile unsigned char *, int);
140extern unsigned long ldl_brx(volatile unsigned char *, int);
141extern unsigned short ldw_brx(volatile unsigned char *, int);
142# endif /* __powerpc__ && !__OpenBSD */
143
144# endif /* NO_INLINE || DO_PROTOTYPES */
145
146# ifndef NO_INLINE
147# ifdef __GNUC__
148# ifdef __i386__
149
150# ifdef __SSE__
151# define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
152# else
153# define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
154# endif
155
156# ifdef __SSE2__
157# define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
158# else
159# define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
160# endif
161
162# elif defined __alpha__
163
164# define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
165# define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
166
167# elif defined __amd64__
168
169# define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
170# define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
171
172# elif defined __ia64__
173
174# ifndef __INTEL_COMPILER
175# define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
176# define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
177# else
178# include "ia64intrin.h"
179# define mem_barrier() __mf()
180# define write_mem_barrier() __mf()
181# endif
182
183# elif defined __mips__
184 /* Note: sync instruction requires MIPS II instruction set */
185# define mem_barrier() \
186 __asm__ __volatile__( \
187 ".set push\n\t" \
188 ".set noreorder\n\t" \
189 ".set mips2\n\t" \
190 "sync\n\t" \
191 ".set pop" \
192 : /* no output */ \
193 : /* no input */ \
194 : "memory")
195# define write_mem_barrier() mem_barrier()
196
197# elif defined __powerpc__
198
199# if defined(linux) && defined(__powerpc64__)
200# include <linux/version.h>
201# if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
202# include <asm/memory.h>
203# endif
204# endif /* defined(linux) && defined(__powerpc64__) */
205
206# ifndef eieio /* We deal with arch-specific eieio() routines above... */
207# define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
208# endif /* eieio */
209# define mem_barrier() eieio()
210# define write_mem_barrier() eieio()
211
212# elif defined __sparc__
213
214# define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
215# define mem_barrier() /* XXX: nop for now */
216# define write_mem_barrier() /* XXX: nop for now */
217# endif
218# endif /* __GNUC__ */
219# endif /* NO_INLINE */
220
221# ifndef mem_barrier
222# define mem_barrier() /* NOP */
223# endif
224
225# ifndef write_mem_barrier
226# define write_mem_barrier() /* NOP */
227# endif
228
229
230# ifndef NO_INLINE
231# ifdef __GNUC__
232
233/* Define some packed structures to use with unaligned accesses */
234
235struct __una_u64 { uint64_t x __attribute__((packed)); };
236struct __una_u32 { uint32_t x __attribute__((packed)); };
237struct __una_u16 { uint16_t x __attribute__((packed)); };
238
239/* Elemental unaligned loads */
240
241static __inline__ uint64_t ldq_u(uint64_t *p)
242{
243 const struct __una_u64 *ptr = (const struct __una_u64 *) p;
244 return ptr->x;
245}
246
247static __inline__ uint32_t ldl_u(uint32_t *p)
248{
249 const struct __una_u32 *ptr = (const struct __una_u32 *) p;
250 return ptr->x;
251}
252
253static __inline__ uint16_t ldw_u(uint16_t *p)
254{
255 const struct __una_u16 *ptr = (const struct __una_u16 *) p;
256 return ptr->x;
257}
258
259/* Elemental unaligned stores */
260
261static __inline__ void stq_u(uint64_t val, uint64_t *p)
262{
263 struct __una_u64 *ptr = (struct __una_u64 *) p;
264 ptr->x = val;
265}
266
267static __inline__ void stl_u(uint32_t val, uint32_t *p)
268{
269 struct __una_u32 *ptr = (struct __una_u32 *) p;
270 ptr->x = val;
271}
272
273static __inline__ void stw_u(uint16_t val, uint16_t *p)
274{
275 struct __una_u16 *ptr = (struct __una_u16 *) p;
276 ptr->x = val;
277}
278# else /* !__GNUC__ */
279
280#include <string.h> /* needed for memmove */
281
282static __inline__ uint64_t ldq_u(uint64_t *p)
283{
284 uint64_t ret;
285 memmove(&ret, p, sizeof(*p));
286 return ret;
287}
288
289static __inline__ uint32_t ldl_u(uint32_t *p)
290{
291 uint32_t ret;
292 memmove(&ret, p, sizeof(*p));
293 return ret;
294}
295
296static __inline__ uint16_t ldw_u(uint16_t *p)
297{
298 uint16_t ret;
299 memmove(&ret, p, sizeof(*p));
300 return ret;
301}
302
303static __inline__ void stq_u(uint64_t val, uint64_t *p)
304{
305 uint64_t tmp = val;
306 memmove(p, &tmp, sizeof(*p));
307}
308
309static __inline__ void stl_u(uint32_t val, uint32_t *p)
310{
311 uint32_t tmp = val;
312 memmove(p, &tmp, sizeof(*p));
313}
314
315static __inline__ void stw_u(uint16_t val, uint16_t *p)
316{
317 uint16_t tmp = val;
318 memmove(p, &tmp, sizeof(*p));
319}
320
321# endif /* __GNUC__ */
322# endif /* NO_INLINE */
323
324# ifndef NO_INLINE
325# ifdef __GNUC__
326# if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
327
328# ifdef linux
329/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
330/* note that the appropriate setup via "ioperm" needs to be done */
331/* *before* any inx/outx is done. */
332
333extern _X_EXPORT void _outb(unsigned char val, unsigned long port);
334extern _X_EXPORT void _outw(unsigned short val, unsigned long port);
335extern _X_EXPORT void _outl(unsigned int val, unsigned long port);
336extern _X_EXPORT unsigned int _inb(unsigned long port);
337extern _X_EXPORT unsigned int _inw(unsigned long port);
338extern _X_EXPORT unsigned int _inl(unsigned long port);
339
340static __inline__ void
341outb(unsigned long port, unsigned char val)
342{
343 _outb(val, port);
344}
345
346static __inline__ void
347outw(unsigned long port, unsigned short val)
348{
349 _outw(val, port);
350}
351
352static __inline__ void
353outl(unsigned long port, unsigned int val)
354{
355 _outl(val, port);
356}
357
358static __inline__ unsigned int
359inb(unsigned long port)
360{
361 return _inb(port);
362}
363
364static __inline__ unsigned int
365inw(unsigned long port)
366{
367 return _inw(port);
368}
369
370static __inline__ unsigned int
371inl(unsigned long port)
372{
373 return _inl(port);
374}
375
376# endif /* linux */
377
378# if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
379 && !defined(DO_PROTOTYPES)
380
381/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
382/* inx/outx routines */
383/* note that the appropriate setup via "ioperm" needs to be done */
384/* *before* any inx/outx is done. */
385
386extern _X_EXPORT void outb(unsigned int port, unsigned char val);
387extern _X_EXPORT void outw(unsigned int port, unsigned short val);
388extern _X_EXPORT void outl(unsigned int port, unsigned int val);
389extern _X_EXPORT unsigned char inb(unsigned int port);
390extern _X_EXPORT unsigned short inw(unsigned int port);
391extern _X_EXPORT unsigned int inl(unsigned int port);
392
393# endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
394
395
396#if defined(__NetBSD__)
397#include <machine/pio.h>
398#endif /* __NetBSD__ */
399
400# elif defined(linux) && defined(__ia64__)
401
402# include <inttypes.h>
403
404# include <sys/io.h>
405
406# undef outb
407# undef outw
408# undef outl
409# undef inb
410# undef inw
411# undef inl
412extern _X_EXPORT void outb(unsigned long port, unsigned char val);
413extern _X_EXPORT void outw(unsigned long port, unsigned short val);
414extern _X_EXPORT void outl(unsigned long port, unsigned int val);
415extern _X_EXPORT unsigned int inb(unsigned long port);
416extern _X_EXPORT unsigned int inw(unsigned long port);
417extern _X_EXPORT unsigned int inl(unsigned long port);
418
419# elif (defined(linux) || defined(__FreeBSD__)) && defined(__amd64__)
420
421# include <inttypes.h>
422
423static __inline__ void
424outb(unsigned short port, unsigned char val)
425{
426 __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
427}
428
429
430static __inline__ void
431outw(unsigned short port, unsigned short val)
432{
433 __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
434}
435
436static __inline__ void
437outl(unsigned short port, unsigned int val)
438{
439 __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
440}
441
442static __inline__ unsigned int
443inb(unsigned short port)
444{
445 unsigned char ret;
446 __asm__ __volatile__("inb %1,%0" :
447 "=a" (ret) :
448 "d" (port));
449 return ret;
450}
451
452static __inline__ unsigned int
453inw(unsigned short port)
454{
455 unsigned short ret;
456 __asm__ __volatile__("inw %1,%0" :
457 "=a" (ret) :
458 "d" (port));
459 return ret;
460}
461
462static __inline__ unsigned int
463inl(unsigned short port)
464{
465 unsigned int ret;
466 __asm__ __volatile__("inl %1,%0" :
467 "=a" (ret) :
468 "d" (port));
469 return ret;
470}
471
472# elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)
473
474# ifndef ASI_PL
475# define ASI_PL 0x88
476# endif
477
478static __inline__ void
479outb(unsigned long port, unsigned char val)
480{
481 __asm__ __volatile__("stba %0, [%1] %2"
482 : /* No outputs */
483 : "r" (val), "r" (port), "i" (ASI_PL));
484 barrier();
485}
486
487static __inline__ void
488outw(unsigned long port, unsigned short val)
489{
490 __asm__ __volatile__("stha %0, [%1] %2"
491 : /* No outputs */
492 : "r" (val), "r" (port), "i" (ASI_PL));
493 barrier();
494}
495
496static __inline__ void
497outl(unsigned long port, unsigned int val)
498{
499 __asm__ __volatile__("sta %0, [%1] %2"
500 : /* No outputs */
501 : "r" (val), "r" (port), "i" (ASI_PL));
502 barrier();
503}
504
505static __inline__ unsigned int
506inb(unsigned long port)
507{
508 unsigned int ret;
509 __asm__ __volatile__("lduba [%1] %2, %0"
510 : "=r" (ret)
511 : "r" (port), "i" (ASI_PL));
512 return ret;
513}
514
515static __inline__ unsigned int
516inw(unsigned long port)
517{
518 unsigned int ret;
519 __asm__ __volatile__("lduha [%1] %2, %0"
520 : "=r" (ret)
521 : "r" (port), "i" (ASI_PL));
522 return ret;
523}
524
525static __inline__ unsigned int
526inl(unsigned long port)
527{
528 unsigned int ret;
529 __asm__ __volatile__("lda [%1] %2, %0"
530 : "=r" (ret)
531 : "r" (port), "i" (ASI_PL));
532 return ret;
533}
534
535static __inline__ unsigned char
536xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
537{
538 unsigned long addr = ((unsigned long)base) + offset;
539 unsigned char ret;
540
541 __asm__ __volatile__("lduba [%1] %2, %0"
542 : "=r" (ret)
543 : "r" (addr), "i" (ASI_PL));
544 return ret;
545}
546
547static __inline__ unsigned short
548xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
549{
550 unsigned long addr = ((unsigned long)base) + offset;
551 unsigned short ret;
552
553 __asm__ __volatile__("lduh [%1], %0"
554 : "=r" (ret)
555 : "r" (addr));
556 return ret;
557}
558
559static __inline__ unsigned short
560xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
561{
562 unsigned long addr = ((unsigned long)base) + offset;
563 unsigned short ret;
564
565 __asm__ __volatile__("lduha [%1] %2, %0"
566 : "=r" (ret)
567 : "r" (addr), "i" (ASI_PL));
568 return ret;
569}
570
571static __inline__ unsigned int
572xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
573{
574 unsigned long addr = ((unsigned long)base) + offset;
575 unsigned int ret;
576
577 __asm__ __volatile__("ld [%1], %0"
578 : "=r" (ret)
579 : "r" (addr));
580 return ret;
581}
582
583static __inline__ unsigned int
584xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
585{
586 unsigned long addr = ((unsigned long)base) + offset;
587 unsigned int ret;
588
589 __asm__ __volatile__("lda [%1] %2, %0"
590 : "=r" (ret)
591 : "r" (addr), "i" (ASI_PL));
592 return ret;
593}
594
595static __inline__ void
596xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
597 const unsigned int val)
598{
599 unsigned long addr = ((unsigned long)base) + offset;
600
601 __asm__ __volatile__("stba %0, [%1] %2"
602 : /* No outputs */
603 : "r" (val), "r" (addr), "i" (ASI_PL));
604 barrier();
605}
606
607static __inline__ void
608xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
609 const unsigned int val)
610{
611 unsigned long addr = ((unsigned long)base) + offset;
612
613 __asm__ __volatile__("sth %0, [%1]"
614 : /* No outputs */
615 : "r" (val), "r" (addr));
616 barrier();
617}
618
619static __inline__ void
620xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
621 const unsigned int val)
622{
623 unsigned long addr = ((unsigned long)base) + offset;
624
625 __asm__ __volatile__("stha %0, [%1] %2"
626 : /* No outputs */
627 : "r" (val), "r" (addr), "i" (ASI_PL));
628 barrier();
629}
630
631static __inline__ void
632xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
633 const unsigned int val)
634{
635 unsigned long addr = ((unsigned long)base) + offset;
636
637 __asm__ __volatile__("st %0, [%1]"
638 : /* No outputs */
639 : "r" (val), "r" (addr));
640 barrier();
641}
642
643static __inline__ void
644xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
645 const unsigned int val)
646{
647 unsigned long addr = ((unsigned long)base) + offset;
648
649 __asm__ __volatile__("sta %0, [%1] %2"
650 : /* No outputs */
651 : "r" (val), "r" (addr), "i" (ASI_PL));
652 barrier();
653}
654
655static __inline__ void
656xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
657 const unsigned int val)
658{
659 unsigned long addr = ((unsigned long)base) + offset;
660
661 __asm__ __volatile__("stba %0, [%1] %2"
662 : /* No outputs */
663 : "r" (val), "r" (addr), "i" (ASI_PL));
664}
665
666static __inline__ void
667xf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,
668 const unsigned int val)
669{
670 unsigned long addr = ((unsigned long)base) + offset;
671
672 __asm__ __volatile__("sth %0, [%1]"
673 : /* No outputs */
674 : "r" (val), "r" (addr));
675}
676
677static __inline__ void
678xf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,
679 const unsigned int val)
680{
681 unsigned long addr = ((unsigned long)base) + offset;
682
683 __asm__ __volatile__("stha %0, [%1] %2"
684 : /* No outputs */
685 : "r" (val), "r" (addr), "i" (ASI_PL));
686}
687
688static __inline__ void
689xf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,
690 const unsigned int val)
691{
692 unsigned long addr = ((unsigned long)base) + offset;
693
694 __asm__ __volatile__("st %0, [%1]"
695 : /* No outputs */
696 : "r" (val), "r" (addr));
697}
698
699static __inline__ void
700xf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,
701 const unsigned int val)
702{
703 unsigned long addr = ((unsigned long)base) + offset;
704
705 __asm__ __volatile__("sta %0, [%1] %2"
706 : /* No outputs */
707 : "r" (val), "r" (addr), "i" (ASI_PL));
708}
709
710# elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))
711# ifdef __arm32__
712# define PORT_SIZE long
713# else
714# define PORT_SIZE short
715# endif
716
717_X_EXPORT unsigned int IOPortBase; /* Memory mapped I/O port area */
718
719static __inline__ void
720outb(unsigned PORT_SIZE port, unsigned char val)
721{
722 *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
723}
724
725static __inline__ void
726outw(unsigned PORT_SIZE port, unsigned short val)
727{
728 *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
729}
730
731static __inline__ void
732outl(unsigned PORT_SIZE port, unsigned int val)
733{
734 *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
735}
736
737static __inline__ unsigned int
738inb(unsigned PORT_SIZE port)
739{
740 return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase);
741}
742
743static __inline__ unsigned int
744inw(unsigned PORT_SIZE port)
745{
746 return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase);
747}
748
749static __inline__ unsigned int
750inl(unsigned PORT_SIZE port)
751{
752 return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase);
753}
754
755
756# if defined(__mips__)
757# ifdef linux /* don't mess with other OSs */
758# if X_BYTE_ORDER == X_BIG_ENDIAN
759static __inline__ unsigned int
760xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
761{
762 unsigned long addr = ((unsigned long)base) + offset;
763 unsigned int ret;
764
765 __asm__ __volatile__("lw %0, 0(%1)"
766 : "=r" (ret)
767 : "r" (addr));
768 return ret;
769}
770
771static __inline__ void
772xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
773 const unsigned int val)
774{
775 unsigned long addr = ((unsigned long)base) + offset;
776
777 __asm__ __volatile__("sw %0, 0(%1)"
778 : /* No outputs */
779 : "r" (val), "r" (addr));
780}
781# endif
782# endif /* !linux */
783# endif /* __mips__ */
784
785# elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
786
787# ifndef MAP_FAILED
788# define MAP_FAILED ((void *)-1)
789# endif
790
791extern _X_EXPORT volatile unsigned char *ioBase;
792
793static __inline__ unsigned char
794xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
795{
796 register unsigned char val;
797 __asm__ __volatile__(
798 "lbzx %0,%1,%2\n\t"
799 "eieio"
800 : "=r" (val)
801 : "b" (base), "r" (offset),
802 "m" (*((volatile unsigned char *)base+offset)));
803 return val;
804}
805
806static __inline__ unsigned short
807xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
808{
809 register unsigned short val;
810 __asm__ __volatile__(
811 "lhzx %0,%1,%2\n\t"
812 "eieio"
813 : "=r" (val)
814 : "b" (base), "r" (offset),
815 "m" (*((volatile unsigned char *)base+offset)));
816 return val;
817}
818
819static __inline__ unsigned short
820xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
821{
822 register unsigned short val;
823 __asm__ __volatile__(
824 "lhbrx %0,%1,%2\n\t"
825 "eieio"
826 : "=r" (val)
827 : "b" (base), "r" (offset),
828 "m" (*((volatile unsigned char *)base+offset)));
829 return val;
830}
831
832static __inline__ unsigned int
833xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
834{
835 register unsigned int val;
836 __asm__ __volatile__(
837 "lwzx %0,%1,%2\n\t"
838 "eieio"
839 : "=r" (val)
840 : "b" (base), "r" (offset),
841 "m" (*((volatile unsigned char *)base+offset)));
842 return val;
843}
844
845static __inline__ unsigned int
846xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
847{
848 register unsigned int val;
849 __asm__ __volatile__(
850 "lwbrx %0,%1,%2\n\t"
851 "eieio"
852 : "=r" (val)
853 : "b" (base), "r" (offset),
854 "m" (*((volatile unsigned char *)base+offset)));
855 return val;
856}
857
858static __inline__ void
859xf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,
860 const unsigned char val)
861{
862 __asm__ __volatile__(
863 "stbx %1,%2,%3\n\t"
864 : "=m" (*((volatile unsigned char *)base+offset))
865 : "r" (val), "b" (base), "r" (offset));
866}
867
868static __inline__ void
869xf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,
870 const unsigned short val)
871{
872 __asm__ __volatile__(
873 "sthbrx %1,%2,%3\n\t"
874 : "=m" (*((volatile unsigned char *)base+offset))
875 : "r" (val), "b" (base), "r" (offset));
876}
877
878static __inline__ void
879xf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,
880 const unsigned short val)
881{
882 __asm__ __volatile__(
883 "sthx %1,%2,%3\n\t"
884 : "=m" (*((volatile unsigned char *)base+offset))
885 : "r" (val), "b" (base), "r" (offset));
886}
887
888static __inline__ void
889xf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,
890 const unsigned int val)
891{
892 __asm__ __volatile__(
893 "stwbrx %1,%2,%3\n\t"
894 : "=m" (*((volatile unsigned char *)base+offset))
895 : "r" (val), "b" (base), "r" (offset));
896}
897
898static __inline__ void
899xf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,
900 const unsigned int val)
901{
902 __asm__ __volatile__(
903 "stwx %1,%2,%3\n\t"
904 : "=m" (*((volatile unsigned char *)base+offset))
905 : "r" (val), "b" (base), "r" (offset));
906}
907
908static __inline__ void
909xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
910 const unsigned char val)
911{
912 xf86WriteMmioNB8(base, offset, val);
913 eieio();
914}
915
916static __inline__ void
917xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
918 const unsigned short val)
919{
920 xf86WriteMmioNB16Le(base, offset, val);
921 eieio();
922}
923
924static __inline__ void
925xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
926 const unsigned short val)
927{
928 xf86WriteMmioNB16Be(base, offset, val);
929 eieio();
930}
931
932static __inline__ void
933xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
934 const unsigned int val)
935{
936 xf86WriteMmioNB32Le(base, offset, val);
937 eieio();
938}
939
940static __inline__ void
941xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
942 const unsigned int val)
943{
944 xf86WriteMmioNB32Be(base, offset, val);
945 eieio();
946}
947
948
949static __inline__ void
950outb(unsigned short port, unsigned char value)
951{
952 if(ioBase == MAP_FAILED) return;
953 xf86WriteMmio8((void *)ioBase, port, value);
954}
955
956static __inline__ void
957outw(unsigned short port, unsigned short value)
958{
959 if(ioBase == MAP_FAILED) return;
960 xf86WriteMmio16Le((void *)ioBase, port, value);
961}
962
963static __inline__ void
964outl(unsigned short port, unsigned int value)
965{
966 if(ioBase == MAP_FAILED) return;
967 xf86WriteMmio32Le((void *)ioBase, port, value);
968}
969
970static __inline__ unsigned int
971inb(unsigned short port)
972{
973 if(ioBase == MAP_FAILED) return 0;
974 return xf86ReadMmio8((void *)ioBase, port);
975}
976
977static __inline__ unsigned int
978inw(unsigned short port)
979{
980 if(ioBase == MAP_FAILED) return 0;
981 return xf86ReadMmio16Le((void *)ioBase, port);
982}
983
984static __inline__ unsigned int
985inl(unsigned short port)
986{
987 if(ioBase == MAP_FAILED) return 0;
988 return xf86ReadMmio32Le((void *)ioBase, port);
989}
990
991#elif defined(__arm__) && defined(__linux__)
992
993/* for Linux on ARM, we use the LIBC inx/outx routines */
994/* note that the appropriate setup via "ioperm" needs to be done */
995/* *before* any inx/outx is done. */
996
997#include <sys/io.h>
998
999static __inline__ void
1000xf_outb(unsigned short port, unsigned char val)
1001{
1002 outb(val, port);
1003}
1004
1005static __inline__ void
1006xf_outw(unsigned short port, unsigned short val)
1007{
1008 outw(val, port);
1009}
1010
1011static __inline__ void
1012xf_outl(unsigned short port, unsigned int val)
1013{
1014 outl(val, port);
1015}
1016
1017#define outb xf_outb
1018#define outw xf_outw
1019#define outl xf_outl
1020
1021# elif defined(__nds32__)
1022
1023/*
1024 * Assume all port access are aligned. We need to revise this implementation
1025 * if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
1026 * stw_u, they are assumed unaligned.
1027 */
1028
1029#define barrier() /* no barrier */
1030
1031#define PORT_SIZE long
1032
1033static __inline__ unsigned char
1034xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
1035{
1036 return *(volatile unsigned char *)((unsigned char *)base + offset) ;
1037}
1038
1039static __inline__ void
1040xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
1041 const unsigned int val)
1042{
1043 *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
1044 barrier();
1045}
1046
1047static __inline__ void
1048xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
1049 const unsigned int val)
1050{
1051 *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
1052}
1053
1054static __inline__ unsigned short
1055xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
1056{
1057 unsigned long addr = ((unsigned long)base) + offset;
1058 unsigned short ret;
1059
1060 __asm__ __volatile__(
1061 "lhi %0, [%1];\n\t"
1062 "wsbh %0, %0;\n\t"
1063 : "=r" (ret)
1064 : "r" (addr));
1065 return ret;
1066}
1067
1068static __inline__ unsigned short
1069xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
1070{
1071 return *(volatile unsigned short *)((char *)base + offset) ;
1072}
1073
1074static __inline__ void
1075xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
1076 const unsigned int val)
1077{
1078 unsigned long addr = ((unsigned long)base) + offset;
1079
1080 __asm__ __volatile__(
1081 "wsbh %0, %0;\n\t"
1082 "shi %0, [%1];\n\t"
1083 : /* No outputs */
1084 : "r" (val), "r" (addr));
1085 barrier();
1086}
1087
1088static __inline__ void
1089xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
1090 const unsigned int val)
1091{
1092 *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
1093 barrier();
1094}
1095
1096static __inline__ void
1097xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,
1098 const unsigned int val)
1099{
1100 unsigned long addr = ((unsigned long)base) + offset;
1101
1102 __asm__ __volatile__(
1103 "wsbh %0, %0;\n\t"
1104 "shi %0, [%1];\n\t"
1105 : /* No outputs */
1106 : "r" (val), "r" (addr));
1107}
1108
1109static __inline__ void
1110xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,
1111 const unsigned int val)
1112{
1113 *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
1114}
1115
1116static __inline__ unsigned int
1117xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
1118{
1119 unsigned long addr = ((unsigned long)base) + offset;
1120 unsigned int ret;
1121
1122 __asm__ __volatile__(
1123 "lwi %0, [%1];\n\t"
1124 "wsbh %0, %0;\n\t"
1125 "rotri %0, %0, 16;\n\t"
1126 : "=r" (ret)
1127 : "r" (addr));
1128 return ret;
1129}
1130
1131static __inline__ unsigned int
1132xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
1133{
1134 return *(volatile unsigned int *)((unsigned char *)base + offset) ;
1135}
1136
1137static __inline__ void
1138xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
1139 const unsigned int val)
1140{
1141 unsigned long addr = ((unsigned long)base) + offset;
1142
1143 __asm__ __volatile__(
1144 "wsbh %0, %0;\n\t"
1145 "rotri %0, %0, 16;\n\t"
1146 "swi %0, [%1];\n\t"
1147 : /* No outputs */
1148 : "r" (val), "r" (addr));
1149 barrier();
1150}
1151
1152static __inline__ void
1153xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
1154 const unsigned int val)
1155{
1156 *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
1157 barrier();
1158}
1159
1160static __inline__ void
1161xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,
1162 const unsigned int val)
1163{
1164 unsigned long addr = ((unsigned long)base) + offset;
1165
1166 __asm__ __volatile__(
1167 "wsbh %0, %0;\n\t"
1168 "rotri %0, %0, 16;\n\t"
1169 "swi %0, [%1];\n\t"
1170 : /* No outputs */
1171 : "r" (val), "r" (addr));
1172}
1173
1174static __inline__ void
1175xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,
1176 const unsigned int val)
1177{
1178 *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
1179}
1180
1181# if defined(NDS32_MMIO_SWAP)
1182static __inline__ void
1183outb(unsigned PORT_SIZE port, unsigned char val)
1184{
1185 xf86WriteMmio8(IOPortBase, port, val);
1186}
1187
1188static __inline__ void
1189outw(unsigned PORT_SIZE port, unsigned short val)
1190{
1191 xf86WriteMmio16Swap(IOPortBase, port, val);
1192}
1193
1194static __inline__ void
1195outl(unsigned PORT_SIZE port, unsigned int val)
1196{
1197 xf86WriteMmio32Swap(IOPortBase, port, val);
1198}
1199
1200static __inline__ unsigned int
1201inb(unsigned PORT_SIZE port)
1202{
1203 return xf86ReadMmio8(IOPortBase, port);
1204}
1205
1206static __inline__ unsigned int
1207inw(unsigned PORT_SIZE port)
1208{
1209 return xf86ReadMmio16Swap(IOPortBase, port);
1210}
1211
1212static __inline__ unsigned int
1213inl(unsigned PORT_SIZE port)
1214{
1215 return xf86ReadMmio32Swap(IOPortBase, port);
1216}
1217
1218static __inline__ unsigned long ldq_u(unsigned long *p)
1219{
1220 unsigned long addr = (unsigned long)p;
1221 unsigned int ret;
1222
1223 __asm__ __volatile__(
1224 "lmw.bi %0, [%1], %0, 0;\n\t"
1225 "wsbh %0, %0;\n\t"
1226 "rotri %0, %0, 16;\n\t"
1227 : "=r" (ret)
1228 : "r" (addr));
1229 return ret;
1230}
1231
1232static __inline__ unsigned long ldl_u(unsigned int *p)
1233{
1234 unsigned long addr = (unsigned long)p;
1235 unsigned int ret;
1236
1237 __asm__ __volatile__(
1238 "lmw.bi %0, [%1], %0, 0;\n\t"
1239 "wsbh %0, %0;\n\t"
1240 "rotri %0, %0, 16;\n\t"
1241 : "=r" (ret)
1242 : "r" (addr));
1243 return ret;
1244}
1245
1246static __inline__ void stq_u(unsigned long val, unsigned long *p)
1247{
1248 unsigned long addr = (unsigned long)p;
1249
1250 __asm__ __volatile__(
1251 "wsbh %0, %0;\n\t"
1252 "rotri %0, %0, 16;\n\t"
1253 "smw.bi %0, [%1], %0, 0;\n\t"
1254 : /* No outputs */
1255 : "r" (val), "r" (addr));
1256}
1257
1258static __inline__ void stl_u(unsigned long val, unsigned int *p)
1259{
1260 unsigned long addr = (unsigned long)p;
1261
1262 __asm__ __volatile__(
1263 "wsbh %0, %0;\n\t"
1264 "rotri %0, %0, 16;\n\t"
1265 "smw.bi %0, [%1], %0, 0;\n\t"
1266 : /* No outputs */
1267 : "r" (val), "r" (addr));
1268}
1269
1270# else /* !NDS32_MMIO_SWAP */
1271static __inline__ void
1272outb(unsigned PORT_SIZE port, unsigned char val)
1273{
1274 *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val;
1275 barrier();
1276}
1277
1278static __inline__ void
1279outw(unsigned PORT_SIZE port, unsigned short val)
1280{
1281 *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val;
1282 barrier();
1283}
1284
1285static __inline__ void
1286outl(unsigned PORT_SIZE port, unsigned int val)
1287{
1288 *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val;
1289 barrier();
1290}
1291static __inline__ unsigned int
1292inb(unsigned PORT_SIZE port)
1293{
1294 return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port)));
1295}
1296
1297static __inline__ unsigned int
1298inw(unsigned PORT_SIZE port)
1299{
1300 return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port)));
1301}
1302
1303static __inline__ unsigned int
1304inl(unsigned PORT_SIZE port)
1305{
1306 return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port)));
1307}
1308
1309static __inline__ unsigned long ldq_u(unsigned long *p)
1310{
1311 unsigned long addr = (unsigned long)p;
1312 unsigned int ret;
1313
1314 __asm__ __volatile__(
1315 "lmw.bi %0, [%1], %0, 0;\n\t"
1316 : "=r" (ret)
1317 : "r" (addr));
1318 return ret;
1319}
1320
1321static __inline__ unsigned long ldl_u(unsigned int *p)
1322{
1323 unsigned long addr = (unsigned long)p;
1324 unsigned int ret;
1325
1326 __asm__ __volatile__(
1327 "lmw.bi %0, [%1], %0, 0;\n\t"
1328 : "=r" (ret)
1329 : "r" (addr));
1330 return ret;
1331}
1332
1333
1334static __inline__ void stq_u(unsigned long val, unsigned long *p)
1335{
1336 unsigned long addr = (unsigned long)p;
1337
1338 __asm__ __volatile__(
1339 "smw.bi %0, [%1], %0, 0;\n\t"
1340 : /* No outputs */
1341 : "r" (val), "r" (addr));
1342}
1343
1344static __inline__ void stl_u(unsigned long val, unsigned int *p)
1345{
1346 unsigned long addr = (unsigned long)p;
1347
1348 __asm__ __volatile__(
1349 "smw.bi %0, [%1], %0, 0;\n\t"
1350 : /* No outputs */
1351 : "r" (val), "r" (addr));
1352}
1353# endif /* NDS32_MMIO_SWAP */
1354
1355# if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
1356# define ldw_u(p) ((*(unsigned char *)(p)) << 8 | \
1357 (*((unsigned char *)(p)+1)))
1358# define stw_u(v,p) (*(unsigned char *)(p)) = ((v) >> 8); \
1359 (*((unsigned char *)(p)+1)) = (v)
1360# else
1361# define ldw_u(p) ((*(unsigned char *)(p)) | \
1362 (*((unsigned char *)(p)+1)<<8))
1363# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
1364 (*((unsigned char *)(p)+1)) = ((v) >> 8)
1365# endif
1366
1367# define mem_barrier() /* XXX: nop for now */
1368# define write_mem_barrier() /* XXX: nop for now */
1369
1370# else /* ix86 */
1371
1372# if !defined(__SUNPRO_C)
1373# if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
1374# ifdef GCCUSESGAS
1375
1376/*
1377 * If gcc uses gas rather than the native assembler, the syntax of these
1378 * inlines has to be different. DHD
1379 */
1380
1381static __inline__ void
1382outb(unsigned short port, unsigned char val)
1383{
1384 __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
1385}
1386
1387
1388static __inline__ void
1389outw(unsigned short port, unsigned short val)
1390{
1391 __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
1392}
1393
1394static __inline__ void
1395outl(unsigned short port, unsigned int val)
1396{
1397 __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
1398}
1399
1400static __inline__ unsigned int
1401inb(unsigned short port)
1402{
1403 unsigned char ret;
1404 __asm__ __volatile__("inb %1,%0" :
1405 "=a" (ret) :
1406 "d" (port));
1407 return ret;
1408}
1409
1410static __inline__ unsigned int
1411inw(unsigned short port)
1412{
1413 unsigned short ret;
1414 __asm__ __volatile__("inw %1,%0" :
1415 "=a" (ret) :
1416 "d" (port));
1417 return ret;
1418}
1419
1420static __inline__ unsigned int
1421inl(unsigned short port)
1422{
1423 unsigned int ret;
1424 __asm__ __volatile__("inl %1,%0" :
1425 "=a" (ret) :
1426 "d" (port));
1427 return ret;
1428}
1429
1430# else /* GCCUSESGAS */
1431
1432static __inline__ void
1433outb(unsigned short port, unsigned char val)
1434{
1435 __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
1436}
1437
1438static __inline__ void
1439outw(unsigned short port, unsigned short val)
1440{
1441 __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
1442}
1443
1444static __inline__ void
1445outl(unsigned short port, unsigned int val)
1446{
1447 __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
1448}
1449
1450static __inline__ unsigned int
1451inb(unsigned short port)
1452{
1453 unsigned char ret;
1454 __asm__ __volatile__("in%B0 (%1)" :
1455 "=a" (ret) :
1456 "d" (port));
1457 return ret;
1458}
1459
1460static __inline__ unsigned int
1461inw(unsigned short port)
1462{
1463 unsigned short ret;
1464 __asm__ __volatile__("in%W0 (%1)" :
1465 "=a" (ret) :
1466 "d" (port));
1467 return ret;
1468}
1469
1470static __inline__ unsigned int
1471inl(unsigned short port)
1472{
1473 unsigned int ret;
1474 __asm__ __volatile__("in%L0 (%1)" :
1475 "=a" (ret) :
1476 "d" (port));
1477 return ret;
1478}
1479
1480# endif /* GCCUSESGAS */
1481
1482# else /* !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */
1483
1484static __inline__ void
1485outb(unsigned short port, unsigned char val)
1486{
1487}
1488
1489static __inline__ void
1490outw(unsigned short port, unsigned short val)
1491{
1492}
1493
1494static __inline__ void
1495outl(unsigned short port, unsigned int val)
1496{
1497}
1498
1499static __inline__ unsigned int
1500inb(unsigned short port)
1501{
1502 return 0;
1503}
1504
1505static __inline__ unsigned int
1506inw(unsigned short port)
1507{
1508 return 0;
1509}
1510
1511static __inline__ unsigned int
1512inl(unsigned short port)
1513{
1514 return 0;
1515}
1516
1517# endif /* FAKEIT */
1518# endif /* __SUNPRO_C */
1519
1520# endif /* ix86 */
1521
1522# else /* !GNUC */
1523# if defined(__STDC__) && (__STDC__ == 1)
1524# ifndef asm
1525# define asm __asm
1526# endif
1527# endif
1528# if !defined(__SUNPRO_C)
1529# include <sys/inline.h>
1530# endif
1531# if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \
1532 defined(__USLC__)
1533# pragma asm partial_optimization outl
1534# pragma asm partial_optimization outw
1535# pragma asm partial_optimization outb
1536# pragma asm partial_optimization inl
1537# pragma asm partial_optimization inw
1538# pragma asm partial_optimization inb
1539# endif
1540# endif /* __GNUC__ */
1541
1542# endif /* NO_INLINE */
1543
1544# ifdef __alpha__
1545/* entry points for Mmio memory access routines */
1546extern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);
1547extern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);
1548# ifndef STANDALONE_MMIO
1549extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
1550# else
1551/* Some DRI 3D drivers need MMIO_IN32. */
1552static __inline__ int
1553xf86ReadMmio32(void *Base, unsigned long Offset)
1554{
1555 mem_barrier();
1556 return *(volatile unsigned int*)((unsigned long)Base+(Offset));
1557}
1558# endif
1559extern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);
1560extern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);
1561extern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);
1562extern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);
1563extern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);
1564extern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);
1565extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);
1566extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
1567
1568/* Some macros to hide the system dependencies for MMIO accesses */
1569/* Changed to kill noise generated by gcc's -Wcast-align */
1570# define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)
1571# define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)
1572# ifndef STANDALONE_MMIO
1573# define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)
1574# else
1575# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
1576# endif
1577
1578# define MMIO_OUT32(base, offset, val) \
1579 do { \
1580 write_mem_barrier(); \
1581 *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val); \
1582 } while (0)
1583# define MMIO_ONB32(base, offset, val) \
1584 *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
1585
1586# define MMIO_OUT8(base, offset, val) \
1587 (*xf86WriteMmio8)((CARD8)(val), base, offset)
1588# define MMIO_OUT16(base, offset, val) \
1589 (*xf86WriteMmio16)((CARD16)(val), base, offset)
1590# define MMIO_ONB8(base, offset, val) \
1591 (*xf86WriteMmioNB8)((CARD8)(val), base, offset)
1592# define MMIO_ONB16(base, offset, val) \
1593 (*xf86WriteMmioNB16)((CARD16)(val), base, offset)
1594# define MMIO_MOVE32(base, offset, val) \
1595 MMIO_OUT32(base, offset, val)
1596
1597# elif defined(__powerpc__)
1598 /*
1599 * we provide byteswapping and no byteswapping functions here
1600 * with byteswapping as default,
1601 * drivers that don't need byteswapping should define PPC_MMIO_IS_BE
1602 */
1603# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1604# define MMIO_OUT8(base, offset, val) \
1605 xf86WriteMmio8(base, offset, (CARD8)(val))
1606# define MMIO_ONB8(base, offset, val) \
1607 xf86WriteMmioNB8(base, offset, (CARD8)(val))
1608
1609# if defined(PPC_MMIO_IS_BE) /* No byteswapping */
1610# define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
1611# define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
1612# define MMIO_OUT16(base, offset, val) \
1613 xf86WriteMmio16Be(base, offset, (CARD16)(val))
1614# define MMIO_OUT32(base, offset, val) \
1615 xf86WriteMmio32Be(base, offset, (CARD32)(val))
1616# define MMIO_ONB16(base, offset, val) \
1617 xf86WriteMmioNB16Be(base, offset, (CARD16)(val))
1618# define MMIO_ONB32(base, offset, val) \
1619 xf86WriteMmioNB32Be(base, offset, (CARD32)(val))
1620# else /* byteswapping is the default */
1621# define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
1622# define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
1623# define MMIO_OUT16(base, offset, val) \
1624 xf86WriteMmio16Le(base, offset, (CARD16)(val))
1625# define MMIO_OUT32(base, offset, val) \
1626 xf86WriteMmio32Le(base, offset, (CARD32)(val))
1627# define MMIO_ONB16(base, offset, val) \
1628 xf86WriteMmioNB16Le(base, offset, (CARD16)(val))
1629# define MMIO_ONB32(base, offset, val) \
1630 xf86WriteMmioNB32Le(base, offset, (CARD32)(val))
1631# endif
1632
1633# define MMIO_MOVE32(base, offset, val) \
1634 xf86WriteMmio32Be(base, offset, (CARD32)(val))
1635
1636# elif defined(__sparc__) || defined(sparc) || defined(__sparc)
1637 /*
1638 * Like powerpc, we provide byteswapping and no byteswapping functions
1639 * here with byteswapping as default, drivers that don't need byteswapping
1640 * should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
1641 * do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
1642 * of drivers?).
1643 */
1644# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1645# define MMIO_OUT8(base, offset, val) \
1646 xf86WriteMmio8(base, offset, (CARD8)(val))
1647# define MMIO_ONB8(base, offset, val) \
1648 xf86WriteMmio8NB(base, offset, (CARD8)(val))
1649
1650# if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
1651# define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
1652# define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
1653# define MMIO_OUT16(base, offset, val) \
1654 xf86WriteMmio16Be(base, offset, (CARD16)(val))
1655# define MMIO_OUT32(base, offset, val) \
1656 xf86WriteMmio32Be(base, offset, (CARD32)(val))
1657# define MMIO_ONB16(base, offset, val) \
1658 xf86WriteMmio16BeNB(base, offset, (CARD16)(val))
1659# define MMIO_ONB32(base, offset, val) \
1660 xf86WriteMmio32BeNB(base, offset, (CARD32)(val))
1661# else /* byteswapping is the default */
1662# define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
1663# define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
1664# define MMIO_OUT16(base, offset, val) \
1665 xf86WriteMmio16Le(base, offset, (CARD16)(val))
1666# define MMIO_OUT32(base, offset, val) \
1667 xf86WriteMmio32Le(base, offset, (CARD32)(val))
1668# define MMIO_ONB16(base, offset, val) \
1669 xf86WriteMmio16LeNB(base, offset, (CARD16)(val))
1670# define MMIO_ONB32(base, offset, val) \
1671 xf86WriteMmio32LeNB(base, offset, (CARD32)(val))
1672# endif
1673
1674# define MMIO_MOVE32(base, offset, val) \
1675 xf86WriteMmio32Be(base, offset, (CARD32)(val))
1676
1677# elif defined(__nds32__)
1678 /*
1679 * we provide byteswapping and no byteswapping functions here
1680 * with no byteswapping as default; when endianness of CPU core
1681 * and I/O devices don't match, byte swapping is necessary
1682 * drivers that need byteswapping should define NDS32_MMIO_SWAP
1683 */
1684# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1685# define MMIO_OUT8(base, offset, val) \
1686 xf86WriteMmio8(base, offset, (CARD8)(val))
1687# define MMIO_ONB8(base, offset, val) \
1688 xf86WriteMmioNB8(base, offset, (CARD8)(val))
1689
1690# if defined(NDS32_MMIO_SWAP) /* byteswapping */
1691# define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
1692# define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
1693# define MMIO_OUT16(base, offset, val) \
1694 xf86WriteMmio16Swap(base, offset, (CARD16)(val))
1695# define MMIO_OUT32(base, offset, val) \
1696 xf86WriteMmio32Swap(base, offset, (CARD32)(val))
1697# define MMIO_ONB16(base, offset, val) \
1698 xf86WriteMmioNB16Swap(base, offset, (CARD16)(val))
1699# define MMIO_ONB32(base, offset, val) \
1700 xf86WriteMmioNB32Swap(base, offset, (CARD32)(val))
1701# else /* no byteswapping is the default */
1702# define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
1703# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
1704# define MMIO_OUT16(base, offset, val) \
1705 xf86WriteMmio16(base, offset, (CARD16)(val))
1706# define MMIO_OUT32(base, offset, val) \
1707 xf86WriteMmio32(base, offset, (CARD32)(val))
1708# define MMIO_ONB16(base, offset, val) \
1709 xf86WriteMmioNB16(base, offset, (CARD16)(val))
1710# define MMIO_ONB32(base, offset, val) \
1711 xf86WriteMmioNB32(base, offset, (CARD32)(val))
1712# endif
1713
1714# define MMIO_MOVE32(base, offset, val) \
1715 xf86WriteMmio32(base, offset, (CARD32)(val))
1716
1717#ifdef N1213_HC /* for NDS32 N1213 hardcore */
1718static __inline__ void nds32_flush_icache(char *addr)
1719{
1720 __asm__ volatile (
1721 "isync %0;"
1722 "msync;"
1723 "isb;"
1724 "cctl %0,L1I_VA_INVAL;"
1725 "isb;"
1726 : : "r"(addr) : "memory");
1727}
1728#else
1729static __inline__ void nds32_flush_icache(char *addr)
1730{
1731 __asm__ volatile (
1732 "isync %0;"
1733 "isb;"
1734 : : "r"(addr) : "memory");
1735}
1736#endif
1737
1738# else /* !__alpha__ && !__powerpc__ && !__sparc__ */
1739
1740# define MMIO_IN8(base, offset) \
1741 *(volatile CARD8 *)(((CARD8*)(base)) + (offset))
1742# define MMIO_IN16(base, offset) \
1743 *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))
1744# define MMIO_IN32(base, offset) \
1745 *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))
1746# define MMIO_OUT8(base, offset, val) \
1747 *(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)
1748# define MMIO_OUT16(base, offset, val) \
1749 *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
1750# define MMIO_OUT32(base, offset, val) \
1751 *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
1752# define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val)
1753# define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val)
1754# define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val)
1755
1756# define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)
1757
1758# endif /* __alpha__ */
1759
1760/*
1761 * With Intel, the version in os-support/misc/SlowBcopy.s is used.
1762 * This avoids port I/O during the copy (which causes problems with
1763 * some hardware).
1764 */
1765# ifdef __alpha__
1766# define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
1767# define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
1768# else /* __alpha__ */
1769# define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
1770# define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
1771# endif /* __alpha__ */
1772
1773#endif /* _COMPILER_H */
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