compiler.h@ 52145

Last change on this file since 52145 was 52145, checked in by vboxsync, 10 years ago
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1	/*
2	* Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
3	*
4	* Permission to use, copy, modify, distribute, and sell this software and its
5	* documentation for any purpose is hereby granted without fee, provided that
6	* the above copyright notice appear in all copies and that both that
7	* copyright notice and this permission notice appear in supporting
8	* documentation, and that the name of Thomas Roell not be used in
9	* advertising or publicity pertaining to distribution of the software without
10	* specific, written prior permission. Thomas Roell makes no representations
11	* about the suitability of this software for any purpose. It is provided
12	* "as is" without express or implied warranty.
13	*
14	* THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15	* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16	* EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17	* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18	* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19	* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20	* PERFORMANCE OF THIS SOFTWARE.
21	*
22	*/
23	/*
24	* Copyright (c) 1994-2003 by The XFree86 Project, Inc.
25	*
26	* Permission is hereby granted, free of charge, to any person obtaining a
27	* copy of this software and associated documentation files (the "Software"),
28	* to deal in the Software without restriction, including without limitation
29	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
30	* and/or sell copies of the Software, and to permit persons to whom the
31	* Software is furnished to do so, subject to the following conditions:
32	*
33	* The above copyright notice and this permission notice shall be included in
34	* all copies or substantial portions of the Software.
35	*
36	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
37	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
38	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
39	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
40	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
41	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42	* OTHER DEALINGS IN THE SOFTWARE.
43	*
44	* Except as contained in this notice, the name of the copyright holder(s)
45	* and author(s) shall not be used in advertising or otherwise to promote
46	* the sale, use or other dealings in this Software without prior written
47	* authorization from the copyright holder(s) and author(s).
48	*/
49
50	#ifndef _COMPILER_H
51
52	#define _COMPILER_H
53
54	#if defined(__SUNPRO_C)
55	#define DO_PROTOTYPES
56	#endif
57
58	/* Map Sun compiler platform defines to gcc-style used in the code */
59	#if defined(__amd64) && !defined(__amd64__)
60	#define __amd64__
61	#endif
62	#if defined(__i386) && !defined(__i386__)
63	#define __i386__
64	#endif
65	#if defined(__sparc) && !defined(__sparc__)
66	#define __sparc__
67	#endif
68	#if defined(__sparcv9) && !defined(__sparc64__)
69	#define __sparc64__
70	#endif
71
72	#ifndef _X_EXPORT
73	#include <X11/Xfuncproto.h>
74	#endif
75
76	#include <pixman.h> /* for uint_t types /
77
78	/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
79	#ifndef __inline__
80	#if defined(__GNUC__)
81	/* gcc has __inline__ */
82	#elif defined(__HIGHC__)
83	#define __inline__ _Inline
84	#else
85	#define __inline__ /**/
86	#endif
87	#endif /* __inline__ */
88	#ifndef __inline
89	#if defined(__GNUC__)
90	/* gcc has __inline */
91	#elif defined(__HIGHC__)
92	#define __inline _Inline
93	#else
94	#define __inline /**/
95	#endif
96	#endif /* __inline */
97	/* Support gcc's __FUNCTION__ for people using other compilers */
98	#if !defined(__GNUC__) && !defined(__FUNCTION__)
99	#define __FUNCTION__ __func__ /* C99 */
100	#endif
101	#if defined(NO_INLINE) \|\| defined(DO_PROTOTYPES)
102	#if !defined(__arm__)
103	#if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \
104	&& !(defined(__alpha__) && defined(linux)) \
105	&& !(defined(__ia64__) && defined(linux)) \
106	&& !(defined(__mips64) && defined(linux)) \
107
108	extern _X_EXPORT void outb(unsigned short, unsigned char);
109	extern _X_EXPORT void outw(unsigned short, unsigned short);
110	extern _X_EXPORT void outl(unsigned short, unsigned int);
111	extern _X_EXPORT unsigned int inb(unsigned short);
112	extern _X_EXPORT unsigned int inw(unsigned short);
113	extern _X_EXPORT unsigned int inl(unsigned short);
114
115	#else /* __sparc__, __arm32__, __alpha__, __nds32__ */
116	extern _X_EXPORT void outb(unsigned long, unsigned char);
117	extern _X_EXPORT void outw(unsigned long, unsigned short);
118	extern _X_EXPORT void outl(unsigned long, unsigned int);
119	extern _X_EXPORT unsigned int inb(unsigned long);
120	extern _X_EXPORT unsigned int inw(unsigned long);
121	extern _X_EXPORT unsigned int inl(unsigned long);
122
123	#ifdef __SUNPRO_C
124	extern _X_EXPORT unsigned char xf86ReadMmio8 (void *, unsigned long);
125	extern _X_EXPORT unsigned short xf86ReadMmio16Be (void *, unsigned long);
126	extern _X_EXPORT unsigned short xf86ReadMmio16Le (void *, unsigned long);
127	extern _X_EXPORT unsigned int xf86ReadMmio32Be (void *, unsigned long);
128	extern _X_EXPORT unsigned int xf86ReadMmio32Le (void *, unsigned long);
129	extern _X_EXPORT void xf86WriteMmio8 (void *, unsigned long, unsigned int);
130	extern _X_EXPORT void xf86WriteMmio16Be (void *, unsigned long, unsigned int);
131	extern _X_EXPORT void xf86WriteMmio16Le (void *, unsigned long, unsigned int);
132	extern _X_EXPORT void xf86WriteMmio32Be (void *, unsigned long, unsigned int);
133	extern _X_EXPORT void xf86WriteMmio32Le (void *, unsigned long, unsigned int);
134	extern _X_EXPORT void xf86WriteMmio8NB (void *, unsigned long, unsigned int);
135	extern _X_EXPORT void xf86WriteMmio16BeNB (void *, unsigned long, unsigned int);
136	extern _X_EXPORT void xf86WriteMmio16LeNB (void *, unsigned long, unsigned int);
137	extern _X_EXPORT void xf86WriteMmio32BeNB (void *, unsigned long, unsigned int);
138	extern _X_EXPORT void xf86WriteMmio32LeNB (void *, unsigned long, unsigned int);
139	#endif /* _SUNPRO_C */
140	#endif /* __sparc__, __arm32__, __alpha__, __nds32__ */
141	#endif /* __arm__ */
142
143	#if defined(__powerpc__) && !defined(__OpenBSD__)
144	extern unsigned long ldq_u(unsigned long *);
145	extern unsigned long ldl_u(unsigned int *);
146	extern unsigned long ldw_u(unsigned short *);
147	extern void stq_u(unsigned long, unsigned long *);
148	extern void stl_u(unsigned long, unsigned int *);
149	extern void stw_u(unsigned long, unsigned short *);
150	extern void mem_barrier(void);
151	extern void write_mem_barrier(void);
152	extern void stl_brx(unsigned long, volatile unsigned char *, int);
153	extern void stw_brx(unsigned short, volatile unsigned char *, int);
154	extern unsigned long ldl_brx(volatile unsigned char *, int);
155	extern unsigned short ldw_brx(volatile unsigned char *, int);
156	#endif /* __powerpc__ && !__OpenBSD */
157
158	#endif /* NO_INLINE \|\| DO_PROTOTYPES */
159
160	#ifndef NO_INLINE
161	#ifdef __GNUC__
162	#ifdef __i386__
163
164	#ifdef __SSE__
165	#define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
166	#else
167	#define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
168	#endif
169
170	#ifdef __SSE2__
171	#define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
172	#else
173	#define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
174	#endif
175
176	#elif defined __alpha__
177
178	#define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
179	#define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
180
181	#elif defined __amd64__
182
183	#define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
184	#define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
185
186	#elif defined __ia64__
187
188	#ifndef __INTEL_COMPILER
189	#define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
190	#define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
191	#else
192	#include "ia64intrin.h"
193	#define mem_barrier() __mf()
194	#define write_mem_barrier() __mf()
195	#endif
196
197	#elif defined __mips__
198	/* Note: sync instruction requires MIPS II instruction set */
199	#define mem_barrier() \
200	__asm__ __volatile__( \
201	".set push\n\t" \
202	".set noreorder\n\t" \
203	".set mips2\n\t" \
204	"sync\n\t" \
205	".set pop" \
206	: /* no output */ \
207	: /* no input */ \
208	: "memory")
209	#define write_mem_barrier() mem_barrier()
210
211	#elif defined __powerpc__
212
213	#if defined(linux) && defined(__powerpc64__)
214	#include <linux/version.h>
215	#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
216	#include <asm/memory.h>
217	#endif
218	#endif /* defined(linux) && defined(__powerpc64__) */
219
220	#ifndef eieio /* We deal with arch-specific eieio() routines above... */
221	#define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
222	#endif /* eieio */
223	#define mem_barrier() eieio()
224	#define write_mem_barrier() eieio()
225
226	#elif defined __sparc__
227
228	#define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
229	#define mem_barrier() /* XXX: nop for now */
230	#define write_mem_barrier() /* XXX: nop for now */
231	#endif
232	#endif /* __GNUC__ */
233	#endif /* NO_INLINE */
234
235	#ifndef mem_barrier
236	#define mem_barrier() /* NOP */
237	#endif
238
239	#ifndef write_mem_barrier
240	#define write_mem_barrier() /* NOP */
241	#endif
242
243	#ifndef NO_INLINE
244	#ifdef __GNUC__
245
246	/* Define some packed structures to use with unaligned accesses */
247
248	struct __una_u64 {
249	uint64_t x __attribute__ ((packed));
250	};
251	struct __una_u32 {
252	uint32_t x __attribute__ ((packed));
253	};
254	struct __una_u16 {
255	uint16_t x __attribute__ ((packed));
256	};
257
258	/* Elemental unaligned loads */
259
260	static __inline__ uint64_t
261	ldq_u(uint64_t * p)
262	{
263	const struct __una_u64 ptr = (const struct __una_u64 ) p;
264
265	return ptr->x;
266	}
267
268	static __inline__ uint32_t
269	ldl_u(uint32_t * p)
270	{
271	const struct __una_u32 ptr = (const struct __una_u32 ) p;
272
273	return ptr->x;
274	}
275
276	static __inline__ uint16_t
277	ldw_u(uint16_t * p)
278	{
279	const struct __una_u16 ptr = (const struct __una_u16 ) p;
280
281	return ptr->x;
282	}
283
284	/* Elemental unaligned stores */
285
286	static __inline__ void
287	stq_u(uint64_t val, uint64_t * p)
288	{
289	struct __una_u64 ptr = (struct __una_u64 ) p;
290
291	ptr->x = val;
292	}
293
294	static __inline__ void
295	stl_u(uint32_t val, uint32_t * p)
296	{
297	struct __una_u32 ptr = (struct __una_u32 ) p;
298
299	ptr->x = val;
300	}
301
302	static __inline__ void
303	stw_u(uint16_t val, uint16_t * p)
304	{
305	struct __una_u16 ptr = (struct __una_u16 ) p;
306
307	ptr->x = val;
308	}
309	#else /* !__GNUC__ */
310
311	#include <string.h> /* needed for memmove */
312
313	static __inline__ uint64_t
314	ldq_u(uint64_t * p)
315	{
316	uint64_t ret;
317
318	memmove(&ret, p, sizeof(*p));
319	return ret;
320	}
321
322	static __inline__ uint32_t
323	ldl_u(uint32_t * p)
324	{
325	uint32_t ret;
326
327	memmove(&ret, p, sizeof(*p));
328	return ret;
329	}
330
331	static __inline__ uint16_t
332	ldw_u(uint16_t * p)
333	{
334	uint16_t ret;
335
336	memmove(&ret, p, sizeof(*p));
337	return ret;
338	}
339
340	static __inline__ void
341	stq_u(uint64_t val, uint64_t * p)
342	{
343	uint64_t tmp = val;
344
345	memmove(p, &tmp, sizeof(*p));
346	}
347
348	static __inline__ void
349	stl_u(uint32_t val, uint32_t * p)
350	{
351	uint32_t tmp = val;
352
353	memmove(p, &tmp, sizeof(*p));
354	}
355
356	static __inline__ void
357	stw_u(uint16_t val, uint16_t * p)
358	{
359	uint16_t tmp = val;
360
361	memmove(p, &tmp, sizeof(*p));
362	}
363
364	#endif /* __GNUC__ */
365	#endif /* NO_INLINE */
366
367	#ifndef NO_INLINE
368	#ifdef __GNUC__
369	#if (defined(linux) \|\| defined(__FreeBSD__) \|\| defined(__NetBSD__) \|\| defined(__OpenBSD__)) && (defined(__alpha__))
370
371	#ifdef linux
372	/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
373	/* note that the appropriate setup via "ioperm" needs to be done */
374	/* before any inx/outx is done. */
375
376	extern _X_EXPORT void _outb(unsigned char val, unsigned long port);
377	extern _X_EXPORT void _outw(unsigned short val, unsigned long port);
378	extern _X_EXPORT void _outl(unsigned int val, unsigned long port);
379	extern _X_EXPORT unsigned int _inb(unsigned long port);
380	extern _X_EXPORT unsigned int _inw(unsigned long port);
381	extern _X_EXPORT unsigned int _inl(unsigned long port);
382
383	static __inline__ void
384	outb(unsigned long port, unsigned char val)
385	{
386	_outb(val, port);
387	}
388
389	static __inline__ void
390	outw(unsigned long port, unsigned short val)
391	{
392	_outw(val, port);
393	}
394
395	static __inline__ void
396	outl(unsigned long port, unsigned int val)
397	{
398	_outl(val, port);
399	}
400
401	static __inline__ unsigned int
402	inb(unsigned long port)
403	{
404	return _inb(port);
405	}
406
407	static __inline__ unsigned int
408	inw(unsigned long port)
409	{
410	return _inw(port);
411	}
412
413	static __inline__ unsigned int
414	inl(unsigned long port)
415	{
416	return _inl(port);
417	}
418
419	#endif /* linux */
420
421	#if (defined(__FreeBSD__) \|\| defined(__OpenBSD__)) \
422	&& !defined(DO_PROTOTYPES)
423
424	/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
425	/* inx/outx routines */
426	/* note that the appropriate setup via "ioperm" needs to be done */
427	/* before any inx/outx is done. */
428
429	extern _X_EXPORT void outb(unsigned int port, unsigned char val);
430	extern _X_EXPORT void outw(unsigned int port, unsigned short val);
431	extern _X_EXPORT void outl(unsigned int port, unsigned int val);
432	extern _X_EXPORT unsigned char inb(unsigned int port);
433	extern _X_EXPORT unsigned short inw(unsigned int port);
434	extern _X_EXPORT unsigned int inl(unsigned int port);
435
436	#endif /* (__FreeBSD__ \|\| __OpenBSD__ ) && !DO_PROTOTYPES */
437
438	#if defined(__NetBSD__)
439	#include <machine/pio.h>
440	#endif /* __NetBSD__ */
441
442	#elif (defined(linux) \|\| defined(__FreeBSD__)) && defined(__amd64__)
443
444	#include <inttypes.h>
445
446	static __inline__ void
447	outb(unsigned short port, unsigned char val)
448	{
449	__asm__ __volatile__("outb %0,%1"::"a"(val), "d"(port));
450	}
451
452	static __inline__ void
453	outw(unsigned short port, unsigned short val)
454	{
455	__asm__ __volatile__("outw %0,%1"::"a"(val), "d"(port));
456	}
457
458	static __inline__ void
459	outl(unsigned short port, unsigned int val)
460	{
461	__asm__ __volatile__("outl %0,%1"::"a"(val), "d"(port));
462	}
463
464	static __inline__ unsigned int
465	inb(unsigned short port)
466	{
467	unsigned char ret;
468	__asm__ __volatile__("inb %1,%0":"=a"(ret):"d"(port));
469
470	return ret;
471	}
472
473	static __inline__ unsigned int
474	inw(unsigned short port)
475	{
476	unsigned short ret;
477	__asm__ __volatile__("inw %1,%0":"=a"(ret):"d"(port));
478
479	return ret;
480	}
481
482	static __inline__ unsigned int
483	inl(unsigned short port)
484	{
485	unsigned int ret;
486	__asm__ __volatile__("inl %1,%0":"=a"(ret):"d"(port));
487
488	return ret;
489	}
490
491	#elif (defined(linux) \|\| defined(sun) \|\| defined(__OpenBSD__) \|\| defined(__FreeBSD__)) && defined(__sparc__)
492
493	#ifndef ASI_PL
494	#define ASI_PL 0x88
495	#endif
496
497	static __inline__ void
498	outb(unsigned long port, unsigned char val)
499	{
500	__asm__ __volatile__("stba %0, [%1] %2": /* No outputs */
501	:"r"(val), "r"(port), "i"(ASI_PL));
502
503	barrier();
504	}
505
506	static __inline__ void
507	outw(unsigned long port, unsigned short val)
508	{
509	__asm__ __volatile__("stha %0, [%1] %2": /* No outputs */
510	:"r"(val), "r"(port), "i"(ASI_PL));
511
512	barrier();
513	}
514
515	static __inline__ void
516	outl(unsigned long port, unsigned int val)
517	{
518	__asm__ __volatile__("sta %0, [%1] %2": /* No outputs */
519	:"r"(val), "r"(port), "i"(ASI_PL));
520
521	barrier();
522	}
523
524	static __inline__ unsigned int
525	inb(unsigned long port)
526	{
527	unsigned int ret;
528	__asm__ __volatile__("lduba [%1] %2, %0":"=r"(ret)
529	:"r"(port), "i"(ASI_PL));
530
531	return ret;
532	}
533
534	static __inline__ unsigned int
535	inw(unsigned long port)
536	{
537	unsigned int ret;
538	__asm__ __volatile__("lduha [%1] %2, %0":"=r"(ret)
539	:"r"(port), "i"(ASI_PL));
540
541	return ret;
542	}
543
544	static __inline__ unsigned int
545	inl(unsigned long port)
546	{
547	unsigned int ret;
548	__asm__ __volatile__("lda [%1] %2, %0":"=r"(ret)
549	:"r"(port), "i"(ASI_PL));
550
551	return ret;
552	}
553
554	static __inline__ unsigned char
555	xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
556	{
557	unsigned long addr = ((unsigned long) base) + offset;
558	unsigned char ret;
559
560	__asm__ __volatile__("lduba [%1] %2, %0":"=r"(ret)
561	:"r"(addr), "i"(ASI_PL));
562
563	return ret;
564	}
565
566	static __inline__ unsigned short
567	xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
568	{
569	unsigned long addr = ((unsigned long) base) + offset;
570	unsigned short ret;
571
572	__asm__ __volatile__("lduh [%1], %0":"=r"(ret)
573	:"r"(addr));
574
575	return ret;
576	}
577
578	static __inline__ unsigned short
579	xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
580	{
581	unsigned long addr = ((unsigned long) base) + offset;
582	unsigned short ret;
583
584	__asm__ __volatile__("lduha [%1] %2, %0":"=r"(ret)
585	:"r"(addr), "i"(ASI_PL));
586
587	return ret;
588	}
589
590	static __inline__ unsigned int
591	xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
592	{
593	unsigned long addr = ((unsigned long) base) + offset;
594	unsigned int ret;
595
596	__asm__ __volatile__("ld [%1], %0":"=r"(ret)
597	:"r"(addr));
598
599	return ret;
600	}
601
602	static __inline__ unsigned int
603	xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
604	{
605	unsigned long addr = ((unsigned long) base) + offset;
606	unsigned int ret;
607
608	__asm__ __volatile__("lda [%1] %2, %0":"=r"(ret)
609	:"r"(addr), "i"(ASI_PL));
610
611	return ret;
612	}
613
614	static __inline__ void
615	xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
616	const unsigned int val)
617	{
618	unsigned long addr = ((unsigned long) base) + offset;
619
620	__asm__ __volatile__("stba %0, [%1] %2": /* No outputs */
621	:"r"(val), "r"(addr), "i"(ASI_PL));
622
623	barrier();
624	}
625
626	static __inline__ void
627	xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
628	const unsigned int val)
629	{
630	unsigned long addr = ((unsigned long) base) + offset;
631
632	__asm__ __volatile__("sth %0, [%1]": /* No outputs */
633	:"r"(val), "r"(addr));
634
635	barrier();
636	}
637
638	static __inline__ void
639	xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
640	const unsigned int val)
641	{
642	unsigned long addr = ((unsigned long) base) + offset;
643
644	__asm__ __volatile__("stha %0, [%1] %2": /* No outputs */
645	:"r"(val), "r"(addr), "i"(ASI_PL));
646
647	barrier();
648	}
649
650	static __inline__ void
651	xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
652	const unsigned int val)
653	{
654	unsigned long addr = ((unsigned long) base) + offset;
655
656	__asm__ __volatile__("st %0, [%1]": /* No outputs */
657	:"r"(val), "r"(addr));
658
659	barrier();
660	}
661
662	static __inline__ void
663	xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
664	const unsigned int val)
665	{
666	unsigned long addr = ((unsigned long) base) + offset;
667
668	__asm__ __volatile__("sta %0, [%1] %2": /* No outputs */
669	:"r"(val), "r"(addr), "i"(ASI_PL));
670
671	barrier();
672	}
673
674	static __inline__ void
675	xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
676	const unsigned int val)
677	{
678	unsigned long addr = ((unsigned long) base) + offset;
679
680	__asm__ __volatile__("stba %0, [%1] %2": /* No outputs */
681	:"r"(val), "r"(addr), "i"(ASI_PL));
682	}
683
684	static __inline__ void
685	xf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,
686	const unsigned int val)
687	{
688	unsigned long addr = ((unsigned long) base) + offset;
689
690	__asm__ __volatile__("sth %0, [%1]": /* No outputs */
691	:"r"(val), "r"(addr));
692	}
693
694	static __inline__ void
695	xf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,
696	const unsigned int val)
697	{
698	unsigned long addr = ((unsigned long) base) + offset;
699
700	__asm__ __volatile__("stha %0, [%1] %2": /* No outputs */
701	:"r"(val), "r"(addr), "i"(ASI_PL));
702	}
703
704	static __inline__ void
705	xf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,
706	const unsigned int val)
707	{
708	unsigned long addr = ((unsigned long) base) + offset;
709
710	__asm__ __volatile__("st %0, [%1]": /* No outputs */
711	:"r"(val), "r"(addr));
712	}
713
714	static __inline__ void
715	xf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,
716	const unsigned int val)
717	{
718	unsigned long addr = ((unsigned long) base) + offset;
719
720	__asm__ __volatile__("sta %0, [%1] %2": /* No outputs */
721	:"r"(val), "r"(addr), "i"(ASI_PL));
722	}
723
724	#elif defined(__mips__) \|\| (defined(__arm32__) && !defined(__linux__))
725	#if defined(__arm32__) \|\| defined(__mips64)
726	#define PORT_SIZE long
727	#else
728	#define PORT_SIZE short
729	#endif
730
731	_X_EXPORT unsigned int IOPortBase; /* Memory mapped I/O port area */
732
733	static __inline__ void
734	outb(unsigned PORT_SIZE port, unsigned char val)
735	{
736	(volatile unsigned char ) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
737	val;
738	}
739
740	static __inline__ void
741	outw(unsigned PORT_SIZE port, unsigned short val)
742	{
743	(volatile unsigned short ) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
744	val;
745	}
746
747	static __inline__ void
748	outl(unsigned PORT_SIZE port, unsigned int val)
749	{
750	(volatile unsigned int ) (((unsigned PORT_SIZE) (port)) + IOPortBase) =
751	val;
752	}
753
754	static __inline__ unsigned int
755	inb(unsigned PORT_SIZE port)
756	{
757	return (volatile unsigned char ) (((unsigned PORT_SIZE) (port)) +
758	IOPortBase);
759	}
760
761	static __inline__ unsigned int
762	inw(unsigned PORT_SIZE port)
763	{
764	return (volatile unsigned short ) (((unsigned PORT_SIZE) (port)) +
765	IOPortBase);
766	}
767
768	static __inline__ unsigned int
769	inl(unsigned PORT_SIZE port)
770	{
771	return (volatile unsigned int ) (((unsigned PORT_SIZE) (port)) +
772	IOPortBase);
773	}
774
775	#if defined(__mips__)
776	#ifdef linux /* don't mess with other OSs */
777	#if X_BYTE_ORDER == X_BIG_ENDIAN
778	static __inline__ unsigned int
779	xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
780	{
781	unsigned long addr = ((unsigned long) base) + offset;
782	unsigned int ret;
783
784	__asm__ __volatile__("lw %0, 0(%1)":"=r"(ret)
785	:"r"(addr));
786
787	return ret;
788	}
789
790	static __inline__ void
791	xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
792	const unsigned int val)
793	{
794	unsigned long addr = ((unsigned long) base) + offset;
795
796	__asm__ __volatile__("sw %0, 0(%1)": /* No outputs */
797	:"r"(val), "r"(addr));
798	}
799	#endif
800	#endif /* !linux */
801	#endif /* __mips__ */
802
803	#elif (defined(linux) \|\| defined(__OpenBSD__) \|\| defined(__NetBSD__) \|\| defined(__FreeBSD__)) && defined(__powerpc__)
804
805	#ifndef MAP_FAILED
806	#define MAP_FAILED ((void *)-1)
807	#endif
808
809	extern _X_EXPORT volatile unsigned char *ioBase;
810
811	static __inline__ unsigned char
812	xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
813	{
814	register unsigned char val;
815	__asm__ __volatile__("lbzx %0,%1,%2\n\t" "eieio":"=r"(val)
816	:"b"(base), "r"(offset),
817	"m"(((volatile unsigned char ) base + offset)));
818	return val;
819	}
820
821	static __inline__ unsigned short
822	xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
823	{
824	register unsigned short val;
825	__asm__ __volatile__("lhzx %0,%1,%2\n\t" "eieio":"=r"(val)
826	:"b"(base), "r"(offset),
827	"m"(((volatile unsigned char ) base + offset)));
828	return val;
829	}
830
831	static __inline__ unsigned short
832	xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
833	{
834	register unsigned short val;
835	__asm__ __volatile__("lhbrx %0,%1,%2\n\t" "eieio":"=r"(val)
836	:"b"(base), "r"(offset),
837	"m"(((volatile unsigned char ) base + offset)));
838	return val;
839	}
840
841	static __inline__ unsigned int
842	xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
843	{
844	register unsigned int val;
845	__asm__ __volatile__("lwzx %0,%1,%2\n\t" "eieio":"=r"(val)
846	:"b"(base), "r"(offset),
847	"m"(((volatile unsigned char ) base + offset)));
848	return val;
849	}
850
851	static __inline__ unsigned int
852	xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
853	{
854	register unsigned int val;
855	__asm__ __volatile__("lwbrx %0,%1,%2\n\t" "eieio":"=r"(val)
856	:"b"(base), "r"(offset),
857	"m"(((volatile unsigned char ) base + offset)));
858	return val;
859	}
860
861	static __inline__ void
862	xf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,
863	const unsigned char val)
864	{
865	__asm__
866	__volatile__("stbx %1,%2,%3\n\t":"=m"
867	(((volatile unsigned char ) base + offset))
868	:"r"(val), "b"(base), "r"(offset));
869	}
870
871	static __inline__ void
872	xf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,
873	const unsigned short val)
874	{
875	__asm__
876	__volatile__("sthbrx %1,%2,%3\n\t":"=m"
877	(((volatile unsigned char ) base + offset))
878	:"r"(val), "b"(base), "r"(offset));
879	}
880
881	static __inline__ void
882	xf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,
883	const unsigned short val)
884	{
885	__asm__
886	__volatile__("sthx %1,%2,%3\n\t":"=m"
887	(((volatile unsigned char ) base + offset))
888	:"r"(val), "b"(base), "r"(offset));
889	}
890
891	static __inline__ void
892	xf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,
893	const unsigned int val)
894	{
895	__asm__
896	__volatile__("stwbrx %1,%2,%3\n\t":"=m"
897	(((volatile unsigned char ) base + offset))
898	:"r"(val), "b"(base), "r"(offset));
899	}
900
901	static __inline__ void
902	xf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,
903	const unsigned int val)
904	{
905	__asm__
906	__volatile__("stwx %1,%2,%3\n\t":"=m"
907	(((volatile unsigned char ) base + offset))
908	:"r"(val), "b"(base), "r"(offset));
909	}
910
911	static __inline__ void
912	xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
913	const unsigned char val)
914	{
915	xf86WriteMmioNB8(base, offset, val);
916	eieio();
917	}
918
919	static __inline__ void
920	xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
921	const unsigned short val)
922	{
923	xf86WriteMmioNB16Le(base, offset, val);
924	eieio();
925	}
926
927	static __inline__ void
928	xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
929	const unsigned short val)
930	{
931	xf86WriteMmioNB16Be(base, offset, val);
932	eieio();
933	}
934
935	static __inline__ void
936	xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
937	const unsigned int val)
938	{
939	xf86WriteMmioNB32Le(base, offset, val);
940	eieio();
941	}
942
943	static __inline__ void
944	xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
945	const unsigned int val)
946	{
947	xf86WriteMmioNB32Be(base, offset, val);
948	eieio();
949	}
950
951	static __inline__ void
952	outb(unsigned short port, unsigned char value)
953	{
954	if (ioBase == MAP_FAILED)
955	return;
956	xf86WriteMmio8((void *) ioBase, port, value);
957	}
958
959	static __inline__ void
960	outw(unsigned short port, unsigned short value)
961	{
962	if (ioBase == MAP_FAILED)
963	return;
964	xf86WriteMmio16Le((void *) ioBase, port, value);
965	}
966
967	static __inline__ void
968	outl(unsigned short port, unsigned int value)
969	{
970	if (ioBase == MAP_FAILED)
971	return;
972	xf86WriteMmio32Le((void *) ioBase, port, value);
973	}
974
975	static __inline__ unsigned int
976	inb(unsigned short port)
977	{
978	if (ioBase == MAP_FAILED)
979	return 0;
980	return xf86ReadMmio8((void *) ioBase, port);
981	}
982
983	static __inline__ unsigned int
984	inw(unsigned short port)
985	{
986	if (ioBase == MAP_FAILED)
987	return 0;
988	return xf86ReadMmio16Le((void *) ioBase, port);
989	}
990
991	static __inline__ unsigned int
992	inl(unsigned short port)
993	{
994	if (ioBase == MAP_FAILED)
995	return 0;
996	return xf86ReadMmio32Le((void *) ioBase, port);
997	}
998
999	#elif defined(__arm__) && defined(__linux__)
1000
1001	/* for Linux on ARM, we use the LIBC inx/outx routines */
1002	/* note that the appropriate setup via "ioperm" needs to be done */
1003	/* before any inx/outx is done. */
1004
1005	#include <sys/io.h>
1006
1007	static __inline__ void
1008	xf_outb(unsigned short port, unsigned char val)
1009	{
1010	outb(val, port);
1011	}
1012
1013	static __inline__ void
1014	xf_outw(unsigned short port, unsigned short val)
1015	{
1016	outw(val, port);
1017	}
1018
1019	static __inline__ void
1020	xf_outl(unsigned short port, unsigned int val)
1021	{
1022	outl(val, port);
1023	}
1024
1025	#define outb xf_outb
1026	#define outw xf_outw
1027	#define outl xf_outl
1028
1029	#elif defined(__nds32__)
1030
1031	/*
1032	* Assume all port access are aligned. We need to revise this implementation
1033	* if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
1034	* stw_u, they are assumed unaligned.
1035	*/
1036
1037	#define barrier() /* no barrier */
1038
1039	#define PORT_SIZE long
1040
1041	static __inline__ unsigned char
1042	xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
1043	{
1044	return (volatile unsigned char ) ((unsigned char *) base + offset);
1045	}
1046
1047	static __inline__ void
1048	xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
1049	const unsigned int val)
1050	{
1051	(volatile unsigned char ) ((unsigned char *) base + offset) = val;
1052	barrier();
1053	}
1054
1055	static __inline__ void
1056	xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
1057	const unsigned int val)
1058	{
1059	(volatile unsigned char ) ((unsigned char *) base + offset) = val;
1060	}
1061
1062	static __inline__ unsigned short
1063	xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
1064	{
1065	unsigned long addr = ((unsigned long) base) + offset;
1066	unsigned short ret;
1067
1068	__asm__ __volatile__("lhi %0, [%1];\n\t" "wsbh %0, %0;\n\t":"=r"(ret)
1069	:"r"(addr));
1070
1071	return ret;
1072	}
1073
1074	static __inline__ unsigned short
1075	xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
1076	{
1077	return (volatile unsigned short ) ((char *) base + offset);
1078	}
1079
1080	static __inline__ void
1081	xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
1082	const unsigned int val)
1083	{
1084	unsigned long addr = ((unsigned long) base) + offset;
1085
1086	__asm__ __volatile__("wsbh %0, %0;\n\t" "shi %0, [%1];\n\t": /* No outputs */
1087	:"r"(val), "r"(addr));
1088
1089	barrier();
1090	}
1091
1092	static __inline__ void
1093	xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
1094	const unsigned int val)
1095	{
1096	(volatile unsigned short ) ((unsigned char *) base + offset) = val;
1097	barrier();
1098	}
1099
1100	static __inline__ void
1101	xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,
1102	const unsigned int val)
1103	{
1104	unsigned long addr = ((unsigned long) base) + offset;
1105
1106	__asm__ __volatile__("wsbh %0, %0;\n\t" "shi %0, [%1];\n\t": /* No outputs */
1107	:"r"(val), "r"(addr));
1108	}
1109
1110	static __inline__ void
1111	xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,
1112	const unsigned int val)
1113	{
1114	(volatile unsigned short ) ((unsigned char *) base + offset) = val;
1115	}
1116
1117	static __inline__ unsigned int
1118	xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
1119	{
1120	unsigned long addr = ((unsigned long) base) + offset;
1121	unsigned int ret;
1122
1123	__asm__ __volatile__("lwi %0, [%1];\n\t"
1124	"wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t":"=r"(ret)
1125	:"r"(addr));
1126
1127	return ret;
1128	}
1129
1130	static __inline__ unsigned int
1131	xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
1132	{
1133	return (volatile unsigned int ) ((unsigned char *) base + offset);
1134	}
1135
1136	static __inline__ void
1137	xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
1138	const unsigned int val)
1139	{
1140	unsigned long addr = ((unsigned long) base) + offset;
1141
1142	__asm__ __volatile__("wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t" "swi %0, [%1];\n\t": /* No outputs */
1143	:"r"(val), "r"(addr));
1144
1145	barrier();
1146	}
1147
1148	static __inline__ void
1149	xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
1150	const unsigned int val)
1151	{
1152	(volatile unsigned int ) ((unsigned char *) base + offset) = val;
1153	barrier();
1154	}
1155
1156	static __inline__ void
1157	xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,
1158	const unsigned int val)
1159	{
1160	unsigned long addr = ((unsigned long) base) + offset;
1161
1162	__asm__ __volatile__("wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t" "swi %0, [%1];\n\t": /* No outputs */
1163	:"r"(val), "r"(addr));
1164	}
1165
1166	static __inline__ void
1167	xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,
1168	const unsigned int val)
1169	{
1170	(volatile unsigned int ) ((unsigned char *) base + offset) = val;
1171	}
1172
1173	#if defined(NDS32_MMIO_SWAP)
1174	static __inline__ void
1175	outb(unsigned PORT_SIZE port, unsigned char val)
1176	{
1177	xf86WriteMmio8(IOPortBase, port, val);
1178	}
1179
1180	static __inline__ void
1181	outw(unsigned PORT_SIZE port, unsigned short val)
1182	{
1183	xf86WriteMmio16Swap(IOPortBase, port, val);
1184	}
1185
1186	static __inline__ void
1187	outl(unsigned PORT_SIZE port, unsigned int val)
1188	{
1189	xf86WriteMmio32Swap(IOPortBase, port, val);
1190	}
1191
1192	static __inline__ unsigned int
1193	inb(unsigned PORT_SIZE port)
1194	{
1195	return xf86ReadMmio8(IOPortBase, port);
1196	}
1197
1198	static __inline__ unsigned int
1199	inw(unsigned PORT_SIZE port)
1200	{
1201	return xf86ReadMmio16Swap(IOPortBase, port);
1202	}
1203
1204	static __inline__ unsigned int
1205	inl(unsigned PORT_SIZE port)
1206	{
1207	return xf86ReadMmio32Swap(IOPortBase, port);
1208	}
1209
1210	static __inline__ unsigned long
1211	ldq_u(unsigned long *p)
1212	{
1213	unsigned long addr = (unsigned long) p;
1214	unsigned int ret;
1215
1216	__asm__ __volatile__("lmw.bi %0, [%1], %0, 0;\n\t"
1217	"wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t":"=r"(ret)
1218	:"r"(addr));
1219
1220	return ret;
1221	}
1222
1223	static __inline__ unsigned long
1224	ldl_u(unsigned int *p)
1225	{
1226	unsigned long addr = (unsigned long) p;
1227	unsigned int ret;
1228
1229	__asm__ __volatile__("lmw.bi %0, [%1], %0, 0;\n\t"
1230	"wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t":"=r"(ret)
1231	:"r"(addr));
1232
1233	return ret;
1234	}
1235
1236	static __inline__ void
1237	stq_u(unsigned long val, unsigned long *p)
1238	{
1239	unsigned long addr = (unsigned long) p;
1240
1241	__asm__ __volatile__("wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t" "smw.bi %0, [%1], %0, 0;\n\t": /* No outputs */
1242	:"r"(val), "r"(addr));
1243	}
1244
1245	static __inline__ void
1246	stl_u(unsigned long val, unsigned int *p)
1247	{
1248	unsigned long addr = (unsigned long) p;
1249
1250	__asm__ __volatile__("wsbh %0, %0;\n\t" "rotri %0, %0, 16;\n\t" "smw.bi %0, [%1], %0, 0;\n\t": /* No outputs */
1251	:"r"(val), "r"(addr));
1252	}
1253
1254	#else /* !NDS32_MMIO_SWAP */
1255	static __inline__ void
1256	outb(unsigned PORT_SIZE port, unsigned char val)
1257	{
1258	(volatile unsigned char ) (((unsigned PORT_SIZE) (port))) = val;
1259	barrier();
1260	}
1261
1262	static __inline__ void
1263	outw(unsigned PORT_SIZE port, unsigned short val)
1264	{
1265	(volatile unsigned short ) (((unsigned PORT_SIZE) (port))) = val;
1266	barrier();
1267	}
1268
1269	static __inline__ void
1270	outl(unsigned PORT_SIZE port, unsigned int val)
1271	{
1272	(volatile unsigned int ) (((unsigned PORT_SIZE) (port))) = val;
1273	barrier();
1274	}
1275
1276	static __inline__ unsigned int
1277	inb(unsigned PORT_SIZE port)
1278	{
1279	return (volatile unsigned char ) (((unsigned PORT_SIZE) (port)));
1280	}
1281
1282	static __inline__ unsigned int
1283	inw(unsigned PORT_SIZE port)
1284	{
1285	return (volatile unsigned short ) (((unsigned PORT_SIZE) (port)));
1286	}
1287
1288	static __inline__ unsigned int
1289	inl(unsigned PORT_SIZE port)
1290	{
1291	return (volatile unsigned int ) (((unsigned PORT_SIZE) (port)));
1292	}
1293
1294	static __inline__ unsigned long
1295	ldq_u(unsigned long *p)
1296	{
1297	unsigned long addr = (unsigned long) p;
1298	unsigned int ret;
1299
1300	__asm__ __volatile__("lmw.bi %0, [%1], %0, 0;\n\t":"=r"(ret)
1301	:"r"(addr));
1302
1303	return ret;
1304	}
1305
1306	static __inline__ unsigned long
1307	ldl_u(unsigned int *p)
1308	{
1309	unsigned long addr = (unsigned long) p;
1310	unsigned int ret;
1311
1312	__asm__ __volatile__("lmw.bi %0, [%1], %0, 0;\n\t":"=r"(ret)
1313	:"r"(addr));
1314
1315	return ret;
1316	}
1317
1318	static __inline__ void
1319	stq_u(unsigned long val, unsigned long *p)
1320	{
1321	unsigned long addr = (unsigned long) p;
1322
1323	__asm__ __volatile__("smw.bi %0, [%1], %0, 0;\n\t": /* No outputs */
1324	:"r"(val), "r"(addr));
1325	}
1326
1327	static __inline__ void
1328	stl_u(unsigned long val, unsigned int *p)
1329	{
1330	unsigned long addr = (unsigned long) p;
1331
1332	__asm__ __volatile__("smw.bi %0, [%1], %0, 0;\n\t": /* No outputs */
1333	:"r"(val), "r"(addr));
1334	}
1335	#endif /* NDS32_MMIO_SWAP */
1336
1337	#if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) \|\| ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
1338	#define ldw_u(p) (((unsigned char )(p)) << 8 \| \
1339	(((unsigned char )(p)+1)))
1340	#define stw_u(v,p) ((unsigned char )(p)) = ((v) >> 8); \
1341	(((unsigned char )(p)+1)) = (v)
1342	#else
1343	#define ldw_u(p) (((unsigned char )(p)) \| \
1344	(((unsigned char )(p)+1)<<8))
1345	#define stw_u(v,p) ((unsigned char )(p)) = (v); \
1346	(((unsigned char )(p)+1)) = ((v) >> 8)
1347	#endif
1348
1349	#define mem_barrier() /* XXX: nop for now */
1350	#define write_mem_barrier() /* XXX: nop for now */
1351
1352	#else /* ix86 */
1353
1354	#if !defined(__SUNPRO_C)
1355	#if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && \
1356	!defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && \
1357	!defined(__m32r__) && !defined(__aarch64__) && !defined(__arc__) && \
1358	!defined(__xtensa__)
1359	#ifdef GCCUSESGAS
1360
1361	/*
1362	* If gcc uses gas rather than the native assembler, the syntax of these
1363	* inlines has to be different. DHD
1364	*/
1365
1366	static __inline__ void
1367	outb(unsigned short port, unsigned char val)
1368	{
1369	__asm__ __volatile__("outb %0,%1"::"a"(val), "d"(port));
1370	}
1371
1372	static __inline__ void
1373	outw(unsigned short port, unsigned short val)
1374	{
1375	__asm__ __volatile__("outw %0,%1"::"a"(val), "d"(port));
1376	}
1377
1378	static __inline__ void
1379	outl(unsigned short port, unsigned int val)
1380	{
1381	__asm__ __volatile__("outl %0,%1"::"a"(val), "d"(port));
1382	}
1383
1384	static __inline__ unsigned int
1385	inb(unsigned short port)
1386	{
1387	unsigned char ret;
1388	__asm__ __volatile__("inb %1,%0":"=a"(ret):"d"(port));
1389
1390	return ret;
1391	}
1392
1393	static __inline__ unsigned int
1394	inw(unsigned short port)
1395	{
1396	unsigned short ret;
1397	__asm__ __volatile__("inw %1,%0":"=a"(ret):"d"(port));
1398
1399	return ret;
1400	}
1401
1402	static __inline__ unsigned int
1403	inl(unsigned short port)
1404	{
1405	unsigned int ret;
1406	__asm__ __volatile__("inl %1,%0":"=a"(ret):"d"(port));
1407
1408	return ret;
1409	}
1410
1411	#else /* GCCUSESGAS */
1412
1413	static __inline__ void
1414	outb(unsigned short port, unsigned char val)
1415	{
1416	__asm__ __volatile__("out%B0 (%1)"::"a"(val), "d"(port));
1417	}
1418
1419	static __inline__ void
1420	outw(unsigned short port, unsigned short val)
1421	{
1422	__asm__ __volatile__("out%W0 (%1)"::"a"(val), "d"(port));
1423	}
1424
1425	static __inline__ void
1426	outl(unsigned short port, unsigned int val)
1427	{
1428	__asm__ __volatile__("out%L0 (%1)"::"a"(val), "d"(port));
1429	}
1430
1431	static __inline__ unsigned int
1432	inb(unsigned short port)
1433	{
1434	unsigned char ret;
1435	__asm__ __volatile__("in%B0 (%1)":"=a"(ret):"d"(port));
1436
1437	return ret;
1438	}
1439
1440	static __inline__ unsigned int
1441	inw(unsigned short port)
1442	{
1443	unsigned short ret;
1444	__asm__ __volatile__("in%W0 (%1)":"=a"(ret):"d"(port));
1445
1446	return ret;
1447	}
1448
1449	static __inline__ unsigned int
1450	inl(unsigned short port)
1451	{
1452	unsigned int ret;
1453	__asm__ __volatile__("in%L0 (%1)":"=a"(ret):"d"(port));
1454
1455	return ret;
1456	}
1457
1458	#endif /* GCCUSESGAS */
1459
1460	#else /* !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) && !defined(__arc__) */
1461
1462	static __inline__ void
1463	outb(unsigned short port, unsigned char val)
1464	{
1465	}
1466
1467	static __inline__ void
1468	outw(unsigned short port, unsigned short val)
1469	{
1470	}
1471
1472	static __inline__ void
1473	outl(unsigned short port, unsigned int val)
1474	{
1475	}
1476
1477	static __inline__ unsigned int
1478	inb(unsigned short port)
1479	{
1480	return 0;
1481	}
1482
1483	static __inline__ unsigned int
1484	inw(unsigned short port)
1485	{
1486	return 0;
1487	}
1488
1489	static __inline__ unsigned int
1490	inl(unsigned short port)
1491	{
1492	return 0;
1493	}
1494
1495	#endif /* FAKEIT */
1496	#endif /* __SUNPRO_C */
1497
1498	#endif /* ix86 */
1499
1500	#else /* !GNUC */
1501	#if defined(__STDC__) && (__STDC__ == 1)
1502	#ifndef asm
1503	#define asm __asm
1504	#endif
1505	#endif
1506	#if !defined(__SUNPRO_C)
1507	#include <sys/inline.h>
1508	#endif
1509	#if !defined(__HIGHC__) && !defined(__SUNPRO_C) \|\| \
1510	defined(__USLC__)
1511	#pragma asm partial_optimization outl
1512	#pragma asm partial_optimization outw
1513	#pragma asm partial_optimization outb
1514	#pragma asm partial_optimization inl
1515	#pragma asm partial_optimization inw
1516	#pragma asm partial_optimization inb
1517	#endif
1518	#endif /* __GNUC__ */
1519
1520	#endif /* NO_INLINE */
1521
1522	#ifdef __alpha__
1523	/* entry points for Mmio memory access routines */
1524	extern _X_EXPORT int (xf86ReadMmio8) (void , unsigned long);
1525	extern _X_EXPORT int (xf86ReadMmio16) (void , unsigned long);
1526
1527	#ifndef STANDALONE_MMIO
1528	extern _X_EXPORT int (xf86ReadMmio32) (void , unsigned long);
1529	#else
1530	/* Some DRI 3D drivers need MMIO_IN32. */
1531	static __inline__ int
1532	xf86ReadMmio32(void *Base, unsigned long Offset)
1533	{
1534	mem_barrier();
1535	return (volatile unsigned int ) ((unsigned long) Base + (Offset));
1536	}
1537	#endif
1538	extern _X_EXPORT void (xf86WriteMmio8) (int, void , unsigned long);
1539	extern _X_EXPORT void (xf86WriteMmio16) (int, void , unsigned long);
1540	extern _X_EXPORT void (xf86WriteMmio32) (int, void , unsigned long);
1541	extern _X_EXPORT void (xf86WriteMmioNB8) (int, void , unsigned long);
1542	extern _X_EXPORT void (xf86WriteMmioNB16) (int, void , unsigned long);
1543	extern _X_EXPORT void (xf86WriteMmioNB32) (int, void , unsigned long);
1544	extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char , unsigned char ,
1545	int);
1546	extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char , unsigned char , int);
1547
1548	/* Some macros to hide the system dependencies for MMIO accesses */
1549	/* Changed to kill noise generated by gcc's -Wcast-align */
1550	#define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)
1551	#define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)
1552	#ifndef STANDALONE_MMIO
1553	#define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)
1554	#else
1555	#define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
1556	#endif
1557
1558	#define MMIO_OUT32(base, offset, val) \
1559	do { \
1560	write_mem_barrier(); \
1561	(volatile CARD32 )(void )(((CARD8)(base)) + (offset)) = (val); \
1562	} while (0)
1563	#define MMIO_ONB32(base, offset, val) \
1564	(volatile CARD32 )(void )(((CARD8)(base)) + (offset)) = (val)
1565
1566	#define MMIO_OUT8(base, offset, val) \
1567	(*xf86WriteMmio8)((CARD8)(val), base, offset)
1568	#define MMIO_OUT16(base, offset, val) \
1569	(*xf86WriteMmio16)((CARD16)(val), base, offset)
1570	#define MMIO_ONB8(base, offset, val) \
1571	(*xf86WriteMmioNB8)((CARD8)(val), base, offset)
1572	#define MMIO_ONB16(base, offset, val) \
1573	(*xf86WriteMmioNB16)((CARD16)(val), base, offset)
1574	#define MMIO_MOVE32(base, offset, val) \
1575	MMIO_OUT32(base, offset, val)
1576
1577	#elif defined(__powerpc__)
1578	/*
1579	* we provide byteswapping and no byteswapping functions here
1580	* with byteswapping as default,
1581	* drivers that don't need byteswapping should define PPC_MMIO_IS_BE
1582	*/
1583	#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1584	#define MMIO_OUT8(base, offset, val) \
1585	xf86WriteMmio8(base, offset, (CARD8)(val))
1586	#define MMIO_ONB8(base, offset, val) \
1587	xf86WriteMmioNB8(base, offset, (CARD8)(val))
1588
1589	#if defined(PPC_MMIO_IS_BE) /* No byteswapping */
1590	#define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
1591	#define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
1592	#define MMIO_OUT16(base, offset, val) \
1593	xf86WriteMmio16Be(base, offset, (CARD16)(val))
1594	#define MMIO_OUT32(base, offset, val) \
1595	xf86WriteMmio32Be(base, offset, (CARD32)(val))
1596	#define MMIO_ONB16(base, offset, val) \
1597	xf86WriteMmioNB16Be(base, offset, (CARD16)(val))
1598	#define MMIO_ONB32(base, offset, val) \
1599	xf86WriteMmioNB32Be(base, offset, (CARD32)(val))
1600	#else /* byteswapping is the default */
1601	#define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
1602	#define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
1603	#define MMIO_OUT16(base, offset, val) \
1604	xf86WriteMmio16Le(base, offset, (CARD16)(val))
1605	#define MMIO_OUT32(base, offset, val) \
1606	xf86WriteMmio32Le(base, offset, (CARD32)(val))
1607	#define MMIO_ONB16(base, offset, val) \
1608	xf86WriteMmioNB16Le(base, offset, (CARD16)(val))
1609	#define MMIO_ONB32(base, offset, val) \
1610	xf86WriteMmioNB32Le(base, offset, (CARD32)(val))
1611	#endif
1612
1613	#define MMIO_MOVE32(base, offset, val) \
1614	xf86WriteMmio32Be(base, offset, (CARD32)(val))
1615
1616	#elif defined(__sparc__) \|\| defined(sparc) \|\| defined(__sparc)
1617	/*
1618	* Like powerpc, we provide byteswapping and no byteswapping functions
1619	* here with byteswapping as default, drivers that don't need byteswapping
1620	* should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
1621	* do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
1622	* of drivers?).
1623	*/
1624	#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1625	#define MMIO_OUT8(base, offset, val) \
1626	xf86WriteMmio8(base, offset, (CARD8)(val))
1627	#define MMIO_ONB8(base, offset, val) \
1628	xf86WriteMmio8NB(base, offset, (CARD8)(val))
1629
1630	#if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
1631	#define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
1632	#define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
1633	#define MMIO_OUT16(base, offset, val) \
1634	xf86WriteMmio16Be(base, offset, (CARD16)(val))
1635	#define MMIO_OUT32(base, offset, val) \
1636	xf86WriteMmio32Be(base, offset, (CARD32)(val))
1637	#define MMIO_ONB16(base, offset, val) \
1638	xf86WriteMmio16BeNB(base, offset, (CARD16)(val))
1639	#define MMIO_ONB32(base, offset, val) \
1640	xf86WriteMmio32BeNB(base, offset, (CARD32)(val))
1641	#else /* byteswapping is the default */
1642	#define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
1643	#define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
1644	#define MMIO_OUT16(base, offset, val) \
1645	xf86WriteMmio16Le(base, offset, (CARD16)(val))
1646	#define MMIO_OUT32(base, offset, val) \
1647	xf86WriteMmio32Le(base, offset, (CARD32)(val))
1648	#define MMIO_ONB16(base, offset, val) \
1649	xf86WriteMmio16LeNB(base, offset, (CARD16)(val))
1650	#define MMIO_ONB32(base, offset, val) \
1651	xf86WriteMmio32LeNB(base, offset, (CARD32)(val))
1652	#endif
1653
1654	#define MMIO_MOVE32(base, offset, val) \
1655	xf86WriteMmio32Be(base, offset, (CARD32)(val))
1656
1657	#elif defined(__nds32__)
1658	/*
1659	* we provide byteswapping and no byteswapping functions here
1660	* with no byteswapping as default; when endianness of CPU core
1661	* and I/O devices don't match, byte swapping is necessary
1662	* drivers that need byteswapping should define NDS32_MMIO_SWAP
1663	*/
1664	#define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
1665	#define MMIO_OUT8(base, offset, val) \
1666	xf86WriteMmio8(base, offset, (CARD8)(val))
1667	#define MMIO_ONB8(base, offset, val) \
1668	xf86WriteMmioNB8(base, offset, (CARD8)(val))
1669
1670	#if defined(NDS32_MMIO_SWAP) /* byteswapping */
1671	#define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
1672	#define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
1673	#define MMIO_OUT16(base, offset, val) \
1674	xf86WriteMmio16Swap(base, offset, (CARD16)(val))
1675	#define MMIO_OUT32(base, offset, val) \
1676	xf86WriteMmio32Swap(base, offset, (CARD32)(val))
1677	#define MMIO_ONB16(base, offset, val) \
1678	xf86WriteMmioNB16Swap(base, offset, (CARD16)(val))
1679	#define MMIO_ONB32(base, offset, val) \
1680	xf86WriteMmioNB32Swap(base, offset, (CARD32)(val))
1681	#else /* no byteswapping is the default */
1682	#define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
1683	#define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
1684	#define MMIO_OUT16(base, offset, val) \
1685	xf86WriteMmio16(base, offset, (CARD16)(val))
1686	#define MMIO_OUT32(base, offset, val) \
1687	xf86WriteMmio32(base, offset, (CARD32)(val))
1688	#define MMIO_ONB16(base, offset, val) \
1689	xf86WriteMmioNB16(base, offset, (CARD16)(val))
1690	#define MMIO_ONB32(base, offset, val) \
1691	xf86WriteMmioNB32(base, offset, (CARD32)(val))
1692	#endif
1693
1694	#define MMIO_MOVE32(base, offset, val) \
1695	xf86WriteMmio32(base, offset, (CARD32)(val))
1696
1697	#ifdef N1213_HC /* for NDS32 N1213 hardcore */
1698	static __inline__ void
1699	nds32_flush_icache(char *addr)
1700	{
1701	__asm__ volatile ("isync %0;"
1702	"msync;"
1703	"isb;"
1704	"cctl %0,L1I_VA_INVAL;" "isb;"::"r" (addr):"memory");
1705	}
1706	#else
1707	static __inline__ void
1708	nds32_flush_icache(char *addr)
1709	{
1710	__asm__ volatile ("isync %0;" "isb;"::"r" (addr):"memory");
1711	}
1712	#endif
1713
1714	#else /* !__alpha__ && !__powerpc__ && !__sparc__ */
1715
1716	#define MMIO_IN8(base, offset) \
1717	(volatile CARD8 )(((CARD8*)(base)) + (offset))
1718	#define MMIO_IN16(base, offset) \
1719	(volatile CARD16 )(void )(((CARD8)(base)) + (offset))
1720	#define MMIO_IN32(base, offset) \
1721	(volatile CARD32 )(void )(((CARD8)(base)) + (offset))
1722	#define MMIO_OUT8(base, offset, val) \
1723	(volatile CARD8 )(((CARD8*)(base)) + (offset)) = (val)
1724	#define MMIO_OUT16(base, offset, val) \
1725	(volatile CARD16 )(void )(((CARD8)(base)) + (offset)) = (val)
1726	#define MMIO_OUT32(base, offset, val) \
1727	(volatile CARD32 )(void )(((CARD8)(base)) + (offset)) = (val)
1728	#define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val)
1729	#define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val)
1730	#define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val)
1731
1732	#define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)
1733
1734	#endif /* __alpha__ */
1735
1736	/*
1737	* With Intel, the version in os-support/misc/SlowBcopy.s is used.
1738	* This avoids port I/O during the copy (which causes problems with
1739	* some hardware).
1740	*/
1741	#ifdef __alpha__
1742	#define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
1743	#define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
1744	#else /* __alpha__ */
1745	#define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
1746	#define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
1747	#endif /* __alpha__ */
1748
1749	#endif /* _COMPILER_H */

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source: vbox/trunk/src/VBox/Additions/x11/x11include/xorg-server-1.16.0/compiler.h@ 52145

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